1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright 2016 MediaTek Inc. 3 * Copyright 2016 MediaTek Inc.
4 */ 4 */
5 5
6 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes. 7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-reg 8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/gpio.h>
10 #include "mt8173.dtsi" 10 #include "mt8173.dtsi"
11 11
12 / { 12 / {
13 aliases { 13 aliases {
14 mmc0 = &mmc0; 14 mmc0 = &mmc0;
15 mmc1 = &mmc1; 15 mmc1 = &mmc1;
16 mmc2 = &mmc3; 16 mmc2 = &mmc3;
17 }; 17 };
18 18
19 memory@40000000 { 19 memory@40000000 {
20 device_type = "memory"; 20 device_type = "memory";
21 reg = <0 0x40000000 0 0x800000 21 reg = <0 0x40000000 0 0x80000000>;
22 }; 22 };
23 23
24 backlight: backlight { 24 backlight: backlight {
25 compatible = "pwm-backlight"; 25 compatible = "pwm-backlight";
26 pwms = <&pwm0 0 1000000>; 26 pwms = <&pwm0 0 1000000>;
27 power-supply = <&bl_fixed_reg> 27 power-supply = <&bl_fixed_reg>;
28 enable-gpios = <&pio 95 GPIO_A 28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
29 29
30 pinctrl-names = "default"; 30 pinctrl-names = "default";
31 pinctrl-0 = <&panel_backlight_ 31 pinctrl-0 = <&panel_backlight_en_pins>;
32 status = "okay"; 32 status = "okay";
33 }; 33 };
34 34
35 bl_fixed_reg: fixedregulator2 { 35 bl_fixed_reg: fixedregulator2 {
36 compatible = "regulator-fixed" 36 compatible = "regulator-fixed";
37 regulator-name = "bl_fixed"; 37 regulator-name = "bl_fixed";
38 regulator-min-microvolt = <180 38 regulator-min-microvolt = <1800000>;
39 regulator-max-microvolt = <180 39 regulator-max-microvolt = <1800000>;
40 startup-delay-us = <1000>; 40 startup-delay-us = <1000>;
41 enable-active-high; 41 enable-active-high;
42 gpio = <&pio 32 GPIO_ACTIVE_HI 42 gpio = <&pio 32 GPIO_ACTIVE_HIGH>;
43 pinctrl-names = "default"; 43 pinctrl-names = "default";
44 pinctrl-0 = <&bl_fixed_pins>; 44 pinctrl-0 = <&bl_fixed_pins>;
45 }; 45 };
46 46
47 chosen { 47 chosen {
48 stdout-path = "serial0:115200n 48 stdout-path = "serial0:115200n8";
49 }; 49 };
50 50
51 gpio_keys: gpio-keys { 51 gpio_keys: gpio-keys {
52 compatible = "gpio-keys"; 52 compatible = "gpio-keys";
53 pinctrl-names = "default"; 53 pinctrl-names = "default";
54 pinctrl-0 = <&gpio_keys_pins>; 54 pinctrl-0 = <&gpio_keys_pins>;
55 55
56 switch-lid { 56 switch-lid {
57 label = "Lid"; 57 label = "Lid";
58 gpios = <&pio 69 GPIO_ 58 gpios = <&pio 69 GPIO_ACTIVE_LOW>;
59 linux,code = <SW_LID>; 59 linux,code = <SW_LID>;
60 linux,input-type = <EV 60 linux,input-type = <EV_SW>;
61 wakeup-source; !! 61 gpio-key,wakeup;
62 }; 62 };
63 63
64 switch-power { 64 switch-power {
65 label = "Power"; 65 label = "Power";
66 gpios = <&pio 14 GPIO_ 66 gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
67 linux,code = <KEY_POWE 67 linux,code = <KEY_POWER>;
68 debounce-interval = <3 68 debounce-interval = <30>;
69 wakeup-source; !! 69 gpio-key,wakeup;
70 }; 70 };
71 71
72 switch-tablet-mode { 72 switch-tablet-mode {
73 label = "Tablet_mode"; 73 label = "Tablet_mode";
74 gpios = <&pio 121 GPIO 74 gpios = <&pio 121 GPIO_ACTIVE_HIGH>;
75 linux,code = <SW_TABLE 75 linux,code = <SW_TABLET_MODE>;
76 linux,input-type = <EV 76 linux,input-type = <EV_SW>;
77 wakeup-source; !! 77 gpio-key,wakeup;
78 }; 78 };
79 79
80 switch-volume-down { 80 switch-volume-down {
81 label = "Volume_down"; 81 label = "Volume_down";
82 gpios = <&pio 123 GPIO 82 gpios = <&pio 123 GPIO_ACTIVE_LOW>;
83 linux,code = <KEY_VOLU 83 linux,code = <KEY_VOLUMEDOWN>;
84 }; 84 };
85 85
86 switch-volume-up { 86 switch-volume-up {
87 label = "Volume_up"; 87 label = "Volume_up";
88 gpios = <&pio 124 GPIO 88 gpios = <&pio 124 GPIO_ACTIVE_LOW>;
89 linux,code = <KEY_VOLU 89 linux,code = <KEY_VOLUMEUP>;
90 }; 90 };
91 }; 91 };
92 92
>> 93 panel: panel {
>> 94 compatible = "lg,lp120up1";
>> 95 power-supply = <&panel_fixed_3v3>;
>> 96 backlight = <&backlight>;
>> 97
>> 98 port {
>> 99 panel_in: endpoint {
>> 100 remote-endpoint = <&ps8640_out>;
>> 101 };
>> 102 };
>> 103 };
>> 104
93 panel_fixed_3v3: regulator1 { 105 panel_fixed_3v3: regulator1 {
94 compatible = "regulator-fixed" 106 compatible = "regulator-fixed";
95 regulator-name = "PANEL_3V3"; 107 regulator-name = "PANEL_3V3";
96 regulator-min-microvolt = <330 108 regulator-min-microvolt = <3300000>;
97 regulator-max-microvolt = <330 109 regulator-max-microvolt = <3300000>;
98 enable-active-high; 110 enable-active-high;
99 regulator-boot-on; <<
100 off-on-delay-us = <500000>; <<
101 gpio = <&pio 41 GPIO_ACTIVE_HI 111 gpio = <&pio 41 GPIO_ACTIVE_HIGH>;
102 pinctrl-names = "default"; 112 pinctrl-names = "default";
103 pinctrl-0 = <&panel_fixed_pins 113 pinctrl-0 = <&panel_fixed_pins>;
104 }; 114 };
105 115
106 ps8640_fixed_1v2: regulator2 { 116 ps8640_fixed_1v2: regulator2 {
107 compatible = "regulator-fixed" 117 compatible = "regulator-fixed";
108 regulator-name = "PS8640_1V2"; 118 regulator-name = "PS8640_1V2";
109 regulator-min-microvolt = <120 119 regulator-min-microvolt = <1200000>;
110 regulator-max-microvolt = <120 120 regulator-max-microvolt = <1200000>;
111 regulator-enable-ramp-delay = 121 regulator-enable-ramp-delay = <2000>;
112 enable-active-high; 122 enable-active-high;
113 regulator-boot-on; 123 regulator-boot-on;
114 gpio = <&pio 30 GPIO_ACTIVE_HI 124 gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
115 pinctrl-names = "default"; 125 pinctrl-names = "default";
116 pinctrl-0 = <&ps8640_fixed_pin 126 pinctrl-0 = <&ps8640_fixed_pins>;
117 }; 127 };
118 128
119 sdio_fixed_3v3: fixedregulator0 { 129 sdio_fixed_3v3: fixedregulator0 {
120 compatible = "regulator-fixed" 130 compatible = "regulator-fixed";
121 regulator-name = "3V3"; 131 regulator-name = "3V3";
122 regulator-min-microvolt = <330 132 regulator-min-microvolt = <3300000>;
123 regulator-max-microvolt = <330 133 regulator-max-microvolt = <3300000>;
124 gpio = <&pio 85 GPIO_ACTIVE_HI 134 gpio = <&pio 85 GPIO_ACTIVE_HIGH>;
125 pinctrl-names = "default"; 135 pinctrl-names = "default";
126 pinctrl-0 = <&sdio_fixed_3v3_p 136 pinctrl-0 = <&sdio_fixed_3v3_pins>;
127 }; 137 };
128 138
129 sound: sound { 139 sound: sound {
130 compatible = "mediatek,mt8173- 140 compatible = "mediatek,mt8173-rt5650";
131 mediatek,audio-codec = <&rt565 141 mediatek,audio-codec = <&rt5650 &hdmi0>;
132 mediatek,platform = <&afe>; 142 mediatek,platform = <&afe>;
133 pinctrl-names = "default"; 143 pinctrl-names = "default";
134 pinctrl-0 = <&aud_i2s2>; 144 pinctrl-0 = <&aud_i2s2>;
135 145
136 mediatek,mclk = <1>; 146 mediatek,mclk = <1>;
137 codec-capture { 147 codec-capture {
138 sound-dai = <&rt5650 1 148 sound-dai = <&rt5650 1>;
139 }; 149 };
140 }; 150 };
141 151
142 hdmicon: connector { 152 hdmicon: connector {
143 compatible = "hdmi-connector"; 153 compatible = "hdmi-connector";
144 label = "hdmi"; 154 label = "hdmi";
145 type = "a"; 155 type = "a";
146 ddc-i2c-bus = <&hdmiddc0>; 156 ddc-i2c-bus = <&hdmiddc0>;
147 157
148 port { 158 port {
149 hdmi_connector_in: end 159 hdmi_connector_in: endpoint {
150 remote-endpoin 160 remote-endpoint = <&hdmi0_out>;
151 }; 161 };
152 }; 162 };
153 }; 163 };
154 <<
155 watchdog { <<
156 compatible = "arm,smc-wdt"; <<
157 }; <<
158 }; <<
159 <<
160 /* <<
161 * Disable the original MMIO watch dog and swi <<
162 * operates on the same MMIO. <<
163 */ <<
164 &watchdog { <<
165 status = "disabled"; <<
166 }; 164 };
167 165
168 &mfg_async { 166 &mfg_async {
169 domain-supply = <&da9211_vgpu_reg>; 167 domain-supply = <&da9211_vgpu_reg>;
170 }; 168 };
171 169
172 &cec { 170 &cec {
173 status = "okay"; 171 status = "okay";
174 }; 172 };
175 173
176 &cpu0 { 174 &cpu0 {
177 proc-supply = <&mt6397_vpca15_reg>; 175 proc-supply = <&mt6397_vpca15_reg>;
178 }; 176 };
179 177
180 &cpu1 { 178 &cpu1 {
181 proc-supply = <&mt6397_vpca15_reg>; 179 proc-supply = <&mt6397_vpca15_reg>;
182 }; 180 };
183 181
184 &cpu2 { 182 &cpu2 {
185 proc-supply = <&da9211_vcpu_reg>; 183 proc-supply = <&da9211_vcpu_reg>;
186 sram-supply = <&mt6397_vsramca7_reg>; 184 sram-supply = <&mt6397_vsramca7_reg>;
187 }; 185 };
188 186
189 &cpu3 { 187 &cpu3 {
190 proc-supply = <&da9211_vcpu_reg>; 188 proc-supply = <&da9211_vcpu_reg>;
191 sram-supply = <&mt6397_vsramca7_reg>; 189 sram-supply = <&mt6397_vsramca7_reg>;
192 }; 190 };
193 191
194 &cpu_thermal { 192 &cpu_thermal {
195 sustainable-power = <4500>; /* milliwa 193 sustainable-power = <4500>; /* milliwatts */
196 trips { 194 trips {
197 threshold: trip-point0 { 195 threshold: trip-point0 {
198 temperature = <60000>; 196 temperature = <60000>;
199 }; 197 };
200 198
201 target: trip-point1 { 199 target: trip-point1 {
202 temperature = <65000>; 200 temperature = <65000>;
203 }; 201 };
204 }; 202 };
205 }; 203 };
206 204
207 &dsi0 { 205 &dsi0 {
208 status = "okay"; 206 status = "okay";
209 ports { 207 ports {
210 port { 208 port {
211 dsi0_out: endpoint { 209 dsi0_out: endpoint {
212 remote-endpoin 210 remote-endpoint = <&ps8640_in>;
213 }; 211 };
214 }; 212 };
215 }; 213 };
216 }; 214 };
217 215
218 &dpi0 { 216 &dpi0 {
219 status = "okay"; 217 status = "okay";
220 }; 218 };
221 219
222 &hdmi0 { 220 &hdmi0 {
223 status = "okay"; 221 status = "okay";
224 ports { 222 ports {
225 port@1 { 223 port@1 {
226 reg = <1>; 224 reg = <1>;
227 225
228 hdmi0_out: endpoint { 226 hdmi0_out: endpoint {
229 remote-endpoin 227 remote-endpoint = <&hdmi_connector_in>;
230 }; 228 };
231 }; 229 };
232 }; 230 };
233 }; 231 };
234 232
235 &hdmi_phy { 233 &hdmi_phy {
236 status = "okay"; 234 status = "okay";
237 mediatek,ibias = <0xc>; 235 mediatek,ibias = <0xc>;
238 }; 236 };
239 237
240 &i2c0 { 238 &i2c0 {
241 status = "okay"; 239 status = "okay";
242 240
243 rt5650: audio-codec@1a { 241 rt5650: audio-codec@1a {
244 compatible = "realtek,rt5650"; 242 compatible = "realtek,rt5650";
245 reg = <0x1a>; 243 reg = <0x1a>;
246 avdd-supply = <&mt6397_vgp1_re 244 avdd-supply = <&mt6397_vgp1_reg>;
247 cpvdd-supply = <&mt6397_vcama_ 245 cpvdd-supply = <&mt6397_vcama_reg>;
248 interrupts-extended = <&pio 3 !! 246 interrupt-parent = <&pio>;
>> 247 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
249 pinctrl-names = "default"; 248 pinctrl-names = "default";
250 pinctrl-0 = <&rt5650_irq>; 249 pinctrl-0 = <&rt5650_irq>;
251 #sound-dai-cells = <1>; 250 #sound-dai-cells = <1>;
252 realtek,dmic1-data-pin = <2>; 251 realtek,dmic1-data-pin = <2>;
253 realtek,jd-mode = <2>; 252 realtek,jd-mode = <2>;
254 }; 253 };
255 254
256 ps8640: edp-bridge@8 { 255 ps8640: edp-bridge@8 {
257 compatible = "parade,ps8640"; 256 compatible = "parade,ps8640";
258 reg = <0x8>; 257 reg = <0x8>;
259 powerdown-gpios = <&pio 127 GP 258 powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
260 reset-gpios = <&pio 115 GPIO_A 259 reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
261 pinctrl-names = "default"; 260 pinctrl-names = "default";
262 pinctrl-0 = <&ps8640_pins>; 261 pinctrl-0 = <&ps8640_pins>;
263 vdd12-supply = <&ps8640_fixed_ 262 vdd12-supply = <&ps8640_fixed_1v2>;
264 vdd33-supply = <&mt6397_vgp2_r 263 vdd33-supply = <&mt6397_vgp2_reg>;
265 264
266 ports { 265 ports {
267 #address-cells = <1>; 266 #address-cells = <1>;
268 #size-cells = <0>; 267 #size-cells = <0>;
269 268
270 port@0 { 269 port@0 {
271 reg = <0>; 270 reg = <0>;
272 271
273 ps8640_in: end 272 ps8640_in: endpoint {
274 remote 273 remote-endpoint = <&dsi0_out>;
275 }; 274 };
276 }; 275 };
277 276
278 port@1 { 277 port@1 {
279 reg = <1>; 278 reg = <1>;
280 279
281 ps8640_out: en 280 ps8640_out: endpoint {
282 remote 281 remote-endpoint = <&panel_in>;
283 }; 282 };
284 }; 283 };
285 }; 284 };
286 <<
287 aux-bus { <<
288 panel: panel { <<
289 compatible = " <<
290 power-supply = <<
291 backlight = <& <<
292 <<
293 port { <<
294 panel_ <<
295 <<
296 }; <<
297 }; <<
298 }; <<
299 }; <<
300 }; 285 };
301 }; 286 };
302 287
303 &i2c1 { 288 &i2c1 {
304 clock-frequency = <1500000>; 289 clock-frequency = <1500000>;
305 status = "okay"; 290 status = "okay";
306 291
307 da9211: da9211@68 { 292 da9211: da9211@68 {
308 compatible = "dlg,da9211"; 293 compatible = "dlg,da9211";
309 reg = <0x68>; 294 reg = <0x68>;
310 interrupts-extended = <&pio 15 !! 295 interrupt-parent = <&pio>;
>> 296 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
311 297
312 regulators { 298 regulators {
313 da9211_vcpu_reg: BUCKA 299 da9211_vcpu_reg: BUCKA {
314 regulator-name 300 regulator-name = "VBUCKA";
315 regulator-min- 301 regulator-min-microvolt = < 700000>;
316 regulator-max- 302 regulator-max-microvolt = <1310000>;
317 regulator-min- 303 regulator-min-microamp = <2000000>;
318 regulator-max- 304 regulator-max-microamp = <4400000>;
319 regulator-ramp 305 regulator-ramp-delay = <10000>;
320 regulator-alwa 306 regulator-always-on;
321 regulator-allo 307 regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
322 308 DA9211_BUCK_MODE_AUTO>;
323 }; 309 };
324 310
325 da9211_vgpu_reg: BUCKB 311 da9211_vgpu_reg: BUCKB {
326 regulator-name 312 regulator-name = "VBUCKB";
327 regulator-min- 313 regulator-min-microvolt = < 700000>;
328 regulator-max- 314 regulator-max-microvolt = <1310000>;
329 regulator-min- 315 regulator-min-microamp = <2000000>;
330 regulator-max- 316 regulator-max-microamp = <3000000>;
331 regulator-ramp 317 regulator-ramp-delay = <10000>;
332 }; 318 };
333 }; 319 };
334 }; 320 };
335 }; 321 };
336 322
337 &i2c2 { 323 &i2c2 {
338 status = "okay"; 324 status = "okay";
339 325
340 tpm: tpm@20 { 326 tpm: tpm@20 {
341 compatible = "infineon,slb9645 327 compatible = "infineon,slb9645tt";
342 reg = <0x20>; 328 reg = <0x20>;
343 powered-while-suspended; 329 powered-while-suspended;
344 }; 330 };
345 }; 331 };
346 332
347 &i2c3 { 333 &i2c3 {
348 clock-frequency = <400000>; 334 clock-frequency = <400000>;
349 status = "okay"; 335 status = "okay";
350 336
351 touchscreen: touchscreen@10 { 337 touchscreen: touchscreen@10 {
352 compatible = "elan,ekth3500"; 338 compatible = "elan,ekth3500";
353 reg = <0x10>; 339 reg = <0x10>;
354 interrupts-extended = <&pio 88 !! 340 interrupt-parent = <&pio>;
>> 341 interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
355 }; 342 };
356 }; 343 };
357 344
358 &i2c4 { 345 &i2c4 {
359 clock-frequency = <400000>; 346 clock-frequency = <400000>;
360 status = "okay"; 347 status = "okay";
361 pinctrl-names = "default"; 348 pinctrl-names = "default";
362 pinctrl-0 = <&trackpad_irq>; 349 pinctrl-0 = <&trackpad_irq>;
363 350
364 trackpad: trackpad@15 { 351 trackpad: trackpad@15 {
365 compatible = "elan,ekth3000"; 352 compatible = "elan,ekth3000";
366 interrupts-extended = <&pio 11 !! 353 interrupt-parent = <&pio>;
>> 354 interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
367 reg = <0x15>; 355 reg = <0x15>;
368 vcc-supply = <&mt6397_vgp6_reg 356 vcc-supply = <&mt6397_vgp6_reg>;
369 wakeup-source; 357 wakeup-source;
370 }; 358 };
371 }; 359 };
372 360
373 &mipi_tx0 { 361 &mipi_tx0 {
374 status = "okay"; 362 status = "okay";
375 }; 363 };
376 364
377 &mmc0 { 365 &mmc0 {
378 status = "okay"; 366 status = "okay";
379 pinctrl-names = "default", "state_uhs" 367 pinctrl-names = "default", "state_uhs";
380 pinctrl-0 = <&mmc0_pins_default>; 368 pinctrl-0 = <&mmc0_pins_default>;
381 pinctrl-1 = <&mmc0_pins_uhs>; 369 pinctrl-1 = <&mmc0_pins_uhs>;
382 bus-width = <8>; 370 bus-width = <8>;
383 max-frequency = <200000000>; 371 max-frequency = <200000000>;
384 cap-mmc-highspeed; 372 cap-mmc-highspeed;
385 mmc-hs200-1_8v; 373 mmc-hs200-1_8v;
386 mmc-hs400-1_8v; 374 mmc-hs400-1_8v;
387 cap-mmc-hw-reset; 375 cap-mmc-hw-reset;
388 hs400-ds-delay = <0x14015>; 376 hs400-ds-delay = <0x14015>;
389 mediatek,hs200-cmd-int-delay = <30>; 377 mediatek,hs200-cmd-int-delay = <30>;
390 mediatek,hs400-cmd-int-delay = <14>; 378 mediatek,hs400-cmd-int-delay = <14>;
391 mediatek,hs400-cmd-resp-sel-rising; 379 mediatek,hs400-cmd-resp-sel-rising;
392 vmmc-supply = <&mt6397_vemc_3v3_reg>; 380 vmmc-supply = <&mt6397_vemc_3v3_reg>;
393 vqmmc-supply = <&mt6397_vio18_reg>; 381 vqmmc-supply = <&mt6397_vio18_reg>;
394 assigned-clocks = <&topckgen CLK_TOP_M 382 assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
395 assigned-clock-parents = <&topckgen CL 383 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
396 non-removable; 384 non-removable;
397 }; 385 };
398 386
399 &mmc1 { 387 &mmc1 {
400 status = "okay"; 388 status = "okay";
401 pinctrl-names = "default", "state_uhs" 389 pinctrl-names = "default", "state_uhs";
402 pinctrl-0 = <&mmc1_pins_default>; 390 pinctrl-0 = <&mmc1_pins_default>;
403 pinctrl-1 = <&mmc1_pins_uhs>; 391 pinctrl-1 = <&mmc1_pins_uhs>;
404 bus-width = <4>; 392 bus-width = <4>;
405 max-frequency = <200000000>; 393 max-frequency = <200000000>;
406 cap-sd-highspeed; 394 cap-sd-highspeed;
407 sd-uhs-sdr50; 395 sd-uhs-sdr50;
408 sd-uhs-sdr104; 396 sd-uhs-sdr104;
409 cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>; 397 cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
410 vmmc-supply = <&mt6397_vmch_reg>; 398 vmmc-supply = <&mt6397_vmch_reg>;
411 vqmmc-supply = <&mt6397_vmc_reg>; 399 vqmmc-supply = <&mt6397_vmc_reg>;
412 }; 400 };
413 401
414 &mmc3 { 402 &mmc3 {
415 status = "okay"; 403 status = "okay";
416 pinctrl-names = "default", "state_uhs" 404 pinctrl-names = "default", "state_uhs";
417 pinctrl-0 = <&mmc3_pins_default>; 405 pinctrl-0 = <&mmc3_pins_default>;
418 pinctrl-1 = <&mmc3_pins_uhs>; 406 pinctrl-1 = <&mmc3_pins_uhs>;
419 bus-width = <4>; 407 bus-width = <4>;
420 max-frequency = <200000000>; 408 max-frequency = <200000000>;
421 cap-sd-highspeed; 409 cap-sd-highspeed;
422 sd-uhs-sdr50; 410 sd-uhs-sdr50;
423 sd-uhs-sdr104; 411 sd-uhs-sdr104;
424 keep-power-in-suspend; 412 keep-power-in-suspend;
425 wakeup-source; 413 wakeup-source;
426 cap-sdio-irq; 414 cap-sdio-irq;
427 vmmc-supply = <&sdio_fixed_3v3>; 415 vmmc-supply = <&sdio_fixed_3v3>;
428 vqmmc-supply = <&mt6397_vgp3_reg>; 416 vqmmc-supply = <&mt6397_vgp3_reg>;
429 non-removable; 417 non-removable;
430 cap-power-off-card; 418 cap-power-off-card;
431 419
432 #address-cells = <1>; 420 #address-cells = <1>;
433 #size-cells = <0>; 421 #size-cells = <0>;
434 422
435 btmrvl: btmrvl@2 { 423 btmrvl: btmrvl@2 {
436 compatible = "marvell,sd8897-b 424 compatible = "marvell,sd8897-bt";
437 reg = <2>; 425 reg = <2>;
438 interrupts-extended = <&pio 11 !! 426 interrupt-parent = <&pio>;
>> 427 interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
439 marvell,wakeup-pin = /bits/ 16 428 marvell,wakeup-pin = /bits/ 16 <0x0d>;
440 marvell,wakeup-gap-ms = /bits/ 429 marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
441 }; 430 };
442 431
443 mwifiex: mwifiex@1 { 432 mwifiex: mwifiex@1 {
444 compatible = "marvell,sd8897"; 433 compatible = "marvell,sd8897";
445 reg = <1>; 434 reg = <1>;
446 interrupts-extended = <&pio 38 !! 435 interrupt-parent = <&pio>;
>> 436 interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
447 marvell,wakeup-pin = <3>; 437 marvell,wakeup-pin = <3>;
448 }; 438 };
449 }; 439 };
450 440
451 &nor_flash { 441 &nor_flash {
452 status = "okay"; 442 status = "okay";
453 pinctrl-names = "default"; 443 pinctrl-names = "default";
454 pinctrl-0 = <&nor_gpio1_pins>; 444 pinctrl-0 = <&nor_gpio1_pins>;
455 445
456 flash@0 { 446 flash@0 {
457 compatible = "jedec,spi-nor"; 447 compatible = "jedec,spi-nor";
458 reg = <0>; 448 reg = <0>;
459 spi-max-frequency = <50000000> 449 spi-max-frequency = <50000000>;
460 }; 450 };
461 }; 451 };
462 452
463 &pio { 453 &pio {
464 gpio-line-names = "EC_INT_1V8", 454 gpio-line-names = "EC_INT_1V8",
465 "SD_CD_L", 455 "SD_CD_L",
466 "ALC5514_IRQ", 456 "ALC5514_IRQ",
467 "ALC5650_IRQ", 457 "ALC5650_IRQ",
468 /* 458 /*
469 * AP_FLASH_WP_L is 459 * AP_FLASH_WP_L is crossystem ABI. Schematics
470 * call it SFWP_B. 460 * call it SFWP_B.
471 */ 461 */
472 "AP_FLASH_WP_L", 462 "AP_FLASH_WP_L",
473 "SFIN", 463 "SFIN",
474 "SFCS0", 464 "SFCS0",
475 "SFHOLD", 465 "SFHOLD",
476 "SFOUT", 466 "SFOUT",
477 "SFCK", 467 "SFCK",
478 "WRAP_EVENT_S_EINT10 468 "WRAP_EVENT_S_EINT10",
479 "PMU_INT", 469 "PMU_INT",
480 "I2S2_WS_ALC5650", 470 "I2S2_WS_ALC5650",
481 "I2S2_BCK_ALC5650", 471 "I2S2_BCK_ALC5650",
482 "PWR_BTN_1V8", 472 "PWR_BTN_1V8",
483 "DA9212_IRQ", 473 "DA9212_IRQ",
484 "IDDIG", 474 "IDDIG",
485 "WATCHDOG", 475 "WATCHDOG",
486 "CEC", 476 "CEC",
487 "HDMISCK", 477 "HDMISCK",
488 "HDMISD", 478 "HDMISD",
489 "HTPLG", 479 "HTPLG",
490 "MSDC3_DAT0", 480 "MSDC3_DAT0",
491 "MSDC3_DAT1", 481 "MSDC3_DAT1",
492 "MSDC3_DAT2", 482 "MSDC3_DAT2",
493 "MSDC3_DAT3", 483 "MSDC3_DAT3",
494 "MSDC3_CLK", 484 "MSDC3_CLK",
495 "MSDC3_CMD", 485 "MSDC3_CMD",
496 "USB_C0_OC_FLAGB", 486 "USB_C0_OC_FLAGB",
497 "USBA_OC1_L", 487 "USBA_OC1_L",
498 "PS8640_1V2_ENABLE", 488 "PS8640_1V2_ENABLE",
499 "THERM_ALERT_N", 489 "THERM_ALERT_N",
500 "PANEL_LCD_POWER_EN" 490 "PANEL_LCD_POWER_EN",
501 "ANX7688_CHIP_PD_C", 491 "ANX7688_CHIP_PD_C",
502 "EC_IN_RW_1V8", 492 "EC_IN_RW_1V8",
503 "ANX7688_1V_EN_C", 493 "ANX7688_1V_EN_C",
504 "USB_DP_HPD_C", 494 "USB_DP_HPD_C",
505 "TPM_DAVINT_N", 495 "TPM_DAVINT_N",
506 "MARVELL8897_IRQ", 496 "MARVELL8897_IRQ",
507 "EN_USB_A0_PWR", 497 "EN_USB_A0_PWR",
508 "USBA_A0_OC_L", 498 "USBA_A0_OC_L",
509 "EN_PP3300_DX_EDP", 499 "EN_PP3300_DX_EDP",
510 "", 500 "",
511 "SOC_I2C2_1V8_SDA_40 501 "SOC_I2C2_1V8_SDA_400K",
512 "SOC_I2C2_1V8_SCL_40 502 "SOC_I2C2_1V8_SCL_400K",
513 "SOC_I2C0_1V8_SDA_40 503 "SOC_I2C0_1V8_SDA_400K",
514 "SOC_I2C0_1V8_SCL_40 504 "SOC_I2C0_1V8_SCL_400K",
515 "EMMC_ID1", 505 "EMMC_ID1",
516 "EMMC_ID0", 506 "EMMC_ID0",
517 "MEM_CONFIG3", 507 "MEM_CONFIG3",
518 "EMMC_ID2", 508 "EMMC_ID2",
519 "MEM_CONFIG1", 509 "MEM_CONFIG1",
520 "MEM_CONFIG2", 510 "MEM_CONFIG2",
521 "BRD_ID2", 511 "BRD_ID2",
522 "MEM_CONFIG0", 512 "MEM_CONFIG0",
523 "BRD_ID0", 513 "BRD_ID0",
524 "BRD_ID1", 514 "BRD_ID1",
525 "EMMC_DAT0", 515 "EMMC_DAT0",
526 "EMMC_DAT1", 516 "EMMC_DAT1",
527 "EMMC_DAT2", 517 "EMMC_DAT2",
528 "EMMC_DAT3", 518 "EMMC_DAT3",
529 "EMMC_DAT4", 519 "EMMC_DAT4",
530 "EMMC_DAT5", 520 "EMMC_DAT5",
531 "EMMC_DAT6", 521 "EMMC_DAT6",
532 "EMMC_DAT7", 522 "EMMC_DAT7",
533 "EMMC_CLK", 523 "EMMC_CLK",
534 "EMMC_CMD", 524 "EMMC_CMD",
535 "EMMC_RCLK", 525 "EMMC_RCLK",
536 "PLT_RST_L", 526 "PLT_RST_L",
537 "LID_OPEN_1V8_L", 527 "LID_OPEN_1V8_L",
538 "AUDIO_SPI_MISO_R", 528 "AUDIO_SPI_MISO_R",
539 "", 529 "",
540 "AC_OK_1V8", 530 "AC_OK_1V8",
541 "SD_DATA0", 531 "SD_DATA0",
542 "SD_DATA1", 532 "SD_DATA1",
543 "SD_DATA2", 533 "SD_DATA2",
544 "SD_DATA3", 534 "SD_DATA3",
545 "SD_CLK", 535 "SD_CLK",
546 "SD_CMD", 536 "SD_CMD",
547 "PWRAP_SPI0_MI", 537 "PWRAP_SPI0_MI",
548 "PWRAP_SPI0_MO", 538 "PWRAP_SPI0_MO",
549 "PWRAP_SPI0_CK", 539 "PWRAP_SPI0_CK",
550 "PWRAP_SPI0_CSN", 540 "PWRAP_SPI0_CSN",
551 "", 541 "",
552 "", 542 "",
553 "WIFI_PDN", 543 "WIFI_PDN",
554 "RTC32K_1V8", 544 "RTC32K_1V8",
555 "DISP_PWM0", 545 "DISP_PWM0",
556 "TOUCHSCREEN_INT_L", 546 "TOUCHSCREEN_INT_L",
557 "", 547 "",
558 "SRCLKENA0", 548 "SRCLKENA0",
559 "SRCLKENA1", 549 "SRCLKENA1",
560 "PS8640_MODE_CONF", 550 "PS8640_MODE_CONF",
561 "TOUCHSCREEN_RESET_R 551 "TOUCHSCREEN_RESET_R",
562 "PLATFORM_PROCHOT_L" 552 "PLATFORM_PROCHOT_L",
563 "PANEL_POWER_EN", 553 "PANEL_POWER_EN",
564 "REC_MODE_L", 554 "REC_MODE_L",
565 "EC_FW_UPDATE_L", 555 "EC_FW_UPDATE_L",
566 "ACCEL2_INT_L", 556 "ACCEL2_INT_L",
567 "HDMI_DP_INT", 557 "HDMI_DP_INT",
568 "ACCELGYRO3_INT_L", 558 "ACCELGYRO3_INT_L",
569 "ACCELGYRO4_INT_L", 559 "ACCELGYRO4_INT_L",
570 "SPI_EC_CLK", 560 "SPI_EC_CLK",
571 "SPI_EC_MI", 561 "SPI_EC_MI",
572 "SPI_EC_MO", 562 "SPI_EC_MO",
573 "SPI_EC_CSN", 563 "SPI_EC_CSN",
574 "SOC_I2C3_1V8_SDA_40 564 "SOC_I2C3_1V8_SDA_400K",
575 "SOC_I2C3_1V8_SCL_40 565 "SOC_I2C3_1V8_SCL_400K",
576 "", 566 "",
577 "", 567 "",
578 "", 568 "",
579 "", 569 "",
580 "", 570 "",
581 "", 571 "",
582 "", 572 "",
583 "PS8640_SYSRSTN_1V8" 573 "PS8640_SYSRSTN_1V8",
584 "APIN_MAX98090_DOUT2 574 "APIN_MAX98090_DOUT2",
585 "TP_INT_1V8_L_R", 575 "TP_INT_1V8_L_R",
586 "RST_USB_HUB_R", 576 "RST_USB_HUB_R",
587 "BT_WAKE_L", 577 "BT_WAKE_L",
588 "ACCEL1_INT_L", 578 "ACCEL1_INT_L",
589 "TABLET_MODE_L", 579 "TABLET_MODE_L",
590 "", 580 "",
591 "V_UP_IN_L_R", 581 "V_UP_IN_L_R",
592 "V_DOWN_IN_L_R", 582 "V_DOWN_IN_L_R",
593 "SOC_I2C1_1V8_SDA_1M 583 "SOC_I2C1_1V8_SDA_1M",
594 "SOC_I2C1_1V8_SCL_1M 584 "SOC_I2C1_1V8_SCL_1M",
595 "PS8640_PDN_1V8", 585 "PS8640_PDN_1V8",
596 "MAX98090_LRCLK", 586 "MAX98090_LRCLK",
597 "MAX98090_BCLK", 587 "MAX98090_BCLK",
598 "MAX98090_MCLK", 588 "MAX98090_MCLK",
599 "APOUT_MAX98090_DIN" 589 "APOUT_MAX98090_DIN",
600 "APIN_MAX98090_DOUT" 590 "APIN_MAX98090_DOUT",
601 "SOC_I2C4_1V8_SDA_40 591 "SOC_I2C4_1V8_SDA_400K",
602 "SOC_I2C4_1V8_SCL_40 592 "SOC_I2C4_1V8_SCL_400K";
603 593
604 aud_i2s2: aud_i2s2 { 594 aud_i2s2: aud_i2s2 {
605 pins1 { 595 pins1 {
606 pinmux = <MT8173_PIN_1 596 pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>,
607 <MT8173_PIN_1 597 <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>,
608 <MT8173_PIN_1 598 <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>,
609 <MT8173_PIN_1 599 <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>,
610 <MT8173_PIN_1 600 <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>,
611 <MT8173_PIN_1 601 <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>,
612 <MT8173_PIN_1 602 <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>;
613 bias-pull-down; 603 bias-pull-down;
614 }; 604 };
615 }; 605 };
616 606
617 bl_fixed_pins: bl_fixed_pins { 607 bl_fixed_pins: bl_fixed_pins {
618 pins1 { 608 pins1 {
619 pinmux = <MT8173_PIN_3 609 pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>;
620 output-low; 610 output-low;
621 }; 611 };
622 }; 612 };
623 613
624 bt_wake_pins: bt_wake_pins { 614 bt_wake_pins: bt_wake_pins {
625 pins1 { 615 pins1 {
626 pinmux = <MT8173_PIN_1 616 pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>;
627 bias-pull-up; 617 bias-pull-up;
628 }; 618 };
629 }; 619 };
630 620
631 disp_pwm0_pins: disp_pwm0_pins { 621 disp_pwm0_pins: disp_pwm0_pins {
632 pins1 { 622 pins1 {
633 pinmux = <MT8173_PIN_8 623 pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
634 output-low; 624 output-low;
635 }; 625 };
636 }; 626 };
637 627
638 gpio_keys_pins: gpio_keys_pins { 628 gpio_keys_pins: gpio_keys_pins {
639 volume_pins { 629 volume_pins {
640 pinmux = <MT8173_PIN_1 630 pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>,
641 <MT8173_PIN_1 631 <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>;
642 bias-pull-up; 632 bias-pull-up;
643 }; 633 };
644 634
645 tablet_mode_pins { 635 tablet_mode_pins {
646 pinmux = <MT8173_PIN_1 636 pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>;
647 bias-pull-up; 637 bias-pull-up;
648 }; 638 };
649 }; 639 };
650 640
651 hdmi_mux_pins: hdmi_mux_pins { 641 hdmi_mux_pins: hdmi_mux_pins {
652 pins1 { 642 pins1 {
653 pinmux = <MT8173_PIN_3 643 pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>;
654 }; 644 };
655 }; 645 };
656 646
657 i2c1_pins_a: i2c1 { 647 i2c1_pins_a: i2c1 {
658 da9211_pins { 648 da9211_pins {
659 pinmux = <MT8173_PIN_1 649 pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>;
660 bias-pull-up; 650 bias-pull-up;
661 }; 651 };
662 }; 652 };
663 653
664 mmc0_pins_default: mmc0default { 654 mmc0_pins_default: mmc0default {
665 pins_cmd_dat { 655 pins_cmd_dat {
666 pinmux = <MT8173_PIN_5 656 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
667 <MT8173_PIN_5 657 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
668 <MT8173_PIN_5 658 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
669 <MT8173_PIN_6 659 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
670 <MT8173_PIN_6 660 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
671 <MT8173_PIN_6 661 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
672 <MT8173_PIN_6 662 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
673 <MT8173_PIN_6 663 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
674 <MT8173_PIN_6 664 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
675 bias-pull-up; 665 bias-pull-up;
676 }; 666 };
677 667
678 pins_clk { 668 pins_clk {
679 pinmux = <MT8173_PIN_6 669 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
680 bias-pull-down; 670 bias-pull-down;
681 }; 671 };
682 672
683 pins_rst { 673 pins_rst {
684 pinmux = <MT8173_PIN_6 674 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
685 bias-pull-up; 675 bias-pull-up;
686 }; 676 };
687 }; 677 };
688 678
689 mmc1_pins_default: mmc1default { 679 mmc1_pins_default: mmc1default {
690 pins_cmd_dat { 680 pins_cmd_dat {
691 pinmux = <MT8173_PIN_7 681 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
692 <MT8173_PIN_7 682 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
693 <MT8173_PIN_7 683 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
694 <MT8173_PIN_7 684 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
695 <MT8173_PIN_7 685 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
696 input-enable; 686 input-enable;
697 drive-strength = <MTK_ 687 drive-strength = <MTK_DRIVE_4mA>;
698 bias-pull-up = <MTK_PU 688 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
699 }; 689 };
700 690
701 pins_clk { 691 pins_clk {
702 pinmux = <MT8173_PIN_7 692 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
703 bias-pull-down; 693 bias-pull-down;
704 drive-strength = <MTK_ 694 drive-strength = <MTK_DRIVE_4mA>;
705 }; 695 };
706 696
707 pins_insert { 697 pins_insert {
708 pinmux = <MT8173_PIN_1 698 pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>;
709 bias-pull-up; 699 bias-pull-up;
710 }; 700 };
711 }; 701 };
712 702
713 mmc3_pins_default: mmc3default { 703 mmc3_pins_default: mmc3default {
714 pins_dat { 704 pins_dat {
715 pinmux = <MT8173_PIN_2 705 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
716 <MT8173_PIN_2 706 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
717 <MT8173_PIN_2 707 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
718 <MT8173_PIN_2 708 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
719 input-enable; 709 input-enable;
720 drive-strength = <MTK_ 710 drive-strength = <MTK_DRIVE_8mA>;
721 bias-pull-up = <MTK_PU 711 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
722 }; 712 };
723 713
724 pins_cmd { 714 pins_cmd {
725 pinmux = <MT8173_PIN_2 715 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
726 input-enable; 716 input-enable;
727 drive-strength = <MTK_ 717 drive-strength = <MTK_DRIVE_8mA>;
728 bias-pull-up = <MTK_PU 718 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
729 }; 719 };
730 720
731 pins_clk { 721 pins_clk {
732 pinmux = <MT8173_PIN_2 722 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
733 bias-pull-down; 723 bias-pull-down;
734 drive-strength = <MTK_ 724 drive-strength = <MTK_DRIVE_8mA>;
735 }; 725 };
736 }; 726 };
737 727
738 mmc0_pins_uhs: mmc0 { 728 mmc0_pins_uhs: mmc0 {
739 pins_cmd_dat { 729 pins_cmd_dat {
740 pinmux = <MT8173_PIN_5 730 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
741 <MT8173_PIN_5 731 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
742 <MT8173_PIN_5 732 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
743 <MT8173_PIN_6 733 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
744 <MT8173_PIN_6 734 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
745 <MT8173_PIN_6 735 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
746 <MT8173_PIN_6 736 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
747 <MT8173_PIN_6 737 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
748 <MT8173_PIN_6 738 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
749 input-enable; 739 input-enable;
750 drive-strength = <MTK_ 740 drive-strength = <MTK_DRIVE_6mA>;
751 bias-pull-up = <MTK_PU 741 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
752 }; 742 };
753 743
754 pins_clk { 744 pins_clk {
755 pinmux = <MT8173_PIN_6 745 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
756 drive-strength = <MTK_ 746 drive-strength = <MTK_DRIVE_6mA>;
757 bias-pull-down = <MTK_ 747 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
758 }; 748 };
759 749
760 pins_ds { 750 pins_ds {
761 pinmux = <MT8173_PIN_6 751 pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>;
762 drive-strength = <MTK_ 752 drive-strength = <MTK_DRIVE_10mA>;
763 bias-pull-down = <MTK_ 753 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
764 }; 754 };
765 755
766 pins_rst { 756 pins_rst {
767 pinmux = <MT8173_PIN_6 757 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
768 bias-pull-up; 758 bias-pull-up;
769 }; 759 };
770 }; 760 };
771 761
772 mmc1_pins_uhs: mmc1 { 762 mmc1_pins_uhs: mmc1 {
773 pins_cmd_dat { 763 pins_cmd_dat {
774 pinmux = <MT8173_PIN_7 764 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
775 <MT8173_PIN_7 765 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
776 <MT8173_PIN_7 766 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
777 <MT8173_PIN_7 767 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
778 <MT8173_PIN_7 768 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
779 input-enable; 769 input-enable;
780 drive-strength = <MTK_ 770 drive-strength = <MTK_DRIVE_6mA>;
781 bias-pull-up = <MTK_PU 771 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
782 }; 772 };
783 773
784 pins_clk { 774 pins_clk {
785 pinmux = <MT8173_PIN_7 775 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
786 drive-strength = <MTK_ 776 drive-strength = <MTK_DRIVE_8mA>;
787 bias-pull-down = <MTK_ 777 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
788 }; 778 };
789 }; 779 };
790 780
791 mmc3_pins_uhs: mmc3 { 781 mmc3_pins_uhs: mmc3 {
792 pins_dat { 782 pins_dat {
793 pinmux = <MT8173_PIN_2 783 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
794 <MT8173_PIN_2 784 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
795 <MT8173_PIN_2 785 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
796 <MT8173_PIN_2 786 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
797 input-enable; 787 input-enable;
798 drive-strength = <MTK_ 788 drive-strength = <MTK_DRIVE_8mA>;
799 bias-pull-up = <MTK_PU 789 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
800 }; 790 };
801 791
802 pins_cmd { 792 pins_cmd {
803 pinmux = <MT8173_PIN_2 793 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
804 input-enable; 794 input-enable;
805 drive-strength = <MTK_ 795 drive-strength = <MTK_DRIVE_8mA>;
806 bias-pull-up = <MTK_PU 796 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
807 }; 797 };
808 798
809 pins_clk { 799 pins_clk {
810 pinmux = <MT8173_PIN_2 800 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
811 drive-strength = <MTK_ 801 drive-strength = <MTK_DRIVE_8mA>;
812 bias-pull-down = <MTK_ 802 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
813 }; 803 };
814 }; 804 };
815 805
816 nor_gpio1_pins: nor { 806 nor_gpio1_pins: nor {
817 pins1 { 807 pins1 {
818 pinmux = <MT8173_PIN_6 808 pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>,
819 <MT8173_PIN_7 809 <MT8173_PIN_7_EINT7__FUNC_SFHOLD>,
820 <MT8173_PIN_8 810 <MT8173_PIN_8_EINT8__FUNC_SFIN>;
821 input-enable; 811 input-enable;
822 drive-strength = <MTK_ 812 drive-strength = <MTK_DRIVE_4mA>;
823 bias-pull-up; 813 bias-pull-up;
824 }; 814 };
825 815
826 pins2 { 816 pins2 {
827 pinmux = <MT8173_PIN_5 817 pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>;
828 drive-strength = <MTK_ 818 drive-strength = <MTK_DRIVE_4mA>;
829 bias-pull-up; 819 bias-pull-up;
830 }; 820 };
831 821
832 pins_clk { 822 pins_clk {
833 pinmux = <MT8173_PIN_9 823 pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>;
834 input-enable; 824 input-enable;
835 drive-strength = <MTK_ 825 drive-strength = <MTK_DRIVE_4mA>;
836 bias-pull-up; 826 bias-pull-up;
837 }; 827 };
838 }; 828 };
839 829
840 panel_backlight_en_pins: panel_backlig 830 panel_backlight_en_pins: panel_backlight_en_pins {
841 pins1 { 831 pins1 {
842 pinmux = <MT8173_PIN_9 832 pinmux = <MT8173_PIN_95_PCM_TX__FUNC_GPIO95>;
843 }; 833 };
844 }; 834 };
845 835
846 panel_fixed_pins: panel_fixed_pins { 836 panel_fixed_pins: panel_fixed_pins {
847 pins1 { 837 pins1 {
848 pinmux = <MT8173_PIN_4 838 pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>;
849 }; 839 };
850 }; 840 };
851 841
852 ps8640_pins: ps8640_pins { 842 ps8640_pins: ps8640_pins {
853 pins1 { 843 pins1 {
854 pinmux = <MT8173_PIN_9 844 pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>,
855 <MT8173_PIN_1 845 <MT8173_PIN_115_URTS0__FUNC_GPIO115>,
856 <MT8173_PIN_1 846 <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>;
857 }; 847 };
858 }; 848 };
859 849
860 ps8640_fixed_pins: ps8640_fixed_pins { 850 ps8640_fixed_pins: ps8640_fixed_pins {
861 pins1 { 851 pins1 {
862 pinmux = <MT8173_PIN_3 852 pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>;
863 }; 853 };
864 }; 854 };
865 855
866 rt5650_irq: rt5650_irq { 856 rt5650_irq: rt5650_irq {
867 pins1 { 857 pins1 {
868 pinmux = <MT8173_PIN_3 858 pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>;
869 bias-pull-down; 859 bias-pull-down;
870 }; 860 };
871 }; 861 };
872 862
873 sdio_fixed_3v3_pins: sdio_fixed_3v3_pi 863 sdio_fixed_3v3_pins: sdio_fixed_3v3_pins {
874 pins1 { 864 pins1 {
875 pinmux = <MT8173_PIN_8 865 pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>;
876 output-low; 866 output-low;
877 }; 867 };
878 }; 868 };
879 869
880 spi_pins_a: spi1 { 870 spi_pins_a: spi1 {
881 pins1 { 871 pins1 {
882 pinmux = <MT8173_PIN_0 872 pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>;
883 bias-pull-up; 873 bias-pull-up;
884 }; 874 };
885 875
886 pins_spi { 876 pins_spi {
887 pinmux = <MT8173_PIN_1 877 pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>,
888 <MT8173_PIN_1 878 <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>,
889 <MT8173_PIN_1 879 <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>,
890 <MT8173_PIN_1 880 <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>;
891 bias-disable; 881 bias-disable;
892 }; 882 };
893 }; 883 };
894 884
895 trackpad_irq: trackpad_irq { 885 trackpad_irq: trackpad_irq {
896 pins1 { 886 pins1 {
897 pinmux = <MT8173_PIN_1 887 pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>;
898 input-enable; 888 input-enable;
899 bias-pull-up; 889 bias-pull-up;
900 }; 890 };
901 }; 891 };
902 892
903 usb_pins: usb { 893 usb_pins: usb {
904 pins1 { 894 pins1 {
905 pinmux = <MT8173_PIN_1 895 pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>;
906 output-high; 896 output-high;
907 bias-disable; 897 bias-disable;
908 }; 898 };
909 }; 899 };
910 900
911 wifi_wake_pins: wifi_wake_pins { 901 wifi_wake_pins: wifi_wake_pins {
912 pins1 { 902 pins1 {
913 pinmux = <MT8173_PIN_3 903 pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>;
914 bias-pull-up; 904 bias-pull-up;
915 }; 905 };
916 }; 906 };
917 }; 907 };
918 908
919 &pwm0 { 909 &pwm0 {
920 pinctrl-names = "default"; 910 pinctrl-names = "default";
921 pinctrl-0 = <&disp_pwm0_pins>; 911 pinctrl-0 = <&disp_pwm0_pins>;
922 status = "okay"; 912 status = "okay";
923 }; 913 };
924 914
925 &pwrap { 915 &pwrap {
926 pmic: pmic { !! 916 pmic: mt6397 {
927 compatible = "mediatek,mt6397" 917 compatible = "mediatek,mt6397";
928 #address-cells = <1>; 918 #address-cells = <1>;
929 #size-cells = <1>; 919 #size-cells = <1>;
930 interrupts-extended = <&pio 11 !! 920 interrupt-parent = <&pio>;
>> 921 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
931 interrupt-controller; 922 interrupt-controller;
932 #interrupt-cells = <2>; 923 #interrupt-cells = <2>;
933 924
934 clock: mt6397clock { 925 clock: mt6397clock {
935 compatible = "mediatek 926 compatible = "mediatek,mt6397-clk";
936 #clock-cells = <1>; 927 #clock-cells = <1>;
937 }; 928 };
938 929
939 pio6397: pinctrl { 930 pio6397: pinctrl {
940 compatible = "mediatek 931 compatible = "mediatek,mt6397-pinctrl";
>> 932 pins-are-numbered;
941 gpio-controller; 933 gpio-controller;
942 #gpio-cells = <2>; 934 #gpio-cells = <2>;
943 }; 935 };
944 936
945 regulator: mt6397regulator { 937 regulator: mt6397regulator {
946 compatible = "mediatek 938 compatible = "mediatek,mt6397-regulator";
947 939
948 mt6397_vpca15_reg: buc 940 mt6397_vpca15_reg: buck_vpca15 {
949 regulator-comp 941 regulator-compatible = "buck_vpca15";
950 regulator-name 942 regulator-name = "vpca15";
951 regulator-min- 943 regulator-min-microvolt = < 700000>;
952 regulator-max- 944 regulator-max-microvolt = <1350000>;
953 regulator-ramp 945 regulator-ramp-delay = <12500>;
954 regulator-alwa 946 regulator-always-on;
955 regulator-allo 947 regulator-allowed-modes = <0 1>;
956 }; 948 };
957 949
958 mt6397_vpca7_reg: buck 950 mt6397_vpca7_reg: buck_vpca7 {
959 regulator-comp 951 regulator-compatible = "buck_vpca7";
960 regulator-name 952 regulator-name = "vpca7";
961 regulator-min- 953 regulator-min-microvolt = < 700000>;
962 regulator-max- 954 regulator-max-microvolt = <1350000>;
963 regulator-ramp 955 regulator-ramp-delay = <12500>;
964 regulator-enab 956 regulator-enable-ramp-delay = <115>;
965 regulator-alwa 957 regulator-always-on;
966 }; 958 };
967 959
968 mt6397_vsramca15_reg: 960 mt6397_vsramca15_reg: buck_vsramca15 {
969 regulator-comp 961 regulator-compatible = "buck_vsramca15";
970 regulator-name 962 regulator-name = "vsramca15";
971 regulator-min- 963 regulator-min-microvolt = < 700000>;
972 regulator-max- 964 regulator-max-microvolt = <1350000>;
973 regulator-ramp 965 regulator-ramp-delay = <12500>;
974 regulator-alwa 966 regulator-always-on;
975 }; 967 };
976 968
977 mt6397_vsramca7_reg: b 969 mt6397_vsramca7_reg: buck_vsramca7 {
978 regulator-comp 970 regulator-compatible = "buck_vsramca7";
979 regulator-name 971 regulator-name = "vsramca7";
980 regulator-min- 972 regulator-min-microvolt = < 700000>;
981 regulator-max- 973 regulator-max-microvolt = <1350000>;
982 regulator-ramp 974 regulator-ramp-delay = <12500>;
983 regulator-alwa 975 regulator-always-on;
984 }; 976 };
985 977
986 mt6397_vcore_reg: buck 978 mt6397_vcore_reg: buck_vcore {
987 regulator-comp 979 regulator-compatible = "buck_vcore";
988 regulator-name 980 regulator-name = "vcore";
989 regulator-min- 981 regulator-min-microvolt = < 700000>;
990 regulator-max- 982 regulator-max-microvolt = <1350000>;
991 regulator-ramp 983 regulator-ramp-delay = <12500>;
992 regulator-alwa 984 regulator-always-on;
993 }; 985 };
994 986
995 mt6397_vgpu_reg: buck_ 987 mt6397_vgpu_reg: buck_vgpu {
996 regulator-comp 988 regulator-compatible = "buck_vgpu";
997 regulator-name 989 regulator-name = "vgpu";
998 regulator-min- 990 regulator-min-microvolt = < 700000>;
999 regulator-max- 991 regulator-max-microvolt = <1350000>;
1000 regulator-ram 992 regulator-ramp-delay = <12500>;
1001 regulator-ena 993 regulator-enable-ramp-delay = <115>;
1002 }; 994 };
1003 995
1004 mt6397_vdrm_reg: buck 996 mt6397_vdrm_reg: buck_vdrm {
1005 regulator-com 997 regulator-compatible = "buck_vdrm";
1006 regulator-nam 998 regulator-name = "vdrm";
1007 regulator-min 999 regulator-min-microvolt = <1200000>;
1008 regulator-max 1000 regulator-max-microvolt = <1400000>;
1009 regulator-ram 1001 regulator-ramp-delay = <12500>;
1010 regulator-alw 1002 regulator-always-on;
1011 }; 1003 };
1012 1004
1013 mt6397_vio18_reg: buc 1005 mt6397_vio18_reg: buck_vio18 {
1014 regulator-com 1006 regulator-compatible = "buck_vio18";
1015 regulator-nam 1007 regulator-name = "vio18";
1016 regulator-min 1008 regulator-min-microvolt = <1620000>;
1017 regulator-max 1009 regulator-max-microvolt = <1980000>;
1018 regulator-ram 1010 regulator-ramp-delay = <12500>;
1019 regulator-alw 1011 regulator-always-on;
1020 }; 1012 };
1021 1013
1022 mt6397_vtcxo_reg: ldo 1014 mt6397_vtcxo_reg: ldo_vtcxo {
1023 regulator-com 1015 regulator-compatible = "ldo_vtcxo";
1024 regulator-nam 1016 regulator-name = "vtcxo";
1025 regulator-alw 1017 regulator-always-on;
1026 }; 1018 };
1027 1019
1028 mt6397_va28_reg: ldo_ 1020 mt6397_va28_reg: ldo_va28 {
1029 regulator-com 1021 regulator-compatible = "ldo_va28";
1030 regulator-nam 1022 regulator-name = "va28";
1031 }; 1023 };
1032 1024
1033 mt6397_vcama_reg: ldo 1025 mt6397_vcama_reg: ldo_vcama {
1034 regulator-com 1026 regulator-compatible = "ldo_vcama";
1035 regulator-nam 1027 regulator-name = "vcama";
1036 regulator-min 1028 regulator-min-microvolt = <1800000>;
1037 regulator-max 1029 regulator-max-microvolt = <1800000>;
1038 regulator-ena 1030 regulator-enable-ramp-delay = <218>;
1039 }; 1031 };
1040 1032
1041 mt6397_vio28_reg: ldo 1033 mt6397_vio28_reg: ldo_vio28 {
1042 regulator-com 1034 regulator-compatible = "ldo_vio28";
1043 regulator-nam 1035 regulator-name = "vio28";
1044 regulator-alw 1036 regulator-always-on;
1045 }; 1037 };
1046 1038
1047 mt6397_vusb_reg: ldo_ 1039 mt6397_vusb_reg: ldo_vusb {
1048 regulator-com 1040 regulator-compatible = "ldo_vusb";
1049 regulator-nam 1041 regulator-name = "vusb";
1050 }; 1042 };
1051 1043
1052 mt6397_vmc_reg: ldo_v 1044 mt6397_vmc_reg: ldo_vmc {
1053 regulator-com 1045 regulator-compatible = "ldo_vmc";
1054 regulator-nam 1046 regulator-name = "vmc";
1055 regulator-min 1047 regulator-min-microvolt = <1800000>;
1056 regulator-max 1048 regulator-max-microvolt = <3300000>;
1057 regulator-ena 1049 regulator-enable-ramp-delay = <218>;
1058 }; 1050 };
1059 1051
1060 mt6397_vmch_reg: ldo_ 1052 mt6397_vmch_reg: ldo_vmch {
1061 regulator-com 1053 regulator-compatible = "ldo_vmch";
1062 regulator-nam 1054 regulator-name = "vmch";
1063 regulator-min 1055 regulator-min-microvolt = <3000000>;
1064 regulator-max 1056 regulator-max-microvolt = <3300000>;
1065 regulator-ena 1057 regulator-enable-ramp-delay = <218>;
1066 }; 1058 };
1067 1059
1068 mt6397_vemc_3v3_reg: 1060 mt6397_vemc_3v3_reg: ldo_vemc3v3 {
1069 regulator-com 1061 regulator-compatible = "ldo_vemc3v3";
1070 regulator-nam 1062 regulator-name = "vemc_3v3";
1071 regulator-min 1063 regulator-min-microvolt = <3000000>;
1072 regulator-max 1064 regulator-max-microvolt = <3300000>;
1073 regulator-ena 1065 regulator-enable-ramp-delay = <218>;
1074 }; 1066 };
1075 1067
1076 mt6397_vgp1_reg: ldo_ 1068 mt6397_vgp1_reg: ldo_vgp1 {
1077 regulator-com 1069 regulator-compatible = "ldo_vgp1";
1078 regulator-nam 1070 regulator-name = "vcamd";
1079 regulator-min 1071 regulator-min-microvolt = <1800000>;
1080 regulator-max 1072 regulator-max-microvolt = <1800000>;
1081 regulator-ena 1073 regulator-enable-ramp-delay = <240>;
1082 }; 1074 };
1083 1075
1084 mt6397_vgp2_reg: ldo_ 1076 mt6397_vgp2_reg: ldo_vgp2 {
1085 regulator-com 1077 regulator-compatible = "ldo_vgp2";
1086 regulator-nam 1078 regulator-name = "vcamio";
1087 regulator-min 1079 regulator-min-microvolt = <3300000>;
1088 regulator-max 1080 regulator-max-microvolt = <3300000>;
1089 regulator-ena 1081 regulator-enable-ramp-delay = <218>;
1090 }; 1082 };
1091 1083
1092 mt6397_vgp3_reg: ldo_ 1084 mt6397_vgp3_reg: ldo_vgp3 {
1093 regulator-com 1085 regulator-compatible = "ldo_vgp3";
1094 regulator-nam 1086 regulator-name = "vcamaf";
1095 regulator-min 1087 regulator-min-microvolt = <1800000>;
1096 regulator-max 1088 regulator-max-microvolt = <1800000>;
1097 regulator-ena 1089 regulator-enable-ramp-delay = <218>;
1098 }; 1090 };
1099 1091
1100 mt6397_vgp4_reg: ldo_ 1092 mt6397_vgp4_reg: ldo_vgp4 {
1101 regulator-com 1093 regulator-compatible = "ldo_vgp4";
1102 regulator-nam 1094 regulator-name = "vgp4";
1103 regulator-min 1095 regulator-min-microvolt = <1200000>;
1104 regulator-max 1096 regulator-max-microvolt = <3300000>;
1105 regulator-ena 1097 regulator-enable-ramp-delay = <218>;
1106 }; 1098 };
1107 1099
1108 mt6397_vgp5_reg: ldo_ 1100 mt6397_vgp5_reg: ldo_vgp5 {
1109 regulator-com 1101 regulator-compatible = "ldo_vgp5";
1110 regulator-nam 1102 regulator-name = "vgp5";
1111 regulator-min 1103 regulator-min-microvolt = <1200000>;
1112 regulator-max 1104 regulator-max-microvolt = <3000000>;
1113 regulator-ena 1105 regulator-enable-ramp-delay = <218>;
1114 }; 1106 };
1115 1107
1116 mt6397_vgp6_reg: ldo_ 1108 mt6397_vgp6_reg: ldo_vgp6 {
1117 regulator-com 1109 regulator-compatible = "ldo_vgp6";
1118 regulator-nam 1110 regulator-name = "vgp6";
1119 regulator-min 1111 regulator-min-microvolt = <3300000>;
1120 regulator-max 1112 regulator-max-microvolt = <3300000>;
1121 regulator-ena 1113 regulator-enable-ramp-delay = <218>;
1122 regulator-alw 1114 regulator-always-on;
1123 }; 1115 };
1124 1116
1125 mt6397_vibr_reg: ldo_ 1117 mt6397_vibr_reg: ldo_vibr {
1126 regulator-com 1118 regulator-compatible = "ldo_vibr";
1127 regulator-nam 1119 regulator-name = "vibr";
1128 regulator-min 1120 regulator-min-microvolt = <1300000>;
1129 regulator-max 1121 regulator-max-microvolt = <3300000>;
1130 regulator-ena 1122 regulator-enable-ramp-delay = <218>;
1131 }; 1123 };
1132 }; 1124 };
1133 1125
1134 rtc: mt6397rtc { 1126 rtc: mt6397rtc {
1135 compatible = "mediate 1127 compatible = "mediatek,mt6397-rtc";
1136 }; 1128 };
>> 1129
>> 1130 syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
>> 1131 compatible = "mediatek,mt6397-pctl-pmic-syscfg",
>> 1132 "syscon";
>> 1133 reg = <0 0x0000c000 0 0x0108>;
>> 1134 };
1137 }; 1135 };
1138 }; 1136 };
1139 1137
1140 &spi { 1138 &spi {
1141 pinctrl-names = "default"; 1139 pinctrl-names = "default";
1142 pinctrl-0 = <&spi_pins_a>; 1140 pinctrl-0 = <&spi_pins_a>;
1143 mediatek,pad-select = <1>; 1141 mediatek,pad-select = <1>;
1144 status = "okay"; 1142 status = "okay";
1145 /* clients */ 1143 /* clients */
1146 cros_ec: ec@0 { 1144 cros_ec: ec@0 {
1147 compatible = "google,cros-ec- 1145 compatible = "google,cros-ec-spi";
1148 reg = <0x0>; 1146 reg = <0x0>;
1149 spi-max-frequency = <12000000 1147 spi-max-frequency = <12000000>;
1150 interrupts-extended = <&pio 0 !! 1148 interrupt-parent = <&pio>;
>> 1149 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1151 google,cros-ec-spi-msg-delay 1150 google,cros-ec-spi-msg-delay = <500>;
1152 wakeup-source; <<
1153 1151
1154 i2c_tunnel: i2c-tunnel0 { 1152 i2c_tunnel: i2c-tunnel0 {
1155 compatible = "google, 1153 compatible = "google,cros-ec-i2c-tunnel";
1156 google,remote-bus = < 1154 google,remote-bus = <0>;
1157 #address-cells = <1>; 1155 #address-cells = <1>;
1158 #size-cells = <0>; 1156 #size-cells = <0>;
1159 1157
1160 battery: sbs-battery@ 1158 battery: sbs-battery@b {
1161 compatible = 1159 compatible = "sbs,sbs-battery";
1162 reg = <0xb>; 1160 reg = <0xb>;
1163 sbs,i2c-retry 1161 sbs,i2c-retry-count = <2>;
1164 sbs,poll-retr 1162 sbs,poll-retry-count = <1>;
1165 }; 1163 };
1166 }; 1164 };
1167 }; 1165 };
1168 }; 1166 };
1169 1167
1170 &ssusb { 1168 &ssusb {
1171 dr_mode = "host"; 1169 dr_mode = "host";
1172 wakeup-source; 1170 wakeup-source;
1173 vusb33-supply = <&mt6397_vusb_reg>; 1171 vusb33-supply = <&mt6397_vusb_reg>;
1174 status = "okay"; 1172 status = "okay";
1175 }; 1173 };
1176 1174
1177 &thermal { 1175 &thermal {
1178 bank0-supply = <&mt6397_vpca15_reg>; 1176 bank0-supply = <&mt6397_vpca15_reg>;
1179 bank1-supply = <&da9211_vcpu_reg>; 1177 bank1-supply = <&da9211_vcpu_reg>;
1180 }; 1178 };
1181 1179
1182 &uart0 { 1180 &uart0 {
1183 status = "okay"; 1181 status = "okay";
1184 }; 1182 };
1185 1183
1186 &usb_host { 1184 &usb_host {
1187 pinctrl-names = "default"; 1185 pinctrl-names = "default";
1188 pinctrl-0 = <&usb_pins>; 1186 pinctrl-0 = <&usb_pins>;
1189 vusb33-supply = <&mt6397_vusb_reg>; 1187 vusb33-supply = <&mt6397_vusb_reg>;
1190 status = "okay"; 1188 status = "okay";
1191 }; 1189 };
1192 1190
1193 #include <arm/cros-ec-keyboard.dtsi> 1191 #include <arm/cros-ec-keyboard.dtsi>
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