1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* 2 /*
3 * Copyright (C) 2021 MediaTek Inc. 3 * Copyright (C) 2021 MediaTek Inc.
4 */ 4 */
5 5
6 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h> 7 #include <dt-bindings/spmi/spmi.h>
8 #include "mt8195.dtsi" 8 #include "mt8195.dtsi"
9 #include "mt6359.dtsi" 9 #include "mt6359.dtsi"
10 10
11 / { 11 / {
12 aliases { 12 aliases {
13 i2c0 = &i2c0; 13 i2c0 = &i2c0;
14 i2c1 = &i2c1; 14 i2c1 = &i2c1;
15 i2c2 = &i2c2; 15 i2c2 = &i2c2;
16 i2c3 = &i2c3; 16 i2c3 = &i2c3;
17 i2c4 = &i2c4; 17 i2c4 = &i2c4;
18 i2c5 = &i2c5; 18 i2c5 = &i2c5;
19 i2c7 = &i2c7; 19 i2c7 = &i2c7;
20 mmc0 = &mmc0; 20 mmc0 = &mmc0;
21 mmc1 = &mmc1; 21 mmc1 = &mmc1;
22 serial0 = &uart0; 22 serial0 = &uart0;
23 }; 23 };
24 24
25 backlight_lcd0: backlight-lcd0 { 25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight"; 26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>; 27 brightness-levels = <0 1023>;
28 default-brightness-level = <57 28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_A 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023 30 num-interpolated-steps = <1023>;
31 pwms = <&disp_pwm0 0 500000>; 31 pwms = <&disp_pwm0 0 500000>;
32 power-supply = <&ppvar_sys>; 32 power-supply = <&ppvar_sys>;
33 }; 33 };
34 34
35 chosen { 35 chosen {
36 stdout-path = "serial0:115200n 36 stdout-path = "serial0:115200n8";
37 }; 37 };
38 38
39 dmic-codec { 39 dmic-codec {
40 compatible = "dmic-codec"; 40 compatible = "dmic-codec";
41 num-channels = <2>; 41 num-channels = <2>;
42 wakeup-delay-ms = <50>; 42 wakeup-delay-ms = <50>;
43 }; 43 };
44 44
45 memory@40000000 { 45 memory@40000000 {
46 device_type = "memory"; 46 device_type = "memory";
47 reg = <0 0x40000000 0 0x800000 47 reg = <0 0x40000000 0 0x80000000>;
48 }; 48 };
49 49
50 pp3300_disp_x: regulator-pp3300-disp-x <<
51 compatible = "regulator-fixed" <<
52 regulator-name = "pp3300_disp_ <<
53 regulator-min-microvolt = <330 <<
54 regulator-max-microvolt = <330 <<
55 regulator-enable-ramp-delay = <<
56 enable-active-high; <<
57 gpio = <&pio 55 GPIO_ACTIVE_HI <<
58 pinctrl-names = "default"; <<
59 pinctrl-0 = <&panel_fixed_pins <<
60 vin-supply = <&pp3300_z2>; <<
61 }; <<
62 <<
63 /* system wide LDO 3.3V power rail */ 50 /* system wide LDO 3.3V power rail */
64 pp3300_z5: regulator-pp3300-ldo-z5 { 51 pp3300_z5: regulator-pp3300-ldo-z5 {
65 compatible = "regulator-fixed" 52 compatible = "regulator-fixed";
66 regulator-name = "pp3300_ldo_z 53 regulator-name = "pp3300_ldo_z5";
67 regulator-always-on; 54 regulator-always-on;
68 regulator-boot-on; 55 regulator-boot-on;
69 regulator-min-microvolt = <330 56 regulator-min-microvolt = <3300000>;
70 regulator-max-microvolt = <330 57 regulator-max-microvolt = <3300000>;
71 vin-supply = <&ppvar_sys>; 58 vin-supply = <&ppvar_sys>;
72 }; 59 };
73 60
74 /* separately switched 3.3V power rail 61 /* separately switched 3.3V power rail */
75 pp3300_s3: regulator-pp3300-s3 { 62 pp3300_s3: regulator-pp3300-s3 {
76 compatible = "regulator-fixed" 63 compatible = "regulator-fixed";
77 regulator-name = "pp3300_s3"; 64 regulator-name = "pp3300_s3";
78 /* automatically sequenced by 65 /* automatically sequenced by PMIC EXT_PMIC_EN2 */
79 regulator-always-on; 66 regulator-always-on;
80 regulator-boot-on; 67 regulator-boot-on;
81 regulator-min-microvolt = <330 68 regulator-min-microvolt = <3300000>;
82 regulator-max-microvolt = <330 69 regulator-max-microvolt = <3300000>;
83 vin-supply = <&pp3300_z2>; 70 vin-supply = <&pp3300_z2>;
84 }; 71 };
85 72
86 /* system wide 3.3V power rail */ 73 /* system wide 3.3V power rail */
87 pp3300_z2: regulator-pp3300-z2 { 74 pp3300_z2: regulator-pp3300-z2 {
88 compatible = "regulator-fixed" 75 compatible = "regulator-fixed";
89 regulator-name = "pp3300_z2"; 76 regulator-name = "pp3300_z2";
90 /* EN pin tied to pp4200_z2, w 77 /* EN pin tied to pp4200_z2, which is controlled by EC */
91 regulator-always-on; 78 regulator-always-on;
92 regulator-boot-on; 79 regulator-boot-on;
93 regulator-min-microvolt = <330 80 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <330 81 regulator-max-microvolt = <3300000>;
95 vin-supply = <&ppvar_sys>; 82 vin-supply = <&ppvar_sys>;
96 }; 83 };
97 84
98 /* system wide 4.2V power rail */ 85 /* system wide 4.2V power rail */
99 pp4200_z2: regulator-pp4200-z2 { 86 pp4200_z2: regulator-pp4200-z2 {
100 compatible = "regulator-fixed" 87 compatible = "regulator-fixed";
101 regulator-name = "pp4200_z2"; 88 regulator-name = "pp4200_z2";
102 /* controlled by EC */ 89 /* controlled by EC */
103 regulator-always-on; 90 regulator-always-on;
104 regulator-boot-on; 91 regulator-boot-on;
105 regulator-min-microvolt = <420 92 regulator-min-microvolt = <4200000>;
106 regulator-max-microvolt = <420 93 regulator-max-microvolt = <4200000>;
107 vin-supply = <&ppvar_sys>; 94 vin-supply = <&ppvar_sys>;
108 }; 95 };
109 96
110 /* system wide switching 5.0V power ra 97 /* system wide switching 5.0V power rail */
111 pp5000_s5: regulator-pp5000-s5 { 98 pp5000_s5: regulator-pp5000-s5 {
112 compatible = "regulator-fixed" 99 compatible = "regulator-fixed";
113 regulator-name = "pp5000_s5"; 100 regulator-name = "pp5000_s5";
114 /* controlled by EC */ 101 /* controlled by EC */
115 regulator-always-on; 102 regulator-always-on;
116 regulator-boot-on; 103 regulator-boot-on;
117 regulator-min-microvolt = <500 104 regulator-min-microvolt = <5000000>;
118 regulator-max-microvolt = <500 105 regulator-max-microvolt = <5000000>;
119 vin-supply = <&ppvar_sys>; 106 vin-supply = <&ppvar_sys>;
120 }; 107 };
121 108
122 /* system wide semi-regulated power ra 109 /* system wide semi-regulated power rail from battery or USB */
123 ppvar_sys: regulator-ppvar-sys { 110 ppvar_sys: regulator-ppvar-sys {
124 compatible = "regulator-fixed" 111 compatible = "regulator-fixed";
125 regulator-name = "ppvar_sys"; 112 regulator-name = "ppvar_sys";
126 regulator-always-on; 113 regulator-always-on;
127 regulator-boot-on; 114 regulator-boot-on;
128 }; 115 };
129 116
130 /* Murata NCP03WF104F05RL */ 117 /* Murata NCP03WF104F05RL */
131 tboard_thermistor1: thermal-sensor-t1 118 tboard_thermistor1: thermal-sensor-t1 {
132 compatible = "generic-adc-ther 119 compatible = "generic-adc-thermal";
133 #thermal-sensor-cells = <0>; 120 #thermal-sensor-cells = <0>;
134 io-channels = <&auxadc 0>; 121 io-channels = <&auxadc 0>;
135 io-channel-names = "sensor-cha 122 io-channel-names = "sensor-channel";
136 temperature-lookup-table = < 123 temperature-lookup-table = < (-10000) 1553
137 124 (-5000) 1485
138 125 0 1406
139 126 5000 1317
140 127 10000 1219
141 128 15000 1115
142 129 20000 1007
143 130 25000 900
144 131 30000 796
145 132 35000 697
146 133 40000 605
147 134 45000 523
148 135 50000 449
149 136 55000 384
150 137 60000 327
151 138 65000 279
152 139 70000 237
153 140 75000 202
154 141 80000 172
155 142 85000 147
156 143 90000 125
157 144 95000 107
158 145 100000 92
159 146 105000 79
160 147 110000 68
161 148 115000 59
162 149 120000 51
163 150 125000 44>;
164 }; 151 };
165 152
166 tboard_thermistor2: thermal-sensor-t2 153 tboard_thermistor2: thermal-sensor-t2 {
167 compatible = "generic-adc-ther 154 compatible = "generic-adc-thermal";
168 #thermal-sensor-cells = <0>; 155 #thermal-sensor-cells = <0>;
169 io-channels = <&auxadc 1>; 156 io-channels = <&auxadc 1>;
170 io-channel-names = "sensor-cha 157 io-channel-names = "sensor-channel";
171 temperature-lookup-table = < 158 temperature-lookup-table = < (-10000) 1553
172 159 (-5000) 1485
173 160 0 1406
174 161 5000 1317
175 162 10000 1219
176 163 15000 1115
177 164 20000 1007
178 165 25000 900
179 166 30000 796
180 167 35000 697
181 168 40000 605
182 169 45000 523
183 170 50000 449
184 171 55000 384
185 172 60000 327
186 173 65000 279
187 174 70000 237
188 175 75000 202
189 176 80000 172
190 177 85000 147
191 178 90000 125
192 179 95000 107
193 180 100000 92
194 181 105000 79
195 182 110000 68
196 183 115000 59
197 184 120000 51
198 185 125000 44>;
199 }; 186 };
200 187
201 usb_vbus: regulator-5v0-usb-vbus { 188 usb_vbus: regulator-5v0-usb-vbus {
202 compatible = "regulator-fixed" 189 compatible = "regulator-fixed";
203 regulator-name = "usb-vbus"; 190 regulator-name = "usb-vbus";
204 regulator-min-microvolt = <500 191 regulator-min-microvolt = <5000000>;
205 regulator-max-microvolt = <500 192 regulator-max-microvolt = <5000000>;
206 enable-active-high; 193 enable-active-high;
207 regulator-always-on; 194 regulator-always-on;
208 }; 195 };
209 196
210 reserved_memory: reserved-memory { 197 reserved_memory: reserved-memory {
211 #address-cells = <2>; 198 #address-cells = <2>;
212 #size-cells = <2>; 199 #size-cells = <2>;
213 ranges; 200 ranges;
214 201
215 scp_mem: memory@50000000 { 202 scp_mem: memory@50000000 {
216 compatible = "shared-d 203 compatible = "shared-dma-pool";
217 reg = <0 0x50000000 0 204 reg = <0 0x50000000 0 0x2900000>;
218 no-map; 205 no-map;
219 }; 206 };
220 207
221 adsp_mem: memory@60000000 { 208 adsp_mem: memory@60000000 {
222 compatible = "shared-d 209 compatible = "shared-dma-pool";
223 reg = <0 0x60000000 0 210 reg = <0 0x60000000 0 0xd80000>;
224 no-map; 211 no-map;
225 }; 212 };
226 213
227 afe_mem: memory@60d80000 { 214 afe_mem: memory@60d80000 {
228 compatible = "shared-d 215 compatible = "shared-dma-pool";
229 reg = <0 0x60d80000 0 216 reg = <0 0x60d80000 0 0x100000>;
230 no-map; 217 no-map;
231 }; 218 };
232 219
233 adsp_device_mem: memory@60e800 220 adsp_device_mem: memory@60e80000 {
234 compatible = "shared-d 221 compatible = "shared-dma-pool";
235 reg = <0 0x60e80000 0 222 reg = <0 0x60e80000 0 0x280000>;
236 no-map; 223 no-map;
237 }; 224 };
238 }; 225 };
239 226
240 spk_amplifier: rt1019p { 227 spk_amplifier: rt1019p {
241 compatible = "realtek,rt1019p" 228 compatible = "realtek,rt1019p";
242 label = "rt1019p"; 229 label = "rt1019p";
243 #sound-dai-cells = <0>; <<
244 pinctrl-names = "default"; 230 pinctrl-names = "default";
245 pinctrl-0 = <&rt1019p_pins_def 231 pinctrl-0 = <&rt1019p_pins_default>;
246 sdb-gpios = <&pio 100 GPIO_ACT 232 sdb-gpios = <&pio 100 GPIO_ACTIVE_HIGH>;
247 }; 233 };
248 }; 234 };
249 235
250 &adsp { 236 &adsp {
251 status = "okay"; 237 status = "okay";
252 238
253 memory-region = <&adsp_device_mem>, <& 239 memory-region = <&adsp_device_mem>, <&adsp_mem>;
254 }; 240 };
255 241
256 &afe { 242 &afe {
257 status = "okay"; 243 status = "okay";
258 244
259 mediatek,etdm-in2-cowork-source = <2>; 245 mediatek,etdm-in2-cowork-source = <2>;
260 mediatek,etdm-out2-cowork-source = <0> 246 mediatek,etdm-out2-cowork-source = <0>;
261 memory-region = <&afe_mem>; 247 memory-region = <&afe_mem>;
262 }; 248 };
263 249
264 &auxadc { 250 &auxadc {
265 status = "okay"; 251 status = "okay";
266 }; 252 };
267 253
268 &cpu0 { 254 &cpu0 {
269 cpu-supply = <&mt6359_vcore_buck_reg>; 255 cpu-supply = <&mt6359_vcore_buck_reg>;
270 }; 256 };
271 257
272 &cpu1 { 258 &cpu1 {
273 cpu-supply = <&mt6359_vcore_buck_reg>; 259 cpu-supply = <&mt6359_vcore_buck_reg>;
274 }; 260 };
275 261
276 &cpu2 { 262 &cpu2 {
277 cpu-supply = <&mt6359_vcore_buck_reg>; 263 cpu-supply = <&mt6359_vcore_buck_reg>;
278 }; 264 };
279 265
280 &cpu3 { 266 &cpu3 {
281 cpu-supply = <&mt6359_vcore_buck_reg>; 267 cpu-supply = <&mt6359_vcore_buck_reg>;
282 }; 268 };
283 269
284 &cpu4 { 270 &cpu4 {
285 cpu-supply = <&mt6315_6_vbuck1>; 271 cpu-supply = <&mt6315_6_vbuck1>;
286 }; 272 };
287 273
288 &cpu5 { 274 &cpu5 {
289 cpu-supply = <&mt6315_6_vbuck1>; 275 cpu-supply = <&mt6315_6_vbuck1>;
290 }; 276 };
291 277
292 &cpu6 { 278 &cpu6 {
293 cpu-supply = <&mt6315_6_vbuck1>; 279 cpu-supply = <&mt6315_6_vbuck1>;
294 }; 280 };
295 281
296 &cpu7 { 282 &cpu7 {
297 cpu-supply = <&mt6315_6_vbuck1>; 283 cpu-supply = <&mt6315_6_vbuck1>;
298 }; 284 };
299 285
300 &dp_intf0 { 286 &dp_intf0 {
301 status = "okay"; 287 status = "okay";
302 288
303 port { 289 port {
304 dp_intf0_out: endpoint { 290 dp_intf0_out: endpoint {
305 remote-endpoint = <&ed 291 remote-endpoint = <&edp_in>;
306 }; 292 };
307 }; 293 };
308 }; 294 };
309 295
310 &dp_intf1 { 296 &dp_intf1 {
311 status = "okay"; 297 status = "okay";
312 298
313 port { 299 port {
314 dp_intf1_out: endpoint { 300 dp_intf1_out: endpoint {
315 remote-endpoint = <&dp 301 remote-endpoint = <&dptx_in>;
316 }; 302 };
317 }; 303 };
318 }; 304 };
319 305
320 &edp_tx { 306 &edp_tx {
321 status = "okay"; 307 status = "okay";
322 308
323 pinctrl-names = "default"; 309 pinctrl-names = "default";
324 pinctrl-0 = <&edptx_pins_default>; 310 pinctrl-0 = <&edptx_pins_default>;
325 311
326 ports { 312 ports {
327 #address-cells = <1>; 313 #address-cells = <1>;
328 #size-cells = <0>; 314 #size-cells = <0>;
329 315
330 port@0 { 316 port@0 {
331 reg = <0>; 317 reg = <0>;
332 edp_in: endpoint { 318 edp_in: endpoint {
333 remote-endpoin 319 remote-endpoint = <&dp_intf0_out>;
334 }; 320 };
335 }; 321 };
336 322
337 port@1 { 323 port@1 {
338 reg = <1>; 324 reg = <1>;
339 edp_out: endpoint { 325 edp_out: endpoint {
340 data-lanes = < 326 data-lanes = <0 1 2 3>;
341 remote-endpoin <<
342 }; <<
343 }; <<
344 }; <<
345 <<
346 aux-bus { <<
347 panel { <<
348 compatible = "edp-pane <<
349 power-supply = <&pp330 <<
350 backlight = <&backligh <<
351 port { <<
352 panel_in: endp <<
353 remote <<
354 }; <<
355 }; 327 };
356 }; 328 };
357 }; 329 };
358 }; 330 };
359 331
360 &disp_pwm0 { 332 &disp_pwm0 {
361 status = "okay"; 333 status = "okay";
362 334
363 pinctrl-names = "default"; 335 pinctrl-names = "default";
364 pinctrl-0 = <&disp_pwm0_pin_default>; 336 pinctrl-0 = <&disp_pwm0_pin_default>;
365 }; 337 };
366 338
367 &dp_tx { 339 &dp_tx {
368 status = "okay"; 340 status = "okay";
369 341
370 #sound-dai-cells = <0>; <<
371 pinctrl-names = "default"; 342 pinctrl-names = "default";
372 pinctrl-0 = <&dptx_pin>; 343 pinctrl-0 = <&dptx_pin>;
373 344
374 ports { 345 ports {
375 #address-cells = <1>; 346 #address-cells = <1>;
376 #size-cells = <0>; 347 #size-cells = <0>;
377 348
378 port@0 { 349 port@0 {
379 reg = <0>; 350 reg = <0>;
380 dptx_in: endpoint { 351 dptx_in: endpoint {
381 remote-endpoin 352 remote-endpoint = <&dp_intf1_out>;
382 }; 353 };
383 }; 354 };
384 355
385 port@1 { 356 port@1 {
386 reg = <1>; 357 reg = <1>;
387 dptx_out: endpoint { 358 dptx_out: endpoint {
388 data-lanes = < 359 data-lanes = <0 1 2 3>;
389 }; 360 };
390 }; 361 };
391 }; 362 };
392 }; 363 };
393 364
394 &gic { 365 &gic {
395 mediatek,broken-save-restore-fw; 366 mediatek,broken-save-restore-fw;
396 }; 367 };
397 368
398 &gpu { 369 &gpu {
399 status = "okay"; 370 status = "okay";
400 mali-supply = <&mt6315_7_vbuck1>; 371 mali-supply = <&mt6315_7_vbuck1>;
401 }; 372 };
402 373
403 &i2c0 { 374 &i2c0 {
404 status = "okay"; 375 status = "okay";
405 376
406 clock-frequency = <400000>; 377 clock-frequency = <400000>;
407 pinctrl-names = "default"; 378 pinctrl-names = "default";
408 pinctrl-0 = <&i2c0_pins>; 379 pinctrl-0 = <&i2c0_pins>;
409 }; 380 };
410 381
411 &i2c1 { 382 &i2c1 {
412 status = "okay"; 383 status = "okay";
413 384
414 clock-frequency = <400000>; 385 clock-frequency = <400000>;
415 i2c-scl-internal-delay-ns = <12500>; 386 i2c-scl-internal-delay-ns = <12500>;
416 pinctrl-names = "default"; 387 pinctrl-names = "default";
417 pinctrl-0 = <&i2c1_pins>; 388 pinctrl-0 = <&i2c1_pins>;
418 389
419 trackpad@15 { 390 trackpad@15 {
420 compatible = "elan,ekth3000"; 391 compatible = "elan,ekth3000";
421 reg = <0x15>; 392 reg = <0x15>;
422 interrupts-extended = <&pio 6 393 interrupts-extended = <&pio 6 IRQ_TYPE_LEVEL_LOW>;
423 pinctrl-names = "default"; 394 pinctrl-names = "default";
424 pinctrl-0 = <&trackpad_pins>; 395 pinctrl-0 = <&trackpad_pins>;
425 vcc-supply = <&pp3300_s3>; 396 vcc-supply = <&pp3300_s3>;
426 wakeup-source; 397 wakeup-source;
427 }; 398 };
428 }; 399 };
429 400
430 &i2c2 { 401 &i2c2 {
431 status = "okay"; 402 status = "okay";
432 403
433 clock-frequency = <400000>; 404 clock-frequency = <400000>;
434 pinctrl-names = "default"; 405 pinctrl-names = "default";
435 pinctrl-0 = <&i2c2_pins>; 406 pinctrl-0 = <&i2c2_pins>;
436 407
437 audio_codec: codec@1a { 408 audio_codec: codec@1a {
438 /* Realtek RT5682i or RT5682s, 409 /* Realtek RT5682i or RT5682s, sharing the same configuration */
439 reg = <0x1a>; 410 reg = <0x1a>;
440 interrupts-extended = <&pio 89 411 interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>;
441 #sound-dai-cells = <0>; <<
442 realtek,jd-src = <1>; 412 realtek,jd-src = <1>;
443 413
444 AVDD-supply = <&mt6359_vio18_l 414 AVDD-supply = <&mt6359_vio18_ldo_reg>;
445 MICVDD-supply = <&pp3300_z2>; 415 MICVDD-supply = <&pp3300_z2>;
446 VBAT-supply = <&pp3300_z5>; 416 VBAT-supply = <&pp3300_z5>;
447 }; 417 };
448 }; 418 };
449 419
450 &i2c3 { 420 &i2c3 {
451 status = "okay"; 421 status = "okay";
452 422
453 clock-frequency = <400000>; 423 clock-frequency = <400000>;
454 pinctrl-names = "default"; 424 pinctrl-names = "default";
455 pinctrl-0 = <&i2c3_pins>; 425 pinctrl-0 = <&i2c3_pins>;
456 426
457 tpm@50 { 427 tpm@50 {
458 compatible = "google,cr50"; 428 compatible = "google,cr50";
459 reg = <0x50>; 429 reg = <0x50>;
460 interrupts-extended = <&pio 88 430 interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>;
461 pinctrl-names = "default"; 431 pinctrl-names = "default";
462 pinctrl-0 = <&cr50_int>; 432 pinctrl-0 = <&cr50_int>;
463 }; 433 };
464 }; 434 };
465 435
466 &i2c4 { 436 &i2c4 {
467 status = "okay"; 437 status = "okay";
468 438
469 clock-frequency = <400000>; 439 clock-frequency = <400000>;
470 pinctrl-names = "default"; 440 pinctrl-names = "default";
471 pinctrl-0 = <&i2c4_pins>; 441 pinctrl-0 = <&i2c4_pins>;
472 442
473 ts_10: touchscreen@10 { 443 ts_10: touchscreen@10 {
474 compatible = "hid-over-i2c"; 444 compatible = "hid-over-i2c";
475 reg = <0x10>; 445 reg = <0x10>;
476 hid-descr-addr = <0x0001>; 446 hid-descr-addr = <0x0001>;
477 interrupts-extended = <&pio 92 447 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>;
478 pinctrl-names = "default"; 448 pinctrl-names = "default";
479 pinctrl-0 = <&touchscreen_pins 449 pinctrl-0 = <&touchscreen_pins>;
480 post-power-on-delay-ms = <10>; 450 post-power-on-delay-ms = <10>;
481 vdd-supply = <&pp3300_s3>; 451 vdd-supply = <&pp3300_s3>;
482 status = "disabled"; 452 status = "disabled";
483 }; 453 };
484 }; 454 };
485 455
486 &i2c5 { 456 &i2c5 {
487 status = "okay"; 457 status = "okay";
488 458
489 clock-frequency = <400000>; 459 clock-frequency = <400000>;
490 pinctrl-names = "default"; 460 pinctrl-names = "default";
491 pinctrl-0 = <&i2c5_pins>; 461 pinctrl-0 = <&i2c5_pins>;
492 }; 462 };
493 463
494 &i2c7 { 464 &i2c7 {
495 status = "okay"; 465 status = "okay";
496 466
497 clock-frequency = <400000>; 467 clock-frequency = <400000>;
498 pinctrl-names = "default"; 468 pinctrl-names = "default";
499 pinctrl-0 = <&i2c7_pins>; 469 pinctrl-0 = <&i2c7_pins>;
500 470
501 pmic@34 { 471 pmic@34 {
502 #interrupt-cells = <2>; 472 #interrupt-cells = <2>;
503 compatible = "mediatek,mt6360" 473 compatible = "mediatek,mt6360";
504 reg = <0x34>; 474 reg = <0x34>;
505 interrupt-controller; 475 interrupt-controller;
506 interrupts-extended = <&pio 13 476 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>;
507 interrupt-names = "IRQB"; 477 interrupt-names = "IRQB";
508 pinctrl-names = "default"; 478 pinctrl-names = "default";
509 pinctrl-0 = <&subpmic_default> 479 pinctrl-0 = <&subpmic_default>;
510 wakeup-source; 480 wakeup-source;
511 }; 481 };
512 }; 482 };
513 483
514 &mfg0 { <<
515 domain-supply = <&mt6315_7_vbuck1>; <<
516 }; <<
517 <<
518 &mfg1 { <<
519 domain-supply = <&mt6359_vsram_others_ <<
520 }; <<
521 <<
522 &mmc0 { 484 &mmc0 {
523 status = "okay"; 485 status = "okay";
524 486
525 bus-width = <8>; 487 bus-width = <8>;
526 cap-mmc-highspeed; 488 cap-mmc-highspeed;
527 cap-mmc-hw-reset; 489 cap-mmc-hw-reset;
528 hs400-ds-delay = <0x14c11>; 490 hs400-ds-delay = <0x14c11>;
529 max-frequency = <200000000>; 491 max-frequency = <200000000>;
530 mmc-hs200-1_8v; 492 mmc-hs200-1_8v;
531 mmc-hs400-1_8v; 493 mmc-hs400-1_8v;
532 no-sdio; 494 no-sdio;
533 no-sd; 495 no-sd;
534 non-removable; 496 non-removable;
535 pinctrl-names = "default", "state_uhs" 497 pinctrl-names = "default", "state_uhs";
536 pinctrl-0 = <&mmc0_pins_default>; 498 pinctrl-0 = <&mmc0_pins_default>;
537 pinctrl-1 = <&mmc0_pins_uhs>; 499 pinctrl-1 = <&mmc0_pins_uhs>;
538 vmmc-supply = <&mt6359_vemc_1_ldo_reg> 500 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
539 vqmmc-supply = <&mt6359_vufs_ldo_reg>; 501 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
540 }; 502 };
541 503
542 &mmc1 { 504 &mmc1 {
543 status = "okay"; 505 status = "okay";
544 506
545 bus-width = <4>; 507 bus-width = <4>;
546 cap-sd-highspeed; 508 cap-sd-highspeed;
547 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>; 509 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>;
548 max-frequency = <200000000>; 510 max-frequency = <200000000>;
549 no-mmc; 511 no-mmc;
550 no-sdio; 512 no-sdio;
551 pinctrl-names = "default", "state_uhs" 513 pinctrl-names = "default", "state_uhs";
552 pinctrl-0 = <&mmc1_pins_default>, <&mm 514 pinctrl-0 = <&mmc1_pins_default>, <&mmc1_pins_detect>;
553 pinctrl-1 = <&mmc1_pins_default>; 515 pinctrl-1 = <&mmc1_pins_default>;
554 sd-uhs-sdr50; 516 sd-uhs-sdr50;
555 sd-uhs-sdr104; 517 sd-uhs-sdr104;
556 vmmc-supply = <&mt_pmic_vmch_ldo_reg>; 518 vmmc-supply = <&mt_pmic_vmch_ldo_reg>;
557 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>; 519 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>;
558 }; 520 };
559 521
560 &mt6359codec { 522 &mt6359codec {
561 mediatek,dmic-mode = <1>; /* one-wire 523 mediatek,dmic-mode = <1>; /* one-wire */
562 mediatek,mic-type-0 = <2>; /* DMIC */ 524 mediatek,mic-type-0 = <2>; /* DMIC */
563 }; 525 };
564 526
565 /* for CPU-L */ 527 /* for CPU-L */
566 &mt6359_vcore_buck_reg { 528 &mt6359_vcore_buck_reg {
567 regulator-always-on; 529 regulator-always-on;
568 }; 530 };
569 531
570 /* for CORE */ 532 /* for CORE */
571 &mt6359_vgpu11_buck_reg { 533 &mt6359_vgpu11_buck_reg {
572 regulator-always-on; 534 regulator-always-on;
573 }; 535 };
574 536
575 &mt6359_vgpu11_sshub_buck_reg { 537 &mt6359_vgpu11_sshub_buck_reg {
576 regulator-always-on; 538 regulator-always-on;
577 regulator-min-microvolt = <550000>; 539 regulator-min-microvolt = <550000>;
578 regulator-max-microvolt = <550000>; 540 regulator-max-microvolt = <550000>;
579 }; 541 };
580 542
581 /* for CORE SRAM */ 543 /* for CORE SRAM */
582 &mt6359_vpu_buck_reg { 544 &mt6359_vpu_buck_reg {
583 regulator-always-on; 545 regulator-always-on;
584 }; 546 };
585 547
586 &mt6359_vrf12_ldo_reg { 548 &mt6359_vrf12_ldo_reg {
587 regulator-always-on; 549 regulator-always-on;
588 }; 550 };
589 551
590 /* for GPU SRAM */ 552 /* for GPU SRAM */
591 &mt6359_vsram_others_ldo_reg { 553 &mt6359_vsram_others_ldo_reg {
>> 554 regulator-always-on;
592 regulator-min-microvolt = <750000>; 555 regulator-min-microvolt = <750000>;
593 regulator-max-microvolt = <750000>; 556 regulator-max-microvolt = <750000>;
594 }; 557 };
595 558
596 &mt6359_vufs_ldo_reg { 559 &mt6359_vufs_ldo_reg {
597 regulator-always-on; 560 regulator-always-on;
598 }; 561 };
599 562
600 &nor_flash { 563 &nor_flash {
601 status = "okay"; 564 status = "okay";
602 565
603 pinctrl-names = "default"; 566 pinctrl-names = "default";
604 pinctrl-0 = <&nor_pins_default>; 567 pinctrl-0 = <&nor_pins_default>;
605 568
606 flash@0 { 569 flash@0 {
607 compatible = "jedec,spi-nor"; 570 compatible = "jedec,spi-nor";
608 reg = <0>; 571 reg = <0>;
609 spi-max-frequency = <52000000> 572 spi-max-frequency = <52000000>;
610 spi-rx-bus-width = <2>; 573 spi-rx-bus-width = <2>;
611 spi-tx-bus-width = <2>; 574 spi-tx-bus-width = <2>;
612 }; 575 };
613 }; 576 };
614 577
615 &pcie1 { 578 &pcie1 {
616 status = "okay"; 579 status = "okay";
617 580
618 pinctrl-names = "default"; 581 pinctrl-names = "default";
619 pinctrl-0 = <&pcie1_pins_default>; 582 pinctrl-0 = <&pcie1_pins_default>;
620 }; 583 };
621 584
622 &pio { 585 &pio {
623 mediatek,rsel-resistance-in-si-unit; 586 mediatek,rsel-resistance-in-si-unit;
624 pinctrl-names = "default"; 587 pinctrl-names = "default";
625 pinctrl-0 = <&pio_default>; 588 pinctrl-0 = <&pio_default>;
626 589
627 /* 144 lines */ 590 /* 144 lines */
628 gpio-line-names = 591 gpio-line-names =
629 "I2S_SPKR_MCLK", 592 "I2S_SPKR_MCLK",
630 "I2S_SPKR_DATAIN", 593 "I2S_SPKR_DATAIN",
631 "I2S_SPKR_LRCK", 594 "I2S_SPKR_LRCK",
632 "I2S_SPKR_BCLK", 595 "I2S_SPKR_BCLK",
633 "EC_AP_INT_ODL", 596 "EC_AP_INT_ODL",
634 /* 597 /*
635 * AP_FLASH_WP_L is crossystem 598 * AP_FLASH_WP_L is crossystem ABI. Schematics
636 * call it AP_FLASH_WP_ODL. 599 * call it AP_FLASH_WP_ODL.
637 */ 600 */
638 "AP_FLASH_WP_L", 601 "AP_FLASH_WP_L",
639 "TCHPAD_INT_ODL", 602 "TCHPAD_INT_ODL",
640 "EDP_HPD_1V8", 603 "EDP_HPD_1V8",
641 "AP_I2C_CAM_SDA", 604 "AP_I2C_CAM_SDA",
642 "AP_I2C_CAM_SCL", 605 "AP_I2C_CAM_SCL",
643 "AP_I2C_TCHPAD_SDA_1V8", 606 "AP_I2C_TCHPAD_SDA_1V8",
644 "AP_I2C_TCHPAD_SCL_1V8", 607 "AP_I2C_TCHPAD_SCL_1V8",
645 "AP_I2C_AUD_SDA", 608 "AP_I2C_AUD_SDA",
646 "AP_I2C_AUD_SCL", 609 "AP_I2C_AUD_SCL",
647 "AP_I2C_TPM_SDA_1V8", 610 "AP_I2C_TPM_SDA_1V8",
648 "AP_I2C_TPM_SCL_1V8", 611 "AP_I2C_TPM_SCL_1V8",
649 "AP_I2C_TCHSCR_SDA_1V8", 612 "AP_I2C_TCHSCR_SDA_1V8",
650 "AP_I2C_TCHSCR_SCL_1V8", 613 "AP_I2C_TCHSCR_SCL_1V8",
651 "EC_AP_HPD_OD", 614 "EC_AP_HPD_OD",
652 "", 615 "",
653 "PCIE_NVME_RST_L", 616 "PCIE_NVME_RST_L",
654 "PCIE_NVME_CLKREQ_ODL", 617 "PCIE_NVME_CLKREQ_ODL",
655 "PCIE_RST_1V8_L", 618 "PCIE_RST_1V8_L",
656 "PCIE_CLKREQ_1V8_ODL", 619 "PCIE_CLKREQ_1V8_ODL",
657 "PCIE_WAKE_1V8_ODL", 620 "PCIE_WAKE_1V8_ODL",
658 "CLK_24M_CAM0", 621 "CLK_24M_CAM0",
659 "CAM1_SEN_EN", 622 "CAM1_SEN_EN",
660 "AP_I2C_PWR_SCL_1V8", 623 "AP_I2C_PWR_SCL_1V8",
661 "AP_I2C_PWR_SDA_1V8", 624 "AP_I2C_PWR_SDA_1V8",
662 "AP_I2C_MISC_SCL", 625 "AP_I2C_MISC_SCL",
663 "AP_I2C_MISC_SDA", 626 "AP_I2C_MISC_SDA",
664 "EN_PP5000_HDMI_X", 627 "EN_PP5000_HDMI_X",
665 "AP_HDMITX_HTPLG", 628 "AP_HDMITX_HTPLG",
666 "", 629 "",
667 "AP_HDMITX_SCL_1V8", 630 "AP_HDMITX_SCL_1V8",
668 "AP_HDMITX_SDA_1V8", 631 "AP_HDMITX_SDA_1V8",
669 "AP_RTC_CLK32K", 632 "AP_RTC_CLK32K",
670 "AP_EC_WATCHDOG_L", 633 "AP_EC_WATCHDOG_L",
671 "SRCLKENA0", 634 "SRCLKENA0",
672 "SRCLKENA1", 635 "SRCLKENA1",
673 "PWRAP_SPI0_CS_L", 636 "PWRAP_SPI0_CS_L",
674 "PWRAP_SPI0_CK", 637 "PWRAP_SPI0_CK",
675 "PWRAP_SPI0_MOSI", 638 "PWRAP_SPI0_MOSI",
676 "PWRAP_SPI0_MISO", 639 "PWRAP_SPI0_MISO",
677 "SPMI_SCL", 640 "SPMI_SCL",
678 "SPMI_SDA", 641 "SPMI_SDA",
679 "", 642 "",
680 "", 643 "",
681 "", 644 "",
682 "I2S_HP_DATAIN", 645 "I2S_HP_DATAIN",
683 "I2S_HP_MCLK", 646 "I2S_HP_MCLK",
684 "I2S_HP_BCK", 647 "I2S_HP_BCK",
685 "I2S_HP_LRCK", 648 "I2S_HP_LRCK",
686 "I2S_HP_DATAOUT", 649 "I2S_HP_DATAOUT",
687 "SD_CD_ODL", 650 "SD_CD_ODL",
688 "EN_PP3300_DISP_X", 651 "EN_PP3300_DISP_X",
689 "TCHSCR_RST_1V8_L", 652 "TCHSCR_RST_1V8_L",
690 "TCHSCR_REPORT_DISABLE", 653 "TCHSCR_REPORT_DISABLE",
691 "EN_PP3300_WLAN_X", 654 "EN_PP3300_WLAN_X",
692 "BT_KILL_1V8_L", 655 "BT_KILL_1V8_L",
693 "I2S_SPKR_DATAOUT", 656 "I2S_SPKR_DATAOUT",
694 "WIFI_KILL_1V8_L", 657 "WIFI_KILL_1V8_L",
695 "BEEP_ON", 658 "BEEP_ON",
696 "SCP_I2C_SENSOR_SCL_1V8", 659 "SCP_I2C_SENSOR_SCL_1V8",
697 "SCP_I2C_SENSOR_SDA_1V8", 660 "SCP_I2C_SENSOR_SDA_1V8",
698 "", 661 "",
699 "", 662 "",
700 "", 663 "",
701 "", 664 "",
702 "AUD_CLK_MOSI", 665 "AUD_CLK_MOSI",
703 "AUD_SYNC_MOSI", 666 "AUD_SYNC_MOSI",
704 "AUD_DAT_MOSI0", 667 "AUD_DAT_MOSI0",
705 "AUD_DAT_MOSI1", 668 "AUD_DAT_MOSI1",
706 "AUD_DAT_MISO0", 669 "AUD_DAT_MISO0",
707 "AUD_DAT_MISO1", 670 "AUD_DAT_MISO1",
708 "AUD_DAT_MISO2", 671 "AUD_DAT_MISO2",
709 "SCP_VREQ_VAO", 672 "SCP_VREQ_VAO",
710 "AP_SPI_GSC_TPM_CLK", 673 "AP_SPI_GSC_TPM_CLK",
711 "AP_SPI_GSC_TPM_MOSI", 674 "AP_SPI_GSC_TPM_MOSI",
712 "AP_SPI_GSC_TPM_CS_L", 675 "AP_SPI_GSC_TPM_CS_L",
713 "AP_SPI_GSC_TPM_MISO", 676 "AP_SPI_GSC_TPM_MISO",
714 "EN_PP1000_CAM_X", 677 "EN_PP1000_CAM_X",
715 "AP_EDP_BKLTEN", 678 "AP_EDP_BKLTEN",
716 "", 679 "",
717 "USB3_HUB_RST_L", 680 "USB3_HUB_RST_L",
718 "", 681 "",
719 "WLAN_ALERT_ODL", 682 "WLAN_ALERT_ODL",
720 "EC_IN_RW_ODL", 683 "EC_IN_RW_ODL",
721 "GSC_AP_INT_ODL", 684 "GSC_AP_INT_ODL",
722 "HP_INT_ODL", 685 "HP_INT_ODL",
723 "CAM0_RST_L", 686 "CAM0_RST_L",
724 "CAM1_RST_L", 687 "CAM1_RST_L",
725 "TCHSCR_INT_1V8_L", 688 "TCHSCR_INT_1V8_L",
726 "CAM1_DET_L", 689 "CAM1_DET_L",
727 "RST_ALC1011_L", 690 "RST_ALC1011_L",
728 "", 691 "",
729 "", 692 "",
730 "BL_PWM_1V8", 693 "BL_PWM_1V8",
731 "UART_AP_TX_DBG_RX", 694 "UART_AP_TX_DBG_RX",
732 "UART_DBG_TX_AP_RX", 695 "UART_DBG_TX_AP_RX",
733 "EN_SPKR", 696 "EN_SPKR",
734 "AP_EC_WARM_RST_REQ", 697 "AP_EC_WARM_RST_REQ",
735 "UART_SCP_TX_DBGCON_RX", 698 "UART_SCP_TX_DBGCON_RX",
736 "UART_DBGCON_TX_SCP_RX", 699 "UART_DBGCON_TX_SCP_RX",
737 "", 700 "",
738 "", 701 "",
739 "KPCOL0", 702 "KPCOL0",
740 "", 703 "",
741 "MT6315_GPU_INT", 704 "MT6315_GPU_INT",
742 "MT6315_PROC_BC_INT", 705 "MT6315_PROC_BC_INT",
743 "SD_CMD", 706 "SD_CMD",
744 "SD_CLK", 707 "SD_CLK",
745 "SD_DAT0", 708 "SD_DAT0",
746 "SD_DAT1", 709 "SD_DAT1",
747 "SD_DAT2", 710 "SD_DAT2",
748 "SD_DAT3", 711 "SD_DAT3",
749 "EMMC_DAT7", 712 "EMMC_DAT7",
750 "EMMC_DAT6", 713 "EMMC_DAT6",
751 "EMMC_DAT5", 714 "EMMC_DAT5",
752 "EMMC_DAT4", 715 "EMMC_DAT4",
753 "EMMC_RSTB", 716 "EMMC_RSTB",
754 "EMMC_CMD", 717 "EMMC_CMD",
755 "EMMC_CLK", 718 "EMMC_CLK",
756 "EMMC_DAT3", 719 "EMMC_DAT3",
757 "EMMC_DAT2", 720 "EMMC_DAT2",
758 "EMMC_DAT1", 721 "EMMC_DAT1",
759 "EMMC_DAT0", 722 "EMMC_DAT0",
760 "EMMC_DSL", 723 "EMMC_DSL",
761 "", 724 "",
762 "", 725 "",
763 "MT6360_INT_ODL", 726 "MT6360_INT_ODL",
764 "SCP_JTAG0_TRSTN", 727 "SCP_JTAG0_TRSTN",
765 "AP_SPI_EC_CS_L", 728 "AP_SPI_EC_CS_L",
766 "AP_SPI_EC_CLK", 729 "AP_SPI_EC_CLK",
767 "AP_SPI_EC_MOSI", 730 "AP_SPI_EC_MOSI",
768 "AP_SPI_EC_MISO", 731 "AP_SPI_EC_MISO",
769 "SCP_JTAG0_TMS", 732 "SCP_JTAG0_TMS",
770 "SCP_JTAG0_TCK", 733 "SCP_JTAG0_TCK",
771 "SCP_JTAG0_TDO", 734 "SCP_JTAG0_TDO",
772 "SCP_JTAG0_TDI", 735 "SCP_JTAG0_TDI",
773 "AP_SPI_FLASH_CS_L", 736 "AP_SPI_FLASH_CS_L",
774 "AP_SPI_FLASH_CLK", 737 "AP_SPI_FLASH_CLK",
775 "AP_SPI_FLASH_MOSI", 738 "AP_SPI_FLASH_MOSI",
776 "AP_SPI_FLASH_MISO"; 739 "AP_SPI_FLASH_MISO";
777 740
778 aud_pins_default: audio-default-pins { 741 aud_pins_default: audio-default-pins {
779 pins-cmd-dat { 742 pins-cmd-dat {
780 pinmux = <PINMUX_GPIO69__F 743 pinmux = <PINMUX_GPIO69__FUNC_AUD_CLK_MOSI>,
781 <PINMUX_GPIO70__F 744 <PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI>,
782 <PINMUX_GPIO71__F 745 <PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0>,
783 <PINMUX_GPIO72__F 746 <PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1>,
784 <PINMUX_GPIO73__F 747 <PINMUX_GPIO73__FUNC_AUD_DAT_MISO0>,
785 <PINMUX_GPIO74__F 748 <PINMUX_GPIO74__FUNC_AUD_DAT_MISO1>,
786 <PINMUX_GPIO75__F 749 <PINMUX_GPIO75__FUNC_AUD_DAT_MISO2>,
787 <PINMUX_GPIO0__FU 750 <PINMUX_GPIO0__FUNC_TDMIN_MCK>,
788 <PINMUX_GPIO1__FU 751 <PINMUX_GPIO1__FUNC_TDMIN_DI>,
789 <PINMUX_GPIO2__FU 752 <PINMUX_GPIO2__FUNC_TDMIN_LRCK>,
790 <PINMUX_GPIO3__FU 753 <PINMUX_GPIO3__FUNC_TDMIN_BCK>,
791 <PINMUX_GPIO60__F 754 <PINMUX_GPIO60__FUNC_I2SO2_D0>,
792 <PINMUX_GPIO49__F 755 <PINMUX_GPIO49__FUNC_I2SIN_D0>,
793 <PINMUX_GPIO50__F 756 <PINMUX_GPIO50__FUNC_I2SO1_MCK>,
794 <PINMUX_GPIO51__F 757 <PINMUX_GPIO51__FUNC_I2SO1_BCK>,
795 <PINMUX_GPIO52__F 758 <PINMUX_GPIO52__FUNC_I2SO1_WS>,
796 <PINMUX_GPIO53__F 759 <PINMUX_GPIO53__FUNC_I2SO1_D0>;
797 }; 760 };
798 761
799 pins-hp-jack-int-odl { 762 pins-hp-jack-int-odl {
800 pinmux = <PINMUX_GPIO8 763 pinmux = <PINMUX_GPIO89__FUNC_GPIO89>;
801 input-enable; 764 input-enable;
802 bias-pull-up = <MTK_PU 765 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
803 }; 766 };
804 }; 767 };
805 768
806 cr50_int: cr50-irq-default-pins { 769 cr50_int: cr50-irq-default-pins {
807 pins-gsc-ap-int-odl { 770 pins-gsc-ap-int-odl {
808 pinmux = <PINMUX_GPIO8 771 pinmux = <PINMUX_GPIO88__FUNC_GPIO88>;
809 input-enable; 772 input-enable;
810 }; 773 };
811 }; 774 };
812 775
813 cros_ec_int: cros-ec-irq-default-pins 776 cros_ec_int: cros-ec-irq-default-pins {
814 pins-ec-ap-int-odl { 777 pins-ec-ap-int-odl {
815 pinmux = <PINMUX_GPIO4 778 pinmux = <PINMUX_GPIO4__FUNC_GPIO4>;
816 bias-pull-up = <MTK_PU 779 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
817 input-enable; 780 input-enable;
818 }; 781 };
819 }; 782 };
820 783
821 edptx_pins_default: edptx-default-pins 784 edptx_pins_default: edptx-default-pins {
822 pins-cmd-dat { 785 pins-cmd-dat {
823 pinmux = <PINMUX_GPIO7 786 pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>;
824 bias-pull-up; 787 bias-pull-up;
825 }; 788 };
826 }; 789 };
827 790
828 disp_pwm0_pin_default: disp-pwm0-defau 791 disp_pwm0_pin_default: disp-pwm0-default-pins {
829 pins-disp-pwm { 792 pins-disp-pwm {
830 pinmux = <PINMUX_GPIO8 793 pinmux = <PINMUX_GPIO82__FUNC_GPIO82>,
831 <PINMUX_GPIO9 794 <PINMUX_GPIO97__FUNC_DISP_PWM0>;
832 }; 795 };
833 }; 796 };
834 797
835 dptx_pin: dptx-default-pins { 798 dptx_pin: dptx-default-pins {
836 pins-cmd-dat { 799 pins-cmd-dat {
837 pinmux = <PINMUX_GPIO1 800 pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>;
838 bias-pull-up; 801 bias-pull-up;
839 }; 802 };
840 }; 803 };
841 804
842 i2c0_pins: i2c0-default-pins { 805 i2c0_pins: i2c0-default-pins {
843 pins-bus { 806 pins-bus {
844 pinmux = <PINMUX_GPIO8 807 pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
845 <PINMUX_GPIO9 808 <PINMUX_GPIO9__FUNC_SCL0>;
846 bias-disable; 809 bias-disable;
847 drive-strength-microam 810 drive-strength-microamp = <1000>;
848 }; 811 };
849 }; 812 };
850 813
851 i2c1_pins: i2c1-default-pins { 814 i2c1_pins: i2c1-default-pins {
852 pins-bus { 815 pins-bus {
853 pinmux = <PINMUX_GPIO1 816 pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
854 <PINMUX_GPIO1 817 <PINMUX_GPIO11__FUNC_SCL1>;
855 bias-pull-up = <1000>; 818 bias-pull-up = <1000>;
856 drive-strength-microam 819 drive-strength-microamp = <1000>;
857 }; 820 };
858 }; 821 };
859 822
860 i2c2_pins: i2c2-default-pins { 823 i2c2_pins: i2c2-default-pins {
861 pins-bus { 824 pins-bus {
862 pinmux = <PINMUX_GPIO1 825 pinmux = <PINMUX_GPIO12__FUNC_SDA2>,
863 <PINMUX_GPIO1 826 <PINMUX_GPIO13__FUNC_SCL2>;
864 bias-disable; 827 bias-disable;
865 drive-strength-microam 828 drive-strength-microamp = <1000>;
866 }; 829 };
867 }; 830 };
868 831
869 i2c3_pins: i2c3-default-pins { 832 i2c3_pins: i2c3-default-pins {
870 pins-bus { 833 pins-bus {
871 pinmux = <PINMUX_GPIO1 834 pinmux = <PINMUX_GPIO14__FUNC_SDA3>,
872 <PINMUX_GPIO1 835 <PINMUX_GPIO15__FUNC_SCL3>;
873 bias-pull-up = <1000>; 836 bias-pull-up = <1000>;
874 drive-strength-microam 837 drive-strength-microamp = <1000>;
875 }; 838 };
876 }; 839 };
877 840
878 i2c4_pins: i2c4-default-pins { 841 i2c4_pins: i2c4-default-pins {
879 pins-bus { 842 pins-bus {
880 pinmux = <PINMUX_GPIO1 843 pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
881 <PINMUX_GPIO1 844 <PINMUX_GPIO17__FUNC_SCL4>;
882 bias-pull-up = <1000>; 845 bias-pull-up = <1000>;
883 drive-strength = <4>; 846 drive-strength = <4>;
884 }; 847 };
885 }; 848 };
886 849
887 i2c5_pins: i2c5-default-pins { 850 i2c5_pins: i2c5-default-pins {
888 pins-bus { 851 pins-bus {
889 pinmux = <PINMUX_GPIO2 852 pinmux = <PINMUX_GPIO29__FUNC_SCL5>,
890 <PINMUX_GPIO3 853 <PINMUX_GPIO30__FUNC_SDA5>;
891 bias-disable; 854 bias-disable;
892 drive-strength-microam 855 drive-strength-microamp = <1000>;
893 }; 856 };
894 }; 857 };
895 858
896 i2c7_pins: i2c7-default-pins { 859 i2c7_pins: i2c7-default-pins {
897 pins-bus { 860 pins-bus {
898 pinmux = <PINMUX_GPIO2 861 pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
899 <PINMUX_GPIO2 862 <PINMUX_GPIO28__FUNC_SDA7>;
900 bias-disable; 863 bias-disable;
901 }; 864 };
902 }; 865 };
903 866
904 mmc0_pins_default: mmc0-default-pins { 867 mmc0_pins_default: mmc0-default-pins {
905 pins-cmd-dat { 868 pins-cmd-dat {
906 pinmux = <PINMUX_GPIO1 869 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
907 <PINMUX_GPIO1 870 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
908 <PINMUX_GPIO1 871 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
909 <PINMUX_GPIO1 872 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
910 <PINMUX_GPIO1 873 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
911 <PINMUX_GPIO1 874 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
912 <PINMUX_GPIO1 875 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
913 <PINMUX_GPIO1 876 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
914 <PINMUX_GPIO1 877 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
915 input-enable; 878 input-enable;
916 drive-strength = <6>; 879 drive-strength = <6>;
917 bias-pull-up = <MTK_PU 880 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
918 }; 881 };
919 882
920 pins-clk { 883 pins-clk {
921 pinmux = <PINMUX_GPIO1 884 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
922 drive-strength = <6>; 885 drive-strength = <6>;
923 bias-pull-down = <MTK_ 886 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
924 }; 887 };
925 888
926 pins-rst { 889 pins-rst {
927 pinmux = <PINMUX_GPIO1 890 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
928 drive-strength = <6>; 891 drive-strength = <6>;
929 bias-pull-up = <MTK_PU 892 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
930 }; 893 };
931 }; 894 };
932 895
933 mmc0_pins_uhs: mmc0-uhs-pins { 896 mmc0_pins_uhs: mmc0-uhs-pins {
934 pins-cmd-dat { 897 pins-cmd-dat {
935 pinmux = <PINMUX_GPIO1 898 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
936 <PINMUX_GPIO1 899 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
937 <PINMUX_GPIO1 900 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
938 <PINMUX_GPIO1 901 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
939 <PINMUX_GPIO1 902 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
940 <PINMUX_GPIO1 903 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
941 <PINMUX_GPIO1 904 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
942 <PINMUX_GPIO1 905 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
943 <PINMUX_GPIO1 906 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
944 input-enable; 907 input-enable;
945 drive-strength = <8>; 908 drive-strength = <8>;
946 bias-pull-up = <MTK_PU 909 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
947 }; 910 };
948 911
949 pins-clk { 912 pins-clk {
950 pinmux = <PINMUX_GPIO1 913 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
951 drive-strength = <8>; 914 drive-strength = <8>;
952 bias-pull-down = <MTK_ 915 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
953 }; 916 };
954 917
955 pins-ds { 918 pins-ds {
956 pinmux = <PINMUX_GPIO1 919 pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
957 drive-strength = <8>; 920 drive-strength = <8>;
958 bias-pull-down = <MTK_ 921 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
959 }; 922 };
960 923
961 pins-rst { 924 pins-rst {
962 pinmux = <PINMUX_GPIO1 925 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
963 drive-strength = <8>; 926 drive-strength = <8>;
964 bias-pull-up = <MTK_PU 927 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
965 }; 928 };
966 }; 929 };
967 930
968 mmc1_pins_detect: mmc1-detect-pins { 931 mmc1_pins_detect: mmc1-detect-pins {
969 pins-insert { 932 pins-insert {
970 pinmux = <PINMUX_GPIO5 933 pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
971 bias-pull-up; 934 bias-pull-up;
972 }; 935 };
973 }; 936 };
974 937
975 mmc1_pins_default: mmc1-default-pins { 938 mmc1_pins_default: mmc1-default-pins {
976 pins-cmd-dat { 939 pins-cmd-dat {
977 pinmux = <PINMUX_GPIO1 940 pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
978 <PINMUX_GPIO1 941 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
979 <PINMUX_GPIO1 942 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
980 <PINMUX_GPIO1 943 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
981 <PINMUX_GPIO1 944 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
982 input-enable; 945 input-enable;
983 drive-strength = <8>; 946 drive-strength = <8>;
984 bias-pull-up = <MTK_PU 947 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
985 }; 948 };
986 949
987 pins-clk { 950 pins-clk {
988 pinmux = <PINMUX_GPIO1 951 pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
989 drive-strength = <8>; 952 drive-strength = <8>;
990 bias-pull-down = <MTK_ 953 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
991 }; 954 };
992 }; 955 };
993 956
994 nor_pins_default: nor-default-pins { 957 nor_pins_default: nor-default-pins {
995 pins-ck-io { 958 pins-ck-io {
996 pinmux = <PINMUX_GPIO1 959 pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
997 <PINMUX_GPIO1 960 <PINMUX_GPIO141__FUNC_SPINOR_CK>,
998 <PINMUX_GPIO1 961 <PINMUX_GPIO143__FUNC_SPINOR_IO1>;
999 drive-strength = <6>; 962 drive-strength = <6>;
1000 bias-pull-down; 963 bias-pull-down;
1001 }; 964 };
1002 965
1003 pins-cs { 966 pins-cs {
1004 pinmux = <PINMUX_GPIO 967 pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>;
1005 drive-strength = <6>; 968 drive-strength = <6>;
1006 bias-pull-up; 969 bias-pull-up;
1007 }; 970 };
1008 }; 971 };
1009 972
1010 pcie0_pins_default: pcie0-default-pin 973 pcie0_pins_default: pcie0-default-pins {
1011 pins-bus { 974 pins-bus {
1012 pinmux = <PINMUX_GPIO 975 pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
1013 <PINMUX_GPIO 976 <PINMUX_GPIO20__FUNC_PERSTN>,
1014 <PINMUX_GPIO 977 <PINMUX_GPIO21__FUNC_CLKREQN>;
1015 bias-pull-up 978 bias-pull-up;
1016 }; 979 };
1017 }; 980 };
1018 981
1019 pcie1_pins_default: pcie1-default-pin 982 pcie1_pins_default: pcie1-default-pins {
1020 pins-bus { 983 pins-bus {
1021 pinmux = <PINMUX_GPIO 984 pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>,
1022 <PINMUX_GPIO 985 <PINMUX_GPIO23__FUNC_CLKREQN_1>,
1023 <PINMUX_GPIO 986 <PINMUX_GPIO24__FUNC_WAKEN_1>;
1024 bias-pull-up 987 bias-pull-up;
1025 }; 988 };
1026 }; 989 };
1027 990
1028 panel_fixed_pins: panel-pwr-default-p <<
1029 pins-vreg-en { <<
1030 pinmux = <PINMUX_GPIO <<
1031 }; <<
1032 }; <<
1033 <<
1034 pio_default: pio-default-pins { 991 pio_default: pio-default-pins {
1035 pins-wifi-enable { 992 pins-wifi-enable {
1036 pinmux = <PINMUX_GPIO 993 pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
1037 output-high; 994 output-high;
1038 drive-strength = <14> 995 drive-strength = <14>;
1039 }; 996 };
1040 997
1041 pins-low-power-pd { 998 pins-low-power-pd {
1042 pinmux = <PINMUX_GPIO 999 pinmux = <PINMUX_GPIO25__FUNC_GPIO25>,
1043 <PINMUX_GPIO 1000 <PINMUX_GPIO26__FUNC_GPIO26>,
1044 <PINMUX_GPIO 1001 <PINMUX_GPIO46__FUNC_GPIO46>,
1045 <PINMUX_GPIO 1002 <PINMUX_GPIO47__FUNC_GPIO47>,
1046 <PINMUX_GPIO 1003 <PINMUX_GPIO48__FUNC_GPIO48>,
1047 <PINMUX_GPIO 1004 <PINMUX_GPIO65__FUNC_GPIO65>,
1048 <PINMUX_GPIO 1005 <PINMUX_GPIO66__FUNC_GPIO66>,
1049 <PINMUX_GPIO 1006 <PINMUX_GPIO67__FUNC_GPIO67>,
1050 <PINMUX_GPIO 1007 <PINMUX_GPIO68__FUNC_GPIO68>,
1051 <PINMUX_GPIO 1008 <PINMUX_GPIO128__FUNC_GPIO128>,
1052 <PINMUX_GPIO 1009 <PINMUX_GPIO129__FUNC_GPIO129>;
1053 input-enable; 1010 input-enable;
1054 bias-pull-down; 1011 bias-pull-down;
1055 }; 1012 };
1056 1013
1057 pins-low-power-pupd { 1014 pins-low-power-pupd {
1058 pinmux = <PINMUX_GPIO 1015 pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
1059 <PINMUX_GPIO 1016 <PINMUX_GPIO78__FUNC_GPIO78>,
1060 <PINMUX_GPIO 1017 <PINMUX_GPIO79__FUNC_GPIO79>,
1061 <PINMUX_GPIO 1018 <PINMUX_GPIO80__FUNC_GPIO80>,
1062 <PINMUX_GPIO 1019 <PINMUX_GPIO83__FUNC_GPIO83>,
1063 <PINMUX_GPIO 1020 <PINMUX_GPIO85__FUNC_GPIO85>,
1064 <PINMUX_GPIO 1021 <PINMUX_GPIO90__FUNC_GPIO90>,
1065 <PINMUX_GPIO 1022 <PINMUX_GPIO91__FUNC_GPIO91>,
1066 <PINMUX_GPIO 1023 <PINMUX_GPIO93__FUNC_GPIO93>,
1067 <PINMUX_GPIO 1024 <PINMUX_GPIO94__FUNC_GPIO94>,
1068 <PINMUX_GPIO 1025 <PINMUX_GPIO95__FUNC_GPIO95>,
1069 <PINMUX_GPIO 1026 <PINMUX_GPIO96__FUNC_GPIO96>,
1070 <PINMUX_GPIO 1027 <PINMUX_GPIO104__FUNC_GPIO104>,
1071 <PINMUX_GPIO 1028 <PINMUX_GPIO105__FUNC_GPIO105>,
1072 <PINMUX_GPIO 1029 <PINMUX_GPIO107__FUNC_GPIO107>;
1073 input-enable; 1030 input-enable;
1074 bias-pull-down = <MTK 1031 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1075 }; 1032 };
1076 }; 1033 };
1077 1034
1078 rt1019p_pins_default: rt1019p-default 1035 rt1019p_pins_default: rt1019p-default-pins {
1079 pins-amp-sdb { 1036 pins-amp-sdb {
1080 pinmux = <PINMUX_GPIO 1037 pinmux = <PINMUX_GPIO100__FUNC_GPIO100>;
1081 output-low; 1038 output-low;
1082 }; 1039 };
1083 }; 1040 };
1084 1041
1085 scp_pins: scp-default-pins { 1042 scp_pins: scp-default-pins {
1086 pins-vreq { 1043 pins-vreq {
1087 pinmux = <PINMUX_GPIO 1044 pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>;
1088 bias-disable; 1045 bias-disable;
1089 input-enable; 1046 input-enable;
1090 }; 1047 };
1091 }; 1048 };
1092 1049
1093 spi0_pins: spi0-default-pins { 1050 spi0_pins: spi0-default-pins {
1094 pins-cs-mosi-clk { 1051 pins-cs-mosi-clk {
1095 pinmux = <PINMUX_GPIO 1052 pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
1096 <PINMUX_GPIO 1053 <PINMUX_GPIO134__FUNC_SPIM0_MO>,
1097 <PINMUX_GPIO 1054 <PINMUX_GPIO133__FUNC_SPIM0_CLK>;
1098 bias-disable; 1055 bias-disable;
1099 }; 1056 };
1100 1057
1101 pins-miso { 1058 pins-miso {
1102 pinmux = <PINMUX_GPIO 1059 pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>;
1103 bias-pull-down; 1060 bias-pull-down;
1104 }; 1061 };
1105 }; 1062 };
1106 1063
1107 subpmic_default: subpmic-default-pins 1064 subpmic_default: subpmic-default-pins {
1108 subpmic_pin_irq: pins-subpmic 1065 subpmic_pin_irq: pins-subpmic-int-n {
1109 pinmux = <PINMUX_GPIO 1066 pinmux = <PINMUX_GPIO130__FUNC_GPIO130>;
1110 input-enable; 1067 input-enable;
1111 bias-pull-up; 1068 bias-pull-up;
1112 }; 1069 };
1113 }; 1070 };
1114 1071
1115 trackpad_pins: trackpad-default-pins 1072 trackpad_pins: trackpad-default-pins {
1116 pins-int-n { 1073 pins-int-n {
1117 pinmux = <PINMUX_GPIO 1074 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
1118 input-enable; 1075 input-enable;
1119 bias-pull-up; 1076 bias-pull-up;
1120 }; 1077 };
1121 }; 1078 };
1122 1079
1123 touchscreen_pins: touchscreen-default 1080 touchscreen_pins: touchscreen-default-pins {
1124 pins-int-n { 1081 pins-int-n {
1125 pinmux = <PINMUX_GPIO 1082 pinmux = <PINMUX_GPIO92__FUNC_GPIO92>;
1126 input-enable; 1083 input-enable;
1127 bias-pull-up = <MTK_P 1084 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1128 }; 1085 };
1129 pins-rst { 1086 pins-rst {
1130 pinmux = <PINMUX_GPIO 1087 pinmux = <PINMUX_GPIO56__FUNC_GPIO56>;
1131 output-high; 1088 output-high;
1132 }; 1089 };
1133 pins-report-sw { 1090 pins-report-sw {
1134 pinmux = <PINMUX_GPIO 1091 pinmux = <PINMUX_GPIO57__FUNC_GPIO57>;
1135 output-low; 1092 output-low;
1136 }; 1093 };
1137 }; 1094 };
1138 }; 1095 };
1139 1096
1140 &pmic { 1097 &pmic {
1141 interrupts-extended = <&pio 222 IRQ_T 1098 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
1142 }; 1099 };
1143 1100
1144 &scp { 1101 &scp {
1145 status = "okay"; 1102 status = "okay";
1146 1103
1147 firmware-name = "mediatek/mt8195/scp. 1104 firmware-name = "mediatek/mt8195/scp.img";
1148 memory-region = <&scp_mem>; 1105 memory-region = <&scp_mem>;
1149 pinctrl-names = "default"; 1106 pinctrl-names = "default";
1150 pinctrl-0 = <&scp_pins>; 1107 pinctrl-0 = <&scp_pins>;
1151 1108
1152 cros-ec-rpmsg { 1109 cros-ec-rpmsg {
1153 compatible = "google,cros-ec- 1110 compatible = "google,cros-ec-rpmsg";
1154 mediatek,rpmsg-name = "cros-e 1111 mediatek,rpmsg-name = "cros-ec-rpmsg";
1155 }; 1112 };
1156 }; 1113 };
1157 1114
1158 &sound { 1115 &sound {
1159 status = "okay"; 1116 status = "okay";
1160 1117
1161 mediatek,adsp = <&adsp>; 1118 mediatek,adsp = <&adsp>;
1162 mediatek,dai-link = 1119 mediatek,dai-link =
1163 "DL10_FE", "DPTX_BE", "ETDM1_ 1120 "DL10_FE", "DPTX_BE", "ETDM1_IN_BE", "ETDM2_IN_BE",
1164 "ETDM1_OUT_BE", "ETDM2_OUT_BE 1121 "ETDM1_OUT_BE", "ETDM2_OUT_BE","UL_SRC1_BE",
1165 "AFE_SOF_DL2", "AFE_SOF_DL3", 1122 "AFE_SOF_DL2", "AFE_SOF_DL3", "AFE_SOF_UL4", "AFE_SOF_UL5";
1166 pinctrl-names = "default"; 1123 pinctrl-names = "default";
1167 pinctrl-0 = <&aud_pins_default>; 1124 pinctrl-0 = <&aud_pins_default>;
1168 <<
1169 audio-routing = <<
1170 "Headphone", "HPOL", <<
1171 "Headphone", "HPOR", <<
1172 "IN1P", "Headset Mic", <<
1173 "Ext Spk", "Speaker"; <<
1174 <<
1175 mm-dai-link { <<
1176 link-name = "ETDM1_IN_BE"; <<
1177 mediatek,clk-provider = "cpu" <<
1178 }; <<
1179 <<
1180 hs-playback-dai-link { <<
1181 link-name = "ETDM1_OUT_BE"; <<
1182 mediatek,clk-provider = "cpu" <<
1183 codec { <<
1184 sound-dai = <&audio_c <<
1185 }; <<
1186 }; <<
1187 <<
1188 hs-capture-dai-link { <<
1189 link-name = "ETDM2_IN_BE"; <<
1190 mediatek,clk-provider = "cpu" <<
1191 codec { <<
1192 sound-dai = <&audio_c <<
1193 }; <<
1194 }; <<
1195 <<
1196 spk-playback-dai-link { <<
1197 link-name = "ETDM2_OUT_BE"; <<
1198 mediatek,clk-provider = "cpu" <<
1199 codec { <<
1200 sound-dai = <&spk_amp <<
1201 }; <<
1202 }; <<
1203 <<
1204 displayport-dai-link { <<
1205 link-name = "DPTX_BE"; <<
1206 codec { <<
1207 sound-dai = <&dp_tx>; <<
1208 }; <<
1209 }; <<
1210 }; 1125 };
1211 1126
1212 &spi0 { 1127 &spi0 {
1213 status = "okay"; 1128 status = "okay";
1214 1129
1215 pinctrl-names = "default"; 1130 pinctrl-names = "default";
1216 pinctrl-0 = <&spi0_pins>; 1131 pinctrl-0 = <&spi0_pins>;
1217 mediatek,pad-select = <0>; 1132 mediatek,pad-select = <0>;
1218 1133
1219 cros_ec: ec@0 { 1134 cros_ec: ec@0 {
1220 #address-cells = <1>; 1135 #address-cells = <1>;
1221 #size-cells = <0>; 1136 #size-cells = <0>;
1222 1137
1223 compatible = "google,cros-ec- 1138 compatible = "google,cros-ec-spi";
1224 reg = <0>; 1139 reg = <0>;
1225 interrupts-extended = <&pio 4 1140 interrupts-extended = <&pio 4 IRQ_TYPE_LEVEL_LOW>;
1226 pinctrl-names = "default"; 1141 pinctrl-names = "default";
1227 pinctrl-0 = <&cros_ec_int>; 1142 pinctrl-0 = <&cros_ec_int>;
1228 spi-max-frequency = <3000000> 1143 spi-max-frequency = <3000000>;
1229 wakeup-source; !! 1144
>> 1145 keyboard-backlight {
>> 1146 compatible = "google,cros-kbd-led-backlight";
>> 1147 };
1230 1148
1231 i2c_tunnel: i2c-tunnel { 1149 i2c_tunnel: i2c-tunnel {
1232 compatible = "google, 1150 compatible = "google,cros-ec-i2c-tunnel";
1233 google,remote-bus = < 1151 google,remote-bus = <0>;
1234 #address-cells = <1>; 1152 #address-cells = <1>;
1235 #size-cells = <0>; 1153 #size-cells = <0>;
1236 }; 1154 };
1237 1155
1238 mt_pmic_vmc_ldo_reg: regulato 1156 mt_pmic_vmc_ldo_reg: regulator@0 {
1239 compatible = "google, 1157 compatible = "google,cros-ec-regulator";
1240 reg = <0>; 1158 reg = <0>;
1241 regulator-name = "mt_ 1159 regulator-name = "mt_pmic_vmc_ldo";
1242 regulator-min-microvo 1160 regulator-min-microvolt = <1200000>;
1243 regulator-max-microvo 1161 regulator-max-microvolt = <3600000>;
1244 }; 1162 };
1245 1163
1246 mt_pmic_vmch_ldo_reg: regulat 1164 mt_pmic_vmch_ldo_reg: regulator@1 {
1247 compatible = "google, 1165 compatible = "google,cros-ec-regulator";
1248 reg = <1>; 1166 reg = <1>;
1249 regulator-name = "mt_ 1167 regulator-name = "mt_pmic_vmch_ldo";
1250 regulator-min-microvo 1168 regulator-min-microvolt = <2700000>;
1251 regulator-max-microvo 1169 regulator-max-microvolt = <3600000>;
1252 }; 1170 };
1253 1171
1254 typec { 1172 typec {
1255 compatible = "google, 1173 compatible = "google,cros-ec-typec";
1256 #address-cells = <1>; 1174 #address-cells = <1>;
1257 #size-cells = <0>; 1175 #size-cells = <0>;
1258 1176
1259 usb_c0: connector@0 { 1177 usb_c0: connector@0 {
1260 compatible = 1178 compatible = "usb-c-connector";
1261 reg = <0>; 1179 reg = <0>;
1262 power-role = 1180 power-role = "dual";
1263 data-role = " 1181 data-role = "host";
1264 try-power-rol 1182 try-power-role = "source";
1265 }; 1183 };
1266 1184
1267 usb_c1: connector@1 { 1185 usb_c1: connector@1 {
1268 compatible = 1186 compatible = "usb-c-connector";
1269 reg = <1>; 1187 reg = <1>;
1270 power-role = 1188 power-role = "dual";
1271 data-role = " 1189 data-role = "host";
1272 try-power-rol 1190 try-power-role = "source";
1273 }; 1191 };
1274 }; 1192 };
1275 }; 1193 };
1276 }; 1194 };
1277 1195
1278 &spmi { 1196 &spmi {
1279 #address-cells = <2>; 1197 #address-cells = <2>;
1280 #size-cells = <0>; 1198 #size-cells = <0>;
1281 1199
1282 mt6315@6 { 1200 mt6315@6 {
1283 compatible = "mediatek,mt6315 1201 compatible = "mediatek,mt6315-regulator";
1284 reg = <0x6 SPMI_USID>; 1202 reg = <0x6 SPMI_USID>;
1285 1203
1286 regulators { 1204 regulators {
1287 mt6315_6_vbuck1: vbuc 1205 mt6315_6_vbuck1: vbuck1 {
1288 regulator-com 1206 regulator-compatible = "vbuck1";
1289 regulator-nam 1207 regulator-name = "Vbcpu";
1290 regulator-min 1208 regulator-min-microvolt = <400000>;
1291 regulator-max 1209 regulator-max-microvolt = <1193750>;
1292 regulator-ena 1210 regulator-enable-ramp-delay = <256>;
1293 regulator-ram 1211 regulator-ramp-delay = <6250>;
1294 regulator-all 1212 regulator-allowed-modes = <0 1 2>;
1295 regulator-alw 1213 regulator-always-on;
1296 }; 1214 };
1297 }; 1215 };
1298 }; 1216 };
1299 1217
1300 mt6315@7 { 1218 mt6315@7 {
1301 compatible = "mediatek,mt6315 1219 compatible = "mediatek,mt6315-regulator";
1302 reg = <0x7 SPMI_USID>; 1220 reg = <0x7 SPMI_USID>;
1303 1221
1304 regulators { 1222 regulators {
1305 mt6315_7_vbuck1: vbuc 1223 mt6315_7_vbuck1: vbuck1 {
1306 regulator-com 1224 regulator-compatible = "vbuck1";
1307 regulator-nam 1225 regulator-name = "Vgpu";
1308 regulator-min 1226 regulator-min-microvolt = <400000>;
1309 regulator-max 1227 regulator-max-microvolt = <1193750>;
1310 regulator-ena 1228 regulator-enable-ramp-delay = <256>;
1311 regulator-ram 1229 regulator-ramp-delay = <6250>;
1312 regulator-all 1230 regulator-allowed-modes = <0 1 2>;
>> 1231 regulator-always-on;
1313 }; 1232 };
1314 }; 1233 };
1315 }; 1234 };
1316 }; 1235 };
1317 1236
1318 &thermal_zones { 1237 &thermal_zones {
1319 soc-area-thermal { 1238 soc-area-thermal {
1320 polling-delay = <1000>; 1239 polling-delay = <1000>;
1321 polling-delay-passive = <250> 1240 polling-delay-passive = <250>;
1322 thermal-sensors = <&tboard_th 1241 thermal-sensors = <&tboard_thermistor1>;
1323 1242
1324 trips { 1243 trips {
1325 trip-crit { 1244 trip-crit {
1326 temperature = 1245 temperature = <84000>;
1327 hysteresis = 1246 hysteresis = <1000>;
1328 type = "criti 1247 type = "critical";
1329 }; 1248 };
1330 }; 1249 };
1331 }; 1250 };
1332 1251
1333 pmic-area-thermal { 1252 pmic-area-thermal {
1334 polling-delay = <1000>; 1253 polling-delay = <1000>;
1335 polling-delay-passive = <0>; 1254 polling-delay-passive = <0>;
1336 thermal-sensors = <&tboard_th 1255 thermal-sensors = <&tboard_thermistor2>;
1337 1256
1338 trips { 1257 trips {
1339 trip-crit { 1258 trip-crit {
1340 temperature = 1259 temperature = <84000>;
1341 hysteresis = 1260 hysteresis = <1000>;
1342 type = "criti 1261 type = "critical";
1343 }; 1262 };
1344 }; 1263 };
1345 }; 1264 };
1346 }; 1265 };
1347 1266
1348 &u3phy0 { 1267 &u3phy0 {
1349 status = "okay"; 1268 status = "okay";
1350 }; 1269 };
1351 1270
1352 &u3phy1 { 1271 &u3phy1 {
1353 status = "okay"; 1272 status = "okay";
1354 }; 1273 };
1355 1274
1356 &u3phy2 { 1275 &u3phy2 {
1357 status = "okay"; 1276 status = "okay";
1358 }; 1277 };
1359 1278
1360 &u3phy3 { 1279 &u3phy3 {
1361 status = "okay"; 1280 status = "okay";
1362 }; 1281 };
1363 1282
1364 &uart0 { 1283 &uart0 {
1365 status = "okay"; 1284 status = "okay";
1366 }; 1285 };
1367 1286
1368 /* <<
1369 * For the USB Type-C ports the role and alte <<
1370 * done by the EC so we set dr_mode to host t <<
1371 */ <<
1372 &ssusb0 { <<
1373 dr_mode = "host"; <<
1374 vusb33-supply = <&mt6359_vusb_ldo_reg <<
1375 status = "okay"; <<
1376 }; <<
1377 <<
1378 &ssusb2 { <<
1379 dr_mode = "host"; <<
1380 vusb33-supply = <&mt6359_vusb_ldo_reg <<
1381 status = "okay"; <<
1382 }; <<
1383 <<
1384 &ssusb3 { <<
1385 dr_mode = "host"; <<
1386 vusb33-supply = <&mt6359_vusb_ldo_reg <<
1387 status = "okay"; <<
1388 }; <<
1389 <<
1390 &xhci0 { 1287 &xhci0 {
1391 status = "okay"; 1288 status = "okay";
1392 1289
1393 rx-fifo-depth = <3072>; !! 1290 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1394 vbus-supply = <&usb_vbus>; 1291 vbus-supply = <&usb_vbus>;
1395 }; 1292 };
1396 1293
1397 &xhci1 { 1294 &xhci1 {
1398 status = "okay"; 1295 status = "okay";
1399 1296
1400 phys = <&u2port1 PHY_TYPE_USB2>; <<
1401 rx-fifo-depth = <3072>; <<
1402 vusb33-supply = <&mt6359_vusb_ldo_reg 1297 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1403 vbus-supply = <&usb_vbus>; 1298 vbus-supply = <&usb_vbus>;
1404 mediatek,u3p-dis-msk = <1>; <<
1405 }; 1299 };
1406 1300
1407 &xhci2 { 1301 &xhci2 {
1408 status = "okay"; 1302 status = "okay";
>> 1303
>> 1304 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1409 vbus-supply = <&usb_vbus>; 1305 vbus-supply = <&usb_vbus>;
1410 }; 1306 };
1411 1307
1412 &xhci3 { 1308 &xhci3 {
1413 status = "okay"; 1309 status = "okay";
1414 1310
1415 /* MT7921's USB Bluetooth has issues 1311 /* MT7921's USB Bluetooth has issues with USB2 LPM */
1416 usb2-lpm-disable; 1312 usb2-lpm-disable;
>> 1313 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1417 vbus-supply = <&usb_vbus>; 1314 vbus-supply = <&usb_vbus>;
>> 1315 mediatek,u3p-dis-msk = <1>;
1418 }; 1316 };
1419 1317
1420 #include <arm/cros-ec-keyboard.dtsi> 1318 #include <arm/cros-ec-keyboard.dtsi>
1421 #include <arm/cros-ec-sbs.dtsi> 1319 #include <arm/cros-ec-sbs.dtsi>
1422 1320
1423 &keyboard_controller { 1321 &keyboard_controller {
1424 function-row-physmap = < 1322 function-row-physmap = <
1425 MATRIX_KEY(0x00, 0x02, 0) 1323 MATRIX_KEY(0x00, 0x02, 0) /* T1 */
1426 MATRIX_KEY(0x03, 0x02, 0) 1324 MATRIX_KEY(0x03, 0x02, 0) /* T2 */
1427 MATRIX_KEY(0x02, 0x02, 0) 1325 MATRIX_KEY(0x02, 0x02, 0) /* T3 */
1428 MATRIX_KEY(0x01, 0x02, 0) 1326 MATRIX_KEY(0x01, 0x02, 0) /* T4 */
1429 MATRIX_KEY(0x03, 0x04, 0) 1327 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
1430 MATRIX_KEY(0x02, 0x04, 0) 1328 MATRIX_KEY(0x02, 0x04, 0) /* T6 */
1431 MATRIX_KEY(0x01, 0x04, 0) 1329 MATRIX_KEY(0x01, 0x04, 0) /* T7 */
1432 MATRIX_KEY(0x02, 0x09, 0) 1330 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
1433 MATRIX_KEY(0x01, 0x09, 0) 1331 MATRIX_KEY(0x01, 0x09, 0) /* T9 */
1434 MATRIX_KEY(0x00, 0x04, 0) 1332 MATRIX_KEY(0x00, 0x04, 0) /* T10 */
1435 <<
1436 /* T11 to T13 are present onl <<
1437 MATRIX_KEY(0x00, 0x01, 0) <<
1438 MATRIX_KEY(0x01, 0x05, 0) <<
1439 MATRIX_KEY(0x03, 0x05, 0) <<
1440 >; 1333 >;
1441 1334
1442 linux,keymap = < 1335 linux,keymap = <
1443 MATRIX_KEY(0x00, 0x02, KEY_BA 1336 MATRIX_KEY(0x00, 0x02, KEY_BACK)
1444 MATRIX_KEY(0x03, 0x02, KEY_RE 1337 MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
1445 MATRIX_KEY(0x02, 0x02, KEY_ZO 1338 MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
1446 MATRIX_KEY(0x01, 0x02, KEY_SC 1339 MATRIX_KEY(0x01, 0x02, KEY_SCALE)
1447 MATRIX_KEY(0x03, 0x04, KEY_SY 1340 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
1448 MATRIX_KEY(0x02, 0x04, KEY_BR 1341 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
1449 MATRIX_KEY(0x01, 0x04, KEY_BR 1342 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
1450 MATRIX_KEY(0x02, 0x09, KEY_MU 1343 MATRIX_KEY(0x02, 0x09, KEY_MUTE)
1451 MATRIX_KEY(0x01, 0x09, KEY_VO 1344 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
1452 MATRIX_KEY(0x00, 0x04, KEY_VO 1345 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
1453 1346
1454 CROS_STD_MAIN_KEYMAP 1347 CROS_STD_MAIN_KEYMAP
1455 >; 1348 >;
1456 }; 1349 };
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