1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* 2 /*
3 * Copyright (C) 2021 MediaTek Inc. 3 * Copyright (C) 2021 MediaTek Inc.
4 */ 4 */
5 5
6 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h> 7 #include <dt-bindings/spmi/spmi.h>
8 #include "mt8195.dtsi" 8 #include "mt8195.dtsi"
9 #include "mt6359.dtsi" 9 #include "mt6359.dtsi"
10 10
11 / { 11 / {
12 aliases { 12 aliases {
13 i2c0 = &i2c0; 13 i2c0 = &i2c0;
14 i2c1 = &i2c1; 14 i2c1 = &i2c1;
15 i2c2 = &i2c2; 15 i2c2 = &i2c2;
16 i2c3 = &i2c3; 16 i2c3 = &i2c3;
17 i2c4 = &i2c4; 17 i2c4 = &i2c4;
18 i2c5 = &i2c5; 18 i2c5 = &i2c5;
19 i2c7 = &i2c7; 19 i2c7 = &i2c7;
20 mmc0 = &mmc0; 20 mmc0 = &mmc0;
21 mmc1 = &mmc1; 21 mmc1 = &mmc1;
22 serial0 = &uart0; 22 serial0 = &uart0;
23 }; 23 };
24 24
25 backlight_lcd0: backlight-lcd0 { 25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight"; 26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>; 27 brightness-levels = <0 1023>;
28 default-brightness-level = <57 28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_A 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023 30 num-interpolated-steps = <1023>;
31 pwms = <&disp_pwm0 0 500000>; 31 pwms = <&disp_pwm0 0 500000>;
32 power-supply = <&ppvar_sys>; 32 power-supply = <&ppvar_sys>;
33 }; 33 };
34 34
35 chosen { 35 chosen {
36 stdout-path = "serial0:115200n 36 stdout-path = "serial0:115200n8";
37 }; 37 };
38 38
39 dmic-codec { 39 dmic-codec {
40 compatible = "dmic-codec"; 40 compatible = "dmic-codec";
41 num-channels = <2>; 41 num-channels = <2>;
42 wakeup-delay-ms = <50>; 42 wakeup-delay-ms = <50>;
43 }; 43 };
44 44
45 memory@40000000 { 45 memory@40000000 {
46 device_type = "memory"; 46 device_type = "memory";
47 reg = <0 0x40000000 0 0x800000 47 reg = <0 0x40000000 0 0x80000000>;
48 }; 48 };
49 49
50 pp3300_disp_x: regulator-pp3300-disp-x 50 pp3300_disp_x: regulator-pp3300-disp-x {
51 compatible = "regulator-fixed" 51 compatible = "regulator-fixed";
52 regulator-name = "pp3300_disp_ 52 regulator-name = "pp3300_disp_x";
53 regulator-min-microvolt = <330 53 regulator-min-microvolt = <3300000>;
54 regulator-max-microvolt = <330 54 regulator-max-microvolt = <3300000>;
55 regulator-enable-ramp-delay = 55 regulator-enable-ramp-delay = <2500>;
56 enable-active-high; 56 enable-active-high;
57 gpio = <&pio 55 GPIO_ACTIVE_HI 57 gpio = <&pio 55 GPIO_ACTIVE_HIGH>;
58 pinctrl-names = "default"; 58 pinctrl-names = "default";
59 pinctrl-0 = <&panel_fixed_pins 59 pinctrl-0 = <&panel_fixed_pins>;
60 vin-supply = <&pp3300_z2>; 60 vin-supply = <&pp3300_z2>;
61 }; 61 };
62 62
63 /* system wide LDO 3.3V power rail */ 63 /* system wide LDO 3.3V power rail */
64 pp3300_z5: regulator-pp3300-ldo-z5 { 64 pp3300_z5: regulator-pp3300-ldo-z5 {
65 compatible = "regulator-fixed" 65 compatible = "regulator-fixed";
66 regulator-name = "pp3300_ldo_z 66 regulator-name = "pp3300_ldo_z5";
67 regulator-always-on; 67 regulator-always-on;
68 regulator-boot-on; 68 regulator-boot-on;
69 regulator-min-microvolt = <330 69 regulator-min-microvolt = <3300000>;
70 regulator-max-microvolt = <330 70 regulator-max-microvolt = <3300000>;
71 vin-supply = <&ppvar_sys>; 71 vin-supply = <&ppvar_sys>;
72 }; 72 };
73 73
74 /* separately switched 3.3V power rail 74 /* separately switched 3.3V power rail */
75 pp3300_s3: regulator-pp3300-s3 { 75 pp3300_s3: regulator-pp3300-s3 {
76 compatible = "regulator-fixed" 76 compatible = "regulator-fixed";
77 regulator-name = "pp3300_s3"; 77 regulator-name = "pp3300_s3";
78 /* automatically sequenced by 78 /* automatically sequenced by PMIC EXT_PMIC_EN2 */
79 regulator-always-on; 79 regulator-always-on;
80 regulator-boot-on; 80 regulator-boot-on;
81 regulator-min-microvolt = <330 81 regulator-min-microvolt = <3300000>;
82 regulator-max-microvolt = <330 82 regulator-max-microvolt = <3300000>;
83 vin-supply = <&pp3300_z2>; 83 vin-supply = <&pp3300_z2>;
84 }; 84 };
85 85
86 /* system wide 3.3V power rail */ 86 /* system wide 3.3V power rail */
87 pp3300_z2: regulator-pp3300-z2 { 87 pp3300_z2: regulator-pp3300-z2 {
88 compatible = "regulator-fixed" 88 compatible = "regulator-fixed";
89 regulator-name = "pp3300_z2"; 89 regulator-name = "pp3300_z2";
90 /* EN pin tied to pp4200_z2, w 90 /* EN pin tied to pp4200_z2, which is controlled by EC */
91 regulator-always-on; 91 regulator-always-on;
92 regulator-boot-on; 92 regulator-boot-on;
93 regulator-min-microvolt = <330 93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <330 94 regulator-max-microvolt = <3300000>;
95 vin-supply = <&ppvar_sys>; 95 vin-supply = <&ppvar_sys>;
96 }; 96 };
97 97
98 /* system wide 4.2V power rail */ 98 /* system wide 4.2V power rail */
99 pp4200_z2: regulator-pp4200-z2 { 99 pp4200_z2: regulator-pp4200-z2 {
100 compatible = "regulator-fixed" 100 compatible = "regulator-fixed";
101 regulator-name = "pp4200_z2"; 101 regulator-name = "pp4200_z2";
102 /* controlled by EC */ 102 /* controlled by EC */
103 regulator-always-on; 103 regulator-always-on;
104 regulator-boot-on; 104 regulator-boot-on;
105 regulator-min-microvolt = <420 105 regulator-min-microvolt = <4200000>;
106 regulator-max-microvolt = <420 106 regulator-max-microvolt = <4200000>;
107 vin-supply = <&ppvar_sys>; 107 vin-supply = <&ppvar_sys>;
108 }; 108 };
109 109
110 /* system wide switching 5.0V power ra 110 /* system wide switching 5.0V power rail */
111 pp5000_s5: regulator-pp5000-s5 { 111 pp5000_s5: regulator-pp5000-s5 {
112 compatible = "regulator-fixed" 112 compatible = "regulator-fixed";
113 regulator-name = "pp5000_s5"; 113 regulator-name = "pp5000_s5";
114 /* controlled by EC */ 114 /* controlled by EC */
115 regulator-always-on; 115 regulator-always-on;
116 regulator-boot-on; 116 regulator-boot-on;
117 regulator-min-microvolt = <500 117 regulator-min-microvolt = <5000000>;
118 regulator-max-microvolt = <500 118 regulator-max-microvolt = <5000000>;
119 vin-supply = <&ppvar_sys>; 119 vin-supply = <&ppvar_sys>;
120 }; 120 };
121 121
122 /* system wide semi-regulated power ra 122 /* system wide semi-regulated power rail from battery or USB */
123 ppvar_sys: regulator-ppvar-sys { 123 ppvar_sys: regulator-ppvar-sys {
124 compatible = "regulator-fixed" 124 compatible = "regulator-fixed";
125 regulator-name = "ppvar_sys"; 125 regulator-name = "ppvar_sys";
126 regulator-always-on; 126 regulator-always-on;
127 regulator-boot-on; 127 regulator-boot-on;
128 }; 128 };
129 129
130 /* Murata NCP03WF104F05RL */ <<
131 tboard_thermistor1: thermal-sensor-t1 <<
132 compatible = "generic-adc-ther <<
133 #thermal-sensor-cells = <0>; <<
134 io-channels = <&auxadc 0>; <<
135 io-channel-names = "sensor-cha <<
136 temperature-lookup-table = < <<
137 <<
138 <<
139 <<
140 <<
141 <<
142 <<
143 <<
144 <<
145 <<
146 <<
147 <<
148 <<
149 <<
150 <<
151 <<
152 <<
153 <<
154 <<
155 <<
156 <<
157 <<
158 <<
159 <<
160 <<
161 <<
162 <<
163 <<
164 }; <<
165 <<
166 tboard_thermistor2: thermal-sensor-t2 <<
167 compatible = "generic-adc-ther <<
168 #thermal-sensor-cells = <0>; <<
169 io-channels = <&auxadc 1>; <<
170 io-channel-names = "sensor-cha <<
171 temperature-lookup-table = < <<
172 <<
173 <<
174 <<
175 <<
176 <<
177 <<
178 <<
179 <<
180 <<
181 <<
182 <<
183 <<
184 <<
185 <<
186 <<
187 <<
188 <<
189 <<
190 <<
191 <<
192 <<
193 <<
194 <<
195 <<
196 <<
197 <<
198 <<
199 }; <<
200 <<
201 usb_vbus: regulator-5v0-usb-vbus { 130 usb_vbus: regulator-5v0-usb-vbus {
202 compatible = "regulator-fixed" 131 compatible = "regulator-fixed";
203 regulator-name = "usb-vbus"; 132 regulator-name = "usb-vbus";
204 regulator-min-microvolt = <500 133 regulator-min-microvolt = <5000000>;
205 regulator-max-microvolt = <500 134 regulator-max-microvolt = <5000000>;
206 enable-active-high; 135 enable-active-high;
207 regulator-always-on; 136 regulator-always-on;
208 }; 137 };
209 138
210 reserved_memory: reserved-memory { 139 reserved_memory: reserved-memory {
211 #address-cells = <2>; 140 #address-cells = <2>;
212 #size-cells = <2>; 141 #size-cells = <2>;
213 ranges; 142 ranges;
214 143
215 scp_mem: memory@50000000 { 144 scp_mem: memory@50000000 {
216 compatible = "shared-d 145 compatible = "shared-dma-pool";
217 reg = <0 0x50000000 0 146 reg = <0 0x50000000 0 0x2900000>;
218 no-map; 147 no-map;
219 }; 148 };
220 149
221 adsp_mem: memory@60000000 { 150 adsp_mem: memory@60000000 {
222 compatible = "shared-d 151 compatible = "shared-dma-pool";
223 reg = <0 0x60000000 0 152 reg = <0 0x60000000 0 0xd80000>;
224 no-map; 153 no-map;
225 }; 154 };
226 155
227 afe_mem: memory@60d80000 { 156 afe_mem: memory@60d80000 {
228 compatible = "shared-d 157 compatible = "shared-dma-pool";
229 reg = <0 0x60d80000 0 158 reg = <0 0x60d80000 0 0x100000>;
230 no-map; 159 no-map;
231 }; 160 };
232 161
233 adsp_device_mem: memory@60e800 162 adsp_device_mem: memory@60e80000 {
234 compatible = "shared-d 163 compatible = "shared-dma-pool";
235 reg = <0 0x60e80000 0 164 reg = <0 0x60e80000 0 0x280000>;
236 no-map; 165 no-map;
237 }; 166 };
238 }; 167 };
239 168
240 spk_amplifier: rt1019p { 169 spk_amplifier: rt1019p {
241 compatible = "realtek,rt1019p" 170 compatible = "realtek,rt1019p";
242 label = "rt1019p"; 171 label = "rt1019p";
243 #sound-dai-cells = <0>; <<
244 pinctrl-names = "default"; 172 pinctrl-names = "default";
245 pinctrl-0 = <&rt1019p_pins_def 173 pinctrl-0 = <&rt1019p_pins_default>;
246 sdb-gpios = <&pio 100 GPIO_ACT 174 sdb-gpios = <&pio 100 GPIO_ACTIVE_HIGH>;
247 }; 175 };
248 }; 176 };
249 177
250 &adsp { 178 &adsp {
251 status = "okay"; 179 status = "okay";
252 180
253 memory-region = <&adsp_device_mem>, <& 181 memory-region = <&adsp_device_mem>, <&adsp_mem>;
254 }; 182 };
255 183
256 &afe { 184 &afe {
257 status = "okay"; 185 status = "okay";
258 186
259 mediatek,etdm-in2-cowork-source = <2>; 187 mediatek,etdm-in2-cowork-source = <2>;
260 mediatek,etdm-out2-cowork-source = <0> 188 mediatek,etdm-out2-cowork-source = <0>;
261 memory-region = <&afe_mem>; 189 memory-region = <&afe_mem>;
262 }; 190 };
263 191
264 &auxadc { <<
265 status = "okay"; <<
266 }; <<
267 <<
268 &cpu0 { <<
269 cpu-supply = <&mt6359_vcore_buck_reg>; <<
270 }; <<
271 <<
272 &cpu1 { <<
273 cpu-supply = <&mt6359_vcore_buck_reg>; <<
274 }; <<
275 <<
276 &cpu2 { <<
277 cpu-supply = <&mt6359_vcore_buck_reg>; <<
278 }; <<
279 <<
280 &cpu3 { <<
281 cpu-supply = <&mt6359_vcore_buck_reg>; <<
282 }; <<
283 <<
284 &cpu4 { <<
285 cpu-supply = <&mt6315_6_vbuck1>; <<
286 }; <<
287 <<
288 &cpu5 { <<
289 cpu-supply = <&mt6315_6_vbuck1>; <<
290 }; <<
291 <<
292 &cpu6 { <<
293 cpu-supply = <&mt6315_6_vbuck1>; <<
294 }; <<
295 <<
296 &cpu7 { <<
297 cpu-supply = <&mt6315_6_vbuck1>; <<
298 }; <<
299 <<
300 &dp_intf0 { 192 &dp_intf0 {
301 status = "okay"; 193 status = "okay";
302 194
303 port { 195 port {
304 dp_intf0_out: endpoint { 196 dp_intf0_out: endpoint {
305 remote-endpoint = <&ed 197 remote-endpoint = <&edp_in>;
306 }; 198 };
307 }; 199 };
308 }; 200 };
309 201
310 &dp_intf1 { 202 &dp_intf1 {
311 status = "okay"; 203 status = "okay";
312 204
313 port { 205 port {
314 dp_intf1_out: endpoint { 206 dp_intf1_out: endpoint {
315 remote-endpoint = <&dp 207 remote-endpoint = <&dptx_in>;
316 }; 208 };
317 }; 209 };
318 }; 210 };
319 211
320 &edp_tx { 212 &edp_tx {
321 status = "okay"; 213 status = "okay";
322 214
323 pinctrl-names = "default"; 215 pinctrl-names = "default";
324 pinctrl-0 = <&edptx_pins_default>; 216 pinctrl-0 = <&edptx_pins_default>;
325 217
326 ports { 218 ports {
327 #address-cells = <1>; 219 #address-cells = <1>;
328 #size-cells = <0>; 220 #size-cells = <0>;
329 221
330 port@0 { 222 port@0 {
331 reg = <0>; 223 reg = <0>;
332 edp_in: endpoint { 224 edp_in: endpoint {
333 remote-endpoin 225 remote-endpoint = <&dp_intf0_out>;
334 }; 226 };
335 }; 227 };
336 228
337 port@1 { 229 port@1 {
338 reg = <1>; 230 reg = <1>;
339 edp_out: endpoint { 231 edp_out: endpoint {
340 data-lanes = < 232 data-lanes = <0 1 2 3>;
341 remote-endpoin 233 remote-endpoint = <&panel_in>;
342 }; 234 };
343 }; 235 };
344 }; 236 };
345 237
346 aux-bus { 238 aux-bus {
347 panel { 239 panel {
348 compatible = "edp-pane 240 compatible = "edp-panel";
349 power-supply = <&pp330 241 power-supply = <&pp3300_disp_x>;
350 backlight = <&backligh 242 backlight = <&backlight_lcd0>;
351 port { 243 port {
352 panel_in: endp 244 panel_in: endpoint {
353 remote 245 remote-endpoint = <&edp_out>;
354 }; 246 };
355 }; 247 };
356 }; 248 };
357 }; 249 };
358 }; 250 };
359 251
360 &disp_pwm0 { 252 &disp_pwm0 {
361 status = "okay"; 253 status = "okay";
362 254
363 pinctrl-names = "default"; 255 pinctrl-names = "default";
364 pinctrl-0 = <&disp_pwm0_pin_default>; 256 pinctrl-0 = <&disp_pwm0_pin_default>;
365 }; 257 };
366 258
367 &dp_tx { 259 &dp_tx {
368 status = "okay"; 260 status = "okay";
369 261
370 #sound-dai-cells = <0>; <<
371 pinctrl-names = "default"; 262 pinctrl-names = "default";
372 pinctrl-0 = <&dptx_pin>; 263 pinctrl-0 = <&dptx_pin>;
373 264
374 ports { 265 ports {
375 #address-cells = <1>; 266 #address-cells = <1>;
376 #size-cells = <0>; 267 #size-cells = <0>;
377 268
378 port@0 { 269 port@0 {
379 reg = <0>; 270 reg = <0>;
380 dptx_in: endpoint { 271 dptx_in: endpoint {
381 remote-endpoin 272 remote-endpoint = <&dp_intf1_out>;
382 }; 273 };
383 }; 274 };
384 275
385 port@1 { 276 port@1 {
386 reg = <1>; 277 reg = <1>;
387 dptx_out: endpoint { 278 dptx_out: endpoint {
388 data-lanes = < 279 data-lanes = <0 1 2 3>;
389 }; 280 };
390 }; 281 };
391 }; 282 };
392 }; 283 };
393 284
394 &gic { 285 &gic {
395 mediatek,broken-save-restore-fw; 286 mediatek,broken-save-restore-fw;
396 }; 287 };
397 288
398 &gpu { 289 &gpu {
399 status = "okay"; 290 status = "okay";
400 mali-supply = <&mt6315_7_vbuck1>; 291 mali-supply = <&mt6315_7_vbuck1>;
401 }; 292 };
402 293
403 &i2c0 { 294 &i2c0 {
404 status = "okay"; 295 status = "okay";
405 296
406 clock-frequency = <400000>; 297 clock-frequency = <400000>;
407 pinctrl-names = "default"; 298 pinctrl-names = "default";
408 pinctrl-0 = <&i2c0_pins>; 299 pinctrl-0 = <&i2c0_pins>;
409 }; 300 };
410 301
411 &i2c1 { 302 &i2c1 {
412 status = "okay"; 303 status = "okay";
413 304
414 clock-frequency = <400000>; 305 clock-frequency = <400000>;
415 i2c-scl-internal-delay-ns = <12500>; 306 i2c-scl-internal-delay-ns = <12500>;
416 pinctrl-names = "default"; 307 pinctrl-names = "default";
417 pinctrl-0 = <&i2c1_pins>; 308 pinctrl-0 = <&i2c1_pins>;
418 309
419 trackpad@15 { 310 trackpad@15 {
420 compatible = "elan,ekth3000"; 311 compatible = "elan,ekth3000";
421 reg = <0x15>; 312 reg = <0x15>;
422 interrupts-extended = <&pio 6 313 interrupts-extended = <&pio 6 IRQ_TYPE_LEVEL_LOW>;
423 pinctrl-names = "default"; 314 pinctrl-names = "default";
424 pinctrl-0 = <&trackpad_pins>; 315 pinctrl-0 = <&trackpad_pins>;
425 vcc-supply = <&pp3300_s3>; 316 vcc-supply = <&pp3300_s3>;
426 wakeup-source; 317 wakeup-source;
427 }; 318 };
428 }; 319 };
429 320
430 &i2c2 { 321 &i2c2 {
431 status = "okay"; 322 status = "okay";
432 323
433 clock-frequency = <400000>; 324 clock-frequency = <400000>;
434 pinctrl-names = "default"; 325 pinctrl-names = "default";
435 pinctrl-0 = <&i2c2_pins>; 326 pinctrl-0 = <&i2c2_pins>;
436 327
437 audio_codec: codec@1a { 328 audio_codec: codec@1a {
438 /* Realtek RT5682i or RT5682s, 329 /* Realtek RT5682i or RT5682s, sharing the same configuration */
439 reg = <0x1a>; 330 reg = <0x1a>;
440 interrupts-extended = <&pio 89 331 interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>;
441 #sound-dai-cells = <0>; <<
442 realtek,jd-src = <1>; 332 realtek,jd-src = <1>;
443 333
444 AVDD-supply = <&mt6359_vio18_l 334 AVDD-supply = <&mt6359_vio18_ldo_reg>;
445 MICVDD-supply = <&pp3300_z2>; 335 MICVDD-supply = <&pp3300_z2>;
446 VBAT-supply = <&pp3300_z5>; 336 VBAT-supply = <&pp3300_z5>;
447 }; 337 };
448 }; 338 };
449 339
450 &i2c3 { 340 &i2c3 {
451 status = "okay"; 341 status = "okay";
452 342
453 clock-frequency = <400000>; 343 clock-frequency = <400000>;
454 pinctrl-names = "default"; 344 pinctrl-names = "default";
455 pinctrl-0 = <&i2c3_pins>; 345 pinctrl-0 = <&i2c3_pins>;
456 346
457 tpm@50 { 347 tpm@50 {
458 compatible = "google,cr50"; 348 compatible = "google,cr50";
459 reg = <0x50>; 349 reg = <0x50>;
460 interrupts-extended = <&pio 88 350 interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>;
461 pinctrl-names = "default"; 351 pinctrl-names = "default";
462 pinctrl-0 = <&cr50_int>; 352 pinctrl-0 = <&cr50_int>;
463 }; 353 };
464 }; 354 };
465 355
466 &i2c4 { 356 &i2c4 {
467 status = "okay"; 357 status = "okay";
468 358
469 clock-frequency = <400000>; 359 clock-frequency = <400000>;
470 pinctrl-names = "default"; 360 pinctrl-names = "default";
471 pinctrl-0 = <&i2c4_pins>; 361 pinctrl-0 = <&i2c4_pins>;
472 362
473 ts_10: touchscreen@10 { 363 ts_10: touchscreen@10 {
474 compatible = "hid-over-i2c"; 364 compatible = "hid-over-i2c";
475 reg = <0x10>; 365 reg = <0x10>;
476 hid-descr-addr = <0x0001>; 366 hid-descr-addr = <0x0001>;
477 interrupts-extended = <&pio 92 367 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>;
478 pinctrl-names = "default"; 368 pinctrl-names = "default";
479 pinctrl-0 = <&touchscreen_pins 369 pinctrl-0 = <&touchscreen_pins>;
480 post-power-on-delay-ms = <10>; 370 post-power-on-delay-ms = <10>;
481 vdd-supply = <&pp3300_s3>; 371 vdd-supply = <&pp3300_s3>;
482 status = "disabled"; 372 status = "disabled";
483 }; 373 };
484 }; 374 };
485 375
486 &i2c5 { 376 &i2c5 {
487 status = "okay"; 377 status = "okay";
488 378
489 clock-frequency = <400000>; 379 clock-frequency = <400000>;
490 pinctrl-names = "default"; 380 pinctrl-names = "default";
491 pinctrl-0 = <&i2c5_pins>; 381 pinctrl-0 = <&i2c5_pins>;
492 }; 382 };
493 383
494 &i2c7 { 384 &i2c7 {
495 status = "okay"; 385 status = "okay";
496 386
497 clock-frequency = <400000>; 387 clock-frequency = <400000>;
498 pinctrl-names = "default"; 388 pinctrl-names = "default";
499 pinctrl-0 = <&i2c7_pins>; 389 pinctrl-0 = <&i2c7_pins>;
500 390
501 pmic@34 { 391 pmic@34 {
502 #interrupt-cells = <2>; 392 #interrupt-cells = <2>;
503 compatible = "mediatek,mt6360" 393 compatible = "mediatek,mt6360";
504 reg = <0x34>; 394 reg = <0x34>;
505 interrupt-controller; 395 interrupt-controller;
506 interrupts-extended = <&pio 13 396 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>;
507 interrupt-names = "IRQB"; 397 interrupt-names = "IRQB";
508 pinctrl-names = "default"; 398 pinctrl-names = "default";
509 pinctrl-0 = <&subpmic_default> 399 pinctrl-0 = <&subpmic_default>;
510 wakeup-source; 400 wakeup-source;
511 }; 401 };
512 }; 402 };
513 403
514 &mfg0 { <<
515 domain-supply = <&mt6315_7_vbuck1>; <<
516 }; <<
517 <<
518 &mfg1 { <<
519 domain-supply = <&mt6359_vsram_others_ <<
520 }; <<
521 <<
522 &mmc0 { 404 &mmc0 {
523 status = "okay"; 405 status = "okay";
524 406
525 bus-width = <8>; 407 bus-width = <8>;
526 cap-mmc-highspeed; 408 cap-mmc-highspeed;
527 cap-mmc-hw-reset; 409 cap-mmc-hw-reset;
528 hs400-ds-delay = <0x14c11>; 410 hs400-ds-delay = <0x14c11>;
529 max-frequency = <200000000>; 411 max-frequency = <200000000>;
530 mmc-hs200-1_8v; 412 mmc-hs200-1_8v;
531 mmc-hs400-1_8v; 413 mmc-hs400-1_8v;
532 no-sdio; 414 no-sdio;
533 no-sd; 415 no-sd;
534 non-removable; 416 non-removable;
535 pinctrl-names = "default", "state_uhs" 417 pinctrl-names = "default", "state_uhs";
536 pinctrl-0 = <&mmc0_pins_default>; 418 pinctrl-0 = <&mmc0_pins_default>;
537 pinctrl-1 = <&mmc0_pins_uhs>; 419 pinctrl-1 = <&mmc0_pins_uhs>;
538 vmmc-supply = <&mt6359_vemc_1_ldo_reg> 420 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
539 vqmmc-supply = <&mt6359_vufs_ldo_reg>; 421 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
540 }; 422 };
541 423
542 &mmc1 { 424 &mmc1 {
543 status = "okay"; 425 status = "okay";
544 426
545 bus-width = <4>; 427 bus-width = <4>;
546 cap-sd-highspeed; 428 cap-sd-highspeed;
547 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>; 429 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>;
548 max-frequency = <200000000>; 430 max-frequency = <200000000>;
549 no-mmc; 431 no-mmc;
550 no-sdio; 432 no-sdio;
551 pinctrl-names = "default", "state_uhs" 433 pinctrl-names = "default", "state_uhs";
552 pinctrl-0 = <&mmc1_pins_default>, <&mm 434 pinctrl-0 = <&mmc1_pins_default>, <&mmc1_pins_detect>;
553 pinctrl-1 = <&mmc1_pins_default>; 435 pinctrl-1 = <&mmc1_pins_default>;
554 sd-uhs-sdr50; 436 sd-uhs-sdr50;
555 sd-uhs-sdr104; 437 sd-uhs-sdr104;
556 vmmc-supply = <&mt_pmic_vmch_ldo_reg>; 438 vmmc-supply = <&mt_pmic_vmch_ldo_reg>;
557 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>; 439 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>;
558 }; 440 };
559 441
560 &mt6359codec { 442 &mt6359codec {
561 mediatek,dmic-mode = <1>; /* one-wire 443 mediatek,dmic-mode = <1>; /* one-wire */
562 mediatek,mic-type-0 = <2>; /* DMIC */ 444 mediatek,mic-type-0 = <2>; /* DMIC */
563 }; 445 };
564 446
565 /* for CPU-L */ 447 /* for CPU-L */
566 &mt6359_vcore_buck_reg { 448 &mt6359_vcore_buck_reg {
567 regulator-always-on; 449 regulator-always-on;
568 }; 450 };
569 451
570 /* for CORE */ 452 /* for CORE */
571 &mt6359_vgpu11_buck_reg { 453 &mt6359_vgpu11_buck_reg {
572 regulator-always-on; 454 regulator-always-on;
573 }; 455 };
574 456
575 &mt6359_vgpu11_sshub_buck_reg { 457 &mt6359_vgpu11_sshub_buck_reg {
576 regulator-always-on; 458 regulator-always-on;
577 regulator-min-microvolt = <550000>; 459 regulator-min-microvolt = <550000>;
578 regulator-max-microvolt = <550000>; 460 regulator-max-microvolt = <550000>;
579 }; 461 };
580 462
581 /* for CORE SRAM */ 463 /* for CORE SRAM */
582 &mt6359_vpu_buck_reg { 464 &mt6359_vpu_buck_reg {
583 regulator-always-on; 465 regulator-always-on;
584 }; 466 };
585 467
586 &mt6359_vrf12_ldo_reg { 468 &mt6359_vrf12_ldo_reg {
587 regulator-always-on; 469 regulator-always-on;
588 }; 470 };
589 471
590 /* for GPU SRAM */ 472 /* for GPU SRAM */
591 &mt6359_vsram_others_ldo_reg { 473 &mt6359_vsram_others_ldo_reg {
>> 474 regulator-always-on;
592 regulator-min-microvolt = <750000>; 475 regulator-min-microvolt = <750000>;
593 regulator-max-microvolt = <750000>; 476 regulator-max-microvolt = <750000>;
594 }; 477 };
595 478
596 &mt6359_vufs_ldo_reg { 479 &mt6359_vufs_ldo_reg {
597 regulator-always-on; 480 regulator-always-on;
598 }; 481 };
599 482
600 &nor_flash { 483 &nor_flash {
601 status = "okay"; 484 status = "okay";
602 485
603 pinctrl-names = "default"; 486 pinctrl-names = "default";
604 pinctrl-0 = <&nor_pins_default>; 487 pinctrl-0 = <&nor_pins_default>;
605 488
606 flash@0 { 489 flash@0 {
607 compatible = "jedec,spi-nor"; 490 compatible = "jedec,spi-nor";
608 reg = <0>; 491 reg = <0>;
609 spi-max-frequency = <52000000> 492 spi-max-frequency = <52000000>;
610 spi-rx-bus-width = <2>; 493 spi-rx-bus-width = <2>;
611 spi-tx-bus-width = <2>; 494 spi-tx-bus-width = <2>;
612 }; 495 };
613 }; 496 };
614 497
615 &pcie1 { 498 &pcie1 {
616 status = "okay"; 499 status = "okay";
617 500
618 pinctrl-names = "default"; 501 pinctrl-names = "default";
619 pinctrl-0 = <&pcie1_pins_default>; 502 pinctrl-0 = <&pcie1_pins_default>;
620 }; 503 };
621 504
622 &pio { 505 &pio {
623 mediatek,rsel-resistance-in-si-unit; 506 mediatek,rsel-resistance-in-si-unit;
624 pinctrl-names = "default"; 507 pinctrl-names = "default";
625 pinctrl-0 = <&pio_default>; 508 pinctrl-0 = <&pio_default>;
626 509
627 /* 144 lines */ 510 /* 144 lines */
628 gpio-line-names = 511 gpio-line-names =
629 "I2S_SPKR_MCLK", 512 "I2S_SPKR_MCLK",
630 "I2S_SPKR_DATAIN", 513 "I2S_SPKR_DATAIN",
631 "I2S_SPKR_LRCK", 514 "I2S_SPKR_LRCK",
632 "I2S_SPKR_BCLK", 515 "I2S_SPKR_BCLK",
633 "EC_AP_INT_ODL", 516 "EC_AP_INT_ODL",
634 /* 517 /*
635 * AP_FLASH_WP_L is crossystem 518 * AP_FLASH_WP_L is crossystem ABI. Schematics
636 * call it AP_FLASH_WP_ODL. 519 * call it AP_FLASH_WP_ODL.
637 */ 520 */
638 "AP_FLASH_WP_L", 521 "AP_FLASH_WP_L",
639 "TCHPAD_INT_ODL", 522 "TCHPAD_INT_ODL",
640 "EDP_HPD_1V8", 523 "EDP_HPD_1V8",
641 "AP_I2C_CAM_SDA", 524 "AP_I2C_CAM_SDA",
642 "AP_I2C_CAM_SCL", 525 "AP_I2C_CAM_SCL",
643 "AP_I2C_TCHPAD_SDA_1V8", 526 "AP_I2C_TCHPAD_SDA_1V8",
644 "AP_I2C_TCHPAD_SCL_1V8", 527 "AP_I2C_TCHPAD_SCL_1V8",
645 "AP_I2C_AUD_SDA", 528 "AP_I2C_AUD_SDA",
646 "AP_I2C_AUD_SCL", 529 "AP_I2C_AUD_SCL",
647 "AP_I2C_TPM_SDA_1V8", 530 "AP_I2C_TPM_SDA_1V8",
648 "AP_I2C_TPM_SCL_1V8", 531 "AP_I2C_TPM_SCL_1V8",
649 "AP_I2C_TCHSCR_SDA_1V8", 532 "AP_I2C_TCHSCR_SDA_1V8",
650 "AP_I2C_TCHSCR_SCL_1V8", 533 "AP_I2C_TCHSCR_SCL_1V8",
651 "EC_AP_HPD_OD", 534 "EC_AP_HPD_OD",
652 "", 535 "",
653 "PCIE_NVME_RST_L", 536 "PCIE_NVME_RST_L",
654 "PCIE_NVME_CLKREQ_ODL", 537 "PCIE_NVME_CLKREQ_ODL",
655 "PCIE_RST_1V8_L", 538 "PCIE_RST_1V8_L",
656 "PCIE_CLKREQ_1V8_ODL", 539 "PCIE_CLKREQ_1V8_ODL",
657 "PCIE_WAKE_1V8_ODL", 540 "PCIE_WAKE_1V8_ODL",
658 "CLK_24M_CAM0", 541 "CLK_24M_CAM0",
659 "CAM1_SEN_EN", 542 "CAM1_SEN_EN",
660 "AP_I2C_PWR_SCL_1V8", 543 "AP_I2C_PWR_SCL_1V8",
661 "AP_I2C_PWR_SDA_1V8", 544 "AP_I2C_PWR_SDA_1V8",
662 "AP_I2C_MISC_SCL", 545 "AP_I2C_MISC_SCL",
663 "AP_I2C_MISC_SDA", 546 "AP_I2C_MISC_SDA",
664 "EN_PP5000_HDMI_X", 547 "EN_PP5000_HDMI_X",
665 "AP_HDMITX_HTPLG", 548 "AP_HDMITX_HTPLG",
666 "", 549 "",
667 "AP_HDMITX_SCL_1V8", 550 "AP_HDMITX_SCL_1V8",
668 "AP_HDMITX_SDA_1V8", 551 "AP_HDMITX_SDA_1V8",
669 "AP_RTC_CLK32K", 552 "AP_RTC_CLK32K",
670 "AP_EC_WATCHDOG_L", 553 "AP_EC_WATCHDOG_L",
671 "SRCLKENA0", 554 "SRCLKENA0",
672 "SRCLKENA1", 555 "SRCLKENA1",
673 "PWRAP_SPI0_CS_L", 556 "PWRAP_SPI0_CS_L",
674 "PWRAP_SPI0_CK", 557 "PWRAP_SPI0_CK",
675 "PWRAP_SPI0_MOSI", 558 "PWRAP_SPI0_MOSI",
676 "PWRAP_SPI0_MISO", 559 "PWRAP_SPI0_MISO",
677 "SPMI_SCL", 560 "SPMI_SCL",
678 "SPMI_SDA", 561 "SPMI_SDA",
679 "", 562 "",
680 "", 563 "",
681 "", 564 "",
682 "I2S_HP_DATAIN", 565 "I2S_HP_DATAIN",
683 "I2S_HP_MCLK", 566 "I2S_HP_MCLK",
684 "I2S_HP_BCK", 567 "I2S_HP_BCK",
685 "I2S_HP_LRCK", 568 "I2S_HP_LRCK",
686 "I2S_HP_DATAOUT", 569 "I2S_HP_DATAOUT",
687 "SD_CD_ODL", 570 "SD_CD_ODL",
688 "EN_PP3300_DISP_X", 571 "EN_PP3300_DISP_X",
689 "TCHSCR_RST_1V8_L", 572 "TCHSCR_RST_1V8_L",
690 "TCHSCR_REPORT_DISABLE", 573 "TCHSCR_REPORT_DISABLE",
691 "EN_PP3300_WLAN_X", 574 "EN_PP3300_WLAN_X",
692 "BT_KILL_1V8_L", 575 "BT_KILL_1V8_L",
693 "I2S_SPKR_DATAOUT", 576 "I2S_SPKR_DATAOUT",
694 "WIFI_KILL_1V8_L", 577 "WIFI_KILL_1V8_L",
695 "BEEP_ON", 578 "BEEP_ON",
696 "SCP_I2C_SENSOR_SCL_1V8", 579 "SCP_I2C_SENSOR_SCL_1V8",
697 "SCP_I2C_SENSOR_SDA_1V8", 580 "SCP_I2C_SENSOR_SDA_1V8",
698 "", 581 "",
699 "", 582 "",
700 "", 583 "",
701 "", 584 "",
702 "AUD_CLK_MOSI", 585 "AUD_CLK_MOSI",
703 "AUD_SYNC_MOSI", 586 "AUD_SYNC_MOSI",
704 "AUD_DAT_MOSI0", 587 "AUD_DAT_MOSI0",
705 "AUD_DAT_MOSI1", 588 "AUD_DAT_MOSI1",
706 "AUD_DAT_MISO0", 589 "AUD_DAT_MISO0",
707 "AUD_DAT_MISO1", 590 "AUD_DAT_MISO1",
708 "AUD_DAT_MISO2", 591 "AUD_DAT_MISO2",
709 "SCP_VREQ_VAO", 592 "SCP_VREQ_VAO",
710 "AP_SPI_GSC_TPM_CLK", 593 "AP_SPI_GSC_TPM_CLK",
711 "AP_SPI_GSC_TPM_MOSI", 594 "AP_SPI_GSC_TPM_MOSI",
712 "AP_SPI_GSC_TPM_CS_L", 595 "AP_SPI_GSC_TPM_CS_L",
713 "AP_SPI_GSC_TPM_MISO", 596 "AP_SPI_GSC_TPM_MISO",
714 "EN_PP1000_CAM_X", 597 "EN_PP1000_CAM_X",
715 "AP_EDP_BKLTEN", 598 "AP_EDP_BKLTEN",
716 "", 599 "",
717 "USB3_HUB_RST_L", 600 "USB3_HUB_RST_L",
718 "", 601 "",
719 "WLAN_ALERT_ODL", 602 "WLAN_ALERT_ODL",
720 "EC_IN_RW_ODL", 603 "EC_IN_RW_ODL",
721 "GSC_AP_INT_ODL", 604 "GSC_AP_INT_ODL",
722 "HP_INT_ODL", 605 "HP_INT_ODL",
723 "CAM0_RST_L", 606 "CAM0_RST_L",
724 "CAM1_RST_L", 607 "CAM1_RST_L",
725 "TCHSCR_INT_1V8_L", 608 "TCHSCR_INT_1V8_L",
726 "CAM1_DET_L", 609 "CAM1_DET_L",
727 "RST_ALC1011_L", 610 "RST_ALC1011_L",
728 "", 611 "",
729 "", 612 "",
730 "BL_PWM_1V8", 613 "BL_PWM_1V8",
731 "UART_AP_TX_DBG_RX", 614 "UART_AP_TX_DBG_RX",
732 "UART_DBG_TX_AP_RX", 615 "UART_DBG_TX_AP_RX",
733 "EN_SPKR", 616 "EN_SPKR",
734 "AP_EC_WARM_RST_REQ", 617 "AP_EC_WARM_RST_REQ",
735 "UART_SCP_TX_DBGCON_RX", 618 "UART_SCP_TX_DBGCON_RX",
736 "UART_DBGCON_TX_SCP_RX", 619 "UART_DBGCON_TX_SCP_RX",
737 "", 620 "",
738 "", 621 "",
739 "KPCOL0", 622 "KPCOL0",
740 "", 623 "",
741 "MT6315_GPU_INT", 624 "MT6315_GPU_INT",
742 "MT6315_PROC_BC_INT", 625 "MT6315_PROC_BC_INT",
743 "SD_CMD", 626 "SD_CMD",
744 "SD_CLK", 627 "SD_CLK",
745 "SD_DAT0", 628 "SD_DAT0",
746 "SD_DAT1", 629 "SD_DAT1",
747 "SD_DAT2", 630 "SD_DAT2",
748 "SD_DAT3", 631 "SD_DAT3",
749 "EMMC_DAT7", 632 "EMMC_DAT7",
750 "EMMC_DAT6", 633 "EMMC_DAT6",
751 "EMMC_DAT5", 634 "EMMC_DAT5",
752 "EMMC_DAT4", 635 "EMMC_DAT4",
753 "EMMC_RSTB", 636 "EMMC_RSTB",
754 "EMMC_CMD", 637 "EMMC_CMD",
755 "EMMC_CLK", 638 "EMMC_CLK",
756 "EMMC_DAT3", 639 "EMMC_DAT3",
757 "EMMC_DAT2", 640 "EMMC_DAT2",
758 "EMMC_DAT1", 641 "EMMC_DAT1",
759 "EMMC_DAT0", 642 "EMMC_DAT0",
760 "EMMC_DSL", 643 "EMMC_DSL",
761 "", 644 "",
762 "", 645 "",
763 "MT6360_INT_ODL", 646 "MT6360_INT_ODL",
764 "SCP_JTAG0_TRSTN", 647 "SCP_JTAG0_TRSTN",
765 "AP_SPI_EC_CS_L", 648 "AP_SPI_EC_CS_L",
766 "AP_SPI_EC_CLK", 649 "AP_SPI_EC_CLK",
767 "AP_SPI_EC_MOSI", 650 "AP_SPI_EC_MOSI",
768 "AP_SPI_EC_MISO", 651 "AP_SPI_EC_MISO",
769 "SCP_JTAG0_TMS", 652 "SCP_JTAG0_TMS",
770 "SCP_JTAG0_TCK", 653 "SCP_JTAG0_TCK",
771 "SCP_JTAG0_TDO", 654 "SCP_JTAG0_TDO",
772 "SCP_JTAG0_TDI", 655 "SCP_JTAG0_TDI",
773 "AP_SPI_FLASH_CS_L", 656 "AP_SPI_FLASH_CS_L",
774 "AP_SPI_FLASH_CLK", 657 "AP_SPI_FLASH_CLK",
775 "AP_SPI_FLASH_MOSI", 658 "AP_SPI_FLASH_MOSI",
776 "AP_SPI_FLASH_MISO"; 659 "AP_SPI_FLASH_MISO";
777 660
778 aud_pins_default: audio-default-pins { 661 aud_pins_default: audio-default-pins {
779 pins-cmd-dat { 662 pins-cmd-dat {
780 pinmux = <PINMUX_GPIO69__F 663 pinmux = <PINMUX_GPIO69__FUNC_AUD_CLK_MOSI>,
781 <PINMUX_GPIO70__F 664 <PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI>,
782 <PINMUX_GPIO71__F 665 <PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0>,
783 <PINMUX_GPIO72__F 666 <PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1>,
784 <PINMUX_GPIO73__F 667 <PINMUX_GPIO73__FUNC_AUD_DAT_MISO0>,
785 <PINMUX_GPIO74__F 668 <PINMUX_GPIO74__FUNC_AUD_DAT_MISO1>,
786 <PINMUX_GPIO75__F 669 <PINMUX_GPIO75__FUNC_AUD_DAT_MISO2>,
787 <PINMUX_GPIO0__FU 670 <PINMUX_GPIO0__FUNC_TDMIN_MCK>,
788 <PINMUX_GPIO1__FU 671 <PINMUX_GPIO1__FUNC_TDMIN_DI>,
789 <PINMUX_GPIO2__FU 672 <PINMUX_GPIO2__FUNC_TDMIN_LRCK>,
790 <PINMUX_GPIO3__FU 673 <PINMUX_GPIO3__FUNC_TDMIN_BCK>,
791 <PINMUX_GPIO60__F 674 <PINMUX_GPIO60__FUNC_I2SO2_D0>,
792 <PINMUX_GPIO49__F 675 <PINMUX_GPIO49__FUNC_I2SIN_D0>,
793 <PINMUX_GPIO50__F 676 <PINMUX_GPIO50__FUNC_I2SO1_MCK>,
794 <PINMUX_GPIO51__F 677 <PINMUX_GPIO51__FUNC_I2SO1_BCK>,
795 <PINMUX_GPIO52__F 678 <PINMUX_GPIO52__FUNC_I2SO1_WS>,
796 <PINMUX_GPIO53__F 679 <PINMUX_GPIO53__FUNC_I2SO1_D0>;
797 }; 680 };
798 681
799 pins-hp-jack-int-odl { 682 pins-hp-jack-int-odl {
800 pinmux = <PINMUX_GPIO8 683 pinmux = <PINMUX_GPIO89__FUNC_GPIO89>;
801 input-enable; 684 input-enable;
802 bias-pull-up = <MTK_PU 685 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
803 }; 686 };
804 }; 687 };
805 688
806 cr50_int: cr50-irq-default-pins { 689 cr50_int: cr50-irq-default-pins {
807 pins-gsc-ap-int-odl { 690 pins-gsc-ap-int-odl {
808 pinmux = <PINMUX_GPIO8 691 pinmux = <PINMUX_GPIO88__FUNC_GPIO88>;
809 input-enable; 692 input-enable;
810 }; 693 };
811 }; 694 };
812 695
813 cros_ec_int: cros-ec-irq-default-pins 696 cros_ec_int: cros-ec-irq-default-pins {
814 pins-ec-ap-int-odl { 697 pins-ec-ap-int-odl {
815 pinmux = <PINMUX_GPIO4 698 pinmux = <PINMUX_GPIO4__FUNC_GPIO4>;
816 bias-pull-up = <MTK_PU 699 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
817 input-enable; 700 input-enable;
818 }; 701 };
819 }; 702 };
820 703
821 edptx_pins_default: edptx-default-pins 704 edptx_pins_default: edptx-default-pins {
822 pins-cmd-dat { 705 pins-cmd-dat {
823 pinmux = <PINMUX_GPIO7 706 pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>;
824 bias-pull-up; 707 bias-pull-up;
825 }; 708 };
826 }; 709 };
827 710
828 disp_pwm0_pin_default: disp-pwm0-defau 711 disp_pwm0_pin_default: disp-pwm0-default-pins {
829 pins-disp-pwm { 712 pins-disp-pwm {
830 pinmux = <PINMUX_GPIO8 713 pinmux = <PINMUX_GPIO82__FUNC_GPIO82>,
831 <PINMUX_GPIO9 714 <PINMUX_GPIO97__FUNC_DISP_PWM0>;
832 }; 715 };
833 }; 716 };
834 717
835 dptx_pin: dptx-default-pins { 718 dptx_pin: dptx-default-pins {
836 pins-cmd-dat { 719 pins-cmd-dat {
837 pinmux = <PINMUX_GPIO1 720 pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>;
838 bias-pull-up; 721 bias-pull-up;
839 }; 722 };
840 }; 723 };
841 724
842 i2c0_pins: i2c0-default-pins { 725 i2c0_pins: i2c0-default-pins {
843 pins-bus { 726 pins-bus {
844 pinmux = <PINMUX_GPIO8 727 pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
845 <PINMUX_GPIO9 728 <PINMUX_GPIO9__FUNC_SCL0>;
846 bias-disable; 729 bias-disable;
847 drive-strength-microam 730 drive-strength-microamp = <1000>;
848 }; 731 };
849 }; 732 };
850 733
851 i2c1_pins: i2c1-default-pins { 734 i2c1_pins: i2c1-default-pins {
852 pins-bus { 735 pins-bus {
853 pinmux = <PINMUX_GPIO1 736 pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
854 <PINMUX_GPIO1 737 <PINMUX_GPIO11__FUNC_SCL1>;
855 bias-pull-up = <1000>; 738 bias-pull-up = <1000>;
856 drive-strength-microam 739 drive-strength-microamp = <1000>;
857 }; 740 };
858 }; 741 };
859 742
860 i2c2_pins: i2c2-default-pins { 743 i2c2_pins: i2c2-default-pins {
861 pins-bus { 744 pins-bus {
862 pinmux = <PINMUX_GPIO1 745 pinmux = <PINMUX_GPIO12__FUNC_SDA2>,
863 <PINMUX_GPIO1 746 <PINMUX_GPIO13__FUNC_SCL2>;
864 bias-disable; 747 bias-disable;
865 drive-strength-microam 748 drive-strength-microamp = <1000>;
866 }; 749 };
867 }; 750 };
868 751
869 i2c3_pins: i2c3-default-pins { 752 i2c3_pins: i2c3-default-pins {
870 pins-bus { 753 pins-bus {
871 pinmux = <PINMUX_GPIO1 754 pinmux = <PINMUX_GPIO14__FUNC_SDA3>,
872 <PINMUX_GPIO1 755 <PINMUX_GPIO15__FUNC_SCL3>;
873 bias-pull-up = <1000>; 756 bias-pull-up = <1000>;
874 drive-strength-microam 757 drive-strength-microamp = <1000>;
875 }; 758 };
876 }; 759 };
877 760
878 i2c4_pins: i2c4-default-pins { 761 i2c4_pins: i2c4-default-pins {
879 pins-bus { 762 pins-bus {
880 pinmux = <PINMUX_GPIO1 763 pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
881 <PINMUX_GPIO1 764 <PINMUX_GPIO17__FUNC_SCL4>;
882 bias-pull-up = <1000>; 765 bias-pull-up = <1000>;
883 drive-strength = <4>; 766 drive-strength = <4>;
884 }; 767 };
885 }; 768 };
886 769
887 i2c5_pins: i2c5-default-pins { 770 i2c5_pins: i2c5-default-pins {
888 pins-bus { 771 pins-bus {
889 pinmux = <PINMUX_GPIO2 772 pinmux = <PINMUX_GPIO29__FUNC_SCL5>,
890 <PINMUX_GPIO3 773 <PINMUX_GPIO30__FUNC_SDA5>;
891 bias-disable; 774 bias-disable;
892 drive-strength-microam 775 drive-strength-microamp = <1000>;
893 }; 776 };
894 }; 777 };
895 778
896 i2c7_pins: i2c7-default-pins { 779 i2c7_pins: i2c7-default-pins {
897 pins-bus { 780 pins-bus {
898 pinmux = <PINMUX_GPIO2 781 pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
899 <PINMUX_GPIO2 782 <PINMUX_GPIO28__FUNC_SDA7>;
900 bias-disable; 783 bias-disable;
901 }; 784 };
902 }; 785 };
903 786
904 mmc0_pins_default: mmc0-default-pins { 787 mmc0_pins_default: mmc0-default-pins {
905 pins-cmd-dat { 788 pins-cmd-dat {
906 pinmux = <PINMUX_GPIO1 789 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
907 <PINMUX_GPIO1 790 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
908 <PINMUX_GPIO1 791 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
909 <PINMUX_GPIO1 792 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
910 <PINMUX_GPIO1 793 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
911 <PINMUX_GPIO1 794 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
912 <PINMUX_GPIO1 795 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
913 <PINMUX_GPIO1 796 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
914 <PINMUX_GPIO1 797 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
915 input-enable; 798 input-enable;
916 drive-strength = <6>; 799 drive-strength = <6>;
917 bias-pull-up = <MTK_PU 800 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
918 }; 801 };
919 802
920 pins-clk { 803 pins-clk {
921 pinmux = <PINMUX_GPIO1 804 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
922 drive-strength = <6>; 805 drive-strength = <6>;
923 bias-pull-down = <MTK_ 806 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
924 }; 807 };
925 808
926 pins-rst { 809 pins-rst {
927 pinmux = <PINMUX_GPIO1 810 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
928 drive-strength = <6>; 811 drive-strength = <6>;
929 bias-pull-up = <MTK_PU 812 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
930 }; 813 };
931 }; 814 };
932 815
933 mmc0_pins_uhs: mmc0-uhs-pins { 816 mmc0_pins_uhs: mmc0-uhs-pins {
934 pins-cmd-dat { 817 pins-cmd-dat {
935 pinmux = <PINMUX_GPIO1 818 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
936 <PINMUX_GPIO1 819 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
937 <PINMUX_GPIO1 820 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
938 <PINMUX_GPIO1 821 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
939 <PINMUX_GPIO1 822 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
940 <PINMUX_GPIO1 823 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
941 <PINMUX_GPIO1 824 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
942 <PINMUX_GPIO1 825 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
943 <PINMUX_GPIO1 826 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
944 input-enable; 827 input-enable;
945 drive-strength = <8>; 828 drive-strength = <8>;
946 bias-pull-up = <MTK_PU 829 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
947 }; 830 };
948 831
949 pins-clk { 832 pins-clk {
950 pinmux = <PINMUX_GPIO1 833 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
951 drive-strength = <8>; 834 drive-strength = <8>;
952 bias-pull-down = <MTK_ 835 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
953 }; 836 };
954 837
955 pins-ds { 838 pins-ds {
956 pinmux = <PINMUX_GPIO1 839 pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
957 drive-strength = <8>; 840 drive-strength = <8>;
958 bias-pull-down = <MTK_ 841 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
959 }; 842 };
960 843
961 pins-rst { 844 pins-rst {
962 pinmux = <PINMUX_GPIO1 845 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
963 drive-strength = <8>; 846 drive-strength = <8>;
964 bias-pull-up = <MTK_PU 847 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
965 }; 848 };
966 }; 849 };
967 850
968 mmc1_pins_detect: mmc1-detect-pins { 851 mmc1_pins_detect: mmc1-detect-pins {
969 pins-insert { 852 pins-insert {
970 pinmux = <PINMUX_GPIO5 853 pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
971 bias-pull-up; 854 bias-pull-up;
972 }; 855 };
973 }; 856 };
974 857
975 mmc1_pins_default: mmc1-default-pins { 858 mmc1_pins_default: mmc1-default-pins {
976 pins-cmd-dat { 859 pins-cmd-dat {
977 pinmux = <PINMUX_GPIO1 860 pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
978 <PINMUX_GPIO1 861 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
979 <PINMUX_GPIO1 862 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
980 <PINMUX_GPIO1 863 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
981 <PINMUX_GPIO1 864 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
982 input-enable; 865 input-enable;
983 drive-strength = <8>; 866 drive-strength = <8>;
984 bias-pull-up = <MTK_PU 867 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
985 }; 868 };
986 869
987 pins-clk { 870 pins-clk {
988 pinmux = <PINMUX_GPIO1 871 pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
989 drive-strength = <8>; 872 drive-strength = <8>;
990 bias-pull-down = <MTK_ 873 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
991 }; 874 };
992 }; 875 };
993 876
994 nor_pins_default: nor-default-pins { 877 nor_pins_default: nor-default-pins {
995 pins-ck-io { 878 pins-ck-io {
996 pinmux = <PINMUX_GPIO1 879 pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
997 <PINMUX_GPIO1 880 <PINMUX_GPIO141__FUNC_SPINOR_CK>,
998 <PINMUX_GPIO1 881 <PINMUX_GPIO143__FUNC_SPINOR_IO1>;
999 drive-strength = <6>; 882 drive-strength = <6>;
1000 bias-pull-down; 883 bias-pull-down;
1001 }; 884 };
1002 885
1003 pins-cs { 886 pins-cs {
1004 pinmux = <PINMUX_GPIO 887 pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>;
1005 drive-strength = <6>; 888 drive-strength = <6>;
1006 bias-pull-up; 889 bias-pull-up;
1007 }; 890 };
1008 }; 891 };
1009 892
1010 pcie0_pins_default: pcie0-default-pin 893 pcie0_pins_default: pcie0-default-pins {
1011 pins-bus { 894 pins-bus {
1012 pinmux = <PINMUX_GPIO 895 pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
1013 <PINMUX_GPIO 896 <PINMUX_GPIO20__FUNC_PERSTN>,
1014 <PINMUX_GPIO 897 <PINMUX_GPIO21__FUNC_CLKREQN>;
1015 bias-pull-up 898 bias-pull-up;
1016 }; 899 };
1017 }; 900 };
1018 901
1019 pcie1_pins_default: pcie1-default-pin 902 pcie1_pins_default: pcie1-default-pins {
1020 pins-bus { 903 pins-bus {
1021 pinmux = <PINMUX_GPIO 904 pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>,
1022 <PINMUX_GPIO 905 <PINMUX_GPIO23__FUNC_CLKREQN_1>,
1023 <PINMUX_GPIO 906 <PINMUX_GPIO24__FUNC_WAKEN_1>;
1024 bias-pull-up 907 bias-pull-up;
1025 }; 908 };
1026 }; 909 };
1027 910
1028 panel_fixed_pins: panel-pwr-default-p 911 panel_fixed_pins: panel-pwr-default-pins {
1029 pins-vreg-en { 912 pins-vreg-en {
1030 pinmux = <PINMUX_GPIO 913 pinmux = <PINMUX_GPIO55__FUNC_GPIO55>;
1031 }; 914 };
1032 }; 915 };
1033 916
1034 pio_default: pio-default-pins { 917 pio_default: pio-default-pins {
1035 pins-wifi-enable { 918 pins-wifi-enable {
1036 pinmux = <PINMUX_GPIO 919 pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
1037 output-high; 920 output-high;
1038 drive-strength = <14> 921 drive-strength = <14>;
1039 }; 922 };
1040 923
1041 pins-low-power-pd { 924 pins-low-power-pd {
1042 pinmux = <PINMUX_GPIO 925 pinmux = <PINMUX_GPIO25__FUNC_GPIO25>,
1043 <PINMUX_GPIO 926 <PINMUX_GPIO26__FUNC_GPIO26>,
1044 <PINMUX_GPIO 927 <PINMUX_GPIO46__FUNC_GPIO46>,
1045 <PINMUX_GPIO 928 <PINMUX_GPIO47__FUNC_GPIO47>,
1046 <PINMUX_GPIO 929 <PINMUX_GPIO48__FUNC_GPIO48>,
1047 <PINMUX_GPIO 930 <PINMUX_GPIO65__FUNC_GPIO65>,
1048 <PINMUX_GPIO 931 <PINMUX_GPIO66__FUNC_GPIO66>,
1049 <PINMUX_GPIO 932 <PINMUX_GPIO67__FUNC_GPIO67>,
1050 <PINMUX_GPIO 933 <PINMUX_GPIO68__FUNC_GPIO68>,
1051 <PINMUX_GPIO 934 <PINMUX_GPIO128__FUNC_GPIO128>,
1052 <PINMUX_GPIO 935 <PINMUX_GPIO129__FUNC_GPIO129>;
1053 input-enable; 936 input-enable;
1054 bias-pull-down; 937 bias-pull-down;
1055 }; 938 };
1056 939
1057 pins-low-power-pupd { 940 pins-low-power-pupd {
1058 pinmux = <PINMUX_GPIO 941 pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
1059 <PINMUX_GPIO 942 <PINMUX_GPIO78__FUNC_GPIO78>,
1060 <PINMUX_GPIO 943 <PINMUX_GPIO79__FUNC_GPIO79>,
1061 <PINMUX_GPIO 944 <PINMUX_GPIO80__FUNC_GPIO80>,
1062 <PINMUX_GPIO 945 <PINMUX_GPIO83__FUNC_GPIO83>,
1063 <PINMUX_GPIO 946 <PINMUX_GPIO85__FUNC_GPIO85>,
1064 <PINMUX_GPIO 947 <PINMUX_GPIO90__FUNC_GPIO90>,
1065 <PINMUX_GPIO 948 <PINMUX_GPIO91__FUNC_GPIO91>,
1066 <PINMUX_GPIO 949 <PINMUX_GPIO93__FUNC_GPIO93>,
1067 <PINMUX_GPIO 950 <PINMUX_GPIO94__FUNC_GPIO94>,
1068 <PINMUX_GPIO 951 <PINMUX_GPIO95__FUNC_GPIO95>,
1069 <PINMUX_GPIO 952 <PINMUX_GPIO96__FUNC_GPIO96>,
1070 <PINMUX_GPIO 953 <PINMUX_GPIO104__FUNC_GPIO104>,
1071 <PINMUX_GPIO 954 <PINMUX_GPIO105__FUNC_GPIO105>,
1072 <PINMUX_GPIO 955 <PINMUX_GPIO107__FUNC_GPIO107>;
1073 input-enable; 956 input-enable;
1074 bias-pull-down = <MTK 957 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1075 }; 958 };
1076 }; 959 };
1077 960
1078 rt1019p_pins_default: rt1019p-default 961 rt1019p_pins_default: rt1019p-default-pins {
1079 pins-amp-sdb { 962 pins-amp-sdb {
1080 pinmux = <PINMUX_GPIO 963 pinmux = <PINMUX_GPIO100__FUNC_GPIO100>;
1081 output-low; 964 output-low;
1082 }; 965 };
1083 }; 966 };
1084 967
1085 scp_pins: scp-default-pins { 968 scp_pins: scp-default-pins {
1086 pins-vreq { 969 pins-vreq {
1087 pinmux = <PINMUX_GPIO 970 pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>;
1088 bias-disable; 971 bias-disable;
1089 input-enable; 972 input-enable;
1090 }; 973 };
1091 }; 974 };
1092 975
1093 spi0_pins: spi0-default-pins { 976 spi0_pins: spi0-default-pins {
1094 pins-cs-mosi-clk { 977 pins-cs-mosi-clk {
1095 pinmux = <PINMUX_GPIO 978 pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
1096 <PINMUX_GPIO 979 <PINMUX_GPIO134__FUNC_SPIM0_MO>,
1097 <PINMUX_GPIO 980 <PINMUX_GPIO133__FUNC_SPIM0_CLK>;
1098 bias-disable; 981 bias-disable;
1099 }; 982 };
1100 983
1101 pins-miso { 984 pins-miso {
1102 pinmux = <PINMUX_GPIO 985 pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>;
1103 bias-pull-down; 986 bias-pull-down;
1104 }; 987 };
1105 }; 988 };
1106 989
1107 subpmic_default: subpmic-default-pins 990 subpmic_default: subpmic-default-pins {
1108 subpmic_pin_irq: pins-subpmic 991 subpmic_pin_irq: pins-subpmic-int-n {
1109 pinmux = <PINMUX_GPIO 992 pinmux = <PINMUX_GPIO130__FUNC_GPIO130>;
1110 input-enable; 993 input-enable;
1111 bias-pull-up; 994 bias-pull-up;
1112 }; 995 };
1113 }; 996 };
1114 997
1115 trackpad_pins: trackpad-default-pins 998 trackpad_pins: trackpad-default-pins {
1116 pins-int-n { 999 pins-int-n {
1117 pinmux = <PINMUX_GPIO 1000 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
1118 input-enable; 1001 input-enable;
1119 bias-pull-up; 1002 bias-pull-up;
1120 }; 1003 };
1121 }; 1004 };
1122 1005
1123 touchscreen_pins: touchscreen-default 1006 touchscreen_pins: touchscreen-default-pins {
1124 pins-int-n { 1007 pins-int-n {
1125 pinmux = <PINMUX_GPIO 1008 pinmux = <PINMUX_GPIO92__FUNC_GPIO92>;
1126 input-enable; 1009 input-enable;
1127 bias-pull-up = <MTK_P 1010 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1128 }; 1011 };
1129 pins-rst { 1012 pins-rst {
1130 pinmux = <PINMUX_GPIO 1013 pinmux = <PINMUX_GPIO56__FUNC_GPIO56>;
1131 output-high; 1014 output-high;
1132 }; 1015 };
1133 pins-report-sw { 1016 pins-report-sw {
1134 pinmux = <PINMUX_GPIO 1017 pinmux = <PINMUX_GPIO57__FUNC_GPIO57>;
1135 output-low; 1018 output-low;
1136 }; 1019 };
1137 }; 1020 };
1138 }; 1021 };
1139 1022
1140 &pmic { 1023 &pmic {
1141 interrupts-extended = <&pio 222 IRQ_T 1024 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
1142 }; 1025 };
1143 1026
1144 &scp { 1027 &scp {
1145 status = "okay"; 1028 status = "okay";
1146 1029
1147 firmware-name = "mediatek/mt8195/scp. 1030 firmware-name = "mediatek/mt8195/scp.img";
1148 memory-region = <&scp_mem>; 1031 memory-region = <&scp_mem>;
1149 pinctrl-names = "default"; 1032 pinctrl-names = "default";
1150 pinctrl-0 = <&scp_pins>; 1033 pinctrl-0 = <&scp_pins>;
1151 1034
1152 cros-ec-rpmsg { 1035 cros-ec-rpmsg {
1153 compatible = "google,cros-ec- 1036 compatible = "google,cros-ec-rpmsg";
1154 mediatek,rpmsg-name = "cros-e 1037 mediatek,rpmsg-name = "cros-ec-rpmsg";
1155 }; 1038 };
1156 }; 1039 };
1157 1040
1158 &sound { 1041 &sound {
1159 status = "okay"; 1042 status = "okay";
1160 1043
1161 mediatek,adsp = <&adsp>; 1044 mediatek,adsp = <&adsp>;
1162 mediatek,dai-link = 1045 mediatek,dai-link =
1163 "DL10_FE", "DPTX_BE", "ETDM1_ 1046 "DL10_FE", "DPTX_BE", "ETDM1_IN_BE", "ETDM2_IN_BE",
1164 "ETDM1_OUT_BE", "ETDM2_OUT_BE 1047 "ETDM1_OUT_BE", "ETDM2_OUT_BE","UL_SRC1_BE",
1165 "AFE_SOF_DL2", "AFE_SOF_DL3", 1048 "AFE_SOF_DL2", "AFE_SOF_DL3", "AFE_SOF_UL4", "AFE_SOF_UL5";
1166 pinctrl-names = "default"; 1049 pinctrl-names = "default";
1167 pinctrl-0 = <&aud_pins_default>; 1050 pinctrl-0 = <&aud_pins_default>;
1168 <<
1169 audio-routing = <<
1170 "Headphone", "HPOL", <<
1171 "Headphone", "HPOR", <<
1172 "IN1P", "Headset Mic", <<
1173 "Ext Spk", "Speaker"; <<
1174 <<
1175 mm-dai-link { <<
1176 link-name = "ETDM1_IN_BE"; <<
1177 mediatek,clk-provider = "cpu" <<
1178 }; <<
1179 <<
1180 hs-playback-dai-link { <<
1181 link-name = "ETDM1_OUT_BE"; <<
1182 mediatek,clk-provider = "cpu" <<
1183 codec { <<
1184 sound-dai = <&audio_c <<
1185 }; <<
1186 }; <<
1187 <<
1188 hs-capture-dai-link { <<
1189 link-name = "ETDM2_IN_BE"; <<
1190 mediatek,clk-provider = "cpu" <<
1191 codec { <<
1192 sound-dai = <&audio_c <<
1193 }; <<
1194 }; <<
1195 <<
1196 spk-playback-dai-link { <<
1197 link-name = "ETDM2_OUT_BE"; <<
1198 mediatek,clk-provider = "cpu" <<
1199 codec { <<
1200 sound-dai = <&spk_amp <<
1201 }; <<
1202 }; <<
1203 <<
1204 displayport-dai-link { <<
1205 link-name = "DPTX_BE"; <<
1206 codec { <<
1207 sound-dai = <&dp_tx>; <<
1208 }; <<
1209 }; <<
1210 }; 1051 };
1211 1052
1212 &spi0 { 1053 &spi0 {
1213 status = "okay"; 1054 status = "okay";
1214 1055
1215 pinctrl-names = "default"; 1056 pinctrl-names = "default";
1216 pinctrl-0 = <&spi0_pins>; 1057 pinctrl-0 = <&spi0_pins>;
1217 mediatek,pad-select = <0>; 1058 mediatek,pad-select = <0>;
1218 1059
1219 cros_ec: ec@0 { 1060 cros_ec: ec@0 {
1220 #address-cells = <1>; 1061 #address-cells = <1>;
1221 #size-cells = <0>; 1062 #size-cells = <0>;
1222 1063
1223 compatible = "google,cros-ec- 1064 compatible = "google,cros-ec-spi";
1224 reg = <0>; 1065 reg = <0>;
1225 interrupts-extended = <&pio 4 1066 interrupts-extended = <&pio 4 IRQ_TYPE_LEVEL_LOW>;
1226 pinctrl-names = "default"; 1067 pinctrl-names = "default";
1227 pinctrl-0 = <&cros_ec_int>; 1068 pinctrl-0 = <&cros_ec_int>;
1228 spi-max-frequency = <3000000> 1069 spi-max-frequency = <3000000>;
1229 wakeup-source; !! 1070
>> 1071 keyboard-backlight {
>> 1072 compatible = "google,cros-kbd-led-backlight";
>> 1073 };
1230 1074
1231 i2c_tunnel: i2c-tunnel { 1075 i2c_tunnel: i2c-tunnel {
1232 compatible = "google, 1076 compatible = "google,cros-ec-i2c-tunnel";
1233 google,remote-bus = < 1077 google,remote-bus = <0>;
1234 #address-cells = <1>; 1078 #address-cells = <1>;
1235 #size-cells = <0>; 1079 #size-cells = <0>;
1236 }; 1080 };
1237 1081
1238 mt_pmic_vmc_ldo_reg: regulato 1082 mt_pmic_vmc_ldo_reg: regulator@0 {
1239 compatible = "google, 1083 compatible = "google,cros-ec-regulator";
1240 reg = <0>; 1084 reg = <0>;
1241 regulator-name = "mt_ 1085 regulator-name = "mt_pmic_vmc_ldo";
1242 regulator-min-microvo 1086 regulator-min-microvolt = <1200000>;
1243 regulator-max-microvo 1087 regulator-max-microvolt = <3600000>;
1244 }; 1088 };
1245 1089
1246 mt_pmic_vmch_ldo_reg: regulat 1090 mt_pmic_vmch_ldo_reg: regulator@1 {
1247 compatible = "google, 1091 compatible = "google,cros-ec-regulator";
1248 reg = <1>; 1092 reg = <1>;
1249 regulator-name = "mt_ 1093 regulator-name = "mt_pmic_vmch_ldo";
1250 regulator-min-microvo 1094 regulator-min-microvolt = <2700000>;
1251 regulator-max-microvo 1095 regulator-max-microvolt = <3600000>;
1252 }; 1096 };
1253 1097
1254 typec { 1098 typec {
1255 compatible = "google, 1099 compatible = "google,cros-ec-typec";
1256 #address-cells = <1>; 1100 #address-cells = <1>;
1257 #size-cells = <0>; 1101 #size-cells = <0>;
1258 1102
1259 usb_c0: connector@0 { 1103 usb_c0: connector@0 {
1260 compatible = 1104 compatible = "usb-c-connector";
1261 reg = <0>; 1105 reg = <0>;
1262 power-role = 1106 power-role = "dual";
1263 data-role = " 1107 data-role = "host";
1264 try-power-rol 1108 try-power-role = "source";
1265 }; 1109 };
1266 1110
1267 usb_c1: connector@1 { 1111 usb_c1: connector@1 {
1268 compatible = 1112 compatible = "usb-c-connector";
1269 reg = <1>; 1113 reg = <1>;
1270 power-role = 1114 power-role = "dual";
1271 data-role = " 1115 data-role = "host";
1272 try-power-rol 1116 try-power-role = "source";
1273 }; 1117 };
1274 }; 1118 };
1275 }; 1119 };
1276 }; 1120 };
1277 1121
1278 &spmi { 1122 &spmi {
1279 #address-cells = <2>; 1123 #address-cells = <2>;
1280 #size-cells = <0>; 1124 #size-cells = <0>;
1281 1125
1282 mt6315@6 { 1126 mt6315@6 {
1283 compatible = "mediatek,mt6315 1127 compatible = "mediatek,mt6315-regulator";
1284 reg = <0x6 SPMI_USID>; 1128 reg = <0x6 SPMI_USID>;
1285 1129
1286 regulators { 1130 regulators {
1287 mt6315_6_vbuck1: vbuc 1131 mt6315_6_vbuck1: vbuck1 {
1288 regulator-com 1132 regulator-compatible = "vbuck1";
1289 regulator-nam 1133 regulator-name = "Vbcpu";
1290 regulator-min !! 1134 regulator-min-microvolt = <300000>;
1291 regulator-max 1135 regulator-max-microvolt = <1193750>;
1292 regulator-ena 1136 regulator-enable-ramp-delay = <256>;
1293 regulator-ram 1137 regulator-ramp-delay = <6250>;
1294 regulator-all 1138 regulator-allowed-modes = <0 1 2>;
1295 regulator-alw 1139 regulator-always-on;
1296 }; 1140 };
1297 }; 1141 };
1298 }; 1142 };
1299 1143
1300 mt6315@7 { 1144 mt6315@7 {
1301 compatible = "mediatek,mt6315 1145 compatible = "mediatek,mt6315-regulator";
1302 reg = <0x7 SPMI_USID>; 1146 reg = <0x7 SPMI_USID>;
1303 1147
1304 regulators { 1148 regulators {
1305 mt6315_7_vbuck1: vbuc 1149 mt6315_7_vbuck1: vbuck1 {
1306 regulator-com 1150 regulator-compatible = "vbuck1";
1307 regulator-nam 1151 regulator-name = "Vgpu";
1308 regulator-min !! 1152 regulator-min-microvolt = <625000>;
1309 regulator-max 1153 regulator-max-microvolt = <1193750>;
1310 regulator-ena 1154 regulator-enable-ramp-delay = <256>;
1311 regulator-ram 1155 regulator-ramp-delay = <6250>;
1312 regulator-all 1156 regulator-allowed-modes = <0 1 2>;
1313 }; !! 1157 regulator-always-on;
1314 }; <<
1315 }; <<
1316 }; <<
1317 <<
1318 &thermal_zones { <<
1319 soc-area-thermal { <<
1320 polling-delay = <1000>; <<
1321 polling-delay-passive = <250> <<
1322 thermal-sensors = <&tboard_th <<
1323 <<
1324 trips { <<
1325 trip-crit { <<
1326 temperature = <<
1327 hysteresis = <<
1328 type = "criti <<
1329 }; <<
1330 }; <<
1331 }; <<
1332 <<
1333 pmic-area-thermal { <<
1334 polling-delay = <1000>; <<
1335 polling-delay-passive = <0>; <<
1336 thermal-sensors = <&tboard_th <<
1337 <<
1338 trips { <<
1339 trip-crit { <<
1340 temperature = <<
1341 hysteresis = <<
1342 type = "criti <<
1343 }; 1158 };
1344 }; 1159 };
1345 }; 1160 };
1346 }; 1161 };
1347 1162
1348 &u3phy0 { 1163 &u3phy0 {
1349 status = "okay"; 1164 status = "okay";
1350 }; 1165 };
1351 1166
1352 &u3phy1 { 1167 &u3phy1 {
1353 status = "okay"; 1168 status = "okay";
1354 }; 1169 };
1355 1170
1356 &u3phy2 { 1171 &u3phy2 {
1357 status = "okay"; 1172 status = "okay";
1358 }; 1173 };
1359 1174
1360 &u3phy3 { 1175 &u3phy3 {
1361 status = "okay"; 1176 status = "okay";
1362 }; 1177 };
1363 1178
1364 &uart0 { 1179 &uart0 {
1365 status = "okay"; 1180 status = "okay";
1366 }; 1181 };
1367 1182
1368 /* <<
1369 * For the USB Type-C ports the role and alte <<
1370 * done by the EC so we set dr_mode to host t <<
1371 */ <<
1372 &ssusb0 { <<
1373 dr_mode = "host"; <<
1374 vusb33-supply = <&mt6359_vusb_ldo_reg <<
1375 status = "okay"; <<
1376 }; <<
1377 <<
1378 &ssusb2 { <<
1379 dr_mode = "host"; <<
1380 vusb33-supply = <&mt6359_vusb_ldo_reg <<
1381 status = "okay"; <<
1382 }; <<
1383 <<
1384 &ssusb3 { <<
1385 dr_mode = "host"; <<
1386 vusb33-supply = <&mt6359_vusb_ldo_reg <<
1387 status = "okay"; <<
1388 }; <<
1389 <<
1390 &xhci0 { 1183 &xhci0 {
1391 status = "okay"; 1184 status = "okay";
1392 1185
1393 rx-fifo-depth = <3072>; !! 1186 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1394 vbus-supply = <&usb_vbus>; 1187 vbus-supply = <&usb_vbus>;
1395 }; 1188 };
1396 1189
1397 &xhci1 { 1190 &xhci1 {
1398 status = "okay"; 1191 status = "okay";
1399 1192
1400 phys = <&u2port1 PHY_TYPE_USB2>; <<
1401 rx-fifo-depth = <3072>; <<
1402 vusb33-supply = <&mt6359_vusb_ldo_reg 1193 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1403 vbus-supply = <&usb_vbus>; 1194 vbus-supply = <&usb_vbus>;
1404 mediatek,u3p-dis-msk = <1>; <<
1405 }; 1195 };
1406 1196
1407 &xhci2 { 1197 &xhci2 {
1408 status = "okay"; 1198 status = "okay";
>> 1199
>> 1200 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1409 vbus-supply = <&usb_vbus>; 1201 vbus-supply = <&usb_vbus>;
1410 }; 1202 };
1411 1203
1412 &xhci3 { 1204 &xhci3 {
1413 status = "okay"; 1205 status = "okay";
1414 1206
1415 /* MT7921's USB Bluetooth has issues 1207 /* MT7921's USB Bluetooth has issues with USB2 LPM */
1416 usb2-lpm-disable; 1208 usb2-lpm-disable;
>> 1209 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1417 vbus-supply = <&usb_vbus>; 1210 vbus-supply = <&usb_vbus>;
1418 }; 1211 };
1419 1212
1420 #include <arm/cros-ec-keyboard.dtsi> 1213 #include <arm/cros-ec-keyboard.dtsi>
1421 #include <arm/cros-ec-sbs.dtsi> 1214 #include <arm/cros-ec-sbs.dtsi>
1422 1215
1423 &keyboard_controller { 1216 &keyboard_controller {
1424 function-row-physmap = < 1217 function-row-physmap = <
1425 MATRIX_KEY(0x00, 0x02, 0) 1218 MATRIX_KEY(0x00, 0x02, 0) /* T1 */
1426 MATRIX_KEY(0x03, 0x02, 0) 1219 MATRIX_KEY(0x03, 0x02, 0) /* T2 */
1427 MATRIX_KEY(0x02, 0x02, 0) 1220 MATRIX_KEY(0x02, 0x02, 0) /* T3 */
1428 MATRIX_KEY(0x01, 0x02, 0) 1221 MATRIX_KEY(0x01, 0x02, 0) /* T4 */
1429 MATRIX_KEY(0x03, 0x04, 0) 1222 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
1430 MATRIX_KEY(0x02, 0x04, 0) 1223 MATRIX_KEY(0x02, 0x04, 0) /* T6 */
1431 MATRIX_KEY(0x01, 0x04, 0) 1224 MATRIX_KEY(0x01, 0x04, 0) /* T7 */
1432 MATRIX_KEY(0x02, 0x09, 0) 1225 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
1433 MATRIX_KEY(0x01, 0x09, 0) 1226 MATRIX_KEY(0x01, 0x09, 0) /* T9 */
1434 MATRIX_KEY(0x00, 0x04, 0) 1227 MATRIX_KEY(0x00, 0x04, 0) /* T10 */
1435 <<
1436 /* T11 to T13 are present onl <<
1437 MATRIX_KEY(0x00, 0x01, 0) <<
1438 MATRIX_KEY(0x01, 0x05, 0) <<
1439 MATRIX_KEY(0x03, 0x05, 0) <<
1440 >; 1228 >;
1441 1229
1442 linux,keymap = < 1230 linux,keymap = <
1443 MATRIX_KEY(0x00, 0x02, KEY_BA 1231 MATRIX_KEY(0x00, 0x02, KEY_BACK)
1444 MATRIX_KEY(0x03, 0x02, KEY_RE 1232 MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
1445 MATRIX_KEY(0x02, 0x02, KEY_ZO 1233 MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
1446 MATRIX_KEY(0x01, 0x02, KEY_SC 1234 MATRIX_KEY(0x01, 0x02, KEY_SCALE)
1447 MATRIX_KEY(0x03, 0x04, KEY_SY 1235 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
1448 MATRIX_KEY(0x02, 0x04, KEY_BR 1236 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
1449 MATRIX_KEY(0x01, 0x04, KEY_BR 1237 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
1450 MATRIX_KEY(0x02, 0x09, KEY_MU 1238 MATRIX_KEY(0x02, 0x09, KEY_MUTE)
1451 MATRIX_KEY(0x01, 0x09, KEY_VO 1239 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
1452 MATRIX_KEY(0x00, 0x04, KEY_VO 1240 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
1453 1241
1454 CROS_STD_MAIN_KEYMAP 1242 CROS_STD_MAIN_KEYMAP
1455 >; 1243 >;
1456 }; 1244 };
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