1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2021 Nuvoton Technology tomer
3
4 #include <dt-bindings/clock/nuvoton,npcm845-cl
5 #include <dt-bindings/interrupt-controller/arm
6 #include <dt-bindings/interrupt-controller/irq
7
8 / {
9 #address-cells = <2>;
10 #size-cells = <2>;
11 interrupt-parent = <&gic>;
12
13 soc {
14 #address-cells = <2>;
15 #size-cells = <2>;
16 compatible = "simple-bus";
17 interrupt-parent = <&gic>;
18 ranges;
19
20 gcr: system-controller@f080000
21 compatible = "nuvoton,
22 reg = <0x0 0xf0800000
23 };
24
25 gic: interrupt-controller@dfff
26 compatible = "arm,gic-
27 reg = <0x0 0xdfff9000
28 <0x0 0xdfffa000
29 <0x0 0xdfffc000
30 <0x0 0xdfffe000
31 interrupts = <GIC_PPI
32 #interrupt-cells = <3>
33 interrupt-controller;
34 #address-cells = <0>;
35 ppi-partitions {
36 ppi_cluster0:
37 affini
38 };
39 };
40 };
41 };
42
43 ahb {
44 #address-cells = <2>;
45 #size-cells = <2>;
46 compatible = "simple-bus";
47 interrupt-parent = <&gic>;
48 ranges;
49
50 rstc: reset-controller@f080100
51 compatible = "nuvoton,
52 reg = <0x0 0xf0801000
53 #reset-cells = <2>;
54 nuvoton,sysgcr = <&gcr
55 };
56
57 clk: clock-controller@f0801000
58 compatible = "nuvoton,
59 #clock-cells = <1>;
60 reg = <0x0 0xf0801000
61 };
62
63 apb {
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "simple-b
67 interrupt-parent = <&g
68 ranges = <0x0 0x0 0xf0
69 <0xfff00000 0x
70
71 peci: peci-controller@
72 compatible = "
73 reg = <0x10000
74 interrupts = <
75 clocks = <&clk
76 cmd-timeout-ms
77 status = "disa
78 };
79
80 timer0: timer@8000 {
81 compatible = "
82 interrupts = <
83 reg = <0x8000
84 clocks = <&clk
85 clock-names =
86 };
87
88 serial0: serial@0 {
89 compatible = "
90 reg = <0x0 0x1
91 clocks = <&clk
92 interrupts = <
93 reg-shift = <2
94 status = "disa
95 };
96
97 serial1: serial@1000 {
98 compatible = "
99 reg = <0x1000
100 clocks = <&clk
101 interrupts = <
102 reg-shift = <2
103 status = "disa
104 };
105
106 serial2: serial@2000 {
107 compatible = "
108 reg = <0x2000
109 clocks = <&clk
110 interrupts = <
111 reg-shift = <2
112 status = "disa
113 };
114
115 serial3: serial@3000 {
116 compatible = "
117 reg = <0x3000
118 clocks = <&clk
119 interrupts = <
120 reg-shift = <2
121 status = "disa
122 };
123
124 serial4: serial@4000 {
125 compatible = "
126 reg = <0x4000
127 clocks = <&clk
128 interrupts = <
129 reg-shift = <2
130 status = "disa
131 };
132
133 serial5: serial@5000 {
134 compatible = "
135 reg = <0x5000
136 clocks = <&clk
137 interrupts = <
138 reg-shift = <2
139 status = "disa
140 };
141
142 serial6: serial@6000 {
143 compatible = "
144 reg = <0x6000
145 clocks = <&clk
146 interrupts = <
147 reg-shift = <2
148 status = "disa
149 };
150
151 watchdog0: watchdog@80
152 compatible = "
153 interrupts = <
154 reg = <0x801c
155 status = "disa
156 clocks = <&clk
157 syscon = <&gcr
158 };
159
160 watchdog1: watchdog@90
161 compatible = "
162 interrupts = <
163 reg = <0x901c
164 status = "disa
165 clocks = <&clk
166 syscon = <&gcr
167 };
168
169 watchdog2: watchdog@a0
170 compatible = "
171 interrupts = <
172 reg = <0xa01c
173 status = "disa
174 clocks = <&clk
175 syscon = <&gcr
176 };
177 };
178 };
179 };
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