1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/; 2 /dts-v1/;
3 3
4 #include <dt-bindings/input/linux-event-codes. 4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/gpio-keys.h>
6 6
7 #include "tegra186-p3310.dtsi" 7 #include "tegra186-p3310.dtsi"
8 8
9 / { 9 / {
10 model = "NVIDIA Jetson TX2 Developer K 10 model = "NVIDIA Jetson TX2 Developer Kit";
11 compatible = "nvidia,p2771-0000", "nvi 11 compatible = "nvidia,p2771-0000", "nvidia,tegra186";
12 12
13 aconnect@2900000 { 13 aconnect@2900000 {
14 status = "okay"; 14 status = "okay";
15 15
16 ahub@2900800 { !! 16 dma-controller@2930000 {
17 status = "okay"; 17 status = "okay";
>> 18 };
18 19
19 i2s@2901000 { !! 20 interrupt-controller@2a40000 {
20 status = "okay !! 21 status = "okay";
21 !! 22 };
22 ports { <<
23 #addre <<
24 #size- <<
25 23
26 port@0 !! 24 ahub@2900800 {
27 !! 25 status = "okay";
28 26
29 !! 27 ports {
30 !! 28 #address-cells = <1>;
31 !! 29 #size-cells = <0>;
32 }; <<
33 30
34 i2s1_p !! 31 port@0 {
35 !! 32 reg = <0x0>;
36 33
37 !! 34 xbar_admaif0_ep: endpoint {
38 !! 35 remote-endpoint = <&admaif0_ep>;
39 <<
40 <<
41 }; 36 };
42 }; 37 };
43 }; <<
44 <<
45 i2s@2901100 { <<
46 status = "okay <<
47 38
48 ports { !! 39 port@1 {
49 #addre !! 40 reg = <0x1>;
50 #size- <<
51 <<
52 port@0 <<
53 <<
54 41
55 !! 42 xbar_admaif1_ep: endpoint {
56 !! 43 remote-endpoint = <&admaif1_ep>;
57 <<
58 }; 44 };
>> 45 };
59 46
60 i2s2_p !! 47 port@2 {
61 !! 48 reg = <0x2>;
62 49
63 !! 50 xbar_admaif2_ep: endpoint {
64 !! 51 remote-endpoint = <&admaif2_ep>;
65 <<
66 <<
67 }; 52 };
68 }; 53 };
69 }; <<
70 <<
71 i2s@2901200 { <<
72 status = "okay <<
73 54
74 ports { !! 55 port@3 {
75 #addre !! 56 reg = <0x3>;
76 #size- <<
77 <<
78 port@0 <<
79 <<
80 57
81 !! 58 xbar_admaif3_ep: endpoint {
82 !! 59 remote-endpoint = <&admaif3_ep>;
83 <<
84 }; 60 };
>> 61 };
85 62
86 i2s3_p !! 63 port@4 {
87 !! 64 reg = <0x4>;
88 65
89 !! 66 xbar_admaif4_ep: endpoint {
90 !! 67 remote-endpoint = <&admaif4_ep>;
91 <<
92 <<
93 }; 68 };
94 }; 69 };
95 }; <<
96 <<
97 i2s@2901300 { <<
98 status = "okay <<
99 <<
100 ports { <<
101 #addre <<
102 #size- <<
103 70
104 port@0 !! 71 port@5 {
105 !! 72 reg = <0x5>;
106 73
107 !! 74 xbar_admaif5_ep: endpoint {
108 !! 75 remote-endpoint = <&admaif5_ep>;
109 <<
110 }; 76 };
>> 77 };
111 78
112 i2s4_p !! 79 port@6 {
113 !! 80 reg = <0x6>;
114 81
115 !! 82 xbar_admaif6_ep: endpoint {
116 !! 83 remote-endpoint = <&admaif6_ep>;
117 <<
118 <<
119 }; 84 };
120 }; 85 };
121 }; <<
122 86
123 i2s@2901400 { !! 87 port@7 {
124 status = "okay !! 88 reg = <0x7>;
125 <<
126 ports { <<
127 #addre <<
128 #size- <<
129 <<
130 port@0 <<
131 <<
132 89
133 !! 90 xbar_admaif7_ep: endpoint {
134 !! 91 remote-endpoint = <&admaif7_ep>;
135 <<
136 }; 92 };
>> 93 };
137 94
138 i2s5_p !! 95 port@8 {
139 !! 96 reg = <0x8>;
140 97
141 !! 98 xbar_admaif8_ep: endpoint {
142 !! 99 remote-endpoint = <&admaif8_ep>;
143 <<
144 <<
145 }; 100 };
146 }; 101 };
147 }; <<
148 102
149 i2s@2901500 { !! 103 port@9 {
150 status = "okay !! 104 reg = <0x9>;
151 <<
152 ports { <<
153 #addre <<
154 #size- <<
155 <<
156 port@0 <<
157 <<
158 105
159 !! 106 xbar_admaif9_ep: endpoint {
160 !! 107 remote-endpoint = <&admaif9_ep>;
161 <<
162 }; 108 };
>> 109 };
163 110
164 i2s6_p !! 111 port@a {
165 !! 112 reg = <0xa>;
166 113
167 !! 114 xbar_admaif10_ep: endpoint {
168 !! 115 remote-endpoint = <&admaif10_ep>;
169 <<
170 <<
171 }; 116 };
172 }; 117 };
173 }; <<
174 118
175 sfc@2902000 { !! 119 port@b {
176 status = "okay !! 120 reg = <0xb>;
177 121
178 ports { !! 122 xbar_admaif11_ep: endpoint {
179 #addre !! 123 remote-endpoint = <&admaif11_ep>;
180 #size- !! 124 };
>> 125 };
181 126
182 port@0 !! 127 port@c {
183 !! 128 reg = <0xc>;
184 129
185 !! 130 xbar_admaif12_ep: endpoint {
186 !! 131 remote-endpoint = <&admaif12_ep>;
187 <<
188 <<
189 }; 132 };
>> 133 };
190 134
191 sfc1_o !! 135 port@d {
192 !! 136 reg = <0xd>;
193 137
194 !! 138 xbar_admaif13_ep: endpoint {
195 !! 139 remote-endpoint = <&admaif13_ep>;
196 <<
197 <<
198 }; 140 };
199 }; 141 };
200 }; <<
201 142
202 sfc@2902200 { !! 143 port@e {
203 status = "okay !! 144 reg = <0xe>;
204 145
205 ports { !! 146 xbar_admaif14_ep: endpoint {
206 #addre !! 147 remote-endpoint = <&admaif14_ep>;
207 #size- !! 148 };
>> 149 };
208 150
209 port@0 !! 151 port@f {
210 !! 152 reg = <0xf>;
211 153
212 !! 154 xbar_admaif15_ep: endpoint {
213 !! 155 remote-endpoint = <&admaif15_ep>;
214 <<
215 }; 156 };
>> 157 };
216 158
217 sfc2_o !! 159 port@10 {
218 !! 160 reg = <0x10>;
219 161
220 !! 162 xbar_admaif16_ep: endpoint {
221 !! 163 remote-endpoint = <&admaif16_ep>;
222 <<
223 }; 164 };
224 }; 165 };
225 }; <<
226 166
227 sfc@2902400 { !! 167 port@11 {
228 status = "okay !! 168 reg = <0x11>;
229 169
230 ports { !! 170 xbar_admaif17_ep: endpoint {
231 #addre !! 171 remote-endpoint = <&admaif17_ep>;
232 #size- !! 172 };
>> 173 };
233 174
234 port@0 !! 175 port@12 {
235 !! 176 reg = <0x12>;
236 177
237 !! 178 xbar_admaif18_ep: endpoint {
238 !! 179 remote-endpoint = <&admaif18_ep>;
239 <<
240 }; 180 };
>> 181 };
241 182
242 sfc3_o !! 183 port@13 {
243 !! 184 reg = <0x13>;
244 185
245 !! 186 xbar_admaif19_ep: endpoint {
246 !! 187 remote-endpoint = <&admaif19_ep>;
247 <<
248 }; 188 };
249 }; 189 };
250 }; <<
251 190
252 sfc@2902600 { !! 191 xbar_i2s1_port: port@14 {
253 status = "okay !! 192 reg = <0x14>;
254 193
255 ports { !! 194 xbar_i2s1_ep: endpoint {
256 #addre !! 195 remote-endpoint = <&i2s1_cif_ep>;
257 #size- !! 196 };
>> 197 };
258 198
259 port@0 !! 199 xbar_i2s2_port: port@15 {
260 !! 200 reg = <0x15>;
261 201
262 !! 202 xbar_i2s2_ep: endpoint {
263 !! 203 remote-endpoint = <&i2s2_cif_ep>;
264 <<
265 }; 204 };
>> 205 };
266 206
267 sfc4_o !! 207 xbar_i2s3_port: port@16 {
268 !! 208 reg = <0x16>;
269 209
270 !! 210 xbar_i2s3_ep: endpoint {
271 !! 211 remote-endpoint = <&i2s3_cif_ep>;
272 <<
273 }; 212 };
274 }; 213 };
275 }; <<
276 214
277 amx@2903000 { !! 215 xbar_i2s4_port: port@17 {
278 status = "okay !! 216 reg = <0x17>;
279 217
280 ports { !! 218 xbar_i2s4_ep: endpoint {
281 #addre !! 219 remote-endpoint = <&i2s4_cif_ep>;
282 #size- !! 220 };
>> 221 };
283 222
284 port@0 !! 223 xbar_i2s5_port: port@18 {
285 !! 224 reg = <0x18>;
286 225
287 !! 226 xbar_i2s5_ep: endpoint {
288 !! 227 remote-endpoint = <&i2s5_cif_ep>;
289 <<
290 }; 228 };
>> 229 };
291 230
292 port@1 !! 231 xbar_i2s6_port: port@19 {
293 !! 232 reg = <0x19>;
294 233
295 !! 234 xbar_i2s6_ep: endpoint {
296 !! 235 remote-endpoint = <&i2s6_cif_ep>;
297 <<
298 }; 236 };
>> 237 };
299 238
300 port@2 !! 239 xbar_dmic1_port: port@1a {
301 !! 240 reg = <0x1a>;
302 241
303 !! 242 xbar_dmic1_ep: endpoint {
304 !! 243 remote-endpoint = <&dmic1_cif_ep>;
305 <<
306 }; 244 };
>> 245 };
307 246
308 port@3 !! 247 xbar_dmic2_port: port@1b {
309 !! 248 reg = <0x1b>;
310 249
311 !! 250 xbar_dmic2_ep: endpoint {
312 !! 251 remote-endpoint = <&dmic2_cif_ep>;
313 <<
314 }; 252 };
>> 253 };
315 254
316 amx1_o !! 255 xbar_dmic3_port: port@1c {
317 !! 256 reg = <0x1c>;
318 257
319 !! 258 xbar_dmic3_ep: endpoint {
320 !! 259 remote-endpoint = <&dmic3_cif_ep>;
321 <<
322 }; 260 };
323 }; 261 };
324 }; <<
325 262
326 amx@2903100 { !! 263 xbar_dspk1_port: port@1e {
327 status = "okay !! 264 reg = <0x1e>;
328 265
329 ports { !! 266 xbar_dspk1_ep: endpoint {
330 #addre !! 267 remote-endpoint = <&dspk1_cif_ep>;
331 #size- !! 268 };
>> 269 };
332 270
333 port@0 !! 271 xbar_dspk2_port: port@1f {
334 !! 272 reg = <0x1f>;
335 273
336 !! 274 xbar_dspk2_ep: endpoint {
337 !! 275 remote-endpoint = <&dspk2_cif_ep>;
338 <<
339 }; 276 };
>> 277 };
340 278
341 port@1 !! 279 xbar_sfc1_in_port: port@20 {
342 !! 280 reg = <0x20>;
343 281
344 !! 282 xbar_sfc1_in_ep: endpoint {
345 !! 283 remote-endpoint = <&sfc1_cif_in_ep>;
346 <<
347 }; 284 };
>> 285 };
348 286
349 amx2_i !! 287 port@21 {
350 !! 288 reg = <0x21>;
351 289
352 !! 290 xbar_sfc1_out_ep: endpoint {
353 !! 291 remote-endpoint = <&sfc1_cif_out_ep>;
354 <<
355 }; 292 };
>> 293 };
356 294
357 amx2_i !! 295 xbar_sfc2_in_port: port@22 {
358 !! 296 reg = <0x22>;
359 297
360 !! 298 xbar_sfc2_in_ep: endpoint {
361 !! 299 remote-endpoint = <&sfc2_cif_in_ep>;
362 <<
363 }; 300 };
>> 301 };
364 302
365 amx2_o !! 303 port@23 {
366 !! 304 reg = <0x23>;
367 305
368 !! 306 xbar_sfc2_out_ep: endpoint {
369 !! 307 remote-endpoint = <&sfc2_cif_out_ep>;
370 <<
371 }; 308 };
372 }; 309 };
373 }; <<
374 310
375 amx@2903200 { !! 311 xbar_sfc3_in_port: port@24 {
376 status = "okay !! 312 reg = <0x24>;
377 313
378 ports { !! 314 xbar_sfc3_in_ep: endpoint {
379 #addre !! 315 remote-endpoint = <&sfc3_cif_in_ep>;
380 #size- !! 316 };
>> 317 };
381 318
382 port@0 !! 319 port@25 {
383 !! 320 reg = <0x25>;
384 321
385 !! 322 xbar_sfc3_out_ep: endpoint {
386 !! 323 remote-endpoint = <&sfc3_cif_out_ep>;
387 <<
388 }; 324 };
>> 325 };
389 326
390 port@1 !! 327 xbar_sfc4_in_port: port@26 {
391 !! 328 reg = <0x26>;
392 329
393 !! 330 xbar_sfc4_in_ep: endpoint {
394 !! 331 remote-endpoint = <&sfc4_cif_in_ep>;
395 <<
396 }; 332 };
>> 333 };
397 334
398 port@2 !! 335 port@27 {
399 !! 336 reg = <0x27>;
400 337
401 !! 338 xbar_sfc4_out_ep: endpoint {
402 !! 339 remote-endpoint = <&sfc4_cif_out_ep>;
403 <<
404 }; 340 };
>> 341 };
405 342
406 port@3 !! 343 xbar_mvc1_in_port: port@28 {
407 !! 344 reg = <0x28>;
408 345
409 !! 346 xbar_mvc1_in_ep: endpoint {
410 !! 347 remote-endpoint = <&mvc1_cif_in_ep>;
411 <<
412 }; 348 };
>> 349 };
413 350
414 amx3_o !! 351 port@29 {
415 !! 352 reg = <0x29>;
416 353
417 !! 354 xbar_mvc1_out_ep: endpoint {
418 !! 355 remote-endpoint = <&mvc1_cif_out_ep>;
419 <<
420 }; 356 };
421 }; 357 };
422 }; <<
423 358
424 amx@2903300 { !! 359 xbar_mvc2_in_port: port@2a {
425 status = "okay !! 360 reg = <0x2a>;
426 361
427 ports { !! 362 xbar_mvc2_in_ep: endpoint {
428 #addre !! 363 remote-endpoint = <&mvc2_cif_in_ep>;
429 #size- !! 364 };
>> 365 };
430 366
431 port@0 !! 367 port@2b {
432 !! 368 reg = <0x2b>;
433 369
434 !! 370 xbar_mvc2_out_ep: endpoint {
435 !! 371 remote-endpoint = <&mvc2_cif_out_ep>;
436 <<
437 }; 372 };
>> 373 };
438 374
439 port@1 !! 375 xbar_amx1_in1_port: port@2c {
440 !! 376 reg = <0x2c>;
441 377
442 !! 378 xbar_amx1_in1_ep: endpoint {
443 !! 379 remote-endpoint = <&amx1_in1_ep>;
444 <<
445 }; 380 };
>> 381 };
446 382
447 port@2 !! 383 xbar_amx1_in2_port: port@2d {
448 !! 384 reg = <0x2d>;
449 385
450 !! 386 xbar_amx1_in2_ep: endpoint {
451 !! 387 remote-endpoint = <&amx1_in2_ep>;
452 <<
453 }; 388 };
>> 389 };
454 390
455 port@3 !! 391 xbar_amx1_in3_port: port@2e {
456 !! 392 reg = <0x2e>;
457 393
458 !! 394 xbar_amx1_in3_ep: endpoint {
459 !! 395 remote-endpoint = <&amx1_in3_ep>;
460 <<
461 }; 396 };
>> 397 };
462 398
463 amx4_o !! 399 xbar_amx1_in4_port: port@2f {
464 !! 400 reg = <0x2f>;
465 401
466 !! 402 xbar_amx1_in4_ep: endpoint {
467 !! 403 remote-endpoint = <&amx1_in4_ep>;
468 <<
469 }; 404 };
470 }; 405 };
471 }; <<
472 406
473 adx@2903800 { !! 407 port@30 {
474 status = "okay !! 408 reg = <0x30>;
475 409
476 ports { !! 410 xbar_amx1_out_ep: endpoint {
477 #addre !! 411 remote-endpoint = <&amx1_out_ep>;
478 #size- !! 412 };
>> 413 };
479 414
480 port@0 !! 415 xbar_amx2_in1_port: port@31 {
481 !! 416 reg = <0x31>;
482 417
483 !! 418 xbar_amx2_in1_ep: endpoint {
484 !! 419 remote-endpoint = <&amx2_in1_ep>;
485 <<
486 }; 420 };
>> 421 };
487 422
488 adx1_o !! 423 xbar_amx2_in2_port: port@32 {
489 !! 424 reg = <0x32>;
490 425
491 !! 426 xbar_amx2_in2_ep: endpoint {
492 !! 427 remote-endpoint = <&amx2_in2_ep>;
493 <<
494 }; 428 };
>> 429 };
495 430
496 adx1_o !! 431 xbar_amx2_in3_port: port@33 {
497 !! 432 reg = <0x33>;
498 433
499 !! 434 xbar_amx2_in3_ep: endpoint {
500 !! 435 remote-endpoint = <&amx2_in3_ep>;
501 <<
502 }; 436 };
>> 437 };
503 438
504 adx1_o !! 439 xbar_amx2_in4_port: port@34 {
505 !! 440 reg = <0x34>;
506 441
507 !! 442 xbar_amx2_in4_ep: endpoint {
508 !! 443 remote-endpoint = <&amx2_in4_ep>;
509 <<
510 }; 444 };
>> 445 };
511 446
512 adx1_o !! 447 port@35 {
513 !! 448 reg = <0x35>;
514 449
515 !! 450 xbar_amx2_out_ep: endpoint {
516 !! 451 remote-endpoint = <&amx2_out_ep>;
517 <<
518 }; 452 };
519 }; 453 };
520 }; <<
521 454
522 adx@2903900 { !! 455 xbar_amx3_in1_port: port@36 {
523 status = "okay !! 456 reg = <0x36>;
524 457
525 ports { !! 458 xbar_amx3_in1_ep: endpoint {
526 #addre !! 459 remote-endpoint = <&amx3_in1_ep>;
527 #size- !! 460 };
>> 461 };
528 462
529 port@0 !! 463 xbar_amx3_in2_port: port@37 {
530 !! 464 reg = <0x37>;
531 465
532 !! 466 xbar_amx3_in2_ep: endpoint {
533 !! 467 remote-endpoint = <&amx3_in2_ep>;
534 <<
535 }; 468 };
>> 469 };
536 470
537 adx2_o !! 471 xbar_amx3_in3_port: port@38 {
538 !! 472 reg = <0x38>;
539 473
540 !! 474 xbar_amx3_in3_ep: endpoint {
541 !! 475 remote-endpoint = <&amx3_in3_ep>;
542 <<
543 }; 476 };
>> 477 };
544 478
545 adx2_o !! 479 xbar_amx3_in4_port: port@39 {
546 !! 480 reg = <0x39>;
547 481
548 !! 482 xbar_amx3_in4_ep: endpoint {
549 !! 483 remote-endpoint = <&amx3_in4_ep>;
550 <<
551 }; 484 };
>> 485 };
552 486
553 adx2_o !! 487 port@3a {
554 !! 488 reg = <0x3a>;
555 489
556 !! 490 xbar_amx3_out_ep: endpoint {
557 !! 491 remote-endpoint = <&amx3_out_ep>;
558 <<
559 }; 492 };
>> 493 };
560 494
561 adx2_o !! 495 xbar_amx4_in1_port: port@3b {
562 !! 496 reg = <0x3b>;
563 497
564 !! 498 xbar_amx4_in1_ep: endpoint {
565 !! 499 remote-endpoint = <&amx4_in1_ep>;
566 <<
567 }; 500 };
568 }; 501 };
569 }; <<
570 502
571 adx@2903a00 { !! 503 xbar_amx4_in2_port: port@3c {
572 status = "okay !! 504 reg = <0x3c>;
573 505
574 ports { !! 506 xbar_amx4_in2_ep: endpoint {
575 #addre !! 507 remote-endpoint = <&amx4_in2_ep>;
576 #size- !! 508 };
>> 509 };
577 510
578 port@0 !! 511 xbar_amx4_in3_port: port@3d {
579 !! 512 reg = <0x3d>;
580 513
581 !! 514 xbar_amx4_in3_ep: endpoint {
582 !! 515 remote-endpoint = <&amx4_in3_ep>;
583 <<
584 }; 516 };
>> 517 };
585 518
586 adx3_o !! 519 xbar_amx4_in4_port: port@3e {
587 !! 520 reg = <0x3e>;
588 521
589 !! 522 xbar_amx4_in4_ep: endpoint {
590 !! 523 remote-endpoint = <&amx4_in4_ep>;
591 <<
592 }; 524 };
>> 525 };
593 526
594 adx3_o !! 527 port@3f {
595 !! 528 reg = <0x3f>;
596 529
597 !! 530 xbar_amx4_out_ep: endpoint {
598 !! 531 remote-endpoint = <&amx4_out_ep>;
599 <<
600 }; 532 };
>> 533 };
601 534
602 adx3_o !! 535 xbar_adx1_in_port: port@40 {
603 !! 536 reg = <0x40>;
604 537
605 !! 538 xbar_adx1_in_ep: endpoint {
606 !! 539 remote-endpoint = <&adx1_in_ep>;
607 <<
608 }; 540 };
>> 541 };
609 542
610 adx3_o !! 543 port@41 {
611 !! 544 reg = <0x41>;
612 545
613 !! 546 xbar_adx1_out1_ep: endpoint {
614 !! 547 remote-endpoint = <&adx1_out1_ep>;
615 <<
616 }; 548 };
617 }; 549 };
618 }; <<
619 550
620 adx@2903b00 { !! 551 port@42 {
621 status = "okay !! 552 reg = <0x42>;
622 553
623 ports { !! 554 xbar_adx1_out2_ep: endpoint {
624 #addre !! 555 remote-endpoint = <&adx1_out2_ep>;
625 #size- !! 556 };
>> 557 };
626 558
627 port@0 !! 559 port@43 {
628 !! 560 reg = <0x43>;
629 561
630 !! 562 xbar_adx1_out3_ep: endpoint {
631 !! 563 remote-endpoint = <&adx1_out3_ep>;
632 <<
633 }; 564 };
>> 565 };
634 566
635 adx4_o !! 567 port@44 {
636 !! 568 reg = <0x44>;
637 569
638 !! 570 xbar_adx1_out4_ep: endpoint {
639 !! 571 remote-endpoint = <&adx1_out4_ep>;
640 <<
641 }; 572 };
>> 573 };
642 574
643 adx4_o !! 575 xbar_adx2_in_port: port@45 {
644 !! 576 reg = <0x45>;
645 577
646 !! 578 xbar_adx2_in_ep: endpoint {
647 !! 579 remote-endpoint = <&adx2_in_ep>;
648 <<
649 }; 580 };
>> 581 };
650 582
651 adx4_o !! 583 port@46 {
652 !! 584 reg = <0x46>;
653 585
654 !! 586 xbar_adx2_out1_ep: endpoint {
655 !! 587 remote-endpoint = <&adx2_out1_ep>;
656 <<
657 }; 588 };
>> 589 };
658 590
659 adx4_o !! 591 port@47 {
660 !! 592 reg = <0x47>;
661 593
662 !! 594 xbar_adx2_out2_ep: endpoint {
663 !! 595 remote-endpoint = <&adx2_out2_ep>;
664 <<
665 }; 596 };
666 }; 597 };
667 }; <<
668 598
669 dmic@2904000 { !! 599 port@48 {
670 status = "okay !! 600 reg = <0x48>;
671 601
672 ports { !! 602 xbar_adx2_out3_ep: endpoint {
673 #addre !! 603 remote-endpoint = <&adx2_out3_ep>;
674 #size- !! 604 };
>> 605 };
675 606
676 port@0 !! 607 port@49 {
677 !! 608 reg = <0x49>;
678 609
679 !! 610 xbar_adx2_out4_ep: endpoint {
680 !! 611 remote-endpoint = <&adx2_out4_ep>;
681 <<
682 }; 612 };
>> 613 };
683 614
684 dmic1_ !! 615 xbar_adx3_in_port: port@4a {
685 !! 616 reg = <0x4a>;
686 617
687 !! 618 xbar_adx3_in_ep: endpoint {
688 !! 619 remote-endpoint = <&adx3_in_ep>;
689 <<
690 }; 620 };
691 }; 621 };
692 }; <<
693 622
694 dmic@2904100 { !! 623 port@4b {
695 status = "okay !! 624 reg = <0x4b>;
696 625
697 ports { !! 626 xbar_adx3_out1_ep: endpoint {
698 #addre !! 627 remote-endpoint = <&adx3_out1_ep>;
699 #size- !! 628 };
>> 629 };
700 630
701 port@0 !! 631 port@4c {
702 !! 632 reg = <0x4c>;
703 633
704 !! 634 xbar_adx3_out2_ep: endpoint {
705 !! 635 remote-endpoint = <&adx3_out2_ep>;
706 <<
707 }; 636 };
>> 637 };
708 638
709 dmic2_ !! 639 port@4d {
710 !! 640 reg = <0x4d>;
711 641
712 !! 642 xbar_adx3_out3_ep: endpoint {
713 !! 643 remote-endpoint = <&adx3_out3_ep>;
714 <<
715 }; 644 };
716 }; 645 };
717 }; <<
718 646
719 dmic@2904200 { !! 647 port@4e {
720 status = "okay !! 648 reg = <0x4e>;
721 649
722 ports { !! 650 xbar_adx3_out4_ep: endpoint {
723 #addre !! 651 remote-endpoint = <&adx3_out4_ep>;
724 #size- !! 652 };
>> 653 };
725 654
726 port@0 !! 655 xbar_adx4_in_port: port@4f {
727 !! 656 reg = <0x4f>;
728 657
729 !! 658 xbar_adx4_in_ep: endpoint {
730 !! 659 remote-endpoint = <&adx4_in_ep>;
731 <<
732 }; 660 };
>> 661 };
733 662
734 dmic3_ !! 663 port@50 {
735 !! 664 reg = <0x50>;
736 665
737 !! 666 xbar_adx4_out1_ep: endpoint {
738 !! 667 remote-endpoint = <&adx4_out1_ep>;
739 <<
740 }; 668 };
741 }; 669 };
742 }; <<
743 670
744 dspk@2905000 { !! 671 port@51 {
745 status = "okay !! 672 reg = <0x51>;
746 673
747 ports { !! 674 xbar_adx4_out2_ep: endpoint {
748 #addre !! 675 remote-endpoint = <&adx4_out2_ep>;
749 #size- !! 676 };
>> 677 };
750 678
751 port@0 !! 679 port@52 {
752 !! 680 reg = <0x52>;
753 681
754 !! 682 xbar_adx4_out3_ep: endpoint {
755 !! 683 remote-endpoint = <&adx4_out3_ep>;
756 <<
757 }; 684 };
>> 685 };
758 686
759 dspk1_ !! 687 port@53 {
760 !! 688 reg = <0x53>;
761 689
762 !! 690 xbar_adx4_out4_ep: endpoint {
763 !! 691 remote-endpoint = <&adx4_out4_ep>;
764 <<
765 }; 692 };
766 }; 693 };
767 }; <<
768 694
769 dspk@2905100 { !! 695 xbar_mixer_in1_port: port@54 {
770 status = "okay !! 696 reg = <0x54>;
771 697
772 ports { !! 698 xbar_mixer_in1_ep: endpoint {
773 #addre !! 699 remote-endpoint = <&mixer_in1_ep>;
774 #size- !! 700 };
>> 701 };
775 702
776 port@0 !! 703 xbar_mixer_in2_port: port@55 {
777 !! 704 reg = <0x55>;
778 705
779 !! 706 xbar_mixer_in2_ep: endpoint {
780 !! 707 remote-endpoint = <&mixer_in2_ep>;
781 <<
782 }; 708 };
>> 709 };
783 710
784 dspk2_ !! 711 xbar_mixer_in3_port: port@56 {
785 !! 712 reg = <0x56>;
786 713
787 !! 714 xbar_mixer_in3_ep: endpoint {
788 !! 715 remote-endpoint = <&mixer_in3_ep>;
789 <<
790 }; 716 };
791 }; 717 };
792 }; <<
793 718
794 processing-engine@2908 !! 719 xbar_mixer_in4_port: port@57 {
795 status = "okay !! 720 reg = <0x57>;
796 721
797 ports { !! 722 xbar_mixer_in4_ep: endpoint {
798 #addre !! 723 remote-endpoint = <&mixer_in4_ep>;
799 #size- !! 724 };
>> 725 };
800 726
801 port@0 !! 727 xbar_mixer_in5_port: port@58 {
802 !! 728 reg = <0x58>;
803 729
804 !! 730 xbar_mixer_in5_ep: endpoint {
805 !! 731 remote-endpoint = <&mixer_in5_ep>;
806 <<
807 }; 732 };
>> 733 };
808 734
809 ope1_o !! 735 xbar_mixer_in6_port: port@59 {
810 !! 736 reg = <0x59>;
811 737
812 !! 738 xbar_mixer_in6_ep: endpoint {
813 !! 739 remote-endpoint = <&mixer_in6_ep>;
814 <<
815 }; 740 };
816 }; 741 };
817 }; <<
818 742
819 mvc@290a000 { !! 743 xbar_mixer_in7_port: port@5a {
820 status = "okay !! 744 reg = <0x5a>;
821 745
822 ports { !! 746 xbar_mixer_in7_ep: endpoint {
823 #addre !! 747 remote-endpoint = <&mixer_in7_ep>;
824 #size- !! 748 };
>> 749 };
825 750
826 port@0 !! 751 xbar_mixer_in8_port: port@5b {
827 !! 752 reg = <0x5b>;
828 753
829 !! 754 xbar_mixer_in8_ep: endpoint {
830 !! 755 remote-endpoint = <&mixer_in8_ep>;
831 <<
832 }; 756 };
>> 757 };
833 758
834 mvc1_o !! 759 xbar_mixer_in9_port: port@5c {
835 !! 760 reg = <0x5c>;
836 761
837 !! 762 xbar_mixer_in9_ep: endpoint {
838 !! 763 remote-endpoint = <&mixer_in9_ep>;
839 <<
840 }; 764 };
841 }; 765 };
842 }; <<
843 766
844 mvc@290a200 { !! 767 xbar_mixer_in10_port: port@5d {
845 status = "okay !! 768 reg = <0x5d>;
846 769
847 ports { !! 770 xbar_mixer_in10_ep: endpoint {
848 #addre !! 771 remote-endpoint = <&mixer_in10_ep>;
849 #size- !! 772 };
>> 773 };
850 774
851 port@0 !! 775 port@5e {
852 !! 776 reg = <0x5e>;
853 777
854 !! 778 xbar_mixer_out1_ep: endpoint {
855 !! 779 remote-endpoint = <&mixer_out1_ep>;
856 <<
857 }; 780 };
>> 781 };
858 782
859 mvc2_o !! 783 port@5f {
860 !! 784 reg = <0x5f>;
861 785
862 !! 786 xbar_mixer_out2_ep: endpoint {
863 !! 787 remote-endpoint = <&mixer_out2_ep>;
864 <<
865 }; 788 };
866 }; 789 };
867 }; <<
868 790
869 amixer@290bb00 { !! 791 port@60 {
870 status = "okay !! 792 reg = <0x60>;
871 793
872 ports { !! 794 xbar_mixer_out3_ep: endpoint {
873 #addre !! 795 remote-endpoint = <&mixer_out3_ep>;
874 #size- !! 796 };
>> 797 };
875 798
876 port@0 !! 799 port@61 {
877 !! 800 reg = <0x61>;
878 801
879 !! 802 xbar_mixer_out4_ep: endpoint {
880 !! 803 remote-endpoint = <&mixer_out4_ep>;
881 <<
882 }; 804 };
>> 805 };
883 806
884 port@1 !! 807 port@62 {
885 !! 808 reg = <0x62>;
886 809
887 !! 810 xbar_mixer_out5_ep: endpoint {
888 !! 811 remote-endpoint = <&mixer_out5_ep>;
889 <<
890 }; 812 };
>> 813 };
891 814
892 port@2 !! 815 xbar_asrc_in1_port: port@63 {
893 !! 816 reg = <0x63>;
894 817
895 !! 818 xbar_asrc_in1_ep: endpoint {
896 !! 819 remote-endpoint = <&asrc_in1_ep>;
897 <<
898 }; 820 };
>> 821 };
899 822
900 port@3 !! 823 port@64 {
901 !! 824 reg = <0x64>;
902 825
903 !! 826 xbar_asrc_out1_ep: endpoint {
904 !! 827 remote-endpoint = <&asrc_out1_ep>;
905 <<
906 }; 828 };
>> 829 };
907 830
908 port@4 !! 831 xbar_asrc_in2_port: port@65 {
909 !! 832 reg = <0x65>;
910 833
911 !! 834 xbar_asrc_in2_ep: endpoint {
912 !! 835 remote-endpoint = <&asrc_in2_ep>;
913 <<
914 }; 836 };
>> 837 };
915 838
916 port@5 !! 839 port@66 {
917 !! 840 reg = <0x66>;
918 841
919 !! 842 xbar_asrc_out2_ep: endpoint {
920 !! 843 remote-endpoint = <&asrc_out2_ep>;
921 <<
922 }; 844 };
>> 845 };
923 846
924 port@6 !! 847 xbar_asrc_in3_port: port@67 {
925 !! 848 reg = <0x67>;
926 849
927 !! 850 xbar_asrc_in3_ep: endpoint {
928 !! 851 remote-endpoint = <&asrc_in3_ep>;
929 <<
930 }; 852 };
>> 853 };
931 854
932 port@7 !! 855 port@68 {
933 !! 856 reg = <0x68>;
934 857
935 !! 858 xbar_asrc_out3_ep: endpoint {
936 !! 859 remote-endpoint = <&asrc_out3_ep>;
937 <<
938 }; 860 };
>> 861 };
939 862
940 port@8 !! 863 xbar_asrc_in4_port: port@69 {
941 !! 864 reg = <0x69>;
942 865
943 !! 866 xbar_asrc_in4_ep: endpoint {
944 !! 867 remote-endpoint = <&asrc_in4_ep>;
945 <<
946 }; 868 };
>> 869 };
947 870
948 port@9 !! 871 port@6a {
949 !! 872 reg = <0x6a>;
950 873
951 !! 874 xbar_asrc_out4_ep: endpoint {
952 !! 875 remote-endpoint = <&asrc_out4_ep>;
953 <<
954 }; 876 };
>> 877 };
955 878
956 mixer_ !! 879 xbar_asrc_in5_port: port@6b {
957 !! 880 reg = <0x6b>;
958 881
959 !! 882 xbar_asrc_in5_ep: endpoint {
960 !! 883 remote-endpoint = <&asrc_in5_ep>;
961 <<
962 }; 884 };
>> 885 };
963 886
964 mixer_ !! 887 port@6c {
965 !! 888 reg = <0x6c>;
966 889
967 !! 890 xbar_asrc_out5_ep: endpoint {
968 !! 891 remote-endpoint = <&asrc_out5_ep>;
969 <<
970 }; 892 };
>> 893 };
971 894
972 mixer_ !! 895 xbar_asrc_in6_port: port@6d {
973 !! 896 reg = <0x6d>;
974 897
975 !! 898 xbar_asrc_in6_ep: endpoint {
976 !! 899 remote-endpoint = <&asrc_in6_ep>;
977 <<
978 }; 900 };
>> 901 };
979 902
980 mixer_ !! 903 port@6e {
981 !! 904 reg = <0x6e>;
982 905
983 !! 906 xbar_asrc_out6_ep: endpoint {
984 !! 907 remote-endpoint = <&asrc_out6_ep>;
985 <<
986 }; 908 };
>> 909 };
987 910
988 mixer_ !! 911 xbar_asrc_in7_port: port@6f {
989 !! 912 reg = <0x6f>;
990 913
991 !! 914 xbar_asrc_in7_ep: endpoint {
992 !! 915 remote-endpoint = <&asrc_in7_ep>;
993 <<
994 }; 916 };
995 }; 917 };
996 }; 918 };
997 919
998 admaif@290f000 { 920 admaif@290f000 {
999 status = "okay 921 status = "okay";
1000 922
1001 ports { 923 ports {
1002 #addr 924 #address-cells = <1>;
1003 #size 925 #size-cells = <0>;
1004 926
1005 admai 927 admaif0_port: port@0 {
1006 928 reg = <0x0>;
1007 929
1008 930 admaif0_ep: endpoint {
1009 931 remote-endpoint = <&xbar_admaif0_ep>;
1010 932 };
1011 }; 933 };
1012 934
1013 admai 935 admaif1_port: port@1 {
1014 936 reg = <0x1>;
1015 937
1016 938 admaif1_ep: endpoint {
1017 939 remote-endpoint = <&xbar_admaif1_ep>;
1018 940 };
1019 }; 941 };
1020 942
1021 admai 943 admaif2_port: port@2 {
1022 944 reg = <0x2>;
1023 945
1024 946 admaif2_ep: endpoint {
1025 947 remote-endpoint = <&xbar_admaif2_ep>;
1026 948 };
1027 }; 949 };
1028 950
1029 admai 951 admaif3_port: port@3 {
1030 952 reg = <0x3>;
1031 953
1032 954 admaif3_ep: endpoint {
1033 955 remote-endpoint = <&xbar_admaif3_ep>;
1034 956 };
1035 }; 957 };
1036 958
1037 admai 959 admaif4_port: port@4 {
1038 960 reg = <0x4>;
1039 961
1040 962 admaif4_ep: endpoint {
1041 963 remote-endpoint = <&xbar_admaif4_ep>;
1042 964 };
1043 }; 965 };
1044 966
1045 admai 967 admaif5_port: port@5 {
1046 968 reg = <0x5>;
1047 969
1048 970 admaif5_ep: endpoint {
1049 971 remote-endpoint = <&xbar_admaif5_ep>;
1050 972 };
1051 }; 973 };
1052 974
1053 admai 975 admaif6_port: port@6 {
1054 976 reg = <0x6>;
1055 977
1056 978 admaif6_ep: endpoint {
1057 979 remote-endpoint = <&xbar_admaif6_ep>;
1058 980 };
1059 }; 981 };
1060 982
1061 admai 983 admaif7_port: port@7 {
1062 984 reg = <0x7>;
1063 985
1064 986 admaif7_ep: endpoint {
1065 987 remote-endpoint = <&xbar_admaif7_ep>;
1066 988 };
1067 }; 989 };
1068 990
1069 admai 991 admaif8_port: port@8 {
1070 992 reg = <0x8>;
1071 993
1072 994 admaif8_ep: endpoint {
1073 995 remote-endpoint = <&xbar_admaif8_ep>;
1074 996 };
1075 }; 997 };
1076 998
1077 admai 999 admaif9_port: port@9 {
1078 1000 reg = <0x9>;
1079 1001
1080 1002 admaif9_ep: endpoint {
1081 1003 remote-endpoint = <&xbar_admaif9_ep>;
1082 1004 };
1083 }; 1005 };
1084 1006
1085 admai 1007 admaif10_port: port@a {
1086 1008 reg = <0xa>;
1087 1009
1088 1010 admaif10_ep: endpoint {
1089 1011 remote-endpoint = <&xbar_admaif10_ep>;
1090 1012 };
1091 }; 1013 };
1092 1014
1093 admai 1015 admaif11_port: port@b {
1094 1016 reg = <0xb>;
1095 1017
1096 1018 admaif11_ep: endpoint {
1097 1019 remote-endpoint = <&xbar_admaif11_ep>;
1098 1020 };
1099 }; 1021 };
1100 1022
1101 admai 1023 admaif12_port: port@c {
1102 1024 reg = <0xc>;
1103 1025
1104 1026 admaif12_ep: endpoint {
1105 1027 remote-endpoint = <&xbar_admaif12_ep>;
1106 1028 };
1107 }; 1029 };
1108 1030
1109 admai 1031 admaif13_port: port@d {
1110 1032 reg = <0xd>;
1111 1033
1112 1034 admaif13_ep: endpoint {
1113 1035 remote-endpoint = <&xbar_admaif13_ep>;
1114 1036 };
1115 }; 1037 };
1116 1038
1117 admai 1039 admaif14_port: port@e {
1118 1040 reg = <0xe>;
1119 1041
1120 1042 admaif14_ep: endpoint {
1121 1043 remote-endpoint = <&xbar_admaif14_ep>;
1122 1044 };
1123 }; 1045 };
1124 1046
1125 admai 1047 admaif15_port: port@f {
1126 1048 reg = <0xf>;
1127 1049
1128 1050 admaif15_ep: endpoint {
1129 1051 remote-endpoint = <&xbar_admaif15_ep>;
1130 1052 };
1131 }; 1053 };
1132 1054
1133 admai 1055 admaif16_port: port@10 {
1134 1056 reg = <0x10>;
1135 1057
1136 1058 admaif16_ep: endpoint {
1137 1059 remote-endpoint = <&xbar_admaif16_ep>;
1138 1060 };
1139 }; 1061 };
1140 1062
1141 admai 1063 admaif17_port: port@11 {
1142 1064 reg = <0x11>;
1143 1065
1144 1066 admaif17_ep: endpoint {
1145 1067 remote-endpoint = <&xbar_admaif17_ep>;
1146 1068 };
1147 }; 1069 };
1148 1070
1149 admai 1071 admaif18_port: port@12 {
1150 1072 reg = <0x12>;
1151 1073
1152 1074 admaif18_ep: endpoint {
1153 1075 remote-endpoint = <&xbar_admaif18_ep>;
1154 1076 };
1155 }; 1077 };
1156 1078
1157 admai 1079 admaif19_port: port@13 {
1158 1080 reg = <0x13>;
1159 1081
1160 1082 admaif19_ep: endpoint {
1161 1083 remote-endpoint = <&xbar_admaif19_ep>;
1162 1084 };
1163 }; 1085 };
1164 }; 1086 };
1165 }; 1087 };
1166 1088
1167 asrc@2910000 { !! 1089 i2s@2901000 {
1168 status = "oka 1090 status = "okay";
1169 1091
1170 ports { 1092 ports {
1171 #addr 1093 #address-cells = <1>;
1172 #size 1094 #size-cells = <0>;
1173 1095
1174 port@ 1096 port@0 {
1175 !! 1097 reg = <0>;
1176 1098
1177 !! 1099 i2s1_cif_ep: endpoint {
1178 !! 1100 remote-endpoint = <&xbar_i2s1_ep>;
1179 1101 };
1180 }; 1102 };
1181 1103
1182 port@ !! 1104 i2s1_port: port@1 {
1183 !! 1105 reg = <1>;
1184 1106
1185 !! 1107 i2s1_dap_ep: endpoint {
1186 !! 1108 dai-format = "i2s";
>> 1109 /* Placeholder for external Codec */
1187 1110 };
1188 }; 1111 };
>> 1112 };
>> 1113 };
1189 1114
1190 port@ !! 1115 i2s@2901100 {
1191 !! 1116 status = "okay";
1192 1117
1193 !! 1118 ports {
1194 !! 1119 #address-cells = <1>;
1195 !! 1120 #size-cells = <0>;
1196 }; <<
1197 1121
1198 port@ !! 1122 port@0 {
1199 !! 1123 reg = <0>;
1200 1124
1201 !! 1125 i2s2_cif_ep: endpoint {
1202 !! 1126 remote-endpoint = <&xbar_i2s2_ep>;
1203 1127 };
1204 }; 1128 };
1205 1129
1206 port@ !! 1130 i2s2_port: port@1 {
1207 !! 1131 reg = <1>;
1208 1132
1209 !! 1133 i2s2_dap_ep: endpoint {
1210 !! 1134 dai-format = "i2s";
>> 1135 /* Placeholder for external Codec */
1211 1136 };
1212 }; 1137 };
>> 1138 };
>> 1139 };
1213 1140
1214 port@ !! 1141 i2s@2901200 {
1215 !! 1142 status = "okay";
1216 1143
1217 !! 1144 ports {
1218 !! 1145 #address-cells = <1>;
1219 !! 1146 #size-cells = <0>;
1220 }; <<
1221 1147
1222 port@ !! 1148 port@0 {
1223 !! 1149 reg = <0>;
1224 1150
1225 !! 1151 i2s3_cif_ep: endpoint {
1226 !! 1152 remote-endpoint = <&xbar_i2s3_ep>;
1227 1153 };
1228 }; 1154 };
1229 1155
1230 asrc_ !! 1156 i2s3_port: port@1 {
1231 !! 1157 reg = <1>;
1232 1158
1233 !! 1159 i2s3_dap_ep: endpoint {
1234 !! 1160 dai-format = "i2s";
>> 1161 /* Placeholder for external Codec */
1235 1162 };
1236 }; 1163 };
>> 1164 };
>> 1165 };
1237 1166
1238 asrc_ !! 1167 i2s@2901300 {
1239 !! 1168 status = "okay";
1240 1169
1241 !! 1170 ports {
1242 !! 1171 #address-cells = <1>;
1243 !! 1172 #size-cells = <0>;
1244 }; <<
1245 1173
1246 asrc_ !! 1174 port@0 {
1247 !! 1175 reg = <0>;
1248 1176
1249 !! 1177 i2s4_cif_ep: endpoint {
1250 !! 1178 remote-endpoint = <&xbar_i2s4_ep>;
1251 1179 };
1252 }; 1180 };
1253 1181
1254 asrc_ !! 1182 i2s4_port: port@1 {
1255 !! 1183 reg = <1>;
1256 1184
1257 !! 1185 i2s4_dap_ep: endpoint {
1258 !! 1186 dai-format = "i2s";
>> 1187 /* Placeholder for external Codec */
1259 1188 };
1260 }; 1189 };
>> 1190 };
>> 1191 };
1261 1192
1262 asrc_ !! 1193 i2s@2901400 {
1263 !! 1194 status = "okay";
1264 1195
1265 !! 1196 ports {
1266 !! 1197 #address-cells = <1>;
>> 1198 #size-cells = <0>;
>> 1199
>> 1200 port@0 {
>> 1201 reg = <0>;
>> 1202
>> 1203 i2s5_cif_ep: endpoint {
>> 1204 remote-endpoint = <&xbar_i2s5_ep>;
1267 1205 };
1268 }; 1206 };
1269 1207
1270 asrc_ !! 1208 i2s5_port: port@1 {
1271 !! 1209 reg = <1>;
1272 1210
1273 !! 1211 i2s5_dap_ep: endpoint {
1274 !! 1212 dai-format = "i2s";
>> 1213 /* Placeholder for external Codec */
1275 1214 };
1276 }; 1215 };
1277 }; 1216 };
1278 }; 1217 };
1279 1218
1280 ports { !! 1219 i2s@2901500 {
1281 #address-cell !! 1220 status = "okay";
1282 #size-cells = <<
1283 1221
1284 port@0 { !! 1222 ports {
1285 reg = !! 1223 #address-cells = <1>;
>> 1224 #size-cells = <0>;
1286 1225
1287 xbar_ !! 1226 port@0 {
1288 !! 1227 reg = <0>;
>> 1228
>> 1229 i2s6_cif_ep: endpoint {
>> 1230 remote-endpoint = <&xbar_i2s6_ep>;
>> 1231 };
1289 }; 1232 };
1290 }; <<
1291 1233
1292 port@1 { !! 1234 i2s6_port: port@1 {
1293 reg = !! 1235 reg = <1>;
1294 1236
1295 xbar_ !! 1237 i2s6_dap_ep: endpoint {
1296 !! 1238 dai-format = "i2s";
>> 1239 /* Placeholder for external Codec */
>> 1240 };
1297 }; 1241 };
1298 }; 1242 };
>> 1243 };
1299 1244
1300 port@2 { !! 1245 dmic@2904000 {
1301 reg = !! 1246 status = "okay";
1302 1247
1303 xbar_ !! 1248 ports {
1304 !! 1249 #address-cells = <1>;
1305 }; !! 1250 #size-cells = <0>;
1306 }; <<
1307 1251
1308 port@3 { !! 1252 port@0 {
1309 reg = !! 1253 reg = <0>;
1310 1254
1311 xbar_ !! 1255 dmic1_cif_ep: endpoint {
1312 !! 1256 remote-endpoint = <&xbar_dmic1_ep>;
>> 1257 };
1313 }; 1258 };
1314 }; <<
1315 1259
1316 port@4 { !! 1260 dmic1_port: port@1 {
1317 reg = !! 1261 reg = <1>;
1318 1262
1319 xbar_ !! 1263 dmic1_dap_ep: endpoint {
1320 !! 1264 /* Place holder for external Codec */
>> 1265 };
1321 }; 1266 };
1322 }; 1267 };
>> 1268 };
1323 1269
1324 port@5 { !! 1270 dmic@2904100 {
1325 reg = !! 1271 status = "okay";
1326 1272
1327 xbar_ !! 1273 ports {
1328 !! 1274 #address-cells = <1>;
1329 }; !! 1275 #size-cells = <0>;
1330 }; <<
1331 1276
1332 port@6 { !! 1277 port@0 {
1333 reg = !! 1278 reg = <0>;
1334 1279
1335 xbar_ !! 1280 dmic2_cif_ep: endpoint {
1336 !! 1281 remote-endpoint = <&xbar_dmic2_ep>;
>> 1282 };
1337 }; 1283 };
1338 }; <<
1339 1284
1340 port@7 { !! 1285 dmic2_port: port@1 {
1341 reg = !! 1286 reg = <1>;
1342 1287
1343 xbar_ !! 1288 dmic2_dap_ep: endpoint {
1344 !! 1289 /* Place holder for external Codec */
>> 1290 };
1345 }; 1291 };
1346 }; 1292 };
>> 1293 };
1347 1294
1348 port@8 { !! 1295 dmic@2904200 {
1349 reg = !! 1296 status = "okay";
1350 1297
1351 xbar_ !! 1298 ports {
1352 !! 1299 #address-cells = <1>;
1353 }; !! 1300 #size-cells = <0>;
1354 }; <<
1355 1301
1356 port@9 { !! 1302 port@0 {
1357 reg = !! 1303 reg = <0>;
1358 1304
1359 xbar_ !! 1305 dmic3_cif_ep: endpoint {
1360 !! 1306 remote-endpoint = <&xbar_dmic3_ep>;
>> 1307 };
1361 }; 1308 };
1362 }; <<
1363 1309
1364 port@a { !! 1310 dmic3_port: port@1 {
1365 reg = !! 1311 reg = <1>;
1366 1312
1367 xbar_ !! 1313 dmic3_dap_ep: endpoint {
1368 !! 1314 /* Place holder for external Codec */
>> 1315 };
1369 }; 1316 };
1370 }; 1317 };
>> 1318 };
1371 1319
1372 port@b { !! 1320 dspk@2905000 {
1373 reg = !! 1321 status = "okay";
1374 1322
1375 xbar_ !! 1323 ports {
1376 !! 1324 #address-cells = <1>;
1377 }; !! 1325 #size-cells = <0>;
1378 }; <<
1379 1326
1380 port@c { !! 1327 port@0 {
1381 reg = !! 1328 reg = <0>;
1382 1329
1383 xbar_ !! 1330 dspk1_cif_ep: endpoint {
1384 !! 1331 remote-endpoint = <&xbar_dspk1_ep>;
>> 1332 };
1385 }; 1333 };
1386 }; <<
1387 1334
1388 port@d { !! 1335 dspk1_port: port@1 {
1389 reg = !! 1336 reg = <1>;
1390 1337
1391 xbar_ !! 1338 dspk1_dap_ep: endpoint {
1392 !! 1339 /* Place holder for external Codec */
>> 1340 };
1393 }; 1341 };
1394 }; 1342 };
>> 1343 };
1395 1344
1396 port@e { !! 1345 dspk@2905100 {
1397 reg = !! 1346 status = "okay";
1398 1347
1399 xbar_ !! 1348 ports {
1400 !! 1349 #address-cells = <1>;
1401 }; !! 1350 #size-cells = <0>;
1402 }; <<
1403 1351
1404 port@f { !! 1352 port@0 {
1405 reg = !! 1353 reg = <0>;
1406 1354
1407 xbar_ !! 1355 dspk2_cif_ep: endpoint {
1408 !! 1356 remote-endpoint = <&xbar_dspk2_ep>;
>> 1357 };
1409 }; 1358 };
1410 }; <<
1411 1359
1412 port@10 { !! 1360 dspk2_port: port@1 {
1413 reg = !! 1361 reg = <1>;
1414 1362
1415 xbar_ !! 1363 dspk2_dap_ep: endpoint {
1416 !! 1364 /* Place holder for external Codec */
>> 1365 };
1417 }; 1366 };
1418 }; 1367 };
>> 1368 };
1419 1369
1420 port@11 { !! 1370 sfc@2902000 {
1421 reg = !! 1371 status = "okay";
1422 1372
1423 xbar_ !! 1373 ports {
1424 !! 1374 #address-cells = <1>;
1425 }; !! 1375 #size-cells = <0>;
1426 }; <<
1427 1376
1428 port@12 { !! 1377 port@0 {
1429 reg = !! 1378 reg = <0>;
1430 1379
1431 xbar_ !! 1380 sfc1_cif_in_ep: endpoint {
1432 !! 1381 remote-endpoint = <&xbar_sfc1_in_ep>;
>> 1382 convert-rate = <44100>;
>> 1383 };
1433 }; 1384 };
1434 }; <<
1435 1385
1436 port@13 { !! 1386 sfc1_out_port: port@1 {
1437 reg = !! 1387 reg = <1>;
1438 1388
1439 xbar_ !! 1389 sfc1_cif_out_ep: endpoint {
1440 !! 1390 remote-endpoint = <&xbar_sfc1_out_ep>;
>> 1391 convert-rate = <48000>;
>> 1392 };
1441 }; 1393 };
1442 }; 1394 };
>> 1395 };
1443 1396
1444 xbar_i2s1_por !! 1397 sfc@2902200 {
1445 reg = !! 1398 status = "okay";
1446 1399
1447 xbar_ !! 1400 ports {
1448 !! 1401 #address-cells = <1>;
1449 }; !! 1402 #size-cells = <0>;
1450 }; <<
1451 1403
1452 xbar_i2s2_por !! 1404 port@0 {
1453 reg = !! 1405 reg = <0>;
1454 1406
1455 xbar_ !! 1407 sfc2_cif_in_ep: endpoint {
1456 !! 1408 remote-endpoint = <&xbar_sfc2_in_ep>;
>> 1409 };
1457 }; 1410 };
1458 }; <<
1459 1411
1460 xbar_i2s3_por !! 1412 sfc2_out_port: port@1 {
1461 reg = !! 1413 reg = <1>;
1462 1414
1463 xbar_ !! 1415 sfc2_cif_out_ep: endpoint {
1464 !! 1416 remote-endpoint = <&xbar_sfc2_out_ep>;
>> 1417 };
1465 }; 1418 };
1466 }; 1419 };
>> 1420 };
1467 1421
1468 xbar_i2s4_por !! 1422 sfc@2902400 {
1469 reg = !! 1423 status = "okay";
1470 1424
1471 xbar_ !! 1425 ports {
1472 !! 1426 #address-cells = <1>;
1473 }; !! 1427 #size-cells = <0>;
1474 }; <<
1475 1428
1476 xbar_i2s5_por !! 1429 port@0 {
1477 reg = !! 1430 reg = <0>;
1478 1431
1479 xbar_ !! 1432 sfc3_cif_in_ep: endpoint {
1480 !! 1433 remote-endpoint = <&xbar_sfc3_in_ep>;
>> 1434 };
1481 }; 1435 };
1482 }; <<
1483 1436
1484 xbar_i2s6_por !! 1437 sfc3_out_port: port@1 {
1485 reg = !! 1438 reg = <1>;
1486 1439
1487 xbar_ !! 1440 sfc3_cif_out_ep: endpoint {
1488 !! 1441 remote-endpoint = <&xbar_sfc3_out_ep>;
>> 1442 };
1489 }; 1443 };
1490 }; 1444 };
>> 1445 };
1491 1446
1492 xbar_dmic1_po !! 1447 sfc@2902600 {
1493 reg = !! 1448 status = "okay";
1494 1449
1495 xbar_ !! 1450 ports {
1496 !! 1451 #address-cells = <1>;
1497 }; !! 1452 #size-cells = <0>;
1498 }; <<
1499 1453
1500 xbar_dmic2_po !! 1454 port@0 {
1501 reg = !! 1455 reg = <0>;
1502 1456
1503 xbar_ !! 1457 sfc4_cif_in_ep: endpoint {
1504 !! 1458 remote-endpoint = <&xbar_sfc4_in_ep>;
>> 1459 };
1505 }; 1460 };
1506 }; <<
1507 1461
1508 xbar_dmic3_po !! 1462 sfc4_out_port: port@1 {
1509 reg = !! 1463 reg = <1>;
1510 1464
1511 xbar_ !! 1465 sfc4_cif_out_ep: endpoint {
1512 !! 1466 remote-endpoint = <&xbar_sfc4_out_ep>;
>> 1467 };
1513 }; 1468 };
1514 }; 1469 };
>> 1470 };
1515 1471
1516 xbar_dspk1_po !! 1472 mvc@290a000 {
1517 reg = !! 1473 status = "okay";
1518 1474
1519 xbar_ !! 1475 ports {
1520 !! 1476 #address-cells = <1>;
1521 }; !! 1477 #size-cells = <0>;
1522 }; <<
1523 1478
1524 xbar_dspk2_po !! 1479 port@0 {
1525 reg = !! 1480 reg = <0>;
1526 1481
1527 xbar_ !! 1482 mvc1_cif_in_ep: endpoint {
1528 !! 1483 remote-endpoint = <&xbar_mvc1_in_ep>;
>> 1484 };
1529 }; 1485 };
1530 }; <<
1531 1486
1532 xbar_sfc1_in_ !! 1487 mvc1_out_port: port@1 {
1533 reg = !! 1488 reg = <1>;
1534 1489
1535 xbar_ !! 1490 mvc1_cif_out_ep: endpoint {
1536 !! 1491 remote-endpoint = <&xbar_mvc1_out_ep>;
>> 1492 };
1537 }; 1493 };
1538 }; 1494 };
>> 1495 };
1539 1496
1540 port@21 { !! 1497 mvc@290a200 {
1541 reg = !! 1498 status = "okay";
1542 1499
1543 xbar_ !! 1500 ports {
1544 !! 1501 #address-cells = <1>;
1545 }; !! 1502 #size-cells = <0>;
1546 }; <<
1547 1503
1548 xbar_sfc2_in_ !! 1504 port@0 {
1549 reg = !! 1505 reg = <0>;
1550 1506
1551 xbar_ !! 1507 mvc2_cif_in_ep: endpoint {
1552 !! 1508 remote-endpoint = <&xbar_mvc2_in_ep>;
>> 1509 };
1553 }; 1510 };
1554 }; <<
1555 1511
1556 port@23 { !! 1512 mvc2_out_port: port@1 {
1557 reg = !! 1513 reg = <1>;
1558 1514
1559 xbar_ !! 1515 mvc2_cif_out_ep: endpoint {
1560 !! 1516 remote-endpoint = <&xbar_mvc2_out_ep>;
>> 1517 };
1561 }; 1518 };
1562 }; 1519 };
>> 1520 };
1563 1521
1564 xbar_sfc3_in_ !! 1522 amx@2903000 {
1565 reg = !! 1523 status = "okay";
1566 1524
1567 xbar_ !! 1525 ports {
1568 !! 1526 #address-cells = <1>;
1569 }; !! 1527 #size-cells = <0>;
1570 }; <<
1571 1528
1572 port@25 { !! 1529 port@0 {
1573 reg = !! 1530 reg = <0>;
1574 1531
1575 xbar_ !! 1532 amx1_in1_ep: endpoint {
1576 !! 1533 remote-endpoint = <&xbar_amx1_in1_ep>;
>> 1534 };
1577 }; 1535 };
1578 }; <<
1579 1536
1580 xbar_sfc4_in_ !! 1537 port@1 {
1581 reg = !! 1538 reg = <1>;
1582 1539
1583 xbar_ !! 1540 amx1_in2_ep: endpoint {
1584 !! 1541 remote-endpoint = <&xbar_amx1_in2_ep>;
>> 1542 };
1585 }; 1543 };
1586 }; <<
1587 1544
1588 port@27 { !! 1545 port@2 {
1589 reg = !! 1546 reg = <2>;
1590 1547
1591 xbar_ !! 1548 amx1_in3_ep: endpoint {
1592 !! 1549 remote-endpoint = <&xbar_amx1_in3_ep>;
>> 1550 };
1593 }; 1551 };
1594 }; <<
1595 1552
1596 xbar_mvc1_in_ !! 1553 port@3 {
1597 reg = !! 1554 reg = <3>;
1598 1555
1599 xbar_ !! 1556 amx1_in4_ep: endpoint {
1600 !! 1557 remote-endpoint = <&xbar_amx1_in4_ep>;
>> 1558 };
1601 }; 1559 };
1602 }; <<
1603 1560
1604 port@29 { !! 1561 amx1_out_port: port@4 {
1605 reg = !! 1562 reg = <4>;
1606 1563
1607 xbar_ !! 1564 amx1_out_ep: endpoint {
1608 !! 1565 remote-endpoint = <&xbar_amx1_out_ep>;
>> 1566 };
1609 }; 1567 };
1610 }; 1568 };
>> 1569 };
1611 1570
1612 xbar_mvc2_in_ !! 1571 amx@2903100 {
1613 reg = !! 1572 status = "okay";
1614 1573
1615 xbar_ !! 1574 ports {
1616 !! 1575 #address-cells = <1>;
1617 }; !! 1576 #size-cells = <0>;
1618 }; <<
1619 1577
1620 port@2b { !! 1578 port@0 {
1621 reg = !! 1579 reg = <0>;
1622 1580
1623 xbar_ !! 1581 amx2_in1_ep: endpoint {
1624 !! 1582 remote-endpoint = <&xbar_amx2_in1_ep>;
>> 1583 };
1625 }; 1584 };
1626 }; <<
1627 1585
1628 xbar_amx1_in1 !! 1586 port@1 {
1629 reg = !! 1587 reg = <1>;
1630 1588
1631 xbar_ !! 1589 amx2_in2_ep: endpoint {
1632 !! 1590 remote-endpoint = <&xbar_amx2_in2_ep>;
>> 1591 };
1633 }; 1592 };
1634 }; <<
1635 1593
1636 xbar_amx1_in2 !! 1594 amx2_in3_port: port@2 {
1637 reg = !! 1595 reg = <2>;
1638 1596
1639 xbar_ !! 1597 amx2_in3_ep: endpoint {
1640 !! 1598 remote-endpoint = <&xbar_amx2_in3_ep>;
>> 1599 };
1641 }; 1600 };
1642 }; <<
1643 1601
1644 xbar_amx1_in3 !! 1602 amx2_in4_port: port@3 {
1645 reg = !! 1603 reg = <3>;
1646 1604
1647 xbar_ !! 1605 amx2_in4_ep: endpoint {
1648 !! 1606 remote-endpoint = <&xbar_amx2_in4_ep>;
>> 1607 };
1649 }; 1608 };
1650 }; <<
1651 1609
1652 xbar_amx1_in4 !! 1610 amx2_out_port: port@4 {
1653 reg = !! 1611 reg = <4>;
1654 1612
1655 xbar_ !! 1613 amx2_out_ep: endpoint {
1656 !! 1614 remote-endpoint = <&xbar_amx2_out_ep>;
>> 1615 };
1657 }; 1616 };
1658 }; 1617 };
>> 1618 };
1659 1619
1660 port@30 { !! 1620 amx@2903200 {
1661 reg = !! 1621 status = "okay";
1662 1622
1663 xbar_ !! 1623 ports {
1664 !! 1624 #address-cells = <1>;
1665 }; !! 1625 #size-cells = <0>;
1666 }; <<
1667 1626
1668 xbar_amx2_in1 !! 1627 port@0 {
1669 reg = !! 1628 reg = <0>;
1670 1629
1671 xbar_ !! 1630 amx3_in1_ep: endpoint {
1672 !! 1631 remote-endpoint = <&xbar_amx3_in1_ep>;
>> 1632 };
1673 }; 1633 };
1674 }; <<
1675 1634
1676 xbar_amx2_in2 !! 1635 port@1 {
1677 reg = !! 1636 reg = <1>;
1678 1637
1679 xbar_ !! 1638 amx3_in2_ep: endpoint {
1680 !! 1639 remote-endpoint = <&xbar_amx3_in2_ep>;
>> 1640 };
1681 }; 1641 };
1682 }; <<
1683 1642
1684 xbar_amx2_in3 !! 1643 port@2 {
1685 reg = !! 1644 reg = <2>;
1686 1645
1687 xbar_ !! 1646 amx3_in3_ep: endpoint {
1688 !! 1647 remote-endpoint = <&xbar_amx3_in3_ep>;
>> 1648 };
1689 }; 1649 };
1690 }; <<
1691 1650
1692 xbar_amx2_in4 !! 1651 port@3 {
1693 reg = !! 1652 reg = <3>;
1694 1653
1695 xbar_ !! 1654 amx3_in4_ep: endpoint {
1696 !! 1655 remote-endpoint = <&xbar_amx3_in4_ep>;
>> 1656 };
1697 }; 1657 };
1698 }; <<
1699 1658
1700 port@35 { !! 1659 amx3_out_port: port@4 {
1701 reg = !! 1660 reg = <4>;
1702 1661
1703 xbar_ !! 1662 amx3_out_ep: endpoint {
1704 !! 1663 remote-endpoint = <&xbar_amx3_out_ep>;
>> 1664 };
1705 }; 1665 };
1706 }; 1666 };
>> 1667 };
1707 1668
1708 xbar_amx3_in1 !! 1669 amx@2903300 {
1709 reg = !! 1670 status = "okay";
1710 1671
1711 xbar_ !! 1672 ports {
1712 !! 1673 #address-cells = <1>;
1713 }; !! 1674 #size-cells = <0>;
1714 }; <<
1715 1675
1716 xbar_amx3_in2 !! 1676 port@0 {
1717 reg = !! 1677 reg = <0>;
1718 1678
1719 xbar_ !! 1679 amx4_in1_ep: endpoint {
1720 !! 1680 remote-endpoint = <&xbar_amx4_in1_ep>;
>> 1681 };
1721 }; 1682 };
1722 }; <<
1723 1683
1724 xbar_amx3_in3 !! 1684 port@1 {
1725 reg = !! 1685 reg = <1>;
1726 1686
1727 xbar_ !! 1687 amx4_in2_ep: endpoint {
1728 !! 1688 remote-endpoint = <&xbar_amx4_in2_ep>;
>> 1689 };
1729 }; 1690 };
1730 }; <<
1731 1691
1732 xbar_amx3_in4 !! 1692 port@2 {
1733 reg = !! 1693 reg = <2>;
1734 1694
1735 xbar_ !! 1695 amx4_in3_ep: endpoint {
1736 !! 1696 remote-endpoint = <&xbar_amx4_in3_ep>;
>> 1697 };
1737 }; 1698 };
1738 }; <<
1739 1699
1740 port@3a { !! 1700 port@3 {
1741 reg = !! 1701 reg = <3>;
1742 1702
1743 xbar_ !! 1703 amx4_in4_ep: endpoint {
1744 !! 1704 remote-endpoint = <&xbar_amx4_in4_ep>;
>> 1705 };
1745 }; 1706 };
1746 }; <<
1747 1707
1748 xbar_amx4_in1 !! 1708 amx4_out_port: port@4 {
1749 reg = !! 1709 reg = <4>;
1750 1710
1751 xbar_ !! 1711 amx4_out_ep: endpoint {
1752 !! 1712 remote-endpoint = <&xbar_amx4_out_ep>;
>> 1713 };
1753 }; 1714 };
1754 }; 1715 };
>> 1716 };
1755 1717
1756 xbar_amx4_in2 !! 1718 adx@2903800 {
1757 reg = !! 1719 status = "okay";
1758 1720
1759 xbar_ !! 1721 ports {
1760 !! 1722 #address-cells = <1>;
1761 }; !! 1723 #size-cells = <0>;
1762 }; <<
1763 1724
1764 xbar_amx4_in3 !! 1725 port@0 {
1765 reg = !! 1726 reg = <0>;
1766 1727
1767 xbar_ !! 1728 adx1_in_ep: endpoint {
1768 !! 1729 remote-endpoint = <&xbar_adx1_in_ep>;
>> 1730 };
1769 }; 1731 };
1770 }; <<
1771 1732
1772 xbar_amx4_in4 !! 1733 adx1_out1_port: port@1 {
1773 reg = !! 1734 reg = <1>;
1774 1735
1775 xbar_ !! 1736 adx1_out1_ep: endpoint {
1776 !! 1737 remote-endpoint = <&xbar_adx1_out1_ep>;
>> 1738 };
1777 }; 1739 };
1778 }; <<
1779 1740
1780 port@3f { !! 1741 adx1_out2_port: port@2 {
1781 reg = !! 1742 reg = <2>;
1782 1743
1783 xbar_ !! 1744 adx1_out2_ep: endpoint {
1784 !! 1745 remote-endpoint = <&xbar_adx1_out2_ep>;
>> 1746 };
1785 }; 1747 };
1786 }; <<
1787 1748
1788 xbar_adx1_in_ !! 1749 adx1_out3_port: port@3 {
1789 reg = !! 1750 reg = <3>;
1790 1751
1791 xbar_ !! 1752 adx1_out3_ep: endpoint {
1792 !! 1753 remote-endpoint = <&xbar_adx1_out3_ep>;
>> 1754 };
1793 }; 1755 };
1794 }; <<
1795 1756
1796 port@41 { !! 1757 adx1_out4_port: port@4 {
1797 reg = !! 1758 reg = <4>;
1798 1759
1799 xbar_ !! 1760 adx1_out4_ep: endpoint {
1800 !! 1761 remote-endpoint = <&xbar_adx1_out4_ep>;
>> 1762 };
1801 }; 1763 };
1802 }; 1764 };
>> 1765 };
1803 1766
1804 port@42 { !! 1767 adx@2903900 {
1805 reg = !! 1768 status = "okay";
1806 1769
1807 xbar_ !! 1770 ports {
1808 !! 1771 #address-cells = <1>;
1809 }; !! 1772 #size-cells = <0>;
1810 }; <<
1811 1773
1812 port@43 { !! 1774 port@0 {
1813 reg = !! 1775 reg = <0>;
1814 1776
1815 xbar_ !! 1777 adx2_in_ep: endpoint {
1816 !! 1778 remote-endpoint = <&xbar_adx2_in_ep>;
>> 1779 };
1817 }; 1780 };
1818 }; <<
1819 1781
1820 port@44 { !! 1782 adx2_out1_port: port@1 {
1821 reg = !! 1783 reg = <1>;
1822 1784
1823 xbar_ !! 1785 adx2_out1_ep: endpoint {
1824 !! 1786 remote-endpoint = <&xbar_adx2_out1_ep>;
>> 1787 };
1825 }; 1788 };
1826 }; <<
1827 1789
1828 xbar_adx2_in_ !! 1790 adx2_out2_port: port@2 {
1829 reg = !! 1791 reg = <2>;
1830 1792
1831 xbar_ !! 1793 adx2_out2_ep: endpoint {
1832 !! 1794 remote-endpoint = <&xbar_adx2_out2_ep>;
>> 1795 };
1833 }; 1796 };
1834 }; <<
1835 1797
1836 port@46 { !! 1798 adx2_out3_port: port@3 {
1837 reg = !! 1799 reg = <3>;
1838 1800
1839 xbar_ !! 1801 adx2_out3_ep: endpoint {
1840 !! 1802 remote-endpoint = <&xbar_adx2_out3_ep>;
>> 1803 };
1841 }; 1804 };
1842 }; <<
1843 1805
1844 port@47 { !! 1806 adx2_out4_port: port@4 {
1845 reg = !! 1807 reg = <4>;
1846 1808
1847 xbar_ !! 1809 adx2_out4_ep: endpoint {
1848 !! 1810 remote-endpoint = <&xbar_adx2_out4_ep>;
>> 1811 };
1849 }; 1812 };
1850 }; 1813 };
>> 1814 };
1851 1815
1852 port@48 { !! 1816 adx@2903a00 {
1853 reg = !! 1817 status = "okay";
1854 1818
1855 xbar_ !! 1819 ports {
1856 !! 1820 #address-cells = <1>;
1857 }; !! 1821 #size-cells = <0>;
1858 }; <<
1859 1822
1860 port@49 { !! 1823 port@0 {
1861 reg = !! 1824 reg = <0>;
1862 1825
1863 xbar_ !! 1826 adx3_in_ep: endpoint {
1864 !! 1827 remote-endpoint = <&xbar_adx3_in_ep>;
>> 1828 };
1865 }; 1829 };
1866 }; <<
1867 1830
1868 xbar_adx3_in_ !! 1831 adx3_out1_port: port@1 {
1869 reg = !! 1832 reg = <1>;
1870 1833
1871 xbar_ !! 1834 adx3_out1_ep: endpoint {
1872 !! 1835 remote-endpoint = <&xbar_adx3_out1_ep>;
>> 1836 };
1873 }; 1837 };
1874 }; <<
1875 1838
1876 port@4b { !! 1839 adx3_out2_port: port@2 {
1877 reg = !! 1840 reg = <2>;
1878 1841
1879 xbar_ !! 1842 adx3_out2_ep: endpoint {
1880 !! 1843 remote-endpoint = <&xbar_adx3_out2_ep>;
>> 1844 };
1881 }; 1845 };
1882 }; <<
1883 1846
1884 port@4c { !! 1847 adx3_out3_port: port@3 {
1885 reg = !! 1848 reg = <3>;
1886 1849
1887 xbar_ !! 1850 adx3_out3_ep: endpoint {
1888 !! 1851 remote-endpoint = <&xbar_adx3_out3_ep>;
>> 1852 };
1889 }; 1853 };
1890 }; <<
1891 1854
1892 port@4d { !! 1855 adx3_out4_port: port@4 {
1893 reg = !! 1856 reg = <4>;
1894 1857
1895 xbar_ !! 1858 adx3_out4_ep: endpoint {
1896 !! 1859 remote-endpoint = <&xbar_adx3_out4_ep>;
>> 1860 };
1897 }; 1861 };
1898 }; 1862 };
>> 1863 };
1899 1864
1900 port@4e { !! 1865 adx@2903b00 {
1901 reg = !! 1866 status = "okay";
1902 1867
1903 xbar_ !! 1868 ports {
1904 !! 1869 #address-cells = <1>;
1905 }; !! 1870 #size-cells = <0>;
1906 }; <<
1907 1871
1908 xbar_adx4_in_ !! 1872 port@0 {
1909 reg = !! 1873 reg = <0>;
1910 1874
1911 xbar_ !! 1875 adx4_in_ep: endpoint {
1912 !! 1876 remote-endpoint = <&xbar_adx4_in_ep>;
>> 1877 };
1913 }; 1878 };
1914 }; <<
1915 1879
1916 port@50 { !! 1880 adx4_out1_port: port@1 {
1917 reg = !! 1881 reg = <1>;
1918 1882
1919 xbar_ !! 1883 adx4_out1_ep: endpoint {
1920 !! 1884 remote-endpoint = <&xbar_adx4_out1_ep>;
>> 1885 };
1921 }; 1886 };
1922 }; <<
1923 1887
1924 port@51 { !! 1888 adx4_out2_port: port@2 {
1925 reg = !! 1889 reg = <2>;
1926 1890
1927 xbar_ !! 1891 adx4_out2_ep: endpoint {
1928 !! 1892 remote-endpoint = <&xbar_adx4_out2_ep>;
>> 1893 };
1929 }; 1894 };
1930 }; <<
1931 1895
1932 port@52 { !! 1896 adx4_out3_port: port@3 {
1933 reg = !! 1897 reg = <3>;
1934 1898
1935 xbar_ !! 1899 adx4_out3_ep: endpoint {
1936 !! 1900 remote-endpoint = <&xbar_adx4_out3_ep>;
>> 1901 };
1937 }; 1902 };
1938 }; <<
1939 1903
1940 port@53 { !! 1904 adx4_out4_port: port@4 {
1941 reg = !! 1905 reg = <4>;
1942 1906
1943 xbar_ !! 1907 adx4_out4_ep: endpoint {
1944 !! 1908 remote-endpoint = <&xbar_adx4_out4_ep>;
>> 1909 };
1945 }; 1910 };
1946 }; 1911 };
>> 1912 };
1947 1913
1948 xbar_mixer_in !! 1914 amixer@290bb00 {
1949 reg = !! 1915 status = "okay";
1950 1916
1951 xbar_ !! 1917 ports {
1952 !! 1918 #address-cells = <1>;
1953 }; !! 1919 #size-cells = <0>;
1954 }; <<
1955 1920
1956 xbar_mixer_in !! 1921 port@0 {
1957 reg = !! 1922 reg = <0x0>;
1958 1923
1959 xbar_ !! 1924 mixer_in1_ep: endpoint {
1960 !! 1925 remote-endpoint = <&xbar_mixer_in1_ep>;
>> 1926 };
1961 }; 1927 };
1962 }; <<
1963 1928
1964 xbar_mixer_in !! 1929 port@1 {
1965 reg = !! 1930 reg = <0x1>;
1966 1931
1967 xbar_ !! 1932 mixer_in2_ep: endpoint {
1968 !! 1933 remote-endpoint = <&xbar_mixer_in2_ep>;
>> 1934 };
1969 }; 1935 };
1970 }; <<
1971 1936
1972 xbar_mixer_in !! 1937 port@2 {
1973 reg = !! 1938 reg = <0x2>;
1974 1939
1975 xbar_ !! 1940 mixer_in3_ep: endpoint {
1976 !! 1941 remote-endpoint = <&xbar_mixer_in3_ep>;
>> 1942 };
1977 }; 1943 };
1978 }; <<
1979 1944
1980 xbar_mixer_in !! 1945 port@3 {
1981 reg = !! 1946 reg = <0x3>;
1982 1947
1983 xbar_ !! 1948 mixer_in4_ep: endpoint {
1984 !! 1949 remote-endpoint = <&xbar_mixer_in4_ep>;
>> 1950 };
1985 }; 1951 };
1986 }; <<
1987 1952
1988 xbar_mixer_in !! 1953 port@4 {
1989 reg = !! 1954 reg = <0x4>;
1990 1955
1991 xbar_ !! 1956 mixer_in5_ep: endpoint {
1992 !! 1957 remote-endpoint = <&xbar_mixer_in5_ep>;
>> 1958 };
1993 }; 1959 };
1994 }; <<
1995 1960
1996 xbar_mixer_in !! 1961 port@5 {
1997 reg = !! 1962 reg = <0x5>;
1998 1963
1999 xbar_ !! 1964 mixer_in6_ep: endpoint {
2000 !! 1965 remote-endpoint = <&xbar_mixer_in6_ep>;
>> 1966 };
2001 }; 1967 };
2002 }; <<
2003 1968
2004 xbar_mixer_in !! 1969 port@6 {
2005 reg = !! 1970 reg = <0x6>;
2006 1971
2007 xbar_ !! 1972 mixer_in7_ep: endpoint {
2008 !! 1973 remote-endpoint = <&xbar_mixer_in7_ep>;
>> 1974 };
2009 }; 1975 };
2010 }; <<
2011 1976
2012 xbar_mixer_in !! 1977 port@7 {
2013 reg = !! 1978 reg = <0x7>;
2014 1979
2015 xbar_ !! 1980 mixer_in8_ep: endpoint {
2016 !! 1981 remote-endpoint = <&xbar_mixer_in8_ep>;
>> 1982 };
2017 }; 1983 };
2018 }; <<
2019 1984
2020 xbar_mixer_in !! 1985 port@8 {
2021 reg = !! 1986 reg = <0x8>;
2022 1987
2023 xbar_ !! 1988 mixer_in9_ep: endpoint {
2024 !! 1989 remote-endpoint = <&xbar_mixer_in9_ep>;
>> 1990 };
2025 }; 1991 };
2026 }; <<
2027 1992
2028 port@5e { !! 1993 port@9 {
2029 reg = !! 1994 reg = <0x9>;
2030 1995
2031 xbar_ !! 1996 mixer_in10_ep: endpoint {
2032 !! 1997 remote-endpoint = <&xbar_mixer_in10_ep>;
>> 1998 };
2033 }; 1999 };
2034 }; <<
2035 2000
2036 port@5f { !! 2001 mixer_out1_port: port@a {
2037 reg = !! 2002 reg = <0xa>;
2038 2003
2039 xbar_ !! 2004 mixer_out1_ep: endpoint {
2040 !! 2005 remote-endpoint = <&xbar_mixer_out1_ep>;
>> 2006 };
2041 }; 2007 };
2042 }; <<
2043 2008
2044 port@60 { !! 2009 mixer_out2_port: port@b {
2045 reg = !! 2010 reg = <0xb>;
2046 2011
2047 xbar_ !! 2012 mixer_out2_ep: endpoint {
2048 !! 2013 remote-endpoint = <&xbar_mixer_out2_ep>;
>> 2014 };
2049 }; 2015 };
2050 }; <<
2051 2016
2052 port@61 { !! 2017 mixer_out3_port: port@c {
2053 reg = !! 2018 reg = <0xc>;
2054 2019
2055 xbar_ !! 2020 mixer_out3_ep: endpoint {
2056 !! 2021 remote-endpoint = <&xbar_mixer_out3_ep>;
>> 2022 };
2057 }; 2023 };
2058 }; <<
2059 2024
2060 port@62 { !! 2025 mixer_out4_port: port@d {
2061 reg = !! 2026 reg = <0xd>;
2062 2027
2063 xbar_ !! 2028 mixer_out4_ep: endpoint {
2064 !! 2029 remote-endpoint = <&xbar_mixer_out4_ep>;
>> 2030 };
2065 }; 2031 };
2066 }; <<
2067 2032
2068 xbar_asrc_in1 !! 2033 mixer_out5_port: port@e {
2069 reg = !! 2034 reg = <0xe>;
2070 2035
2071 xbar_ !! 2036 mixer_out5_ep: endpoint {
2072 !! 2037 remote-endpoint = <&xbar_mixer_out5_ep>;
>> 2038 };
2073 }; 2039 };
2074 }; 2040 };
>> 2041 };
2075 2042
2076 port@64 { !! 2043 asrc@2910000 {
2077 reg = !! 2044 status = "okay";
2078 2045
2079 xbar_ !! 2046 ports {
2080 !! 2047 #address-cells = <1>;
2081 }; !! 2048 #size-cells = <0>;
2082 }; <<
2083 2049
2084 xbar_asrc_in2 !! 2050 port@0 {
2085 reg = !! 2051 reg = <0x0>;
2086 2052
2087 xbar_ !! 2053 asrc_in1_ep: endpoint {
2088 !! 2054 remote-endpoint = <&xbar_asrc_in1_ep>;
>> 2055 };
2089 }; 2056 };
2090 }; <<
2091 2057
2092 port@66 { !! 2058 port@1 {
2093 reg = !! 2059 reg = <0x1>;
2094 2060
2095 xbar_ !! 2061 asrc_in2_ep: endpoint {
2096 !! 2062 remote-endpoint = <&xbar_asrc_in2_ep>;
>> 2063 };
2097 }; 2064 };
2098 }; <<
2099 2065
2100 xbar_asrc_in3 !! 2066 port@2 {
2101 reg = !! 2067 reg = <0x2>;
2102 2068
2103 xbar_ !! 2069 asrc_in3_ep: endpoint {
2104 !! 2070 remote-endpoint = <&xbar_asrc_in3_ep>;
>> 2071 };
2105 }; 2072 };
2106 }; <<
2107 2073
2108 port@68 { !! 2074 port@3 {
2109 reg = !! 2075 reg = <0x3>;
2110 2076
2111 xbar_ !! 2077 asrc_in4_ep: endpoint {
2112 !! 2078 remote-endpoint = <&xbar_asrc_in4_ep>;
>> 2079 };
2113 }; 2080 };
2114 }; <<
2115 2081
2116 xbar_asrc_in4 !! 2082 port@4 {
2117 reg = !! 2083 reg = <0x4>;
2118 2084
2119 xbar_ !! 2085 asrc_in5_ep: endpoint {
2120 !! 2086 remote-endpoint = <&xbar_asrc_in5_ep>;
>> 2087 };
2121 }; 2088 };
2122 }; <<
2123 2089
2124 port@6a { !! 2090 port@5 {
2125 reg = !! 2091 reg = <0x5>;
2126 2092
2127 xbar_ !! 2093 asrc_in6_ep: endpoint {
2128 !! 2094 remote-endpoint = <&xbar_asrc_in6_ep>;
>> 2095 };
2129 }; 2096 };
2130 }; <<
2131 2097
2132 xbar_asrc_in5 !! 2098 port@6 {
2133 reg = !! 2099 reg = <0x6>;
2134 2100
2135 xbar_ !! 2101 asrc_in7_ep: endpoint {
2136 !! 2102 remote-endpoint = <&xbar_asrc_in7_ep>;
>> 2103 };
2137 }; 2104 };
2138 }; <<
2139 2105
2140 port@6c { !! 2106 asrc_out1_port: port@7 {
2141 reg = !! 2107 reg = <0x7>;
2142 2108
2143 xbar_ !! 2109 asrc_out1_ep: endpoint {
2144 !! 2110 remote-endpoint = <&xbar_asrc_out1_ep>;
>> 2111 };
2145 }; 2112 };
2146 }; <<
2147 2113
2148 xbar_asrc_in6 !! 2114 asrc_out2_port: port@8 {
2149 reg = !! 2115 reg = <0x8>;
2150 2116
2151 xbar_ !! 2117 asrc_out2_ep: endpoint {
2152 !! 2118 remote-endpoint = <&xbar_asrc_out2_ep>;
>> 2119 };
2153 }; 2120 };
2154 }; <<
2155 2121
2156 port@6e { !! 2122 asrc_out3_port: port@9 {
2157 reg = !! 2123 reg = <0x9>;
2158 2124
2159 xbar_ !! 2125 asrc_out3_ep: endpoint {
2160 !! 2126 remote-endpoint = <&xbar_asrc_out3_ep>;
>> 2127 };
2161 }; 2128 };
2162 }; <<
2163 2129
2164 xbar_asrc_in7 !! 2130 asrc_out4_port: port@a {
2165 reg = !! 2131 reg = <0xa>;
2166 2132
2167 xbar_ !! 2133 asrc_out4_ep: endpoint {
2168 !! 2134 remote-endpoint = <&xbar_asrc_out4_ep>;
>> 2135 };
2169 }; 2136 };
2170 }; <<
2171 2137
2172 xbar_ope1_in_ !! 2138 asrc_out5_port: port@b {
2173 reg = !! 2139 reg = <0xb>;
2174 2140
2175 xbar_ !! 2141 asrc_out5_ep: endpoint {
2176 !! 2142 remote-endpoint = <&xbar_asrc_out5_ep>;
>> 2143 };
2177 }; 2144 };
2178 }; <<
2179 2145
2180 port@71 { !! 2146 asrc_out6_port: port@c {
2181 reg = !! 2147 reg = <0xc>;
2182 2148
2183 xbar_ !! 2149 asrc_out6_ep: endpoint {
2184 !! 2150 remote-endpoint = <&xbar_asrc_out6_ep>;
>> 2151 };
2185 }; 2152 };
2186 }; 2153 };
2187 }; 2154 };
2188 }; 2155 };
2189 <<
2190 dma-controller@2930000 { <<
2191 status = "okay"; <<
2192 }; <<
2193 <<
2194 interrupt-controller@2a40000 <<
2195 status = "okay"; <<
2196 }; <<
2197 }; 2156 };
2198 2157
2199 i2c@3160000 { 2158 i2c@3160000 {
2200 power-monitor@42 { 2159 power-monitor@42 {
2201 compatible = "ti,ina3 2160 compatible = "ti,ina3221";
2202 reg = <0x42>; 2161 reg = <0x42>;
2203 #address-cells = <1>; 2162 #address-cells = <1>;
2204 #size-cells = <0>; 2163 #size-cells = <0>;
2205 2164
2206 input@0 { 2165 input@0 {
2207 reg = <0x0>; 2166 reg = <0x0>;
2208 label = "VDD_ 2167 label = "VDD_MUX";
2209 shunt-resisto 2168 shunt-resistor-micro-ohms = <20000>;
2210 }; 2169 };
2211 2170
2212 input@1 { 2171 input@1 {
2213 reg = <0x1>; 2172 reg = <0x1>;
2214 label = "VDD_ 2173 label = "VDD_5V0_IO_SYS";
2215 shunt-resisto 2174 shunt-resistor-micro-ohms = <5000>;
2216 }; 2175 };
2217 2176
2218 input@2 { 2177 input@2 {
2219 reg = <0x2>; 2178 reg = <0x2>;
2220 label = "VDD_ 2179 label = "VDD_3V3_SYS";
2221 shunt-resisto 2180 shunt-resistor-micro-ohms = <10000>;
2222 }; 2181 };
2223 }; 2182 };
2224 2183
2225 power-monitor@43 { 2184 power-monitor@43 {
2226 compatible = "ti,ina3 2185 compatible = "ti,ina3221";
2227 reg = <0x43>; 2186 reg = <0x43>;
2228 #address-cells = <1>; 2187 #address-cells = <1>;
2229 #size-cells = <0>; 2188 #size-cells = <0>;
2230 2189
2231 input@0 { 2190 input@0 {
2232 reg = <0x0>; 2191 reg = <0x0>;
2233 label = "VDD_ 2192 label = "VDD_3V3_IO_SLP";
2234 shunt-resisto 2193 shunt-resistor-micro-ohms = <10000>;
2235 }; 2194 };
2236 2195
2237 input@1 { 2196 input@1 {
2238 reg = <0x1>; 2197 reg = <0x1>;
2239 label = "VDD_ 2198 label = "VDD_1V8_IO";
2240 shunt-resisto 2199 shunt-resistor-micro-ohms = <10000>;
2241 }; 2200 };
2242 2201
2243 input@2 { 2202 input@2 {
2244 reg = <0x2>; 2203 reg = <0x2>;
2245 label = "VDD_ 2204 label = "VDD_M2_IN";
2246 shunt-resisto 2205 shunt-resistor-micro-ohms = <10000>;
2247 }; 2206 };
2248 }; 2207 };
2249 2208
2250 exp1: gpio@74 { 2209 exp1: gpio@74 {
2251 compatible = "ti,tca9 2210 compatible = "ti,tca9539";
2252 reg = <0x74>; 2211 reg = <0x74>;
2253 2212
2254 interrupt-parent = <& 2213 interrupt-parent = <&gpio>;
2255 interrupts = <TEGRA18 2214 interrupts = <TEGRA186_MAIN_GPIO(Y, 0)
2256 GPIO_AC 2215 GPIO_ACTIVE_LOW>;
2257 2216
2258 #gpio-cells = <2>; 2217 #gpio-cells = <2>;
2259 gpio-controller; 2218 gpio-controller;
2260 2219
2261 vcc-supply = <&vdd_3v 2220 vcc-supply = <&vdd_3v3_sys>;
2262 }; 2221 };
2263 2222
2264 exp2: gpio@77 { 2223 exp2: gpio@77 {
2265 compatible = "ti,tca9 2224 compatible = "ti,tca9539";
2266 reg = <0x77>; 2225 reg = <0x77>;
2267 2226
2268 interrupt-parent = <& 2227 interrupt-parent = <&gpio>;
2269 interrupts = <TEGRA18 2228 interrupts = <TEGRA186_MAIN_GPIO(Y, 6)
2270 GPIO_AC 2229 GPIO_ACTIVE_LOW>;
2271 2230
2272 #gpio-cells = <2>; 2231 #gpio-cells = <2>;
2273 gpio-controller; 2232 gpio-controller;
2274 2233
2275 vcc-supply = <&vdd_1v 2234 vcc-supply = <&vdd_1v8>;
2276 }; 2235 };
2277 }; 2236 };
2278 2237
2279 /* SDMMC1 (SD/MMC) */ 2238 /* SDMMC1 (SD/MMC) */
2280 mmc@3400000 { 2239 mmc@3400000 {
2281 status = "okay"; 2240 status = "okay";
2282 2241
2283 vmmc-supply = <&vdd_sd>; 2242 vmmc-supply = <&vdd_sd>;
2284 }; 2243 };
2285 2244
2286 sata@3507000 { <<
2287 status = "okay"; <<
2288 }; <<
2289 <<
2290 hda@3510000 { 2245 hda@3510000 {
2291 nvidia,model = "NVIDIA Jetson 2246 nvidia,model = "NVIDIA Jetson TX2 HDA";
2292 status = "okay"; 2247 status = "okay";
2293 }; 2248 };
2294 2249
2295 padctl@3520000 { 2250 padctl@3520000 {
2296 status = "okay"; 2251 status = "okay";
2297 2252
2298 avdd-pll-erefeut-supply = <&v 2253 avdd-pll-erefeut-supply = <&vdd_1v8_pll>;
2299 avdd-usb-supply = <&vdd_3v3_s 2254 avdd-usb-supply = <&vdd_3v3_sys>;
2300 vclamp-usb-supply = <&vdd_1v8 2255 vclamp-usb-supply = <&vdd_1v8>;
2301 vddio-hsic-supply = <&gnd>; 2256 vddio-hsic-supply = <&gnd>;
2302 2257
2303 pads { 2258 pads {
2304 usb2 { 2259 usb2 {
2305 status = "oka 2260 status = "okay";
2306 2261
2307 lanes { 2262 lanes {
2308 micro 2263 micro_b: usb2-0 {
2309 2264 nvidia,function = "xusb";
2310 2265 status = "okay";
2311 }; 2266 };
2312 2267
2313 usb2- 2268 usb2-1 {
2314 2269 nvidia,function = "xusb";
2315 2270 status = "okay";
2316 }; 2271 };
2317 2272
2318 usb2- 2273 usb2-2 {
2319 2274 nvidia,function = "xusb";
2320 2275 status = "okay";
2321 }; 2276 };
2322 }; 2277 };
2323 }; 2278 };
2324 2279
2325 usb3 { 2280 usb3 {
2326 status = "oka 2281 status = "okay";
2327 2282
2328 lanes { 2283 lanes {
2329 usb3- 2284 usb3-0 {
2330 2285 nvidia,function = "xusb";
2331 2286 status = "okay";
2332 }; 2287 };
2333 2288
2334 usb3- 2289 usb3-1 {
2335 2290 nvidia,function = "xusb";
2336 2291 status = "okay";
2337 }; 2292 };
2338 2293
2339 usb3- 2294 usb3-2 {
2340 2295 nvidia,function = "xusb";
2341 2296 status = "okay";
2342 }; 2297 };
2343 }; 2298 };
2344 }; 2299 };
2345 }; 2300 };
2346 2301
2347 ports { 2302 ports {
2348 usb2-0 { 2303 usb2-0 {
2349 status = "oka 2304 status = "okay";
2350 mode = "otg"; 2305 mode = "otg";
2351 vbus-supply = 2306 vbus-supply = <&vdd_usb0>;
2352 usb-role-swit 2307 usb-role-switch;
2353 2308
2354 connector { 2309 connector {
2355 compa 2310 compatible = "gpio-usb-b-connector",
2356 2311 "usb-b-connector";
2357 label 2312 label = "micro-USB";
2358 type 2313 type = "micro";
2359 vbus- 2314 vbus-gpios = <&gpio
2360 2315 TEGRA186_MAIN_GPIO(X, 7)
2361 2316 GPIO_ACTIVE_LOW>;
2362 id-gp 2317 id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;
2363 }; 2318 };
2364 }; 2319 };
2365 2320
2366 usb2-1 { 2321 usb2-1 {
2367 status = "oka 2322 status = "okay";
2368 mode = "host" 2323 mode = "host";
2369 2324
2370 vbus-supply = 2325 vbus-supply = <&vdd_usb1>;
2371 }; 2326 };
2372 2327
2373 usb3-0 { 2328 usb3-0 {
2374 nvidia,usb2-c 2329 nvidia,usb2-companion = <1>;
2375 vbus-supply = 2330 vbus-supply = <&vdd_usb1>;
2376 status = "oka 2331 status = "okay";
2377 }; 2332 };
2378 }; 2333 };
2379 }; 2334 };
2380 2335
2381 usb@3530000 { 2336 usb@3530000 {
2382 status = "okay"; 2337 status = "okay";
2383 2338
2384 phys = <&{/padctl@3520000/pads 2339 phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
2385 <&{/padctl@3520000/pads 2340 <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
2386 <&{/padctl@3520000/pads 2341 <&{/padctl@3520000/pads/usb3/lanes/usb3-0}>;
2387 phy-names = "usb2-0", "usb2-1 2342 phy-names = "usb2-0", "usb2-1", "usb3-0";
2388 }; 2343 };
2389 2344
2390 usb@3550000 { 2345 usb@3550000 {
2391 status = "okay"; 2346 status = "okay";
2392 2347
2393 phys = <µ_b>; 2348 phys = <µ_b>;
2394 phy-names = "usb2-0"; 2349 phy-names = "usb2-0";
2395 }; 2350 };
2396 2351
2397 i2c@c250000 { 2352 i2c@c250000 {
2398 /* carrier board ID EEPROM */ 2353 /* carrier board ID EEPROM */
2399 eeprom@57 { 2354 eeprom@57 {
2400 compatible = "atmel,2 2355 compatible = "atmel,24c02";
2401 reg = <0x57>; 2356 reg = <0x57>;
2402 2357
2403 label = "system"; 2358 label = "system";
2404 vcc-supply = <&vdd_1v 2359 vcc-supply = <&vdd_1v8>;
2405 address-width = <8>; 2360 address-width = <8>;
2406 pagesize = <8>; 2361 pagesize = <8>;
2407 size = <256>; 2362 size = <256>;
2408 read-only; 2363 read-only;
2409 }; 2364 };
2410 }; 2365 };
2411 2366
2412 pcie@10003000 { 2367 pcie@10003000 {
2413 status = "okay"; 2368 status = "okay";
2414 2369
2415 dvdd-pex-supply = <&vdd_pex>; 2370 dvdd-pex-supply = <&vdd_pex>;
2416 hvdd-pex-pll-supply = <&vdd_1 2371 hvdd-pex-pll-supply = <&vdd_1v8>;
2417 hvdd-pex-supply = <&vdd_1v8>; 2372 hvdd-pex-supply = <&vdd_1v8>;
2418 vddio-pexctl-aud-supply = <&v 2373 vddio-pexctl-aud-supply = <&vdd_1v8>;
2419 2374
2420 pci@1,0 { 2375 pci@1,0 {
2421 nvidia,num-lanes = <4 2376 nvidia,num-lanes = <4>;
2422 status = "okay"; 2377 status = "okay";
2423 }; 2378 };
2424 2379
2425 pci@2,0 { 2380 pci@2,0 {
2426 nvidia,num-lanes = <0 2381 nvidia,num-lanes = <0>;
2427 status = "disabled"; 2382 status = "disabled";
2428 }; 2383 };
2429 2384
2430 pci@3,0 { 2385 pci@3,0 {
2431 nvidia,num-lanes = <1 2386 nvidia,num-lanes = <1>;
2432 status = "disabled"; 2387 status = "disabled";
2433 }; 2388 };
2434 }; 2389 };
2435 2390
2436 host1x@13e00000 { 2391 host1x@13e00000 {
2437 status = "okay"; 2392 status = "okay";
2438 2393
2439 dpaux@15040000 { 2394 dpaux@15040000 {
2440 status = "okay"; 2395 status = "okay";
2441 }; 2396 };
2442 2397
2443 display-hub@15200000 { 2398 display-hub@15200000 {
2444 status = "okay"; 2399 status = "okay";
2445 }; 2400 };
2446 2401
2447 dsi@15300000 { 2402 dsi@15300000 {
2448 status = "disabled"; 2403 status = "disabled";
2449 }; 2404 };
2450 2405
2451 /* DP on E3320 */ 2406 /* DP on E3320 */
2452 sor@15540000 { 2407 sor@15540000 {
2453 status = "okay"; 2408 status = "okay";
2454 2409
2455 avdd-io-hdmi-dp-suppl 2410 avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
2456 vdd-hdmi-dp-pll-suppl 2411 vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
2457 2412
2458 nvidia,dpaux = <&dpau 2413 nvidia,dpaux = <&dpaux>;
2459 }; 2414 };
2460 2415
2461 sor@15580000 { 2416 sor@15580000 {
2462 status = "okay"; 2417 status = "okay";
2463 2418
2464 avdd-io-hdmi-dp-suppl 2419 avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
2465 vdd-hdmi-dp-pll-suppl 2420 vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
2466 hdmi-supply = <&vdd_h 2421 hdmi-supply = <&vdd_hdmi>;
2467 2422
2468 nvidia,ddc-i2c-bus = 2423 nvidia,ddc-i2c-bus = <&ddc>;
2469 nvidia,hpd-gpio = <&g 2424 nvidia,hpd-gpio = <&gpio TEGRA186_MAIN_GPIO(P, 1)
2470 2425 GPIO_ACTIVE_LOW>;
2471 }; 2426 };
2472 2427
2473 dpaux@155c0000 { 2428 dpaux@155c0000 {
2474 status = "okay"; 2429 status = "okay";
2475 }; 2430 };
2476 }; 2431 };
2477 2432
>> 2433 sata@3507000 {
>> 2434 status = "okay";
>> 2435 };
>> 2436
2478 gpio-keys { 2437 gpio-keys {
2479 compatible = "gpio-keys"; 2438 compatible = "gpio-keys";
2480 2439
2481 key-power { !! 2440 power {
2482 label = "Power"; 2441 label = "Power";
2483 gpios = <&gpio_aon TE 2442 gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 0)
2484 GP 2443 GPIO_ACTIVE_LOW>;
2485 linux,input-type = <E 2444 linux,input-type = <EV_KEY>;
2486 linux,code = <KEY_POW 2445 linux,code = <KEY_POWER>;
2487 debounce-interval = < 2446 debounce-interval = <10>;
2488 wakeup-event-action = 2447 wakeup-event-action = <EV_ACT_ASSERTED>;
2489 wakeup-source; 2448 wakeup-source;
2490 }; 2449 };
2491 2450
2492 key-volume-down { !! 2451 volume-up {
2493 label = "Volume Down" !! 2452 label = "Volume Up";
2494 gpios = <&gpio_aon TE !! 2453 gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 1)
2495 GP 2454 GPIO_ACTIVE_LOW>;
2496 linux,input-type = <E 2455 linux,input-type = <EV_KEY>;
2497 linux,code = <KEY_VOL !! 2456 linux,code = <KEY_VOLUMEUP>;
2498 debounce-interval = < 2457 debounce-interval = <10>;
2499 }; 2458 };
2500 2459
2501 key-volume-up { !! 2460 volume-down {
2502 label = "Volume Up"; !! 2461 label = "Volume Down";
2503 gpios = <&gpio_aon TE !! 2462 gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 2)
2504 GP 2463 GPIO_ACTIVE_LOW>;
2505 linux,input-type = <E 2464 linux,input-type = <EV_KEY>;
2506 linux,code = <KEY_VOL !! 2465 linux,code = <KEY_VOLUMEDOWN>;
2507 debounce-interval = < 2466 debounce-interval = <10>;
2508 }; 2467 };
2509 }; 2468 };
2510 2469
2511 vdd_sd: regulator-vdd-sd { 2470 vdd_sd: regulator-vdd-sd {
2512 compatible = "regulator-fixed 2471 compatible = "regulator-fixed";
2513 regulator-name = "SD_CARD_SW_ 2472 regulator-name = "SD_CARD_SW_PWR";
2514 regulator-min-microvolt = <33 2473 regulator-min-microvolt = <3300000>;
2515 regulator-max-microvolt = <33 2474 regulator-max-microvolt = <3300000>;
2516 2475
2517 gpio = <&gpio TEGRA186_MAIN_G 2476 gpio = <&gpio TEGRA186_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
2518 enable-active-high; 2477 enable-active-high;
2519 2478
2520 vin-supply = <&vdd_3v3_sys>; 2479 vin-supply = <&vdd_3v3_sys>;
2521 }; 2480 };
2522 2481
2523 vdd_hdmi: regulator-vdd-hdmi { 2482 vdd_hdmi: regulator-vdd-hdmi {
2524 compatible = "regulator-fixed 2483 compatible = "regulator-fixed";
2525 regulator-name = "VDD_HDMI_5V 2484 regulator-name = "VDD_HDMI_5V0";
2526 regulator-min-microvolt = <50 2485 regulator-min-microvolt = <5000000>;
2527 regulator-max-microvolt = <50 2486 regulator-max-microvolt = <5000000>;
2528 2487
2529 gpio = <&exp1 14 GPIO_ACTIVE_ 2488 gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
2530 enable-active-high; 2489 enable-active-high;
2531 2490
2532 vin-supply = <&vdd_5v0_sys>; 2491 vin-supply = <&vdd_5v0_sys>;
2533 }; 2492 };
2534 2493
2535 vdd_usb0: regulator-vdd-usb0 { 2494 vdd_usb0: regulator-vdd-usb0 {
2536 compatible = "regulator-fixed 2495 compatible = "regulator-fixed";
2537 regulator-name = "VDD_USB0"; 2496 regulator-name = "VDD_USB0";
2538 regulator-min-microvolt = <50 2497 regulator-min-microvolt = <5000000>;
2539 regulator-max-microvolt = <50 2498 regulator-max-microvolt = <5000000>;
2540 2499
2541 gpio = <&gpio TEGRA186_MAIN_G 2500 gpio = <&gpio TEGRA186_MAIN_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
2542 enable-active-high; 2501 enable-active-high;
2543 2502
2544 vin-supply = <&vdd_5v0_sys>; 2503 vin-supply = <&vdd_5v0_sys>;
2545 }; 2504 };
2546 2505
2547 vdd_usb1: regulator-vdd-usb1 { 2506 vdd_usb1: regulator-vdd-usb1 {
2548 compatible = "regulator-fixed 2507 compatible = "regulator-fixed";
2549 regulator-name = "VDD_USB1"; 2508 regulator-name = "VDD_USB1";
2550 regulator-min-microvolt = <50 2509 regulator-min-microvolt = <5000000>;
2551 regulator-max-microvolt = <50 2510 regulator-max-microvolt = <5000000>;
2552 2511
2553 gpio = <&gpio TEGRA186_MAIN_G 2512 gpio = <&gpio TEGRA186_MAIN_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
2554 enable-active-high; 2513 enable-active-high;
2555 2514
2556 vin-supply = <&vdd_5v0_sys>; 2515 vin-supply = <&vdd_5v0_sys>;
2557 }; 2516 };
2558 2517
2559 sound { 2518 sound {
2560 compatible = "nvidia,tegra186 2519 compatible = "nvidia,tegra186-audio-graph-card";
2561 status = "okay"; 2520 status = "okay";
2562 2521
2563 dais = /* FE */ 2522 dais = /* FE */
2564 <&admaif0_port>, <&adm 2523 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
2565 <&admaif4_port>, <&adm 2524 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
2566 <&admaif8_port>, <&adm 2525 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
2567 <&admaif12_port>, <&ad 2526 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
2568 <&admaif16_port>, <&ad 2527 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
2569 /* Router */ 2528 /* Router */
2570 <&xbar_i2s1_port>, <&x 2529 <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
2571 <&xbar_i2s4_port>, <&x 2530 <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,
2572 <&xbar_dmic1_port>, <& 2531 <&xbar_dmic1_port>, <&xbar_dmic2_port>, <&xbar_dmic3_port>,
2573 <&xbar_dspk1_port>, <& 2532 <&xbar_dspk1_port>, <&xbar_dspk2_port>,
2574 <&xbar_sfc1_in_port>, 2533 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
2575 <&xbar_sfc3_in_port>, 2534 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
2576 <&xbar_mvc1_in_port>, 2535 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
2577 <&xbar_amx1_in1_port>, 2536 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
2578 <&xbar_amx1_in3_port>, 2537 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
2579 <&xbar_amx2_in1_port>, 2538 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
2580 <&xbar_amx2_in3_port>, 2539 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
2581 <&xbar_amx3_in1_port>, 2540 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
2582 <&xbar_amx3_in3_port>, 2541 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
2583 <&xbar_amx4_in1_port>, 2542 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
2584 <&xbar_amx4_in3_port>, 2543 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
2585 <&xbar_adx1_in_port>, 2544 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
2586 <&xbar_adx3_in_port>, 2545 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
2587 <&xbar_mixer_in1_port> 2546 <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
2588 <&xbar_mixer_in3_port> 2547 <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
2589 <&xbar_mixer_in5_port> 2548 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
2590 <&xbar_mixer_in7_port> 2549 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
2591 <&xbar_mixer_in9_port> 2550 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
2592 <&xbar_asrc_in1_port>, 2551 <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
2593 <&xbar_asrc_in3_port>, 2552 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
2594 <&xbar_asrc_in5_port>, 2553 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
2595 <&xbar_asrc_in7_port>, 2554 <&xbar_asrc_in7_port>,
2596 <&xbar_ope1_in_port>, <<
2597 /* HW accelerators */ 2555 /* HW accelerators */
2598 <&sfc1_out_port>, <&sf 2556 <&sfc1_out_port>, <&sfc2_out_port>,
2599 <&sfc3_out_port>, <&sf 2557 <&sfc3_out_port>, <&sfc4_out_port>,
2600 <&mvc1_out_port>, <&mv 2558 <&mvc1_out_port>, <&mvc2_out_port>,
2601 <&amx1_out_port>, <&am 2559 <&amx1_out_port>, <&amx2_out_port>,
2602 <&amx3_out_port>, <&am 2560 <&amx3_out_port>, <&amx4_out_port>,
2603 <&adx1_out1_port>, <&a 2561 <&adx1_out1_port>, <&adx1_out2_port>,
2604 <&adx1_out3_port>, <&a 2562 <&adx1_out3_port>, <&adx1_out4_port>,
2605 <&adx2_out1_port>, <&a 2563 <&adx2_out1_port>, <&adx2_out2_port>,
2606 <&adx2_out3_port>, <&a 2564 <&adx2_out3_port>, <&adx2_out4_port>,
2607 <&adx3_out1_port>, <&a 2565 <&adx3_out1_port>, <&adx3_out2_port>,
2608 <&adx3_out3_port>, <&a 2566 <&adx3_out3_port>, <&adx3_out4_port>,
2609 <&adx4_out1_port>, <&a 2567 <&adx4_out1_port>, <&adx4_out2_port>,
2610 <&adx4_out3_port>, <&a 2568 <&adx4_out3_port>, <&adx4_out4_port>,
2611 <&mixer_out1_port>, <& 2569 <&mixer_out1_port>, <&mixer_out2_port>,
2612 <&mixer_out3_port>, <& 2570 <&mixer_out3_port>, <&mixer_out4_port>,
2613 <&mixer_out5_port>, 2571 <&mixer_out5_port>,
2614 <&asrc_out1_port>, <&a 2572 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>,
2615 <&asrc_out4_port>, <&a 2573 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>,
2616 <&ope1_out_port>, <<
2617 /* I/O */ 2574 /* I/O */
2618 <&i2s1_port>, <&i2s2_p 2575 <&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>,
2619 <&i2s5_port>, <&i2s6_p 2576 <&i2s5_port>, <&i2s6_port>, <&dmic1_port>, <&dmic2_port>,
2620 <&dmic3_port>, <&dspk1 2577 <&dmic3_port>, <&dspk1_port>, <&dspk2_port>;
2621 2578
2622 label = "NVIDIA Jetson TX2 AP 2579 label = "NVIDIA Jetson TX2 APE";
2623 }; 2580 };
2624 }; 2581 };
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