1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra186.dtsi"
3
4 #include <dt-bindings/mfd/max77620.h>
5
6 / {
7 model = "NVIDIA Jetson TX2";
8 compatible = "nvidia,p3310", "nvidia,t
9
10 aliases {
11 ethernet0 = "/ethernet@2490000
12 i2c0 = "/bpmp/i2c";
13 i2c1 = "/i2c@3160000";
14 i2c2 = "/i2c@c240000";
15 i2c3 = "/i2c@3180000";
16 i2c4 = "/i2c@3190000";
17 i2c5 = "/i2c@31c0000";
18 i2c6 = "/i2c@c250000";
19 i2c7 = "/i2c@31e0000";
20 mmc0 = "/mmc@3460000";
21 mmc1 = "/mmc@3400000";
22 serial0 = &uarta;
23 };
24
25 chosen {
26 bootargs = "earlycon console=t
27 stdout-path = "serial0:115200n
28 };
29
30 memory@80000000 {
31 device_type = "memory";
32 reg = <0x0 0x80000000 0x2 0x00
33 };
34
35 ethernet@2490000 {
36 status = "okay";
37
38 phy-reset-gpios = <&gpio TEGRA
39 GPIO_
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
42
43 mdio {
44 #address-cells = <1>;
45 #size-cells = <0>;
46
47 phy: ethernet-phy@0 {
48 compatible = "
49 reg = <0x0>;
50 interrupt-pare
51 interrupts = <
52
53
54 #phy-cells = <
55 };
56 };
57 };
58
59 memory-controller@2c00000 {
60 status = "okay";
61 };
62
63 serial@3100000 {
64 status = "okay";
65 };
66
67 i2c@3160000 {
68 status = "okay";
69
70 power-monitor@40 {
71 compatible = "ti,ina32
72 reg = <0x40>;
73 #address-cells = <1>;
74 #size-cells = <0>;
75
76 input@0 {
77 reg = <0x0>;
78 label = "VDD_S
79 shunt-resistor
80 };
81
82 input@1 {
83 reg = <0x1>;
84 label = "VDD_S
85 shunt-resistor
86 };
87
88 input@2 {
89 reg = <0x2>;
90 label = "VDD_3
91 shunt-resistor
92 };
93 };
94
95 power-monitor@41 {
96 compatible = "ti,ina32
97 reg = <0x41>;
98 #address-cells = <1>;
99 #size-cells = <0>;
100
101 input@0 {
102 reg = <0x0>;
103 label = "VDD_I
104 shunt-resistor
105 };
106
107 input@1 {
108 reg = <0x1>;
109 label = "VDD_S
110 shunt-resistor
111 };
112
113 input@2 {
114 reg = <0x2>;
115 label = "VDD_5
116 shunt-resistor
117 };
118 };
119 };
120
121 i2c@3180000 {
122 status = "okay";
123 };
124
125 ddc: i2c@3190000 {
126 status = "okay";
127 };
128
129 i2c@31c0000 {
130 status = "okay";
131 };
132
133 i2c@31e0000 {
134 status = "okay";
135 };
136
137 /* SDMMC1 (SD/MMC) */
138 mmc@3400000 {
139 cd-gpios = <&gpio TEGRA186_MAI
140 wp-gpios = <&gpio TEGRA186_MAI
141
142 vqmmc-supply = <&vddio_sdmmc1>
143 };
144
145 /* SDMMC3 (SDIO) */
146 mmc@3440000 {
147 status = "okay";
148 vqmmc-supply = <&vddio_sdmmc3>
149 };
150
151 /* SDMMC4 (eMMC) */
152 mmc@3460000 {
153 status = "okay";
154 bus-width = <8>;
155 non-removable;
156
157 vqmmc-supply = <&vdd_1v8_ap>;
158 vmmc-supply = <&vdd_3v3_sys>;
159 };
160
161 hsp@3c00000 {
162 status = "okay";
163 };
164
165 i2c@c240000 {
166 status = "okay";
167 };
168
169 i2c@c250000 {
170 status = "okay";
171
172 /* module ID EEPROM */
173 eeprom@50 {
174 compatible = "atmel,24
175 reg = <0x50>;
176
177 label = "module";
178 vcc-supply = <&vdd_1v8
179 address-width = <8>;
180 pagesize = <8>;
181 size = <256>;
182 read-only;
183 };
184 };
185
186 rtc@c2a0000 {
187 status = "okay";
188 };
189
190 pmc@c360000 {
191 nvidia,invert-interrupt;
192 };
193
194 bpmp {
195 i2c {
196 status = "okay";
197
198 pmic: pmic@3c {
199 compatible = "
200 reg = <0x3c>;
201
202 interrupt-pare
203 interrupts = <
204 #interrupt-cel
205 interrupt-cont
206
207 #gpio-cells =
208 gpio-controlle
209
210 pinctrl-names
211 pinctrl-0 = <&
212
213 fps {
214 fps0 {
215
216
217 };
218
219 fps1 {
220
221
222 };
223
224 fps2 {
225
226
227 };
228 };
229
230 max77620_defau
231 gpio0
232
233
234 };
235
236 gpio1
237
238
239
240 };
241
242 gpio2
243
244
245
246 };
247
248 gpio3
249
250
251
252 };
253
254 gpio4
255
256
257
258 };
259
260 gpio5
261
262
263
264 };
265
266 gpio6
267
268
269
270 };
271
272 gpio7
273
274
275
276 };
277 };
278
279 regulators {
280 in-sd0
281 in-sd1
282 in-sd2
283 in-sd3
284
285 in-ldo
286 in-ldo
287 in-ldo
288 in-ldo
289 in-ldo
290
291 sd0 {
292
293
294
295
296
297 };
298
299 avdd_d
300
301
302
303 };
304
305 vdd_1v
306
307
308
309 };
310
311 vdd_3v
312
313
314
315 };
316
317 vdd_1v
318
319
320
321 };
322
323 ldo2 {
324
325
326
327
328
329 };
330
331 vddio_
332
333
334
335 };
336
337 ldo4 {
338
339
340
341 };
342
343 vddio_
344
345
346
347 };
348
349 vdd_hd
350
351
352
353 };
354
355 vdd_pe
356
357
358
359 };
360 };
361 };
362 };
363 };
364
365 cpus {
366 cpu@0 {
367 enable-method = "psci"
368 };
369
370 cpu@1 {
371 enable-method = "psci"
372 };
373
374 cpu@2 {
375 enable-method = "psci"
376 };
377
378 cpu@3 {
379 enable-method = "psci"
380 };
381
382 cpu@4 {
383 enable-method = "psci"
384 };
385
386 cpu@5 {
387 enable-method = "psci"
388 };
389 };
390
391 psci {
392 compatible = "arm,psci-1.0";
393 status = "okay";
394 method = "smc";
395 };
396
397 gnd: regulator-gnd {
398 compatible = "regulator-fixed"
399 regulator-name = "GND";
400 regulator-min-microvolt = <0>;
401 regulator-max-microvolt = <0>;
402 regulator-always-on;
403 regulator-boot-on;
404 };
405
406 vdd_5v0_sys: regulator-vdd-5v0-sys {
407 compatible = "regulator-fixed"
408 regulator-name = "VDD_5V0_SYS"
409 regulator-min-microvolt = <500
410 regulator-max-microvolt = <500
411 regulator-always-on;
412 regulator-boot-on;
413 };
414
415 vdd_1v8_ap: regulator-vdd-1v8-ap {
416 compatible = "regulator-fixed"
417 regulator-name = "VDD_1V8_AP";
418 regulator-min-microvolt = <180
419 regulator-max-microvolt = <180
420
421 gpio = <&pmic 1 GPIO_ACTIVE_HI
422 enable-active-high;
423
424 vin-supply = <&vdd_1v8>;
425 };
426 };
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