1 // SPDX-License-Identifier: GPL-2.0 <<
2 #include "tegra186.dtsi" 1 #include "tegra186.dtsi"
3 2
4 #include <dt-bindings/mfd/max77620.h> 3 #include <dt-bindings/mfd/max77620.h>
5 4
6 / { 5 / {
7 model = "NVIDIA Jetson TX2"; !! 6 model = "NVIDIA Tegra186 P3310 Processor Module";
8 compatible = "nvidia,p3310", "nvidia,t 7 compatible = "nvidia,p3310", "nvidia,tegra186";
9 8
10 aliases { 9 aliases {
11 ethernet0 = "/ethernet@2490000 !! 10 sdhci0 = "/sdhci@3460000";
>> 11 sdhci1 = "/sdhci@3400000";
>> 12 serial0 = &uarta;
12 i2c0 = "/bpmp/i2c"; 13 i2c0 = "/bpmp/i2c";
13 i2c1 = "/i2c@3160000"; 14 i2c1 = "/i2c@3160000";
14 i2c2 = "/i2c@c240000"; 15 i2c2 = "/i2c@c240000";
15 i2c3 = "/i2c@3180000"; 16 i2c3 = "/i2c@3180000";
16 i2c4 = "/i2c@3190000"; 17 i2c4 = "/i2c@3190000";
17 i2c5 = "/i2c@31c0000"; 18 i2c5 = "/i2c@31c0000";
18 i2c6 = "/i2c@c250000"; 19 i2c6 = "/i2c@c250000";
19 i2c7 = "/i2c@31e0000"; 20 i2c7 = "/i2c@31e0000";
20 mmc0 = "/mmc@3460000"; <<
21 mmc1 = "/mmc@3400000"; <<
22 serial0 = &uarta; <<
23 }; 21 };
24 22
25 chosen { 23 chosen {
26 bootargs = "earlycon console=t !! 24 bootargs = "earlycon console=ttyS0,115200n8";
27 stdout-path = "serial0:115200n 25 stdout-path = "serial0:115200n8";
28 }; 26 };
29 27
30 memory@80000000 { !! 28 memory {
31 device_type = "memory"; 29 device_type = "memory";
32 reg = <0x0 0x80000000 0x2 0x00 30 reg = <0x0 0x80000000 0x2 0x00000000>;
33 }; 31 };
34 32
35 ethernet@2490000 { 33 ethernet@2490000 {
36 status = "okay"; 34 status = "okay";
37 35
38 phy-reset-gpios = <&gpio TEGRA !! 36 phy-reset-gpios = <&gpio TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>;
39 GPIO_ <<
40 phy-handle = <&phy>; 37 phy-handle = <&phy>;
41 phy-mode = "rgmii"; 38 phy-mode = "rgmii";
42 39
43 mdio { 40 mdio {
44 #address-cells = <1>; 41 #address-cells = <1>;
45 #size-cells = <0>; 42 #size-cells = <0>;
46 43
47 phy: ethernet-phy@0 { !! 44 phy: phy@0 {
48 compatible = " 45 compatible = "ethernet-phy-ieee802.3-c22";
49 reg = <0x0>; 46 reg = <0x0>;
50 interrupt-pare 47 interrupt-parent = <&gpio>;
51 interrupts = < !! 48 interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_HIGH>;
52 <<
53 <<
54 #phy-cells = < <<
55 }; 49 };
56 }; 50 };
57 }; 51 };
58 52
59 memory-controller@2c00000 { <<
60 status = "okay"; <<
61 }; <<
62 <<
63 serial@3100000 { 53 serial@3100000 {
64 status = "okay"; 54 status = "okay";
65 }; 55 };
66 56
67 i2c@3160000 { 57 i2c@3160000 {
68 status = "okay"; 58 status = "okay";
69 59
70 power-monitor@40 { 60 power-monitor@40 {
71 compatible = "ti,ina32 61 compatible = "ti,ina3221";
72 reg = <0x40>; 62 reg = <0x40>;
73 #address-cells = <1>; <<
74 #size-cells = <0>; <<
75 <<
76 input@0 { <<
77 reg = <0x0>; <<
78 label = "VDD_S <<
79 shunt-resistor <<
80 }; <<
81 <<
82 input@1 { <<
83 reg = <0x1>; <<
84 label = "VDD_S <<
85 shunt-resistor <<
86 }; <<
87 <<
88 input@2 { <<
89 reg = <0x2>; <<
90 label = "VDD_3 <<
91 shunt-resistor <<
92 }; <<
93 }; 63 };
94 64
95 power-monitor@41 { 65 power-monitor@41 {
96 compatible = "ti,ina32 66 compatible = "ti,ina3221";
97 reg = <0x41>; 67 reg = <0x41>;
98 #address-cells = <1>; <<
99 #size-cells = <0>; <<
100 <<
101 input@0 { <<
102 reg = <0x0>; <<
103 label = "VDD_I <<
104 shunt-resistor <<
105 }; <<
106 <<
107 input@1 { <<
108 reg = <0x1>; <<
109 label = "VDD_S <<
110 shunt-resistor <<
111 }; <<
112 <<
113 input@2 { <<
114 reg = <0x2>; <<
115 label = "VDD_5 <<
116 shunt-resistor <<
117 }; <<
118 }; 68 };
119 }; 69 };
120 70
121 i2c@3180000 { 71 i2c@3180000 {
122 status = "okay"; 72 status = "okay";
123 }; 73 };
124 74
125 ddc: i2c@3190000 { !! 75 i2c@3190000 {
126 status = "okay"; 76 status = "okay";
127 }; 77 };
128 78
129 i2c@31c0000 { 79 i2c@31c0000 {
130 status = "okay"; 80 status = "okay";
131 }; 81 };
132 82
133 i2c@31e0000 { 83 i2c@31e0000 {
134 status = "okay"; 84 status = "okay";
135 }; 85 };
136 86
137 /* SDMMC1 (SD/MMC) */ 87 /* SDMMC1 (SD/MMC) */
138 mmc@3400000 { !! 88 sdhci@3400000 {
139 cd-gpios = <&gpio TEGRA186_MAI !! 89 cd-gpios = <&gpio TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
140 wp-gpios = <&gpio TEGRA186_MAI !! 90 wp-gpios = <&gpio TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_LOW>;
141 91
142 vqmmc-supply = <&vddio_sdmmc1> 92 vqmmc-supply = <&vddio_sdmmc1>;
143 }; 93 };
144 94
145 /* SDMMC3 (SDIO) */ 95 /* SDMMC3 (SDIO) */
146 mmc@3440000 { !! 96 sdhci@3440000 {
147 status = "okay"; 97 status = "okay";
148 vqmmc-supply = <&vddio_sdmmc3> <<
149 }; 98 };
150 99
151 /* SDMMC4 (eMMC) */ 100 /* SDMMC4 (eMMC) */
152 mmc@3460000 { !! 101 sdhci@3460000 {
153 status = "okay"; 102 status = "okay";
154 bus-width = <8>; 103 bus-width = <8>;
155 non-removable; 104 non-removable;
156 105
157 vqmmc-supply = <&vdd_1v8_ap>; 106 vqmmc-supply = <&vdd_1v8_ap>;
158 vmmc-supply = <&vdd_3v3_sys>; 107 vmmc-supply = <&vdd_3v3_sys>;
159 }; 108 };
160 109
161 hsp@3c00000 { 110 hsp@3c00000 {
162 status = "okay"; 111 status = "okay";
163 }; 112 };
164 113
165 i2c@c240000 { 114 i2c@c240000 {
166 status = "okay"; 115 status = "okay";
167 }; 116 };
168 117
169 i2c@c250000 { 118 i2c@c250000 {
170 status = "okay"; 119 status = "okay";
>> 120 };
171 121
172 /* module ID EEPROM */ !! 122 pmc@c360000 {
173 eeprom@50 { !! 123 nvidia,invert-interrupt;
174 compatible = "atmel,24 !! 124 };
175 reg = <0x50>; <<
176 125
177 label = "module"; !! 126 cpus {
178 vcc-supply = <&vdd_1v8 !! 127 cpu@0 {
179 address-width = <8>; !! 128 enable-method = "psci";
180 pagesize = <8>; <<
181 size = <256>; <<
182 read-only; <<
183 }; 129 };
184 }; <<
185 130
186 rtc@c2a0000 { !! 131 cpu@1 {
187 status = "okay"; !! 132 enable-method = "psci";
188 }; !! 133 };
189 134
190 pmc@c360000 { !! 135 cpu@2 {
191 nvidia,invert-interrupt; !! 136 enable-method = "psci";
>> 137 };
>> 138
>> 139 cpu@3 {
>> 140 enable-method = "psci";
>> 141 };
>> 142
>> 143 cpu@4 {
>> 144 enable-method = "psci";
>> 145 };
>> 146
>> 147 cpu@5 {
>> 148 enable-method = "psci";
>> 149 };
192 }; 150 };
193 151
194 bpmp { 152 bpmp {
195 i2c { 153 i2c {
196 status = "okay"; 154 status = "okay";
197 155
198 pmic: pmic@3c { 156 pmic: pmic@3c {
199 compatible = " 157 compatible = "maxim,max77620";
200 reg = <0x3c>; 158 reg = <0x3c>;
201 159
202 interrupt-pare !! 160 interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
203 interrupts = < <<
204 #interrupt-cel 161 #interrupt-cells = <2>;
205 interrupt-cont 162 interrupt-controller;
206 163
207 #gpio-cells = 164 #gpio-cells = <2>;
208 gpio-controlle 165 gpio-controller;
209 166
210 pinctrl-names 167 pinctrl-names = "default";
211 pinctrl-0 = <& 168 pinctrl-0 = <&max77620_default>;
212 169
213 fps { <<
214 fps0 { <<
215 <<
216 <<
217 }; <<
218 <<
219 fps1 { <<
220 <<
221 <<
222 }; <<
223 <<
224 fps2 { <<
225 <<
226 <<
227 }; <<
228 }; <<
229 <<
230 max77620_defau 170 max77620_default: pinmux {
231 gpio0 171 gpio0 {
232 172 pins = "gpio0";
233 173 function = "gpio";
234 }; 174 };
235 175
236 gpio1 176 gpio1 {
237 177 pins = "gpio1";
238 178 function = "fps-out";
239 179 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
240 }; 180 };
241 181
242 gpio2 182 gpio2 {
243 183 pins = "gpio2";
244 184 function = "fps-out";
245 185 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
246 }; 186 };
247 187
248 gpio3 188 gpio3 {
249 189 pins = "gpio3";
250 190 function = "fps-out";
251 191 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
252 }; 192 };
253 193
254 gpio4 194 gpio4 {
255 195 pins = "gpio4";
256 196 function = "32k-out1";
257 197 drive-push-pull = <1>;
258 }; 198 };
259 199
260 gpio5 200 gpio5 {
261 201 pins = "gpio5";
262 202 function = "gpio";
263 203 drive-push-pull = <0>;
264 }; 204 };
265 205
266 gpio6 206 gpio6 {
267 207 pins = "gpio6";
268 208 function = "gpio";
269 209 drive-push-pull = <1>;
270 }; 210 };
271 211
272 gpio7 212 gpio7 {
273 213 pins = "gpio7";
274 214 function = "gpio";
275 215 drive-push-pull = <0>;
276 }; 216 };
277 }; 217 };
278 218
>> 219 fps {
>> 220 fps0 {
>> 221 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
>> 222 maxim,shutdown-fps-time-period-us = <640>;
>> 223 };
>> 224
>> 225 fps1 {
>> 226 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
>> 227 maxim,shutdown-fps-time-period-us = <640>;
>> 228 };
>> 229
>> 230 fps2 {
>> 231 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
>> 232 maxim,shutdown-fps-time-period-us = <640>;
>> 233 };
>> 234 };
>> 235
279 regulators { 236 regulators {
280 in-sd0 237 in-sd0-supply = <&vdd_5v0_sys>;
281 in-sd1 238 in-sd1-supply = <&vdd_5v0_sys>;
282 in-sd2 239 in-sd2-supply = <&vdd_5v0_sys>;
283 in-sd3 240 in-sd3-supply = <&vdd_5v0_sys>;
284 241
285 in-ldo 242 in-ldo0-1-supply = <&vdd_5v0_sys>;
286 in-ldo 243 in-ldo2-supply = <&vdd_5v0_sys>;
287 in-ldo 244 in-ldo3-5-supply = <&vdd_5v0_sys>;
288 in-ldo 245 in-ldo4-6-supply = <&vdd_1v8>;
289 in-ldo 246 in-ldo7-8-supply = <&avdd_dsi_csi>;
290 247
291 sd0 { 248 sd0 {
292 249 regulator-name = "VDD_DDR_1V1_PMIC";
293 250 regulator-min-microvolt = <1100000>;
294 251 regulator-max-microvolt = <1100000>;
295 252 regulator-always-on;
296 253 regulator-boot-on;
297 }; 254 };
298 255
299 avdd_d 256 avdd_dsi_csi: sd1 {
300 257 regulator-name = "AVDD_DSI_CSI_1V2";
301 258 regulator-min-microvolt = <1200000>;
302 259 regulator-max-microvolt = <1200000>;
>> 260 /* XXX */
>> 261 regulator-always-on;
>> 262 regulator-boot-on;
303 }; 263 };
304 264
305 vdd_1v 265 vdd_1v8: sd2 {
306 266 regulator-name = "VDD_1V8";
307 267 regulator-min-microvolt = <1800000>;
308 268 regulator-max-microvolt = <1800000>;
>> 269 /* XXX */
>> 270 regulator-always-on;
>> 271 regulator-boot-on;
309 }; 272 };
310 273
311 vdd_3v 274 vdd_3v3_sys: sd3 {
312 275 regulator-name = "VDD_3V3_SYS";
313 276 regulator-min-microvolt = <3300000>;
314 277 regulator-max-microvolt = <3300000>;
>> 278 /* XXX */
>> 279 regulator-always-on;
>> 280 regulator-boot-on;
315 }; 281 };
316 282
317 vdd_1v !! 283 ldo0 {
318 284 regulator-name = "VDD_1V8_AP_PLL";
319 285 regulator-min-microvolt = <1800000>;
320 286 regulator-max-microvolt = <1800000>;
>> 287 /* XXX */
>> 288 regulator-always-on;
>> 289 regulator-boot-on;
321 }; 290 };
322 291
323 ldo2 { 292 ldo2 {
324 293 regulator-name = "VDDIO_3V3_AOHV";
325 294 regulator-min-microvolt = <3300000>;
326 295 regulator-max-microvolt = <3300000>;
>> 296 /* XXX */
327 297 regulator-always-on;
328 298 regulator-boot-on;
329 }; 299 };
330 300
331 vddio_ 301 vddio_sdmmc1: ldo3 {
332 302 regulator-name = "VDDIO_SDMMC1_AP";
333 303 regulator-min-microvolt = <1800000>;
334 304 regulator-max-microvolt = <3300000>;
335 }; 305 };
336 306
337 ldo4 { 307 ldo4 {
338 308 regulator-name = "VDD_RTC";
339 309 regulator-min-microvolt = <1000000>;
340 310 regulator-max-microvolt = <1000000>;
341 }; 311 };
342 312
343 vddio_ 313 vddio_sdmmc3: ldo5 {
344 314 regulator-name = "VDDIO_SDMMC3_AP";
345 315 regulator-min-microvolt = <2800000>;
346 316 regulator-max-microvolt = <2800000>;
347 }; 317 };
348 318
349 vdd_hd !! 319 avdd_1v05: ldo7 {
350 320 regulator-name = "VDD_HDMI_1V05";
351 321 regulator-min-microvolt = <1050000>;
352 322 regulator-max-microvolt = <1050000>;
>> 323 /* XXX */
>> 324 regulator-always-on;
>> 325 regulator-boot-on;
353 }; 326 };
354 327
355 vdd_pe 328 vdd_pex: ldo8 {
356 329 regulator-name = "VDD_PEX_1V05";
357 330 regulator-min-microvolt = <1050000>;
358 331 regulator-max-microvolt = <1050000>;
>> 332 /* XXX */
>> 333 regulator-always-on;
>> 334 regulator-boot-on;
359 }; 335 };
360 }; 336 };
361 }; 337 };
362 }; 338 };
363 }; 339 };
364 340
365 cpus { <<
366 cpu@0 { <<
367 enable-method = "psci" <<
368 }; <<
369 <<
370 cpu@1 { <<
371 enable-method = "psci" <<
372 }; <<
373 <<
374 cpu@2 { <<
375 enable-method = "psci" <<
376 }; <<
377 <<
378 cpu@3 { <<
379 enable-method = "psci" <<
380 }; <<
381 <<
382 cpu@4 { <<
383 enable-method = "psci" <<
384 }; <<
385 <<
386 cpu@5 { <<
387 enable-method = "psci" <<
388 }; <<
389 }; <<
390 <<
391 psci { 341 psci {
392 compatible = "arm,psci-1.0"; 342 compatible = "arm,psci-1.0";
393 status = "okay"; 343 status = "okay";
394 method = "smc"; 344 method = "smc";
395 }; 345 };
396 346
397 gnd: regulator-gnd { !! 347 regulators {
398 compatible = "regulator-fixed" !! 348 compatible = "simple-bus";
399 regulator-name = "GND"; !! 349 #address-cells = <1>;
400 regulator-min-microvolt = <0>; !! 350 #size-cells = <0>;
401 regulator-max-microvolt = <0>; !! 351
402 regulator-always-on; !! 352 vdd_5v0_sys: regulator@0 {
403 regulator-boot-on; !! 353 compatible = "regulator-fixed";
404 }; !! 354 reg = <0>;
405 !! 355
406 vdd_5v0_sys: regulator-vdd-5v0-sys { !! 356 regulator-name = "VDD_5V0_SYS";
407 compatible = "regulator-fixed" !! 357 regulator-min-microvolt = <5000000>;
408 regulator-name = "VDD_5V0_SYS" !! 358 regulator-max-microvolt = <5000000>;
409 regulator-min-microvolt = <500 !! 359 regulator-always-on;
410 regulator-max-microvolt = <500 !! 360 regulator-boot-on;
411 regulator-always-on; !! 361 };
412 regulator-boot-on; !! 362
413 }; !! 363 vdd_1v8_ap: regulator@1 {
414 !! 364 compatible = "regulator-fixed";
415 vdd_1v8_ap: regulator-vdd-1v8-ap { !! 365 reg = <1>;
416 compatible = "regulator-fixed" !! 366
417 regulator-name = "VDD_1V8_AP"; !! 367 regulator-name = "VDD_1V8_AP";
418 regulator-min-microvolt = <180 !! 368 regulator-min-microvolt = <1800000>;
419 regulator-max-microvolt = <180 !! 369 regulator-max-microvolt = <1800000>;
>> 370
>> 371 /* XXX */
>> 372 regulator-always-on;
>> 373 regulator-boot-on;
420 374
421 gpio = <&pmic 1 GPIO_ACTIVE_HI !! 375 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
422 enable-active-high; !! 376 enable-active-high;
423 377
424 vin-supply = <&vdd_1v8>; !! 378 vin-supply = <&vdd_1v8>;
>> 379 };
425 }; 380 };
426 }; 381 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.