1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0 2 #include "tegra186.dtsi" 2 #include "tegra186.dtsi" 3 3 4 #include <dt-bindings/mfd/max77620.h> 4 #include <dt-bindings/mfd/max77620.h> 5 5 6 / { 6 / { 7 model = "NVIDIA Jetson TX2"; !! 7 model = "NVIDIA Tegra186 P3310 Processor Module"; 8 compatible = "nvidia,p3310", "nvidia,t 8 compatible = "nvidia,p3310", "nvidia,tegra186"; 9 9 10 aliases { 10 aliases { 11 ethernet0 = "/ethernet@2490000 !! 11 sdhci0 = "/sdhci@3460000"; >> 12 sdhci1 = "/sdhci@3400000"; >> 13 serial0 = &uarta; 12 i2c0 = "/bpmp/i2c"; 14 i2c0 = "/bpmp/i2c"; 13 i2c1 = "/i2c@3160000"; 15 i2c1 = "/i2c@3160000"; 14 i2c2 = "/i2c@c240000"; 16 i2c2 = "/i2c@c240000"; 15 i2c3 = "/i2c@3180000"; 17 i2c3 = "/i2c@3180000"; 16 i2c4 = "/i2c@3190000"; 18 i2c4 = "/i2c@3190000"; 17 i2c5 = "/i2c@31c0000"; 19 i2c5 = "/i2c@31c0000"; 18 i2c6 = "/i2c@c250000"; 20 i2c6 = "/i2c@c250000"; 19 i2c7 = "/i2c@31e0000"; 21 i2c7 = "/i2c@31e0000"; 20 mmc0 = "/mmc@3460000"; << 21 mmc1 = "/mmc@3400000"; << 22 serial0 = &uarta; << 23 }; 22 }; 24 23 25 chosen { 24 chosen { 26 bootargs = "earlycon console=t !! 25 bootargs = "earlycon console=ttyS0,115200n8"; 27 stdout-path = "serial0:115200n 26 stdout-path = "serial0:115200n8"; 28 }; 27 }; 29 28 30 memory@80000000 { !! 29 memory { 31 device_type = "memory"; 30 device_type = "memory"; 32 reg = <0x0 0x80000000 0x2 0x00 31 reg = <0x0 0x80000000 0x2 0x00000000>; 33 }; 32 }; 34 33 35 ethernet@2490000 { 34 ethernet@2490000 { 36 status = "okay"; 35 status = "okay"; 37 36 38 phy-reset-gpios = <&gpio TEGRA !! 37 phy-reset-gpios = <&gpio TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>; 39 GPIO_ << 40 phy-handle = <&phy>; 38 phy-handle = <&phy>; 41 phy-mode = "rgmii"; 39 phy-mode = "rgmii"; 42 40 43 mdio { 41 mdio { 44 #address-cells = <1>; 42 #address-cells = <1>; 45 #size-cells = <0>; 43 #size-cells = <0>; 46 44 47 phy: ethernet-phy@0 { !! 45 phy: phy@0 { 48 compatible = " 46 compatible = "ethernet-phy-ieee802.3-c22"; 49 reg = <0x0>; 47 reg = <0x0>; 50 interrupt-pare 48 interrupt-parent = <&gpio>; 51 interrupts = < !! 49 interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_LOW>; 52 << 53 << 54 #phy-cells = < << 55 }; 50 }; 56 }; 51 }; 57 }; 52 }; 58 53 59 memory-controller@2c00000 { << 60 status = "okay"; << 61 }; << 62 << 63 serial@3100000 { 54 serial@3100000 { 64 status = "okay"; 55 status = "okay"; 65 }; 56 }; 66 57 67 i2c@3160000 { 58 i2c@3160000 { 68 status = "okay"; 59 status = "okay"; 69 60 70 power-monitor@40 { 61 power-monitor@40 { 71 compatible = "ti,ina32 62 compatible = "ti,ina3221"; 72 reg = <0x40>; 63 reg = <0x40>; 73 #address-cells = <1>; << 74 #size-cells = <0>; << 75 << 76 input@0 { << 77 reg = <0x0>; << 78 label = "VDD_S << 79 shunt-resistor << 80 }; << 81 << 82 input@1 { << 83 reg = <0x1>; << 84 label = "VDD_S << 85 shunt-resistor << 86 }; << 87 << 88 input@2 { << 89 reg = <0x2>; << 90 label = "VDD_3 << 91 shunt-resistor << 92 }; << 93 }; 64 }; 94 65 95 power-monitor@41 { 66 power-monitor@41 { 96 compatible = "ti,ina32 67 compatible = "ti,ina3221"; 97 reg = <0x41>; 68 reg = <0x41>; 98 #address-cells = <1>; << 99 #size-cells = <0>; << 100 << 101 input@0 { << 102 reg = <0x0>; << 103 label = "VDD_I << 104 shunt-resistor << 105 }; << 106 << 107 input@1 { << 108 reg = <0x1>; << 109 label = "VDD_S << 110 shunt-resistor << 111 }; << 112 << 113 input@2 { << 114 reg = <0x2>; << 115 label = "VDD_5 << 116 shunt-resistor << 117 }; << 118 }; 69 }; 119 }; 70 }; 120 71 121 i2c@3180000 { 72 i2c@3180000 { 122 status = "okay"; 73 status = "okay"; 123 }; 74 }; 124 75 125 ddc: i2c@3190000 { !! 76 i2c@3190000 { 126 status = "okay"; 77 status = "okay"; 127 }; 78 }; 128 79 129 i2c@31c0000 { 80 i2c@31c0000 { 130 status = "okay"; 81 status = "okay"; 131 }; 82 }; 132 83 133 i2c@31e0000 { 84 i2c@31e0000 { 134 status = "okay"; 85 status = "okay"; 135 }; 86 }; 136 87 137 /* SDMMC1 (SD/MMC) */ 88 /* SDMMC1 (SD/MMC) */ 138 mmc@3400000 { !! 89 sdhci@3400000 { 139 cd-gpios = <&gpio TEGRA186_MAI !! 90 cd-gpios = <&gpio TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>; 140 wp-gpios = <&gpio TEGRA186_MAI !! 91 wp-gpios = <&gpio TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_LOW>; 141 92 142 vqmmc-supply = <&vddio_sdmmc1> 93 vqmmc-supply = <&vddio_sdmmc1>; 143 }; 94 }; 144 95 145 /* SDMMC3 (SDIO) */ 96 /* SDMMC3 (SDIO) */ 146 mmc@3440000 { !! 97 sdhci@3440000 { 147 status = "okay"; 98 status = "okay"; 148 vqmmc-supply = <&vddio_sdmmc3> << 149 }; 99 }; 150 100 151 /* SDMMC4 (eMMC) */ 101 /* SDMMC4 (eMMC) */ 152 mmc@3460000 { !! 102 sdhci@3460000 { 153 status = "okay"; 103 status = "okay"; 154 bus-width = <8>; 104 bus-width = <8>; 155 non-removable; 105 non-removable; 156 106 157 vqmmc-supply = <&vdd_1v8_ap>; 107 vqmmc-supply = <&vdd_1v8_ap>; 158 vmmc-supply = <&vdd_3v3_sys>; 108 vmmc-supply = <&vdd_3v3_sys>; 159 }; 109 }; 160 110 161 hsp@3c00000 { 111 hsp@3c00000 { 162 status = "okay"; 112 status = "okay"; 163 }; 113 }; 164 114 165 i2c@c240000 { 115 i2c@c240000 { 166 status = "okay"; 116 status = "okay"; 167 }; 117 }; 168 118 169 i2c@c250000 { 119 i2c@c250000 { 170 status = "okay"; 120 status = "okay"; >> 121 }; 171 122 172 /* module ID EEPROM */ !! 123 pmc@c360000 { 173 eeprom@50 { !! 124 nvidia,invert-interrupt; 174 compatible = "atmel,24 !! 125 }; 175 reg = <0x50>; << 176 126 177 label = "module"; !! 127 cpus { 178 vcc-supply = <&vdd_1v8 !! 128 cpu@0 { 179 address-width = <8>; !! 129 enable-method = "psci"; 180 pagesize = <8>; << 181 size = <256>; << 182 read-only; << 183 }; 130 }; 184 }; << 185 131 186 rtc@c2a0000 { !! 132 cpu@1 { 187 status = "okay"; !! 133 enable-method = "psci"; 188 }; !! 134 }; 189 135 190 pmc@c360000 { !! 136 cpu@2 { 191 nvidia,invert-interrupt; !! 137 enable-method = "psci"; >> 138 }; >> 139 >> 140 cpu@3 { >> 141 enable-method = "psci"; >> 142 }; >> 143 >> 144 cpu@4 { >> 145 enable-method = "psci"; >> 146 }; >> 147 >> 148 cpu@5 { >> 149 enable-method = "psci"; >> 150 }; 192 }; 151 }; 193 152 194 bpmp { 153 bpmp { 195 i2c { 154 i2c { 196 status = "okay"; 155 status = "okay"; 197 156 198 pmic: pmic@3c { 157 pmic: pmic@3c { 199 compatible = " 158 compatible = "maxim,max77620"; 200 reg = <0x3c>; 159 reg = <0x3c>; 201 160 202 interrupt-pare !! 161 interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>; 203 interrupts = < << 204 #interrupt-cel 162 #interrupt-cells = <2>; 205 interrupt-cont 163 interrupt-controller; 206 164 207 #gpio-cells = 165 #gpio-cells = <2>; 208 gpio-controlle 166 gpio-controller; 209 167 210 pinctrl-names 168 pinctrl-names = "default"; 211 pinctrl-0 = <& 169 pinctrl-0 = <&max77620_default>; 212 170 213 fps { << 214 fps0 { << 215 << 216 << 217 }; << 218 << 219 fps1 { << 220 << 221 << 222 }; << 223 << 224 fps2 { << 225 << 226 << 227 }; << 228 }; << 229 << 230 max77620_defau 171 max77620_default: pinmux { 231 gpio0 172 gpio0 { 232 173 pins = "gpio0"; 233 174 function = "gpio"; 234 }; 175 }; 235 176 236 gpio1 177 gpio1 { 237 178 pins = "gpio1"; 238 179 function = "fps-out"; 239 180 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 240 }; 181 }; 241 182 242 gpio2 183 gpio2 { 243 184 pins = "gpio2"; 244 185 function = "fps-out"; 245 186 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 246 }; 187 }; 247 188 248 gpio3 189 gpio3 { 249 190 pins = "gpio3"; 250 191 function = "fps-out"; 251 192 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 252 }; 193 }; 253 194 254 gpio4 195 gpio4 { 255 196 pins = "gpio4"; 256 197 function = "32k-out1"; 257 198 drive-push-pull = <1>; 258 }; 199 }; 259 200 260 gpio5 201 gpio5 { 261 202 pins = "gpio5"; 262 203 function = "gpio"; 263 204 drive-push-pull = <0>; 264 }; 205 }; 265 206 266 gpio6 207 gpio6 { 267 208 pins = "gpio6"; 268 209 function = "gpio"; 269 210 drive-push-pull = <1>; 270 }; 211 }; 271 212 272 gpio7 213 gpio7 { 273 214 pins = "gpio7"; 274 215 function = "gpio"; 275 216 drive-push-pull = <0>; 276 }; 217 }; 277 }; 218 }; 278 219 >> 220 fps { >> 221 fps0 { >> 222 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; >> 223 maxim,shutdown-fps-time-period-us = <640>; >> 224 }; >> 225 >> 226 fps1 { >> 227 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; >> 228 maxim,shutdown-fps-time-period-us = <640>; >> 229 }; >> 230 >> 231 fps2 { >> 232 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; >> 233 maxim,shutdown-fps-time-period-us = <640>; >> 234 }; >> 235 }; >> 236 279 regulators { 237 regulators { 280 in-sd0 238 in-sd0-supply = <&vdd_5v0_sys>; 281 in-sd1 239 in-sd1-supply = <&vdd_5v0_sys>; 282 in-sd2 240 in-sd2-supply = <&vdd_5v0_sys>; 283 in-sd3 241 in-sd3-supply = <&vdd_5v0_sys>; 284 242 285 in-ldo 243 in-ldo0-1-supply = <&vdd_5v0_sys>; 286 in-ldo 244 in-ldo2-supply = <&vdd_5v0_sys>; 287 in-ldo 245 in-ldo3-5-supply = <&vdd_5v0_sys>; 288 in-ldo 246 in-ldo4-6-supply = <&vdd_1v8>; 289 in-ldo 247 in-ldo7-8-supply = <&avdd_dsi_csi>; 290 248 291 sd0 { 249 sd0 { 292 250 regulator-name = "VDD_DDR_1V1_PMIC"; 293 251 regulator-min-microvolt = <1100000>; 294 252 regulator-max-microvolt = <1100000>; 295 253 regulator-always-on; 296 254 regulator-boot-on; 297 }; 255 }; 298 256 299 avdd_d 257 avdd_dsi_csi: sd1 { 300 258 regulator-name = "AVDD_DSI_CSI_1V2"; 301 259 regulator-min-microvolt = <1200000>; 302 260 regulator-max-microvolt = <1200000>; >> 261 /* XXX */ >> 262 regulator-always-on; >> 263 regulator-boot-on; 303 }; 264 }; 304 265 305 vdd_1v 266 vdd_1v8: sd2 { 306 267 regulator-name = "VDD_1V8"; 307 268 regulator-min-microvolt = <1800000>; 308 269 regulator-max-microvolt = <1800000>; >> 270 /* XXX */ >> 271 regulator-always-on; >> 272 regulator-boot-on; 309 }; 273 }; 310 274 311 vdd_3v 275 vdd_3v3_sys: sd3 { 312 276 regulator-name = "VDD_3V3_SYS"; 313 277 regulator-min-microvolt = <3300000>; 314 278 regulator-max-microvolt = <3300000>; >> 279 /* XXX */ >> 280 regulator-always-on; >> 281 regulator-boot-on; 315 }; 282 }; 316 283 317 vdd_1v !! 284 ldo0 { 318 285 regulator-name = "VDD_1V8_AP_PLL"; 319 286 regulator-min-microvolt = <1800000>; 320 287 regulator-max-microvolt = <1800000>; >> 288 /* XXX */ >> 289 regulator-always-on; >> 290 regulator-boot-on; 321 }; 291 }; 322 292 323 ldo2 { 293 ldo2 { 324 294 regulator-name = "VDDIO_3V3_AOHV"; 325 295 regulator-min-microvolt = <3300000>; 326 296 regulator-max-microvolt = <3300000>; >> 297 /* XXX */ 327 298 regulator-always-on; 328 299 regulator-boot-on; 329 }; 300 }; 330 301 331 vddio_ 302 vddio_sdmmc1: ldo3 { 332 303 regulator-name = "VDDIO_SDMMC1_AP"; 333 304 regulator-min-microvolt = <1800000>; 334 305 regulator-max-microvolt = <3300000>; 335 }; 306 }; 336 307 337 ldo4 { 308 ldo4 { 338 309 regulator-name = "VDD_RTC"; 339 310 regulator-min-microvolt = <1000000>; 340 311 regulator-max-microvolt = <1000000>; 341 }; 312 }; 342 313 343 vddio_ 314 vddio_sdmmc3: ldo5 { 344 315 regulator-name = "VDDIO_SDMMC3_AP"; 345 316 regulator-min-microvolt = <2800000>; 346 317 regulator-max-microvolt = <2800000>; 347 }; 318 }; 348 319 349 vdd_hd !! 320 avdd_1v05: ldo7 { 350 321 regulator-name = "VDD_HDMI_1V05"; 351 322 regulator-min-microvolt = <1050000>; 352 323 regulator-max-microvolt = <1050000>; >> 324 /* XXX */ >> 325 regulator-always-on; >> 326 regulator-boot-on; 353 }; 327 }; 354 328 355 vdd_pe 329 vdd_pex: ldo8 { 356 330 regulator-name = "VDD_PEX_1V05"; 357 331 regulator-min-microvolt = <1050000>; 358 332 regulator-max-microvolt = <1050000>; >> 333 /* XXX */ >> 334 regulator-always-on; >> 335 regulator-boot-on; 359 }; 336 }; 360 }; 337 }; 361 }; 338 }; 362 }; 339 }; 363 }; 340 }; 364 341 365 cpus { << 366 cpu@0 { << 367 enable-method = "psci" << 368 }; << 369 << 370 cpu@1 { << 371 enable-method = "psci" << 372 }; << 373 << 374 cpu@2 { << 375 enable-method = "psci" << 376 }; << 377 << 378 cpu@3 { << 379 enable-method = "psci" << 380 }; << 381 << 382 cpu@4 { << 383 enable-method = "psci" << 384 }; << 385 << 386 cpu@5 { << 387 enable-method = "psci" << 388 }; << 389 }; << 390 << 391 psci { 342 psci { 392 compatible = "arm,psci-1.0"; 343 compatible = "arm,psci-1.0"; 393 status = "okay"; 344 status = "okay"; 394 method = "smc"; 345 method = "smc"; 395 }; 346 }; 396 347 397 gnd: regulator-gnd { !! 348 regulators { 398 compatible = "regulator-fixed" !! 349 compatible = "simple-bus"; 399 regulator-name = "GND"; !! 350 #address-cells = <1>; 400 regulator-min-microvolt = <0>; !! 351 #size-cells = <0>; 401 regulator-max-microvolt = <0>; !! 352 402 regulator-always-on; !! 353 vdd_5v0_sys: regulator@0 { 403 regulator-boot-on; !! 354 compatible = "regulator-fixed"; 404 }; !! 355 reg = <0>; 405 !! 356 406 vdd_5v0_sys: regulator-vdd-5v0-sys { !! 357 regulator-name = "VDD_5V0_SYS"; 407 compatible = "regulator-fixed" !! 358 regulator-min-microvolt = <5000000>; 408 regulator-name = "VDD_5V0_SYS" !! 359 regulator-max-microvolt = <5000000>; 409 regulator-min-microvolt = <500 !! 360 regulator-always-on; 410 regulator-max-microvolt = <500 !! 361 regulator-boot-on; 411 regulator-always-on; !! 362 }; 412 regulator-boot-on; !! 363 413 }; !! 364 vdd_1v8_ap: regulator@1 { 414 !! 365 compatible = "regulator-fixed"; 415 vdd_1v8_ap: regulator-vdd-1v8-ap { !! 366 reg = <1>; 416 compatible = "regulator-fixed" !! 367 417 regulator-name = "VDD_1V8_AP"; !! 368 regulator-name = "VDD_1V8_AP"; 418 regulator-min-microvolt = <180 !! 369 regulator-min-microvolt = <1800000>; 419 regulator-max-microvolt = <180 !! 370 regulator-max-microvolt = <1800000>; >> 371 >> 372 /* XXX */ >> 373 regulator-always-on; >> 374 regulator-boot-on; 420 375 421 gpio = <&pmic 1 GPIO_ACTIVE_HI !! 376 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; 422 enable-active-high; !! 377 enable-active-high; 423 378 424 vin-supply = <&vdd_1v8>; !! 379 vin-supply = <&vdd_1v8>; >> 380 }; 425 }; 381 }; 426 }; 382 };
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