1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra186.dtsi" 2 #include "tegra186.dtsi"
3 3
4 #include <dt-bindings/mfd/max77620.h> 4 #include <dt-bindings/mfd/max77620.h>
5 5
6 / { 6 / {
7 model = "NVIDIA Jetson TX2"; !! 7 model = "NVIDIA Tegra186 P3310 Processor Module";
8 compatible = "nvidia,p3310", "nvidia,t 8 compatible = "nvidia,p3310", "nvidia,tegra186";
9 9
10 aliases { 10 aliases {
11 ethernet0 = "/ethernet@2490000 !! 11 sdhci0 = "/sdhci@3460000";
>> 12 sdhci1 = "/sdhci@3400000";
>> 13 serial0 = &uarta;
12 i2c0 = "/bpmp/i2c"; 14 i2c0 = "/bpmp/i2c";
13 i2c1 = "/i2c@3160000"; 15 i2c1 = "/i2c@3160000";
14 i2c2 = "/i2c@c240000"; 16 i2c2 = "/i2c@c240000";
15 i2c3 = "/i2c@3180000"; 17 i2c3 = "/i2c@3180000";
16 i2c4 = "/i2c@3190000"; 18 i2c4 = "/i2c@3190000";
17 i2c5 = "/i2c@31c0000"; 19 i2c5 = "/i2c@31c0000";
18 i2c6 = "/i2c@c250000"; 20 i2c6 = "/i2c@c250000";
19 i2c7 = "/i2c@31e0000"; 21 i2c7 = "/i2c@31e0000";
20 mmc0 = "/mmc@3460000"; <<
21 mmc1 = "/mmc@3400000"; <<
22 serial0 = &uarta; <<
23 }; 22 };
24 23
25 chosen { 24 chosen {
26 bootargs = "earlycon console=t !! 25 bootargs = "earlycon console=ttyS0,115200n8";
27 stdout-path = "serial0:115200n 26 stdout-path = "serial0:115200n8";
28 }; 27 };
29 28
30 memory@80000000 { !! 29 memory {
31 device_type = "memory"; 30 device_type = "memory";
32 reg = <0x0 0x80000000 0x2 0x00 31 reg = <0x0 0x80000000 0x2 0x00000000>;
33 }; 32 };
34 33
35 ethernet@2490000 { 34 ethernet@2490000 {
36 status = "okay"; 35 status = "okay";
37 36
38 phy-reset-gpios = <&gpio TEGRA !! 37 phy-reset-gpios = <&gpio TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>;
39 GPIO_ <<
40 phy-handle = <&phy>; 38 phy-handle = <&phy>;
41 phy-mode = "rgmii"; 39 phy-mode = "rgmii";
42 40
43 mdio { 41 mdio {
44 #address-cells = <1>; 42 #address-cells = <1>;
45 #size-cells = <0>; 43 #size-cells = <0>;
46 44
47 phy: ethernet-phy@0 { !! 45 phy: phy@0 {
48 compatible = " 46 compatible = "ethernet-phy-ieee802.3-c22";
49 reg = <0x0>; 47 reg = <0x0>;
50 interrupt-pare 48 interrupt-parent = <&gpio>;
51 interrupts = < !! 49 interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_LOW>;
52 <<
53 <<
54 #phy-cells = < <<
55 }; 50 };
56 }; 51 };
57 }; 52 };
58 53
59 memory-controller@2c00000 { 54 memory-controller@2c00000 {
60 status = "okay"; 55 status = "okay";
61 }; 56 };
62 57
63 serial@3100000 { 58 serial@3100000 {
64 status = "okay"; 59 status = "okay";
65 }; 60 };
66 61
67 i2c@3160000 { 62 i2c@3160000 {
68 status = "okay"; 63 status = "okay";
69 64
70 power-monitor@40 { 65 power-monitor@40 {
71 compatible = "ti,ina32 66 compatible = "ti,ina3221";
72 reg = <0x40>; 67 reg = <0x40>;
73 #address-cells = <1>; <<
74 #size-cells = <0>; <<
75 <<
76 input@0 { <<
77 reg = <0x0>; <<
78 label = "VDD_S <<
79 shunt-resistor <<
80 }; <<
81 <<
82 input@1 { <<
83 reg = <0x1>; <<
84 label = "VDD_S <<
85 shunt-resistor <<
86 }; <<
87 <<
88 input@2 { <<
89 reg = <0x2>; <<
90 label = "VDD_3 <<
91 shunt-resistor <<
92 }; <<
93 }; 68 };
94 69
95 power-monitor@41 { 70 power-monitor@41 {
96 compatible = "ti,ina32 71 compatible = "ti,ina3221";
97 reg = <0x41>; 72 reg = <0x41>;
98 #address-cells = <1>; <<
99 #size-cells = <0>; <<
100 <<
101 input@0 { <<
102 reg = <0x0>; <<
103 label = "VDD_I <<
104 shunt-resistor <<
105 }; <<
106 <<
107 input@1 { <<
108 reg = <0x1>; <<
109 label = "VDD_S <<
110 shunt-resistor <<
111 }; <<
112 <<
113 input@2 { <<
114 reg = <0x2>; <<
115 label = "VDD_5 <<
116 shunt-resistor <<
117 }; <<
118 }; 73 };
119 }; 74 };
120 75
121 i2c@3180000 { 76 i2c@3180000 {
122 status = "okay"; 77 status = "okay";
123 }; 78 };
124 79
125 ddc: i2c@3190000 { 80 ddc: i2c@3190000 {
126 status = "okay"; 81 status = "okay";
127 }; 82 };
128 83
129 i2c@31c0000 { 84 i2c@31c0000 {
130 status = "okay"; 85 status = "okay";
131 }; 86 };
132 87
133 i2c@31e0000 { 88 i2c@31e0000 {
134 status = "okay"; 89 status = "okay";
135 }; 90 };
136 91
137 /* SDMMC1 (SD/MMC) */ 92 /* SDMMC1 (SD/MMC) */
138 mmc@3400000 { !! 93 sdhci@3400000 {
139 cd-gpios = <&gpio TEGRA186_MAI !! 94 cd-gpios = <&gpio TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
140 wp-gpios = <&gpio TEGRA186_MAI !! 95 wp-gpios = <&gpio TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
141 96
142 vqmmc-supply = <&vddio_sdmmc1> 97 vqmmc-supply = <&vddio_sdmmc1>;
143 }; 98 };
144 99
145 /* SDMMC3 (SDIO) */ 100 /* SDMMC3 (SDIO) */
146 mmc@3440000 { !! 101 sdhci@3440000 {
147 status = "okay"; 102 status = "okay";
148 vqmmc-supply = <&vddio_sdmmc3> <<
149 }; 103 };
150 104
151 /* SDMMC4 (eMMC) */ 105 /* SDMMC4 (eMMC) */
152 mmc@3460000 { !! 106 sdhci@3460000 {
153 status = "okay"; 107 status = "okay";
154 bus-width = <8>; 108 bus-width = <8>;
155 non-removable; 109 non-removable;
156 110
157 vqmmc-supply = <&vdd_1v8_ap>; 111 vqmmc-supply = <&vdd_1v8_ap>;
158 vmmc-supply = <&vdd_3v3_sys>; 112 vmmc-supply = <&vdd_3v3_sys>;
159 }; 113 };
160 114
161 hsp@3c00000 { 115 hsp@3c00000 {
162 status = "okay"; 116 status = "okay";
163 }; 117 };
164 118
165 i2c@c240000 { 119 i2c@c240000 {
166 status = "okay"; 120 status = "okay";
167 }; 121 };
168 122
169 i2c@c250000 { 123 i2c@c250000 {
170 status = "okay"; 124 status = "okay";
>> 125 };
171 126
172 /* module ID EEPROM */ !! 127 pmc@c360000 {
173 eeprom@50 { !! 128 nvidia,invert-interrupt;
174 compatible = "atmel,24 !! 129 };
175 reg = <0x50>; <<
176 130
177 label = "module"; !! 131 cpus {
178 vcc-supply = <&vdd_1v8 !! 132 cpu@0 {
179 address-width = <8>; !! 133 enable-method = "psci";
180 pagesize = <8>; <<
181 size = <256>; <<
182 read-only; <<
183 }; 134 };
184 }; <<
185 135
186 rtc@c2a0000 { !! 136 cpu@1 {
187 status = "okay"; !! 137 enable-method = "psci";
188 }; !! 138 };
189 139
190 pmc@c360000 { !! 140 cpu@2 {
191 nvidia,invert-interrupt; !! 141 enable-method = "psci";
>> 142 };
>> 143
>> 144 cpu@3 {
>> 145 enable-method = "psci";
>> 146 };
>> 147
>> 148 cpu@4 {
>> 149 enable-method = "psci";
>> 150 };
>> 151
>> 152 cpu@5 {
>> 153 enable-method = "psci";
>> 154 };
192 }; 155 };
193 156
194 bpmp { 157 bpmp {
195 i2c { 158 i2c {
196 status = "okay"; 159 status = "okay";
197 160
198 pmic: pmic@3c { 161 pmic: pmic@3c {
199 compatible = " 162 compatible = "maxim,max77620";
200 reg = <0x3c>; 163 reg = <0x3c>;
201 164
202 interrupt-pare !! 165 interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
203 interrupts = < <<
204 #interrupt-cel 166 #interrupt-cells = <2>;
205 interrupt-cont 167 interrupt-controller;
206 168
207 #gpio-cells = 169 #gpio-cells = <2>;
208 gpio-controlle 170 gpio-controller;
209 171
210 pinctrl-names 172 pinctrl-names = "default";
211 pinctrl-0 = <& 173 pinctrl-0 = <&max77620_default>;
212 174
213 fps { <<
214 fps0 { <<
215 <<
216 <<
217 }; <<
218 <<
219 fps1 { <<
220 <<
221 <<
222 }; <<
223 <<
224 fps2 { <<
225 <<
226 <<
227 }; <<
228 }; <<
229 <<
230 max77620_defau 175 max77620_default: pinmux {
231 gpio0 176 gpio0 {
232 177 pins = "gpio0";
233 178 function = "gpio";
234 }; 179 };
235 180
236 gpio1 181 gpio1 {
237 182 pins = "gpio1";
238 183 function = "fps-out";
239 184 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
240 }; 185 };
241 186
242 gpio2 187 gpio2 {
243 188 pins = "gpio2";
244 189 function = "fps-out";
245 190 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
246 }; 191 };
247 192
248 gpio3 193 gpio3 {
249 194 pins = "gpio3";
250 195 function = "fps-out";
251 196 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
252 }; 197 };
253 198
254 gpio4 199 gpio4 {
255 200 pins = "gpio4";
256 201 function = "32k-out1";
257 202 drive-push-pull = <1>;
258 }; 203 };
259 204
260 gpio5 205 gpio5 {
261 206 pins = "gpio5";
262 207 function = "gpio";
263 208 drive-push-pull = <0>;
264 }; 209 };
265 210
266 gpio6 211 gpio6 {
267 212 pins = "gpio6";
268 213 function = "gpio";
269 214 drive-push-pull = <1>;
270 }; 215 };
271 216
272 gpio7 217 gpio7 {
273 218 pins = "gpio7";
274 219 function = "gpio";
275 220 drive-push-pull = <0>;
276 }; 221 };
277 }; 222 };
278 223
>> 224 fps {
>> 225 fps0 {
>> 226 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
>> 227 maxim,shutdown-fps-time-period-us = <640>;
>> 228 };
>> 229
>> 230 fps1 {
>> 231 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
>> 232 maxim,shutdown-fps-time-period-us = <640>;
>> 233 };
>> 234
>> 235 fps2 {
>> 236 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
>> 237 maxim,shutdown-fps-time-period-us = <640>;
>> 238 };
>> 239 };
>> 240
279 regulators { 241 regulators {
280 in-sd0 242 in-sd0-supply = <&vdd_5v0_sys>;
281 in-sd1 243 in-sd1-supply = <&vdd_5v0_sys>;
282 in-sd2 244 in-sd2-supply = <&vdd_5v0_sys>;
283 in-sd3 245 in-sd3-supply = <&vdd_5v0_sys>;
284 246
285 in-ldo 247 in-ldo0-1-supply = <&vdd_5v0_sys>;
286 in-ldo 248 in-ldo2-supply = <&vdd_5v0_sys>;
287 in-ldo 249 in-ldo3-5-supply = <&vdd_5v0_sys>;
288 in-ldo 250 in-ldo4-6-supply = <&vdd_1v8>;
289 in-ldo 251 in-ldo7-8-supply = <&avdd_dsi_csi>;
290 252
291 sd0 { 253 sd0 {
292 254 regulator-name = "VDD_DDR_1V1_PMIC";
293 255 regulator-min-microvolt = <1100000>;
294 256 regulator-max-microvolt = <1100000>;
295 257 regulator-always-on;
296 258 regulator-boot-on;
297 }; 259 };
298 260
299 avdd_d 261 avdd_dsi_csi: sd1 {
300 262 regulator-name = "AVDD_DSI_CSI_1V2";
301 263 regulator-min-microvolt = <1200000>;
302 264 regulator-max-microvolt = <1200000>;
>> 265 /* XXX */
>> 266 regulator-always-on;
>> 267 regulator-boot-on;
303 }; 268 };
304 269
305 vdd_1v 270 vdd_1v8: sd2 {
306 271 regulator-name = "VDD_1V8";
307 272 regulator-min-microvolt = <1800000>;
308 273 regulator-max-microvolt = <1800000>;
>> 274 /* XXX */
>> 275 regulator-always-on;
>> 276 regulator-boot-on;
309 }; 277 };
310 278
311 vdd_3v 279 vdd_3v3_sys: sd3 {
312 280 regulator-name = "VDD_3V3_SYS";
313 281 regulator-min-microvolt = <3300000>;
314 282 regulator-max-microvolt = <3300000>;
>> 283 /* XXX */
>> 284 regulator-always-on;
>> 285 regulator-boot-on;
315 }; 286 };
316 287
317 vdd_1v !! 288 ldo0 {
318 289 regulator-name = "VDD_1V8_AP_PLL";
319 290 regulator-min-microvolt = <1800000>;
320 291 regulator-max-microvolt = <1800000>;
>> 292 /* XXX */
>> 293 regulator-always-on;
>> 294 regulator-boot-on;
321 }; 295 };
322 296
323 ldo2 { 297 ldo2 {
324 298 regulator-name = "VDDIO_3V3_AOHV";
325 299 regulator-min-microvolt = <3300000>;
326 300 regulator-max-microvolt = <3300000>;
>> 301 /* XXX */
327 302 regulator-always-on;
328 303 regulator-boot-on;
329 }; 304 };
330 305
331 vddio_ 306 vddio_sdmmc1: ldo3 {
332 307 regulator-name = "VDDIO_SDMMC1_AP";
333 308 regulator-min-microvolt = <1800000>;
334 309 regulator-max-microvolt = <3300000>;
335 }; 310 };
336 311
337 ldo4 { 312 ldo4 {
338 313 regulator-name = "VDD_RTC";
339 314 regulator-min-microvolt = <1000000>;
340 315 regulator-max-microvolt = <1000000>;
341 }; 316 };
342 317
343 vddio_ 318 vddio_sdmmc3: ldo5 {
344 319 regulator-name = "VDDIO_SDMMC3_AP";
345 320 regulator-min-microvolt = <2800000>;
346 321 regulator-max-microvolt = <2800000>;
347 }; 322 };
348 323
349 vdd_hd 324 vdd_hdmi_1v05: ldo7 {
350 325 regulator-name = "VDD_HDMI_1V05";
351 326 regulator-min-microvolt = <1050000>;
352 327 regulator-max-microvolt = <1050000>;
>> 328 /* XXX */
>> 329 regulator-always-on;
>> 330 regulator-boot-on;
353 }; 331 };
354 332
355 vdd_pe 333 vdd_pex: ldo8 {
356 334 regulator-name = "VDD_PEX_1V05";
357 335 regulator-min-microvolt = <1050000>;
358 336 regulator-max-microvolt = <1050000>;
>> 337 /* XXX */
>> 338 regulator-always-on;
>> 339 regulator-boot-on;
359 }; 340 };
360 }; 341 };
361 }; 342 };
362 }; 343 };
363 }; 344 };
364 345
365 cpus { <<
366 cpu@0 { <<
367 enable-method = "psci" <<
368 }; <<
369 <<
370 cpu@1 { <<
371 enable-method = "psci" <<
372 }; <<
373 <<
374 cpu@2 { <<
375 enable-method = "psci" <<
376 }; <<
377 <<
378 cpu@3 { <<
379 enable-method = "psci" <<
380 }; <<
381 <<
382 cpu@4 { <<
383 enable-method = "psci" <<
384 }; <<
385 <<
386 cpu@5 { <<
387 enable-method = "psci" <<
388 }; <<
389 }; <<
390 <<
391 psci { 346 psci {
392 compatible = "arm,psci-1.0"; 347 compatible = "arm,psci-1.0";
393 status = "okay"; 348 status = "okay";
394 method = "smc"; 349 method = "smc";
395 }; 350 };
396 351
397 gnd: regulator-gnd { !! 352 regulators {
398 compatible = "regulator-fixed" !! 353 compatible = "simple-bus";
399 regulator-name = "GND"; !! 354 #address-cells = <1>;
400 regulator-min-microvolt = <0>; !! 355 #size-cells = <0>;
401 regulator-max-microvolt = <0>; !! 356
402 regulator-always-on; !! 357 vdd_5v0_sys: regulator@0 {
403 regulator-boot-on; !! 358 compatible = "regulator-fixed";
404 }; !! 359 reg = <0>;
405 !! 360
406 vdd_5v0_sys: regulator-vdd-5v0-sys { !! 361 regulator-name = "VDD_5V0_SYS";
407 compatible = "regulator-fixed" !! 362 regulator-min-microvolt = <5000000>;
408 regulator-name = "VDD_5V0_SYS" !! 363 regulator-max-microvolt = <5000000>;
409 regulator-min-microvolt = <500 !! 364 regulator-always-on;
410 regulator-max-microvolt = <500 !! 365 regulator-boot-on;
411 regulator-always-on; !! 366 };
412 regulator-boot-on; !! 367
413 }; !! 368 vdd_1v8_ap: regulator@1 {
414 !! 369 compatible = "regulator-fixed";
415 vdd_1v8_ap: regulator-vdd-1v8-ap { !! 370 reg = <1>;
416 compatible = "regulator-fixed" !! 371
417 regulator-name = "VDD_1V8_AP"; !! 372 regulator-name = "VDD_1V8_AP";
418 regulator-min-microvolt = <180 !! 373 regulator-min-microvolt = <1800000>;
419 regulator-max-microvolt = <180 !! 374 regulator-max-microvolt = <1800000>;
>> 375
>> 376 /* XXX */
>> 377 regulator-always-on;
>> 378 regulator-boot-on;
420 379
421 gpio = <&pmic 1 GPIO_ACTIVE_HI !! 380 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
422 enable-active-high; !! 381 enable-active-high;
423 382
424 vin-supply = <&vdd_1v8>; !! 383 vin-supply = <&vdd_1v8>;
>> 384 };
425 }; 385 };
426 }; 386 };
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