1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra186.dtsi" 2 #include "tegra186.dtsi"
3 3
4 #include <dt-bindings/mfd/max77620.h> 4 #include <dt-bindings/mfd/max77620.h>
5 5
6 / { 6 / {
7 model = "NVIDIA Jetson TX2"; 7 model = "NVIDIA Jetson TX2";
8 compatible = "nvidia,p3310", "nvidia,t 8 compatible = "nvidia,p3310", "nvidia,tegra186";
9 9
10 aliases { 10 aliases {
11 ethernet0 = "/ethernet@2490000 11 ethernet0 = "/ethernet@2490000";
12 i2c0 = "/bpmp/i2c"; 12 i2c0 = "/bpmp/i2c";
13 i2c1 = "/i2c@3160000"; 13 i2c1 = "/i2c@3160000";
14 i2c2 = "/i2c@c240000"; 14 i2c2 = "/i2c@c240000";
15 i2c3 = "/i2c@3180000"; 15 i2c3 = "/i2c@3180000";
16 i2c4 = "/i2c@3190000"; 16 i2c4 = "/i2c@3190000";
17 i2c5 = "/i2c@31c0000"; 17 i2c5 = "/i2c@31c0000";
18 i2c6 = "/i2c@c250000"; 18 i2c6 = "/i2c@c250000";
19 i2c7 = "/i2c@31e0000"; 19 i2c7 = "/i2c@31e0000";
20 mmc0 = "/mmc@3460000"; 20 mmc0 = "/mmc@3460000";
21 mmc1 = "/mmc@3400000"; 21 mmc1 = "/mmc@3400000";
22 serial0 = &uarta; 22 serial0 = &uarta;
23 }; 23 };
24 24
25 chosen { 25 chosen {
26 bootargs = "earlycon console=t 26 bootargs = "earlycon console=ttyS0,115200n8 fw_devlink=on";
27 stdout-path = "serial0:115200n 27 stdout-path = "serial0:115200n8";
28 }; 28 };
29 29
30 memory@80000000 { 30 memory@80000000 {
31 device_type = "memory"; 31 device_type = "memory";
32 reg = <0x0 0x80000000 0x2 0x00 32 reg = <0x0 0x80000000 0x2 0x00000000>;
33 }; 33 };
34 34
35 ethernet@2490000 { 35 ethernet@2490000 {
36 status = "okay"; 36 status = "okay";
37 37
38 phy-reset-gpios = <&gpio TEGRA 38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
39 GPIO_ 39 GPIO_ACTIVE_LOW>;
40 phy-handle = <&phy>; 40 phy-handle = <&phy>;
41 phy-mode = "rgmii"; 41 phy-mode = "rgmii";
42 42
43 mdio { 43 mdio {
44 #address-cells = <1>; 44 #address-cells = <1>;
45 #size-cells = <0>; 45 #size-cells = <0>;
46 46
47 phy: ethernet-phy@0 { !! 47 phy: phy@0 {
48 compatible = " 48 compatible = "ethernet-phy-ieee802.3-c22";
49 reg = <0x0>; 49 reg = <0x0>;
50 interrupt-pare 50 interrupt-parent = <&gpio>;
51 interrupts = < 51 interrupts = <TEGRA186_MAIN_GPIO(M, 5)
52 52 IRQ_TYPE_LEVEL_LOW>;
53 53
54 #phy-cells = < 54 #phy-cells = <0>;
55 }; 55 };
56 }; 56 };
57 }; 57 };
58 58
59 memory-controller@2c00000 { 59 memory-controller@2c00000 {
60 status = "okay"; 60 status = "okay";
61 }; 61 };
62 62
63 serial@3100000 { 63 serial@3100000 {
64 status = "okay"; 64 status = "okay";
65 }; 65 };
66 66
67 i2c@3160000 { 67 i2c@3160000 {
68 status = "okay"; 68 status = "okay";
69 69
70 power-monitor@40 { 70 power-monitor@40 {
71 compatible = "ti,ina32 71 compatible = "ti,ina3221";
72 reg = <0x40>; 72 reg = <0x40>;
73 #address-cells = <1>; 73 #address-cells = <1>;
74 #size-cells = <0>; 74 #size-cells = <0>;
75 75
76 input@0 { !! 76 channel@0 {
77 reg = <0x0>; 77 reg = <0x0>;
78 label = "VDD_S 78 label = "VDD_SYS_GPU";
79 shunt-resistor 79 shunt-resistor-micro-ohms = <10000>;
80 }; 80 };
81 81
82 input@1 { !! 82 channel@1 {
83 reg = <0x1>; 83 reg = <0x1>;
84 label = "VDD_S 84 label = "VDD_SYS_SOC";
85 shunt-resistor 85 shunt-resistor-micro-ohms = <10000>;
86 }; 86 };
87 87
88 input@2 { !! 88 channel@2 {
89 reg = <0x2>; 89 reg = <0x2>;
90 label = "VDD_3 90 label = "VDD_3V8_WIFI";
91 shunt-resistor 91 shunt-resistor-micro-ohms = <10000>;
92 }; 92 };
93 }; 93 };
94 94
95 power-monitor@41 { 95 power-monitor@41 {
96 compatible = "ti,ina32 96 compatible = "ti,ina3221";
97 reg = <0x41>; 97 reg = <0x41>;
98 #address-cells = <1>; 98 #address-cells = <1>;
99 #size-cells = <0>; 99 #size-cells = <0>;
100 100
101 input@0 { !! 101 channel@0 {
102 reg = <0x0>; 102 reg = <0x0>;
103 label = "VDD_I 103 label = "VDD_IN";
104 shunt-resistor 104 shunt-resistor-micro-ohms = <5000>;
105 }; 105 };
106 106
107 input@1 { !! 107 channel@1 {
108 reg = <0x1>; 108 reg = <0x1>;
109 label = "VDD_S 109 label = "VDD_SYS_CPU";
110 shunt-resistor 110 shunt-resistor-micro-ohms = <10000>;
111 }; 111 };
112 112
113 input@2 { !! 113 channel@2 {
114 reg = <0x2>; 114 reg = <0x2>;
115 label = "VDD_5 115 label = "VDD_5V0_DDR";
116 shunt-resistor 116 shunt-resistor-micro-ohms = <10000>;
117 }; 117 };
118 }; 118 };
119 }; 119 };
120 120
121 i2c@3180000 { 121 i2c@3180000 {
122 status = "okay"; 122 status = "okay";
123 }; 123 };
124 124
125 ddc: i2c@3190000 { 125 ddc: i2c@3190000 {
126 status = "okay"; 126 status = "okay";
127 }; 127 };
128 128
129 i2c@31c0000 { 129 i2c@31c0000 {
130 status = "okay"; 130 status = "okay";
131 }; 131 };
132 132
133 i2c@31e0000 { 133 i2c@31e0000 {
134 status = "okay"; 134 status = "okay";
135 }; 135 };
136 136
137 /* SDMMC1 (SD/MMC) */ 137 /* SDMMC1 (SD/MMC) */
138 mmc@3400000 { 138 mmc@3400000 {
139 cd-gpios = <&gpio TEGRA186_MAI 139 cd-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
140 wp-gpios = <&gpio TEGRA186_MAI 140 wp-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
141 141
142 vqmmc-supply = <&vddio_sdmmc1> 142 vqmmc-supply = <&vddio_sdmmc1>;
143 }; 143 };
144 144
145 /* SDMMC3 (SDIO) */ 145 /* SDMMC3 (SDIO) */
146 mmc@3440000 { 146 mmc@3440000 {
147 status = "okay"; 147 status = "okay";
148 vqmmc-supply = <&vddio_sdmmc3> <<
149 }; 148 };
150 149
151 /* SDMMC4 (eMMC) */ 150 /* SDMMC4 (eMMC) */
152 mmc@3460000 { 151 mmc@3460000 {
153 status = "okay"; 152 status = "okay";
154 bus-width = <8>; 153 bus-width = <8>;
155 non-removable; 154 non-removable;
156 155
157 vqmmc-supply = <&vdd_1v8_ap>; 156 vqmmc-supply = <&vdd_1v8_ap>;
158 vmmc-supply = <&vdd_3v3_sys>; 157 vmmc-supply = <&vdd_3v3_sys>;
159 }; 158 };
160 159
161 hsp@3c00000 { 160 hsp@3c00000 {
162 status = "okay"; 161 status = "okay";
163 }; 162 };
164 163
165 i2c@c240000 { 164 i2c@c240000 {
166 status = "okay"; 165 status = "okay";
167 }; 166 };
168 167
169 i2c@c250000 { 168 i2c@c250000 {
170 status = "okay"; 169 status = "okay";
171 170
172 /* module ID EEPROM */ 171 /* module ID EEPROM */
173 eeprom@50 { 172 eeprom@50 {
174 compatible = "atmel,24 173 compatible = "atmel,24c02";
175 reg = <0x50>; 174 reg = <0x50>;
176 175
177 label = "module"; 176 label = "module";
178 vcc-supply = <&vdd_1v8 177 vcc-supply = <&vdd_1v8>;
179 address-width = <8>; 178 address-width = <8>;
180 pagesize = <8>; 179 pagesize = <8>;
181 size = <256>; 180 size = <256>;
182 read-only; 181 read-only;
183 }; 182 };
184 }; 183 };
185 184
186 rtc@c2a0000 { 185 rtc@c2a0000 {
187 status = "okay"; 186 status = "okay";
188 }; 187 };
189 188
190 pmc@c360000 { 189 pmc@c360000 {
191 nvidia,invert-interrupt; 190 nvidia,invert-interrupt;
192 }; 191 };
193 192
>> 193 cpus {
>> 194 cpu@0 {
>> 195 enable-method = "psci";
>> 196 };
>> 197
>> 198 cpu@1 {
>> 199 enable-method = "psci";
>> 200 };
>> 201
>> 202 cpu@2 {
>> 203 enable-method = "psci";
>> 204 };
>> 205
>> 206 cpu@3 {
>> 207 enable-method = "psci";
>> 208 };
>> 209
>> 210 cpu@4 {
>> 211 enable-method = "psci";
>> 212 };
>> 213
>> 214 cpu@5 {
>> 215 enable-method = "psci";
>> 216 };
>> 217 };
>> 218
194 bpmp { 219 bpmp {
195 i2c { 220 i2c {
196 status = "okay"; 221 status = "okay";
197 222
198 pmic: pmic@3c { 223 pmic: pmic@3c {
199 compatible = " 224 compatible = "maxim,max77620";
200 reg = <0x3c>; 225 reg = <0x3c>;
201 226
202 interrupt-pare 227 interrupt-parent = <&pmc>;
203 interrupts = < 228 interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
204 #interrupt-cel 229 #interrupt-cells = <2>;
205 interrupt-cont 230 interrupt-controller;
206 231
207 #gpio-cells = 232 #gpio-cells = <2>;
208 gpio-controlle 233 gpio-controller;
209 234
210 pinctrl-names 235 pinctrl-names = "default";
211 pinctrl-0 = <& 236 pinctrl-0 = <&max77620_default>;
212 237
213 fps { <<
214 fps0 { <<
215 <<
216 <<
217 }; <<
218 <<
219 fps1 { <<
220 <<
221 <<
222 }; <<
223 <<
224 fps2 { <<
225 <<
226 <<
227 }; <<
228 }; <<
229 <<
230 max77620_defau 238 max77620_default: pinmux {
231 gpio0 239 gpio0 {
232 240 pins = "gpio0";
233 241 function = "gpio";
234 }; 242 };
235 243
236 gpio1 244 gpio1 {
237 245 pins = "gpio1";
238 246 function = "fps-out";
239 247 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
240 }; 248 };
241 249
242 gpio2 250 gpio2 {
243 251 pins = "gpio2";
244 252 function = "fps-out";
245 253 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
246 }; 254 };
247 255
248 gpio3 256 gpio3 {
249 257 pins = "gpio3";
250 258 function = "fps-out";
251 259 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
252 }; 260 };
253 261
254 gpio4 262 gpio4 {
255 263 pins = "gpio4";
256 264 function = "32k-out1";
257 265 drive-push-pull = <1>;
258 }; 266 };
259 267
260 gpio5 268 gpio5 {
261 269 pins = "gpio5";
262 270 function = "gpio";
263 271 drive-push-pull = <0>;
264 }; 272 };
265 273
266 gpio6 274 gpio6 {
267 275 pins = "gpio6";
268 276 function = "gpio";
269 277 drive-push-pull = <1>;
270 }; 278 };
271 279
272 gpio7 280 gpio7 {
273 281 pins = "gpio7";
274 282 function = "gpio";
275 283 drive-push-pull = <0>;
276 }; 284 };
277 }; 285 };
278 286
>> 287 fps {
>> 288 fps0 {
>> 289 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
>> 290 maxim,shutdown-fps-time-period-us = <640>;
>> 291 };
>> 292
>> 293 fps1 {
>> 294 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
>> 295 maxim,shutdown-fps-time-period-us = <640>;
>> 296 };
>> 297
>> 298 fps2 {
>> 299 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
>> 300 maxim,shutdown-fps-time-period-us = <640>;
>> 301 };
>> 302 };
>> 303
279 regulators { 304 regulators {
280 in-sd0 305 in-sd0-supply = <&vdd_5v0_sys>;
281 in-sd1 306 in-sd1-supply = <&vdd_5v0_sys>;
282 in-sd2 307 in-sd2-supply = <&vdd_5v0_sys>;
283 in-sd3 308 in-sd3-supply = <&vdd_5v0_sys>;
284 309
285 in-ldo 310 in-ldo0-1-supply = <&vdd_5v0_sys>;
286 in-ldo 311 in-ldo2-supply = <&vdd_5v0_sys>;
287 in-ldo 312 in-ldo3-5-supply = <&vdd_5v0_sys>;
288 in-ldo 313 in-ldo4-6-supply = <&vdd_1v8>;
289 in-ldo 314 in-ldo7-8-supply = <&avdd_dsi_csi>;
290 315
291 sd0 { 316 sd0 {
292 317 regulator-name = "VDD_DDR_1V1_PMIC";
293 318 regulator-min-microvolt = <1100000>;
294 319 regulator-max-microvolt = <1100000>;
295 320 regulator-always-on;
296 321 regulator-boot-on;
297 }; 322 };
298 323
299 avdd_d 324 avdd_dsi_csi: sd1 {
300 325 regulator-name = "AVDD_DSI_CSI_1V2";
301 326 regulator-min-microvolt = <1200000>;
302 327 regulator-max-microvolt = <1200000>;
303 }; 328 };
304 329
305 vdd_1v 330 vdd_1v8: sd2 {
306 331 regulator-name = "VDD_1V8";
307 332 regulator-min-microvolt = <1800000>;
308 333 regulator-max-microvolt = <1800000>;
309 }; 334 };
310 335
311 vdd_3v 336 vdd_3v3_sys: sd3 {
312 337 regulator-name = "VDD_3V3_SYS";
313 338 regulator-min-microvolt = <3300000>;
314 339 regulator-max-microvolt = <3300000>;
315 }; 340 };
316 341
317 vdd_1v 342 vdd_1v8_pll: ldo0 {
318 343 regulator-name = "VDD_1V8_AP_PLL";
319 344 regulator-min-microvolt = <1800000>;
320 345 regulator-max-microvolt = <1800000>;
321 }; 346 };
322 347
323 ldo2 { 348 ldo2 {
324 349 regulator-name = "VDDIO_3V3_AOHV";
325 350 regulator-min-microvolt = <3300000>;
326 351 regulator-max-microvolt = <3300000>;
327 352 regulator-always-on;
328 353 regulator-boot-on;
329 }; 354 };
330 355
331 vddio_ 356 vddio_sdmmc1: ldo3 {
332 357 regulator-name = "VDDIO_SDMMC1_AP";
333 358 regulator-min-microvolt = <1800000>;
334 359 regulator-max-microvolt = <3300000>;
335 }; 360 };
336 361
337 ldo4 { 362 ldo4 {
338 363 regulator-name = "VDD_RTC";
339 364 regulator-min-microvolt = <1000000>;
340 365 regulator-max-microvolt = <1000000>;
341 }; 366 };
342 367
343 vddio_ 368 vddio_sdmmc3: ldo5 {
344 369 regulator-name = "VDDIO_SDMMC3_AP";
345 370 regulator-min-microvolt = <2800000>;
346 371 regulator-max-microvolt = <2800000>;
347 }; 372 };
348 373
349 vdd_hd 374 vdd_hdmi_1v05: ldo7 {
350 375 regulator-name = "VDD_HDMI_1V05";
351 376 regulator-min-microvolt = <1050000>;
352 377 regulator-max-microvolt = <1050000>;
353 }; 378 };
354 379
355 vdd_pe 380 vdd_pex: ldo8 {
356 381 regulator-name = "VDD_PEX_1V05";
357 382 regulator-min-microvolt = <1050000>;
358 383 regulator-max-microvolt = <1050000>;
359 }; 384 };
360 }; 385 };
361 }; 386 };
362 }; 387 };
363 }; 388 };
364 389
365 cpus { <<
366 cpu@0 { <<
367 enable-method = "psci" <<
368 }; <<
369 <<
370 cpu@1 { <<
371 enable-method = "psci" <<
372 }; <<
373 <<
374 cpu@2 { <<
375 enable-method = "psci" <<
376 }; <<
377 <<
378 cpu@3 { <<
379 enable-method = "psci" <<
380 }; <<
381 <<
382 cpu@4 { <<
383 enable-method = "psci" <<
384 }; <<
385 <<
386 cpu@5 { <<
387 enable-method = "psci" <<
388 }; <<
389 }; <<
390 <<
391 psci { 390 psci {
392 compatible = "arm,psci-1.0"; 391 compatible = "arm,psci-1.0";
393 status = "okay"; 392 status = "okay";
394 method = "smc"; 393 method = "smc";
395 }; 394 };
396 395
397 gnd: regulator-gnd { !! 396 gnd: regulator@0 {
398 compatible = "regulator-fixed" 397 compatible = "regulator-fixed";
399 regulator-name = "GND"; 398 regulator-name = "GND";
400 regulator-min-microvolt = <0>; 399 regulator-min-microvolt = <0>;
401 regulator-max-microvolt = <0>; 400 regulator-max-microvolt = <0>;
402 regulator-always-on; 401 regulator-always-on;
403 regulator-boot-on; 402 regulator-boot-on;
404 }; 403 };
405 404
406 vdd_5v0_sys: regulator-vdd-5v0-sys { !! 405 vdd_5v0_sys: regulator@1 {
407 compatible = "regulator-fixed" 406 compatible = "regulator-fixed";
408 regulator-name = "VDD_5V0_SYS" 407 regulator-name = "VDD_5V0_SYS";
409 regulator-min-microvolt = <500 408 regulator-min-microvolt = <5000000>;
410 regulator-max-microvolt = <500 409 regulator-max-microvolt = <5000000>;
411 regulator-always-on; 410 regulator-always-on;
412 regulator-boot-on; 411 regulator-boot-on;
413 }; 412 };
414 413
415 vdd_1v8_ap: regulator-vdd-1v8-ap { !! 414 vdd_1v8_ap: regulator@2 {
416 compatible = "regulator-fixed" 415 compatible = "regulator-fixed";
417 regulator-name = "VDD_1V8_AP"; 416 regulator-name = "VDD_1V8_AP";
418 regulator-min-microvolt = <180 417 regulator-min-microvolt = <1800000>;
419 regulator-max-microvolt = <180 418 regulator-max-microvolt = <1800000>;
420 419
421 gpio = <&pmic 1 GPIO_ACTIVE_HI 420 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
422 enable-active-high; 421 enable-active-high;
423 422
424 vin-supply = <&vdd_1v8>; 423 vin-supply = <&vdd_1v8>;
425 }; 424 };
426 }; 425 };
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