1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra186.dtsi" 2 #include "tegra186.dtsi"
3 3
4 #include <dt-bindings/mfd/max77620.h> 4 #include <dt-bindings/mfd/max77620.h>
5 5
6 / { 6 / {
7 model = "NVIDIA Jetson TX2"; 7 model = "NVIDIA Jetson TX2";
8 compatible = "nvidia,p3310", "nvidia,t 8 compatible = "nvidia,p3310", "nvidia,tegra186";
9 9
10 aliases { 10 aliases {
11 ethernet0 = "/ethernet@2490000 !! 11 sdhci0 = "/sdhci@3460000";
>> 12 sdhci1 = "/sdhci@3400000";
>> 13 serial0 = &uarta;
12 i2c0 = "/bpmp/i2c"; 14 i2c0 = "/bpmp/i2c";
13 i2c1 = "/i2c@3160000"; 15 i2c1 = "/i2c@3160000";
14 i2c2 = "/i2c@c240000"; 16 i2c2 = "/i2c@c240000";
15 i2c3 = "/i2c@3180000"; 17 i2c3 = "/i2c@3180000";
16 i2c4 = "/i2c@3190000"; 18 i2c4 = "/i2c@3190000";
17 i2c5 = "/i2c@31c0000"; 19 i2c5 = "/i2c@31c0000";
18 i2c6 = "/i2c@c250000"; 20 i2c6 = "/i2c@c250000";
19 i2c7 = "/i2c@31e0000"; 21 i2c7 = "/i2c@31e0000";
20 mmc0 = "/mmc@3460000"; <<
21 mmc1 = "/mmc@3400000"; <<
22 serial0 = &uarta; <<
23 }; 22 };
24 23
25 chosen { 24 chosen {
26 bootargs = "earlycon console=t !! 25 bootargs = "earlycon console=ttyS0,115200n8";
27 stdout-path = "serial0:115200n 26 stdout-path = "serial0:115200n8";
28 }; 27 };
29 28
30 memory@80000000 { !! 29 memory {
31 device_type = "memory"; 30 device_type = "memory";
32 reg = <0x0 0x80000000 0x2 0x00 31 reg = <0x0 0x80000000 0x2 0x00000000>;
33 }; 32 };
34 33
35 ethernet@2490000 { 34 ethernet@2490000 {
36 status = "okay"; 35 status = "okay";
37 36
38 phy-reset-gpios = <&gpio TEGRA 37 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
39 GPIO_ 38 GPIO_ACTIVE_LOW>;
40 phy-handle = <&phy>; 39 phy-handle = <&phy>;
41 phy-mode = "rgmii"; 40 phy-mode = "rgmii";
42 41
43 mdio { 42 mdio {
44 #address-cells = <1>; 43 #address-cells = <1>;
45 #size-cells = <0>; 44 #size-cells = <0>;
46 45
47 phy: ethernet-phy@0 { !! 46 phy: phy@0 {
48 compatible = " 47 compatible = "ethernet-phy-ieee802.3-c22";
49 reg = <0x0>; 48 reg = <0x0>;
50 interrupt-pare 49 interrupt-parent = <&gpio>;
51 interrupts = < 50 interrupts = <TEGRA186_MAIN_GPIO(M, 5)
52 51 IRQ_TYPE_LEVEL_LOW>;
53 <<
54 #phy-cells = < <<
55 }; 52 };
56 }; 53 };
57 }; 54 };
58 55
59 memory-controller@2c00000 { 56 memory-controller@2c00000 {
60 status = "okay"; 57 status = "okay";
61 }; 58 };
62 59
63 serial@3100000 { 60 serial@3100000 {
64 status = "okay"; 61 status = "okay";
65 }; 62 };
66 63
67 i2c@3160000 { 64 i2c@3160000 {
68 status = "okay"; 65 status = "okay";
69 66
70 power-monitor@40 { 67 power-monitor@40 {
71 compatible = "ti,ina32 68 compatible = "ti,ina3221";
72 reg = <0x40>; 69 reg = <0x40>;
73 #address-cells = <1>; 70 #address-cells = <1>;
74 #size-cells = <0>; 71 #size-cells = <0>;
75 72
76 input@0 { !! 73 channel@0 {
77 reg = <0x0>; 74 reg = <0x0>;
78 label = "VDD_S 75 label = "VDD_SYS_GPU";
79 shunt-resistor 76 shunt-resistor-micro-ohms = <10000>;
80 }; 77 };
81 78
82 input@1 { !! 79 channel@1 {
83 reg = <0x1>; 80 reg = <0x1>;
84 label = "VDD_S 81 label = "VDD_SYS_SOC";
85 shunt-resistor 82 shunt-resistor-micro-ohms = <10000>;
86 }; 83 };
87 84
88 input@2 { !! 85 channel@2 {
89 reg = <0x2>; 86 reg = <0x2>;
90 label = "VDD_3 87 label = "VDD_3V8_WIFI";
91 shunt-resistor 88 shunt-resistor-micro-ohms = <10000>;
92 }; 89 };
93 }; 90 };
94 91
95 power-monitor@41 { 92 power-monitor@41 {
96 compatible = "ti,ina32 93 compatible = "ti,ina3221";
97 reg = <0x41>; 94 reg = <0x41>;
98 #address-cells = <1>; 95 #address-cells = <1>;
99 #size-cells = <0>; 96 #size-cells = <0>;
100 97
101 input@0 { !! 98 channel@0 {
102 reg = <0x0>; 99 reg = <0x0>;
103 label = "VDD_I 100 label = "VDD_IN";
104 shunt-resistor 101 shunt-resistor-micro-ohms = <5000>;
105 }; 102 };
106 103
107 input@1 { !! 104 channel@1 {
108 reg = <0x1>; 105 reg = <0x1>;
109 label = "VDD_S 106 label = "VDD_SYS_CPU";
110 shunt-resistor 107 shunt-resistor-micro-ohms = <10000>;
111 }; 108 };
112 109
113 input@2 { !! 110 channel@2 {
114 reg = <0x2>; 111 reg = <0x2>;
115 label = "VDD_5 112 label = "VDD_5V0_DDR";
116 shunt-resistor 113 shunt-resistor-micro-ohms = <10000>;
117 }; 114 };
118 }; 115 };
119 }; 116 };
120 117
121 i2c@3180000 { 118 i2c@3180000 {
122 status = "okay"; 119 status = "okay";
123 }; 120 };
124 121
125 ddc: i2c@3190000 { 122 ddc: i2c@3190000 {
126 status = "okay"; 123 status = "okay";
127 }; 124 };
128 125
129 i2c@31c0000 { 126 i2c@31c0000 {
130 status = "okay"; 127 status = "okay";
131 }; 128 };
132 129
133 i2c@31e0000 { 130 i2c@31e0000 {
134 status = "okay"; 131 status = "okay";
135 }; 132 };
136 133
137 /* SDMMC1 (SD/MMC) */ 134 /* SDMMC1 (SD/MMC) */
138 mmc@3400000 { !! 135 sdhci@3400000 {
139 cd-gpios = <&gpio TEGRA186_MAI 136 cd-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
140 wp-gpios = <&gpio TEGRA186_MAI 137 wp-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
141 138
142 vqmmc-supply = <&vddio_sdmmc1> 139 vqmmc-supply = <&vddio_sdmmc1>;
143 }; 140 };
144 141
145 /* SDMMC3 (SDIO) */ 142 /* SDMMC3 (SDIO) */
146 mmc@3440000 { !! 143 sdhci@3440000 {
147 status = "okay"; 144 status = "okay";
148 vqmmc-supply = <&vddio_sdmmc3> <<
149 }; 145 };
150 146
151 /* SDMMC4 (eMMC) */ 147 /* SDMMC4 (eMMC) */
152 mmc@3460000 { !! 148 sdhci@3460000 {
153 status = "okay"; 149 status = "okay";
154 bus-width = <8>; 150 bus-width = <8>;
155 non-removable; 151 non-removable;
156 152
157 vqmmc-supply = <&vdd_1v8_ap>; 153 vqmmc-supply = <&vdd_1v8_ap>;
158 vmmc-supply = <&vdd_3v3_sys>; 154 vmmc-supply = <&vdd_3v3_sys>;
159 }; 155 };
160 156
161 hsp@3c00000 { 157 hsp@3c00000 {
162 status = "okay"; 158 status = "okay";
163 }; 159 };
164 160
165 i2c@c240000 { 161 i2c@c240000 {
166 status = "okay"; 162 status = "okay";
167 }; 163 };
168 164
169 i2c@c250000 { 165 i2c@c250000 {
170 status = "okay"; 166 status = "okay";
171 167
172 /* module ID EEPROM */ 168 /* module ID EEPROM */
173 eeprom@50 { 169 eeprom@50 {
174 compatible = "atmel,24 170 compatible = "atmel,24c02";
175 reg = <0x50>; 171 reg = <0x50>;
176 172
177 label = "module"; !! 173 address-bits = <8>;
178 vcc-supply = <&vdd_1v8 !! 174 page-size = <8>;
179 address-width = <8>; <<
180 pagesize = <8>; <<
181 size = <256>; 175 size = <256>;
182 read-only; 176 read-only;
183 }; 177 };
184 }; 178 };
185 179
186 rtc@c2a0000 { 180 rtc@c2a0000 {
187 status = "okay"; 181 status = "okay";
188 }; 182 };
189 183
190 pmc@c360000 { 184 pmc@c360000 {
191 nvidia,invert-interrupt; 185 nvidia,invert-interrupt;
192 }; 186 };
193 187
>> 188 cpus {
>> 189 cpu@0 {
>> 190 enable-method = "psci";
>> 191 };
>> 192
>> 193 cpu@1 {
>> 194 enable-method = "psci";
>> 195 };
>> 196
>> 197 cpu@2 {
>> 198 enable-method = "psci";
>> 199 };
>> 200
>> 201 cpu@3 {
>> 202 enable-method = "psci";
>> 203 };
>> 204
>> 205 cpu@4 {
>> 206 enable-method = "psci";
>> 207 };
>> 208
>> 209 cpu@5 {
>> 210 enable-method = "psci";
>> 211 };
>> 212 };
>> 213
194 bpmp { 214 bpmp {
195 i2c { 215 i2c {
196 status = "okay"; 216 status = "okay";
197 217
198 pmic: pmic@3c { 218 pmic: pmic@3c {
199 compatible = " 219 compatible = "maxim,max77620";
200 reg = <0x3c>; 220 reg = <0x3c>;
201 221
202 interrupt-pare !! 222 interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
203 interrupts = < <<
204 #interrupt-cel 223 #interrupt-cells = <2>;
205 interrupt-cont 224 interrupt-controller;
206 225
207 #gpio-cells = 226 #gpio-cells = <2>;
208 gpio-controlle 227 gpio-controller;
209 228
210 pinctrl-names 229 pinctrl-names = "default";
211 pinctrl-0 = <& 230 pinctrl-0 = <&max77620_default>;
212 231
213 fps { <<
214 fps0 { <<
215 <<
216 <<
217 }; <<
218 <<
219 fps1 { <<
220 <<
221 <<
222 }; <<
223 <<
224 fps2 { <<
225 <<
226 <<
227 }; <<
228 }; <<
229 <<
230 max77620_defau 232 max77620_default: pinmux {
231 gpio0 233 gpio0 {
232 234 pins = "gpio0";
233 235 function = "gpio";
234 }; 236 };
235 237
236 gpio1 238 gpio1 {
237 239 pins = "gpio1";
238 240 function = "fps-out";
239 241 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
240 }; 242 };
241 243
242 gpio2 244 gpio2 {
243 245 pins = "gpio2";
244 246 function = "fps-out";
245 247 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
246 }; 248 };
247 249
248 gpio3 250 gpio3 {
249 251 pins = "gpio3";
250 252 function = "fps-out";
251 253 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
252 }; 254 };
253 255
254 gpio4 256 gpio4 {
255 257 pins = "gpio4";
256 258 function = "32k-out1";
257 259 drive-push-pull = <1>;
258 }; 260 };
259 261
260 gpio5 262 gpio5 {
261 263 pins = "gpio5";
262 264 function = "gpio";
263 265 drive-push-pull = <0>;
264 }; 266 };
265 267
266 gpio6 268 gpio6 {
267 269 pins = "gpio6";
268 270 function = "gpio";
269 271 drive-push-pull = <1>;
270 }; 272 };
271 273
272 gpio7 274 gpio7 {
273 275 pins = "gpio7";
274 276 function = "gpio";
275 277 drive-push-pull = <0>;
276 }; 278 };
277 }; 279 };
278 280
>> 281 fps {
>> 282 fps0 {
>> 283 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
>> 284 maxim,shutdown-fps-time-period-us = <640>;
>> 285 };
>> 286
>> 287 fps1 {
>> 288 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
>> 289 maxim,shutdown-fps-time-period-us = <640>;
>> 290 };
>> 291
>> 292 fps2 {
>> 293 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
>> 294 maxim,shutdown-fps-time-period-us = <640>;
>> 295 };
>> 296 };
>> 297
279 regulators { 298 regulators {
280 in-sd0 299 in-sd0-supply = <&vdd_5v0_sys>;
281 in-sd1 300 in-sd1-supply = <&vdd_5v0_sys>;
282 in-sd2 301 in-sd2-supply = <&vdd_5v0_sys>;
283 in-sd3 302 in-sd3-supply = <&vdd_5v0_sys>;
284 303
285 in-ldo 304 in-ldo0-1-supply = <&vdd_5v0_sys>;
286 in-ldo 305 in-ldo2-supply = <&vdd_5v0_sys>;
287 in-ldo 306 in-ldo3-5-supply = <&vdd_5v0_sys>;
288 in-ldo 307 in-ldo4-6-supply = <&vdd_1v8>;
289 in-ldo 308 in-ldo7-8-supply = <&avdd_dsi_csi>;
290 309
291 sd0 { 310 sd0 {
292 311 regulator-name = "VDD_DDR_1V1_PMIC";
293 312 regulator-min-microvolt = <1100000>;
294 313 regulator-max-microvolt = <1100000>;
295 314 regulator-always-on;
296 315 regulator-boot-on;
297 }; 316 };
298 317
299 avdd_d 318 avdd_dsi_csi: sd1 {
300 319 regulator-name = "AVDD_DSI_CSI_1V2";
301 320 regulator-min-microvolt = <1200000>;
302 321 regulator-max-microvolt = <1200000>;
303 }; 322 };
304 323
305 vdd_1v 324 vdd_1v8: sd2 {
306 325 regulator-name = "VDD_1V8";
307 326 regulator-min-microvolt = <1800000>;
308 327 regulator-max-microvolt = <1800000>;
309 }; 328 };
310 329
311 vdd_3v 330 vdd_3v3_sys: sd3 {
312 331 regulator-name = "VDD_3V3_SYS";
313 332 regulator-min-microvolt = <3300000>;
314 333 regulator-max-microvolt = <3300000>;
315 }; 334 };
316 335
317 vdd_1v 336 vdd_1v8_pll: ldo0 {
318 337 regulator-name = "VDD_1V8_AP_PLL";
319 338 regulator-min-microvolt = <1800000>;
320 339 regulator-max-microvolt = <1800000>;
321 }; 340 };
322 341
323 ldo2 { 342 ldo2 {
324 343 regulator-name = "VDDIO_3V3_AOHV";
325 344 regulator-min-microvolt = <3300000>;
326 345 regulator-max-microvolt = <3300000>;
327 346 regulator-always-on;
328 347 regulator-boot-on;
329 }; 348 };
330 349
331 vddio_ 350 vddio_sdmmc1: ldo3 {
332 351 regulator-name = "VDDIO_SDMMC1_AP";
333 352 regulator-min-microvolt = <1800000>;
334 353 regulator-max-microvolt = <3300000>;
335 }; 354 };
336 355
337 ldo4 { 356 ldo4 {
338 357 regulator-name = "VDD_RTC";
339 358 regulator-min-microvolt = <1000000>;
340 359 regulator-max-microvolt = <1000000>;
341 }; 360 };
342 361
343 vddio_ 362 vddio_sdmmc3: ldo5 {
344 363 regulator-name = "VDDIO_SDMMC3_AP";
345 364 regulator-min-microvolt = <2800000>;
346 365 regulator-max-microvolt = <2800000>;
347 }; 366 };
348 367
349 vdd_hd 368 vdd_hdmi_1v05: ldo7 {
350 369 regulator-name = "VDD_HDMI_1V05";
351 370 regulator-min-microvolt = <1050000>;
352 371 regulator-max-microvolt = <1050000>;
353 }; 372 };
354 373
355 vdd_pe 374 vdd_pex: ldo8 {
356 375 regulator-name = "VDD_PEX_1V05";
357 376 regulator-min-microvolt = <1050000>;
358 377 regulator-max-microvolt = <1050000>;
359 }; 378 };
360 }; 379 };
361 }; 380 };
362 }; 381 };
363 }; 382 };
364 383
365 cpus { !! 384 psci {
366 cpu@0 { !! 385 compatible = "arm,psci-1.0";
367 enable-method = "psci" !! 386 status = "okay";
368 }; !! 387 method = "smc";
>> 388 };
369 389
370 cpu@1 { !! 390 regulators {
371 enable-method = "psci" !! 391 compatible = "simple-bus";
372 }; !! 392 #address-cells = <1>;
>> 393 #size-cells = <0>;
373 394
374 cpu@2 { !! 395 gnd: regulator@0 {
375 enable-method = "psci" !! 396 compatible = "regulator-fixed";
376 }; !! 397 reg = <0>;
377 398
378 cpu@3 { !! 399 regulator-name = "GND";
379 enable-method = "psci" !! 400 regulator-min-microvolt = <0>;
>> 401 regulator-max-microvolt = <0>;
>> 402 regulator-always-on;
>> 403 regulator-boot-on;
380 }; 404 };
381 405
382 cpu@4 { !! 406 vdd_5v0_sys: regulator@1 {
383 enable-method = "psci" !! 407 compatible = "regulator-fixed";
384 }; !! 408 reg = <1>;
385 409
386 cpu@5 { !! 410 regulator-name = "VDD_5V0_SYS";
387 enable-method = "psci" !! 411 regulator-min-microvolt = <5000000>;
>> 412 regulator-max-microvolt = <5000000>;
>> 413 regulator-always-on;
>> 414 regulator-boot-on;
388 }; 415 };
389 }; <<
390 416
391 psci { !! 417 vdd_1v8_ap: regulator@2 {
392 compatible = "arm,psci-1.0"; !! 418 compatible = "regulator-fixed";
393 status = "okay"; !! 419 reg = <2>;
394 method = "smc"; <<
395 }; <<
396 420
397 gnd: regulator-gnd { !! 421 regulator-name = "VDD_1V8_AP";
398 compatible = "regulator-fixed" !! 422 regulator-min-microvolt = <1800000>;
399 regulator-name = "GND"; !! 423 regulator-max-microvolt = <1800000>;
400 regulator-min-microvolt = <0>; <<
401 regulator-max-microvolt = <0>; <<
402 regulator-always-on; <<
403 regulator-boot-on; <<
404 }; <<
405 <<
406 vdd_5v0_sys: regulator-vdd-5v0-sys { <<
407 compatible = "regulator-fixed" <<
408 regulator-name = "VDD_5V0_SYS" <<
409 regulator-min-microvolt = <500 <<
410 regulator-max-microvolt = <500 <<
411 regulator-always-on; <<
412 regulator-boot-on; <<
413 }; <<
414 <<
415 vdd_1v8_ap: regulator-vdd-1v8-ap { <<
416 compatible = "regulator-fixed" <<
417 regulator-name = "VDD_1V8_AP"; <<
418 regulator-min-microvolt = <180 <<
419 regulator-max-microvolt = <180 <<
420 424
421 gpio = <&pmic 1 GPIO_ACTIVE_HI !! 425 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
422 enable-active-high; !! 426 enable-active-high;
423 427
424 vin-supply = <&vdd_1v8>; !! 428 vin-supply = <&vdd_1v8>;
>> 429 };
425 }; 430 };
426 }; 431 };
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