1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0 2 #include "tegra186.dtsi" 2 #include "tegra186.dtsi" 3 3 4 #include <dt-bindings/mfd/max77620.h> 4 #include <dt-bindings/mfd/max77620.h> 5 5 6 / { 6 / { 7 model = "NVIDIA Jetson TX2"; 7 model = "NVIDIA Jetson TX2"; 8 compatible = "nvidia,p3310", "nvidia,t 8 compatible = "nvidia,p3310", "nvidia,tegra186"; 9 9 10 aliases { 10 aliases { 11 ethernet0 = "/ethernet@2490000 11 ethernet0 = "/ethernet@2490000"; >> 12 sdhci0 = "/sdhci@3460000"; >> 13 sdhci1 = "/sdhci@3400000"; >> 14 serial0 = &uarta; 12 i2c0 = "/bpmp/i2c"; 15 i2c0 = "/bpmp/i2c"; 13 i2c1 = "/i2c@3160000"; 16 i2c1 = "/i2c@3160000"; 14 i2c2 = "/i2c@c240000"; 17 i2c2 = "/i2c@c240000"; 15 i2c3 = "/i2c@3180000"; 18 i2c3 = "/i2c@3180000"; 16 i2c4 = "/i2c@3190000"; 19 i2c4 = "/i2c@3190000"; 17 i2c5 = "/i2c@31c0000"; 20 i2c5 = "/i2c@31c0000"; 18 i2c6 = "/i2c@c250000"; 21 i2c6 = "/i2c@c250000"; 19 i2c7 = "/i2c@31e0000"; 22 i2c7 = "/i2c@31e0000"; 20 mmc0 = "/mmc@3460000"; << 21 mmc1 = "/mmc@3400000"; << 22 serial0 = &uarta; << 23 }; 23 }; 24 24 25 chosen { 25 chosen { 26 bootargs = "earlycon console=t !! 26 bootargs = "earlycon console=ttyS0,115200n8"; 27 stdout-path = "serial0:115200n 27 stdout-path = "serial0:115200n8"; 28 }; 28 }; 29 29 30 memory@80000000 { !! 30 memory { 31 device_type = "memory"; 31 device_type = "memory"; 32 reg = <0x0 0x80000000 0x2 0x00 32 reg = <0x0 0x80000000 0x2 0x00000000>; 33 }; 33 }; 34 34 35 ethernet@2490000 { 35 ethernet@2490000 { 36 status = "okay"; 36 status = "okay"; 37 37 38 phy-reset-gpios = <&gpio TEGRA 38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4) 39 GPIO_ 39 GPIO_ACTIVE_LOW>; 40 phy-handle = <&phy>; 40 phy-handle = <&phy>; 41 phy-mode = "rgmii"; 41 phy-mode = "rgmii"; 42 42 43 mdio { 43 mdio { 44 #address-cells = <1>; 44 #address-cells = <1>; 45 #size-cells = <0>; 45 #size-cells = <0>; 46 46 47 phy: ethernet-phy@0 { !! 47 phy: phy@0 { 48 compatible = " 48 compatible = "ethernet-phy-ieee802.3-c22"; 49 reg = <0x0>; 49 reg = <0x0>; 50 interrupt-pare 50 interrupt-parent = <&gpio>; 51 interrupts = < 51 interrupts = <TEGRA186_MAIN_GPIO(M, 5) 52 52 IRQ_TYPE_LEVEL_LOW>; 53 << 54 #phy-cells = < << 55 }; 53 }; 56 }; 54 }; 57 }; 55 }; 58 56 59 memory-controller@2c00000 { 57 memory-controller@2c00000 { 60 status = "okay"; 58 status = "okay"; 61 }; 59 }; 62 60 63 serial@3100000 { 61 serial@3100000 { 64 status = "okay"; 62 status = "okay"; 65 }; 63 }; 66 64 67 i2c@3160000 { 65 i2c@3160000 { 68 status = "okay"; 66 status = "okay"; 69 67 70 power-monitor@40 { 68 power-monitor@40 { 71 compatible = "ti,ina32 69 compatible = "ti,ina3221"; 72 reg = <0x40>; 70 reg = <0x40>; 73 #address-cells = <1>; 71 #address-cells = <1>; 74 #size-cells = <0>; 72 #size-cells = <0>; 75 73 76 input@0 { !! 74 channel@0 { 77 reg = <0x0>; 75 reg = <0x0>; 78 label = "VDD_S 76 label = "VDD_SYS_GPU"; 79 shunt-resistor 77 shunt-resistor-micro-ohms = <10000>; 80 }; 78 }; 81 79 82 input@1 { !! 80 channel@1 { 83 reg = <0x1>; 81 reg = <0x1>; 84 label = "VDD_S 82 label = "VDD_SYS_SOC"; 85 shunt-resistor 83 shunt-resistor-micro-ohms = <10000>; 86 }; 84 }; 87 85 88 input@2 { !! 86 channel@2 { 89 reg = <0x2>; 87 reg = <0x2>; 90 label = "VDD_3 88 label = "VDD_3V8_WIFI"; 91 shunt-resistor 89 shunt-resistor-micro-ohms = <10000>; 92 }; 90 }; 93 }; 91 }; 94 92 95 power-monitor@41 { 93 power-monitor@41 { 96 compatible = "ti,ina32 94 compatible = "ti,ina3221"; 97 reg = <0x41>; 95 reg = <0x41>; 98 #address-cells = <1>; 96 #address-cells = <1>; 99 #size-cells = <0>; 97 #size-cells = <0>; 100 98 101 input@0 { !! 99 channel@0 { 102 reg = <0x0>; 100 reg = <0x0>; 103 label = "VDD_I 101 label = "VDD_IN"; 104 shunt-resistor 102 shunt-resistor-micro-ohms = <5000>; 105 }; 103 }; 106 104 107 input@1 { !! 105 channel@1 { 108 reg = <0x1>; 106 reg = <0x1>; 109 label = "VDD_S 107 label = "VDD_SYS_CPU"; 110 shunt-resistor 108 shunt-resistor-micro-ohms = <10000>; 111 }; 109 }; 112 110 113 input@2 { !! 111 channel@2 { 114 reg = <0x2>; 112 reg = <0x2>; 115 label = "VDD_5 113 label = "VDD_5V0_DDR"; 116 shunt-resistor 114 shunt-resistor-micro-ohms = <10000>; 117 }; 115 }; 118 }; 116 }; 119 }; 117 }; 120 118 121 i2c@3180000 { 119 i2c@3180000 { 122 status = "okay"; 120 status = "okay"; 123 }; 121 }; 124 122 125 ddc: i2c@3190000 { 123 ddc: i2c@3190000 { 126 status = "okay"; 124 status = "okay"; 127 }; 125 }; 128 126 129 i2c@31c0000 { 127 i2c@31c0000 { 130 status = "okay"; 128 status = "okay"; 131 }; 129 }; 132 130 133 i2c@31e0000 { 131 i2c@31e0000 { 134 status = "okay"; 132 status = "okay"; 135 }; 133 }; 136 134 137 /* SDMMC1 (SD/MMC) */ 135 /* SDMMC1 (SD/MMC) */ 138 mmc@3400000 { !! 136 sdhci@3400000 { 139 cd-gpios = <&gpio TEGRA186_MAI 137 cd-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>; 140 wp-gpios = <&gpio TEGRA186_MAI 138 wp-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>; 141 139 142 vqmmc-supply = <&vddio_sdmmc1> 140 vqmmc-supply = <&vddio_sdmmc1>; 143 }; 141 }; 144 142 145 /* SDMMC3 (SDIO) */ 143 /* SDMMC3 (SDIO) */ 146 mmc@3440000 { !! 144 sdhci@3440000 { 147 status = "okay"; 145 status = "okay"; 148 vqmmc-supply = <&vddio_sdmmc3> << 149 }; 146 }; 150 147 151 /* SDMMC4 (eMMC) */ 148 /* SDMMC4 (eMMC) */ 152 mmc@3460000 { !! 149 sdhci@3460000 { 153 status = "okay"; 150 status = "okay"; 154 bus-width = <8>; 151 bus-width = <8>; 155 non-removable; 152 non-removable; 156 153 157 vqmmc-supply = <&vdd_1v8_ap>; 154 vqmmc-supply = <&vdd_1v8_ap>; 158 vmmc-supply = <&vdd_3v3_sys>; 155 vmmc-supply = <&vdd_3v3_sys>; 159 }; 156 }; 160 157 161 hsp@3c00000 { 158 hsp@3c00000 { 162 status = "okay"; 159 status = "okay"; 163 }; 160 }; 164 161 165 i2c@c240000 { 162 i2c@c240000 { 166 status = "okay"; 163 status = "okay"; 167 }; 164 }; 168 165 169 i2c@c250000 { 166 i2c@c250000 { 170 status = "okay"; 167 status = "okay"; 171 168 172 /* module ID EEPROM */ 169 /* module ID EEPROM */ 173 eeprom@50 { 170 eeprom@50 { 174 compatible = "atmel,24 171 compatible = "atmel,24c02"; 175 reg = <0x50>; 172 reg = <0x50>; 176 173 177 label = "module"; !! 174 address-bits = <8>; 178 vcc-supply = <&vdd_1v8 !! 175 page-size = <8>; 179 address-width = <8>; << 180 pagesize = <8>; << 181 size = <256>; 176 size = <256>; 182 read-only; 177 read-only; 183 }; 178 }; 184 }; 179 }; 185 180 186 rtc@c2a0000 { 181 rtc@c2a0000 { 187 status = "okay"; 182 status = "okay"; 188 }; 183 }; 189 184 190 pmc@c360000 { 185 pmc@c360000 { 191 nvidia,invert-interrupt; 186 nvidia,invert-interrupt; 192 }; 187 }; 193 188 >> 189 cpus { >> 190 cpu@0 { >> 191 enable-method = "psci"; >> 192 }; >> 193 >> 194 cpu@1 { >> 195 enable-method = "psci"; >> 196 }; >> 197 >> 198 cpu@2 { >> 199 enable-method = "psci"; >> 200 }; >> 201 >> 202 cpu@3 { >> 203 enable-method = "psci"; >> 204 }; >> 205 >> 206 cpu@4 { >> 207 enable-method = "psci"; >> 208 }; >> 209 >> 210 cpu@5 { >> 211 enable-method = "psci"; >> 212 }; >> 213 }; >> 214 194 bpmp { 215 bpmp { 195 i2c { 216 i2c { 196 status = "okay"; 217 status = "okay"; 197 218 198 pmic: pmic@3c { 219 pmic: pmic@3c { 199 compatible = " 220 compatible = "maxim,max77620"; 200 reg = <0x3c>; 221 reg = <0x3c>; 201 222 202 interrupt-pare !! 223 interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>; 203 interrupts = < << 204 #interrupt-cel 224 #interrupt-cells = <2>; 205 interrupt-cont 225 interrupt-controller; 206 226 207 #gpio-cells = 227 #gpio-cells = <2>; 208 gpio-controlle 228 gpio-controller; 209 229 210 pinctrl-names 230 pinctrl-names = "default"; 211 pinctrl-0 = <& 231 pinctrl-0 = <&max77620_default>; 212 232 213 fps { << 214 fps0 { << 215 << 216 << 217 }; << 218 << 219 fps1 { << 220 << 221 << 222 }; << 223 << 224 fps2 { << 225 << 226 << 227 }; << 228 }; << 229 << 230 max77620_defau 233 max77620_default: pinmux { 231 gpio0 234 gpio0 { 232 235 pins = "gpio0"; 233 236 function = "gpio"; 234 }; 237 }; 235 238 236 gpio1 239 gpio1 { 237 240 pins = "gpio1"; 238 241 function = "fps-out"; 239 242 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 240 }; 243 }; 241 244 242 gpio2 245 gpio2 { 243 246 pins = "gpio2"; 244 247 function = "fps-out"; 245 248 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 246 }; 249 }; 247 250 248 gpio3 251 gpio3 { 249 252 pins = "gpio3"; 250 253 function = "fps-out"; 251 254 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 252 }; 255 }; 253 256 254 gpio4 257 gpio4 { 255 258 pins = "gpio4"; 256 259 function = "32k-out1"; 257 260 drive-push-pull = <1>; 258 }; 261 }; 259 262 260 gpio5 263 gpio5 { 261 264 pins = "gpio5"; 262 265 function = "gpio"; 263 266 drive-push-pull = <0>; 264 }; 267 }; 265 268 266 gpio6 269 gpio6 { 267 270 pins = "gpio6"; 268 271 function = "gpio"; 269 272 drive-push-pull = <1>; 270 }; 273 }; 271 274 272 gpio7 275 gpio7 { 273 276 pins = "gpio7"; 274 277 function = "gpio"; 275 278 drive-push-pull = <0>; 276 }; 279 }; 277 }; 280 }; 278 281 >> 282 fps { >> 283 fps0 { >> 284 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; >> 285 maxim,shutdown-fps-time-period-us = <640>; >> 286 }; >> 287 >> 288 fps1 { >> 289 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; >> 290 maxim,shutdown-fps-time-period-us = <640>; >> 291 }; >> 292 >> 293 fps2 { >> 294 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; >> 295 maxim,shutdown-fps-time-period-us = <640>; >> 296 }; >> 297 }; >> 298 279 regulators { 299 regulators { 280 in-sd0 300 in-sd0-supply = <&vdd_5v0_sys>; 281 in-sd1 301 in-sd1-supply = <&vdd_5v0_sys>; 282 in-sd2 302 in-sd2-supply = <&vdd_5v0_sys>; 283 in-sd3 303 in-sd3-supply = <&vdd_5v0_sys>; 284 304 285 in-ldo 305 in-ldo0-1-supply = <&vdd_5v0_sys>; 286 in-ldo 306 in-ldo2-supply = <&vdd_5v0_sys>; 287 in-ldo 307 in-ldo3-5-supply = <&vdd_5v0_sys>; 288 in-ldo 308 in-ldo4-6-supply = <&vdd_1v8>; 289 in-ldo 309 in-ldo7-8-supply = <&avdd_dsi_csi>; 290 310 291 sd0 { 311 sd0 { 292 312 regulator-name = "VDD_DDR_1V1_PMIC"; 293 313 regulator-min-microvolt = <1100000>; 294 314 regulator-max-microvolt = <1100000>; 295 315 regulator-always-on; 296 316 regulator-boot-on; 297 }; 317 }; 298 318 299 avdd_d 319 avdd_dsi_csi: sd1 { 300 320 regulator-name = "AVDD_DSI_CSI_1V2"; 301 321 regulator-min-microvolt = <1200000>; 302 322 regulator-max-microvolt = <1200000>; 303 }; 323 }; 304 324 305 vdd_1v 325 vdd_1v8: sd2 { 306 326 regulator-name = "VDD_1V8"; 307 327 regulator-min-microvolt = <1800000>; 308 328 regulator-max-microvolt = <1800000>; 309 }; 329 }; 310 330 311 vdd_3v 331 vdd_3v3_sys: sd3 { 312 332 regulator-name = "VDD_3V3_SYS"; 313 333 regulator-min-microvolt = <3300000>; 314 334 regulator-max-microvolt = <3300000>; 315 }; 335 }; 316 336 317 vdd_1v 337 vdd_1v8_pll: ldo0 { 318 338 regulator-name = "VDD_1V8_AP_PLL"; 319 339 regulator-min-microvolt = <1800000>; 320 340 regulator-max-microvolt = <1800000>; 321 }; 341 }; 322 342 323 ldo2 { 343 ldo2 { 324 344 regulator-name = "VDDIO_3V3_AOHV"; 325 345 regulator-min-microvolt = <3300000>; 326 346 regulator-max-microvolt = <3300000>; 327 347 regulator-always-on; 328 348 regulator-boot-on; 329 }; 349 }; 330 350 331 vddio_ 351 vddio_sdmmc1: ldo3 { 332 352 regulator-name = "VDDIO_SDMMC1_AP"; 333 353 regulator-min-microvolt = <1800000>; 334 354 regulator-max-microvolt = <3300000>; 335 }; 355 }; 336 356 337 ldo4 { 357 ldo4 { 338 358 regulator-name = "VDD_RTC"; 339 359 regulator-min-microvolt = <1000000>; 340 360 regulator-max-microvolt = <1000000>; 341 }; 361 }; 342 362 343 vddio_ 363 vddio_sdmmc3: ldo5 { 344 364 regulator-name = "VDDIO_SDMMC3_AP"; 345 365 regulator-min-microvolt = <2800000>; 346 366 regulator-max-microvolt = <2800000>; 347 }; 367 }; 348 368 349 vdd_hd 369 vdd_hdmi_1v05: ldo7 { 350 370 regulator-name = "VDD_HDMI_1V05"; 351 371 regulator-min-microvolt = <1050000>; 352 372 regulator-max-microvolt = <1050000>; 353 }; 373 }; 354 374 355 vdd_pe 375 vdd_pex: ldo8 { 356 376 regulator-name = "VDD_PEX_1V05"; 357 377 regulator-min-microvolt = <1050000>; 358 378 regulator-max-microvolt = <1050000>; 359 }; 379 }; 360 }; 380 }; 361 }; 381 }; 362 }; 382 }; 363 }; 383 }; 364 384 365 cpus { !! 385 psci { 366 cpu@0 { !! 386 compatible = "arm,psci-1.0"; 367 enable-method = "psci" !! 387 status = "okay"; 368 }; !! 388 method = "smc"; >> 389 }; 369 390 370 cpu@1 { !! 391 regulators { 371 enable-method = "psci" !! 392 compatible = "simple-bus"; 372 }; !! 393 #address-cells = <1>; >> 394 #size-cells = <0>; 373 395 374 cpu@2 { !! 396 gnd: regulator@0 { 375 enable-method = "psci" !! 397 compatible = "regulator-fixed"; 376 }; !! 398 reg = <0>; 377 399 378 cpu@3 { !! 400 regulator-name = "GND"; 379 enable-method = "psci" !! 401 regulator-min-microvolt = <0>; >> 402 regulator-max-microvolt = <0>; >> 403 regulator-always-on; >> 404 regulator-boot-on; 380 }; 405 }; 381 406 382 cpu@4 { !! 407 vdd_5v0_sys: regulator@1 { 383 enable-method = "psci" !! 408 compatible = "regulator-fixed"; 384 }; !! 409 reg = <1>; 385 410 386 cpu@5 { !! 411 regulator-name = "VDD_5V0_SYS"; 387 enable-method = "psci" !! 412 regulator-min-microvolt = <5000000>; >> 413 regulator-max-microvolt = <5000000>; >> 414 regulator-always-on; >> 415 regulator-boot-on; 388 }; 416 }; 389 }; << 390 417 391 psci { !! 418 vdd_1v8_ap: regulator@2 { 392 compatible = "arm,psci-1.0"; !! 419 compatible = "regulator-fixed"; 393 status = "okay"; !! 420 reg = <2>; 394 method = "smc"; << 395 }; << 396 421 397 gnd: regulator-gnd { !! 422 regulator-name = "VDD_1V8_AP"; 398 compatible = "regulator-fixed" !! 423 regulator-min-microvolt = <1800000>; 399 regulator-name = "GND"; !! 424 regulator-max-microvolt = <1800000>; 400 regulator-min-microvolt = <0>; << 401 regulator-max-microvolt = <0>; << 402 regulator-always-on; << 403 regulator-boot-on; << 404 }; << 405 << 406 vdd_5v0_sys: regulator-vdd-5v0-sys { << 407 compatible = "regulator-fixed" << 408 regulator-name = "VDD_5V0_SYS" << 409 regulator-min-microvolt = <500 << 410 regulator-max-microvolt = <500 << 411 regulator-always-on; << 412 regulator-boot-on; << 413 }; << 414 << 415 vdd_1v8_ap: regulator-vdd-1v8-ap { << 416 compatible = "regulator-fixed" << 417 regulator-name = "VDD_1V8_AP"; << 418 regulator-min-microvolt = <180 << 419 regulator-max-microvolt = <180 << 420 425 421 gpio = <&pmic 1 GPIO_ACTIVE_HI !! 426 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; 422 enable-active-high; !! 427 enable-active-high; 423 428 424 vin-supply = <&vdd_1v8>; !! 429 vin-supply = <&vdd_1v8>; >> 430 }; 425 }; 431 }; 426 }; 432 };
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