1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra186.dtsi" 2 #include "tegra186.dtsi"
3 3
4 #include <dt-bindings/mfd/max77620.h> 4 #include <dt-bindings/mfd/max77620.h>
5 5
6 / { 6 / {
7 model = "NVIDIA Jetson TX2"; 7 model = "NVIDIA Jetson TX2";
8 compatible = "nvidia,p3310", "nvidia,t 8 compatible = "nvidia,p3310", "nvidia,tegra186";
9 9
10 aliases { 10 aliases {
11 ethernet0 = "/ethernet@2490000 11 ethernet0 = "/ethernet@2490000";
>> 12 sdhci0 = "/sdhci@3460000";
>> 13 sdhci1 = "/sdhci@3400000";
>> 14 serial0 = &uarta;
12 i2c0 = "/bpmp/i2c"; 15 i2c0 = "/bpmp/i2c";
13 i2c1 = "/i2c@3160000"; 16 i2c1 = "/i2c@3160000";
14 i2c2 = "/i2c@c240000"; 17 i2c2 = "/i2c@c240000";
15 i2c3 = "/i2c@3180000"; 18 i2c3 = "/i2c@3180000";
16 i2c4 = "/i2c@3190000"; 19 i2c4 = "/i2c@3190000";
17 i2c5 = "/i2c@31c0000"; 20 i2c5 = "/i2c@31c0000";
18 i2c6 = "/i2c@c250000"; 21 i2c6 = "/i2c@c250000";
19 i2c7 = "/i2c@31e0000"; 22 i2c7 = "/i2c@31e0000";
20 mmc0 = "/mmc@3460000"; <<
21 mmc1 = "/mmc@3400000"; <<
22 serial0 = &uarta; <<
23 }; 23 };
24 24
25 chosen { 25 chosen {
26 bootargs = "earlycon console=t !! 26 bootargs = "earlycon console=ttyS0,115200n8";
27 stdout-path = "serial0:115200n 27 stdout-path = "serial0:115200n8";
28 }; 28 };
29 29
30 memory@80000000 { !! 30 memory {
31 device_type = "memory"; 31 device_type = "memory";
32 reg = <0x0 0x80000000 0x2 0x00 32 reg = <0x0 0x80000000 0x2 0x00000000>;
33 }; 33 };
34 34
35 ethernet@2490000 { 35 ethernet@2490000 {
36 status = "okay"; 36 status = "okay";
37 37
38 phy-reset-gpios = <&gpio TEGRA 38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
39 GPIO_ 39 GPIO_ACTIVE_LOW>;
40 phy-handle = <&phy>; 40 phy-handle = <&phy>;
41 phy-mode = "rgmii"; 41 phy-mode = "rgmii";
42 42
43 mdio { 43 mdio {
44 #address-cells = <1>; 44 #address-cells = <1>;
45 #size-cells = <0>; 45 #size-cells = <0>;
46 46
47 phy: ethernet-phy@0 { !! 47 phy: phy@0 {
48 compatible = " 48 compatible = "ethernet-phy-ieee802.3-c22";
49 reg = <0x0>; 49 reg = <0x0>;
50 interrupt-pare 50 interrupt-parent = <&gpio>;
51 interrupts = < 51 interrupts = <TEGRA186_MAIN_GPIO(M, 5)
52 52 IRQ_TYPE_LEVEL_LOW>;
53 <<
54 #phy-cells = < <<
55 }; 53 };
56 }; 54 };
57 }; 55 };
58 56
59 memory-controller@2c00000 { 57 memory-controller@2c00000 {
60 status = "okay"; 58 status = "okay";
61 }; 59 };
62 60
63 serial@3100000 { 61 serial@3100000 {
64 status = "okay"; 62 status = "okay";
65 }; 63 };
66 64
67 i2c@3160000 { 65 i2c@3160000 {
68 status = "okay"; 66 status = "okay";
69 67
70 power-monitor@40 { 68 power-monitor@40 {
71 compatible = "ti,ina32 69 compatible = "ti,ina3221";
72 reg = <0x40>; 70 reg = <0x40>;
73 #address-cells = <1>; 71 #address-cells = <1>;
74 #size-cells = <0>; 72 #size-cells = <0>;
75 73
76 input@0 { !! 74 channel@0 {
77 reg = <0x0>; 75 reg = <0x0>;
78 label = "VDD_S 76 label = "VDD_SYS_GPU";
79 shunt-resistor 77 shunt-resistor-micro-ohms = <10000>;
80 }; 78 };
81 79
82 input@1 { !! 80 channel@1 {
83 reg = <0x1>; 81 reg = <0x1>;
84 label = "VDD_S 82 label = "VDD_SYS_SOC";
85 shunt-resistor 83 shunt-resistor-micro-ohms = <10000>;
86 }; 84 };
87 85
88 input@2 { !! 86 channel@2 {
89 reg = <0x2>; 87 reg = <0x2>;
90 label = "VDD_3 88 label = "VDD_3V8_WIFI";
91 shunt-resistor 89 shunt-resistor-micro-ohms = <10000>;
92 }; 90 };
93 }; 91 };
94 92
95 power-monitor@41 { 93 power-monitor@41 {
96 compatible = "ti,ina32 94 compatible = "ti,ina3221";
97 reg = <0x41>; 95 reg = <0x41>;
98 #address-cells = <1>; 96 #address-cells = <1>;
99 #size-cells = <0>; 97 #size-cells = <0>;
100 98
101 input@0 { !! 99 channel@0 {
102 reg = <0x0>; 100 reg = <0x0>;
103 label = "VDD_I 101 label = "VDD_IN";
104 shunt-resistor 102 shunt-resistor-micro-ohms = <5000>;
105 }; 103 };
106 104
107 input@1 { !! 105 channel@1 {
108 reg = <0x1>; 106 reg = <0x1>;
109 label = "VDD_S 107 label = "VDD_SYS_CPU";
110 shunt-resistor 108 shunt-resistor-micro-ohms = <10000>;
111 }; 109 };
112 110
113 input@2 { !! 111 channel@2 {
114 reg = <0x2>; 112 reg = <0x2>;
115 label = "VDD_5 113 label = "VDD_5V0_DDR";
116 shunt-resistor 114 shunt-resistor-micro-ohms = <10000>;
117 }; 115 };
118 }; 116 };
119 }; 117 };
120 118
121 i2c@3180000 { 119 i2c@3180000 {
122 status = "okay"; 120 status = "okay";
123 }; 121 };
124 122
125 ddc: i2c@3190000 { 123 ddc: i2c@3190000 {
126 status = "okay"; 124 status = "okay";
127 }; 125 };
128 126
129 i2c@31c0000 { 127 i2c@31c0000 {
130 status = "okay"; 128 status = "okay";
131 }; 129 };
132 130
133 i2c@31e0000 { 131 i2c@31e0000 {
134 status = "okay"; 132 status = "okay";
135 }; 133 };
136 134
137 /* SDMMC1 (SD/MMC) */ 135 /* SDMMC1 (SD/MMC) */
138 mmc@3400000 { !! 136 sdhci@3400000 {
139 cd-gpios = <&gpio TEGRA186_MAI 137 cd-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
140 wp-gpios = <&gpio TEGRA186_MAI 138 wp-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
141 139
142 vqmmc-supply = <&vddio_sdmmc1> 140 vqmmc-supply = <&vddio_sdmmc1>;
143 }; 141 };
144 142
145 /* SDMMC3 (SDIO) */ 143 /* SDMMC3 (SDIO) */
146 mmc@3440000 { !! 144 sdhci@3440000 {
147 status = "okay"; 145 status = "okay";
148 vqmmc-supply = <&vddio_sdmmc3> <<
149 }; 146 };
150 147
151 /* SDMMC4 (eMMC) */ 148 /* SDMMC4 (eMMC) */
152 mmc@3460000 { !! 149 sdhci@3460000 {
153 status = "okay"; 150 status = "okay";
154 bus-width = <8>; 151 bus-width = <8>;
155 non-removable; 152 non-removable;
156 153
157 vqmmc-supply = <&vdd_1v8_ap>; 154 vqmmc-supply = <&vdd_1v8_ap>;
158 vmmc-supply = <&vdd_3v3_sys>; 155 vmmc-supply = <&vdd_3v3_sys>;
159 }; 156 };
160 157
161 hsp@3c00000 { 158 hsp@3c00000 {
162 status = "okay"; 159 status = "okay";
163 }; 160 };
164 161
165 i2c@c240000 { 162 i2c@c240000 {
166 status = "okay"; 163 status = "okay";
167 }; 164 };
168 165
169 i2c@c250000 { 166 i2c@c250000 {
170 status = "okay"; 167 status = "okay";
171 168
172 /* module ID EEPROM */ 169 /* module ID EEPROM */
173 eeprom@50 { 170 eeprom@50 {
174 compatible = "atmel,24 171 compatible = "atmel,24c02";
175 reg = <0x50>; 172 reg = <0x50>;
176 173
177 label = "module"; <<
178 vcc-supply = <&vdd_1v8 174 vcc-supply = <&vdd_1v8>;
179 address-width = <8>; !! 175 address-bits = <8>;
180 pagesize = <8>; !! 176 page-size = <8>;
181 size = <256>; 177 size = <256>;
182 read-only; 178 read-only;
183 }; 179 };
184 }; 180 };
185 181
186 rtc@c2a0000 { 182 rtc@c2a0000 {
187 status = "okay"; 183 status = "okay";
188 }; 184 };
189 185
190 pmc@c360000 { 186 pmc@c360000 {
191 nvidia,invert-interrupt; 187 nvidia,invert-interrupt;
192 }; 188 };
193 189
>> 190 cpus {
>> 191 cpu@0 {
>> 192 enable-method = "psci";
>> 193 };
>> 194
>> 195 cpu@1 {
>> 196 enable-method = "psci";
>> 197 };
>> 198
>> 199 cpu@2 {
>> 200 enable-method = "psci";
>> 201 };
>> 202
>> 203 cpu@3 {
>> 204 enable-method = "psci";
>> 205 };
>> 206
>> 207 cpu@4 {
>> 208 enable-method = "psci";
>> 209 };
>> 210
>> 211 cpu@5 {
>> 212 enable-method = "psci";
>> 213 };
>> 214 };
>> 215
194 bpmp { 216 bpmp {
195 i2c { 217 i2c {
196 status = "okay"; 218 status = "okay";
197 219
198 pmic: pmic@3c { 220 pmic: pmic@3c {
199 compatible = " 221 compatible = "maxim,max77620";
200 reg = <0x3c>; 222 reg = <0x3c>;
201 223
202 interrupt-pare !! 224 interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
203 interrupts = < <<
204 #interrupt-cel 225 #interrupt-cells = <2>;
205 interrupt-cont 226 interrupt-controller;
206 227
207 #gpio-cells = 228 #gpio-cells = <2>;
208 gpio-controlle 229 gpio-controller;
209 230
210 pinctrl-names 231 pinctrl-names = "default";
211 pinctrl-0 = <& 232 pinctrl-0 = <&max77620_default>;
212 233
213 fps { <<
214 fps0 { <<
215 <<
216 <<
217 }; <<
218 <<
219 fps1 { <<
220 <<
221 <<
222 }; <<
223 <<
224 fps2 { <<
225 <<
226 <<
227 }; <<
228 }; <<
229 <<
230 max77620_defau 234 max77620_default: pinmux {
231 gpio0 235 gpio0 {
232 236 pins = "gpio0";
233 237 function = "gpio";
234 }; 238 };
235 239
236 gpio1 240 gpio1 {
237 241 pins = "gpio1";
238 242 function = "fps-out";
239 243 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
240 }; 244 };
241 245
242 gpio2 246 gpio2 {
243 247 pins = "gpio2";
244 248 function = "fps-out";
245 249 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
246 }; 250 };
247 251
248 gpio3 252 gpio3 {
249 253 pins = "gpio3";
250 254 function = "fps-out";
251 255 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
252 }; 256 };
253 257
254 gpio4 258 gpio4 {
255 259 pins = "gpio4";
256 260 function = "32k-out1";
257 261 drive-push-pull = <1>;
258 }; 262 };
259 263
260 gpio5 264 gpio5 {
261 265 pins = "gpio5";
262 266 function = "gpio";
263 267 drive-push-pull = <0>;
264 }; 268 };
265 269
266 gpio6 270 gpio6 {
267 271 pins = "gpio6";
268 272 function = "gpio";
269 273 drive-push-pull = <1>;
270 }; 274 };
271 275
272 gpio7 276 gpio7 {
273 277 pins = "gpio7";
274 278 function = "gpio";
275 279 drive-push-pull = <0>;
276 }; 280 };
277 }; 281 };
278 282
>> 283 fps {
>> 284 fps0 {
>> 285 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
>> 286 maxim,shutdown-fps-time-period-us = <640>;
>> 287 };
>> 288
>> 289 fps1 {
>> 290 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
>> 291 maxim,shutdown-fps-time-period-us = <640>;
>> 292 };
>> 293
>> 294 fps2 {
>> 295 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
>> 296 maxim,shutdown-fps-time-period-us = <640>;
>> 297 };
>> 298 };
>> 299
279 regulators { 300 regulators {
280 in-sd0 301 in-sd0-supply = <&vdd_5v0_sys>;
281 in-sd1 302 in-sd1-supply = <&vdd_5v0_sys>;
282 in-sd2 303 in-sd2-supply = <&vdd_5v0_sys>;
283 in-sd3 304 in-sd3-supply = <&vdd_5v0_sys>;
284 305
285 in-ldo 306 in-ldo0-1-supply = <&vdd_5v0_sys>;
286 in-ldo 307 in-ldo2-supply = <&vdd_5v0_sys>;
287 in-ldo 308 in-ldo3-5-supply = <&vdd_5v0_sys>;
288 in-ldo 309 in-ldo4-6-supply = <&vdd_1v8>;
289 in-ldo 310 in-ldo7-8-supply = <&avdd_dsi_csi>;
290 311
291 sd0 { 312 sd0 {
292 313 regulator-name = "VDD_DDR_1V1_PMIC";
293 314 regulator-min-microvolt = <1100000>;
294 315 regulator-max-microvolt = <1100000>;
295 316 regulator-always-on;
296 317 regulator-boot-on;
297 }; 318 };
298 319
299 avdd_d 320 avdd_dsi_csi: sd1 {
300 321 regulator-name = "AVDD_DSI_CSI_1V2";
301 322 regulator-min-microvolt = <1200000>;
302 323 regulator-max-microvolt = <1200000>;
303 }; 324 };
304 325
305 vdd_1v 326 vdd_1v8: sd2 {
306 327 regulator-name = "VDD_1V8";
307 328 regulator-min-microvolt = <1800000>;
308 329 regulator-max-microvolt = <1800000>;
309 }; 330 };
310 331
311 vdd_3v 332 vdd_3v3_sys: sd3 {
312 333 regulator-name = "VDD_3V3_SYS";
313 334 regulator-min-microvolt = <3300000>;
314 335 regulator-max-microvolt = <3300000>;
315 }; 336 };
316 337
317 vdd_1v 338 vdd_1v8_pll: ldo0 {
318 339 regulator-name = "VDD_1V8_AP_PLL";
319 340 regulator-min-microvolt = <1800000>;
320 341 regulator-max-microvolt = <1800000>;
321 }; 342 };
322 343
323 ldo2 { 344 ldo2 {
324 345 regulator-name = "VDDIO_3V3_AOHV";
325 346 regulator-min-microvolt = <3300000>;
326 347 regulator-max-microvolt = <3300000>;
327 348 regulator-always-on;
328 349 regulator-boot-on;
329 }; 350 };
330 351
331 vddio_ 352 vddio_sdmmc1: ldo3 {
332 353 regulator-name = "VDDIO_SDMMC1_AP";
333 354 regulator-min-microvolt = <1800000>;
334 355 regulator-max-microvolt = <3300000>;
335 }; 356 };
336 357
337 ldo4 { 358 ldo4 {
338 359 regulator-name = "VDD_RTC";
339 360 regulator-min-microvolt = <1000000>;
340 361 regulator-max-microvolt = <1000000>;
341 }; 362 };
342 363
343 vddio_ 364 vddio_sdmmc3: ldo5 {
344 365 regulator-name = "VDDIO_SDMMC3_AP";
345 366 regulator-min-microvolt = <2800000>;
346 367 regulator-max-microvolt = <2800000>;
347 }; 368 };
348 369
349 vdd_hd 370 vdd_hdmi_1v05: ldo7 {
350 371 regulator-name = "VDD_HDMI_1V05";
351 372 regulator-min-microvolt = <1050000>;
352 373 regulator-max-microvolt = <1050000>;
353 }; 374 };
354 375
355 vdd_pe 376 vdd_pex: ldo8 {
356 377 regulator-name = "VDD_PEX_1V05";
357 378 regulator-min-microvolt = <1050000>;
358 379 regulator-max-microvolt = <1050000>;
359 }; 380 };
360 }; 381 };
361 }; 382 };
362 }; 383 };
363 }; 384 };
364 385
365 cpus { !! 386 psci {
366 cpu@0 { !! 387 compatible = "arm,psci-1.0";
367 enable-method = "psci" !! 388 status = "okay";
368 }; !! 389 method = "smc";
>> 390 };
369 391
370 cpu@1 { !! 392 regulators {
371 enable-method = "psci" !! 393 compatible = "simple-bus";
372 }; !! 394 #address-cells = <1>;
>> 395 #size-cells = <0>;
373 396
374 cpu@2 { !! 397 gnd: regulator@0 {
375 enable-method = "psci" !! 398 compatible = "regulator-fixed";
376 }; !! 399 reg = <0>;
377 400
378 cpu@3 { !! 401 regulator-name = "GND";
379 enable-method = "psci" !! 402 regulator-min-microvolt = <0>;
>> 403 regulator-max-microvolt = <0>;
>> 404 regulator-always-on;
>> 405 regulator-boot-on;
380 }; 406 };
381 407
382 cpu@4 { !! 408 vdd_5v0_sys: regulator@1 {
383 enable-method = "psci" !! 409 compatible = "regulator-fixed";
384 }; !! 410 reg = <1>;
385 411
386 cpu@5 { !! 412 regulator-name = "VDD_5V0_SYS";
387 enable-method = "psci" !! 413 regulator-min-microvolt = <5000000>;
>> 414 regulator-max-microvolt = <5000000>;
>> 415 regulator-always-on;
>> 416 regulator-boot-on;
388 }; 417 };
389 }; <<
390 418
391 psci { !! 419 vdd_1v8_ap: regulator@2 {
392 compatible = "arm,psci-1.0"; !! 420 compatible = "regulator-fixed";
393 status = "okay"; !! 421 reg = <2>;
394 method = "smc"; <<
395 }; <<
396 422
397 gnd: regulator-gnd { !! 423 regulator-name = "VDD_1V8_AP";
398 compatible = "regulator-fixed" !! 424 regulator-min-microvolt = <1800000>;
399 regulator-name = "GND"; !! 425 regulator-max-microvolt = <1800000>;
400 regulator-min-microvolt = <0>; <<
401 regulator-max-microvolt = <0>; <<
402 regulator-always-on; <<
403 regulator-boot-on; <<
404 }; <<
405 <<
406 vdd_5v0_sys: regulator-vdd-5v0-sys { <<
407 compatible = "regulator-fixed" <<
408 regulator-name = "VDD_5V0_SYS" <<
409 regulator-min-microvolt = <500 <<
410 regulator-max-microvolt = <500 <<
411 regulator-always-on; <<
412 regulator-boot-on; <<
413 }; <<
414 <<
415 vdd_1v8_ap: regulator-vdd-1v8-ap { <<
416 compatible = "regulator-fixed" <<
417 regulator-name = "VDD_1V8_AP"; <<
418 regulator-min-microvolt = <180 <<
419 regulator-max-microvolt = <180 <<
420 426
421 gpio = <&pmic 1 GPIO_ACTIVE_HI !! 427 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
422 enable-active-high; !! 428 enable-active-high;
423 429
424 vin-supply = <&vdd_1v8>; !! 430 vin-supply = <&vdd_1v8>;
>> 431 };
425 }; 432 };
426 }; 433 };
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