1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 2
3 #include "tegra234.dtsi" 3 #include "tegra234.dtsi"
4 4
5 / { 5 / {
6 compatible = "nvidia,p3767", "nvidia,t 6 compatible = "nvidia,p3767", "nvidia,tegra234";
7 7
8 aliases { <<
9 mmc0 = "/bus@0/mmc@3400000"; <<
10 }; <<
11 <<
12 bus@0 { 8 bus@0 {
13 aconnect@2900000 { <<
14 status = "okay"; <<
15 <<
16 ahub@2900800 { <<
17 status = "okay <<
18 <<
19 i2s@2901100 { <<
20 status <<
21 }; <<
22 <<
23 i2s@2901300 { <<
24 status <<
25 }; <<
26 }; <<
27 <<
28 dma-controller@2930000 <<
29 status = "okay <<
30 }; <<
31 <<
32 interrupt-controller@2 <<
33 status = "okay <<
34 }; <<
35 }; <<
36 <<
37 i2c@3160000 { 9 i2c@3160000 {
38 status = "okay"; 10 status = "okay";
39 11
40 eeprom@50 { 12 eeprom@50 {
41 compatible = " 13 compatible = "atmel,24c02";
42 reg = <0x50>; 14 reg = <0x50>;
43 15
44 label = "modul 16 label = "module";
45 vcc-supply = < 17 vcc-supply = <&vdd_1v8_hs>;
46 address-width 18 address-width = <8>;
47 pagesize = <8> 19 pagesize = <8>;
48 size = <256>; 20 size = <256>;
49 read-only; 21 read-only;
50 }; 22 };
51 }; 23 };
52 24
53 spi@3270000 { 25 spi@3270000 {
54 status = "okay"; 26 status = "okay";
55 27
56 flash@0 { 28 flash@0 {
57 compatible = " 29 compatible = "jedec,spi-nor";
58 reg = <0>; 30 reg = <0>;
59 spi-max-freque 31 spi-max-frequency = <102000000>;
60 spi-tx-bus-wid 32 spi-tx-bus-width = <4>;
61 spi-rx-bus-wid 33 spi-rx-bus-width = <4>;
62 }; 34 };
63 }; 35 };
64 36
65 /* 37 /*
66 * This only exists on Jetson 38 * This only exists on Jetson Orin Nano Developer Kit (SKU 5)
67 * but UEFI needs this and wil 39 * but UEFI needs this and will remove it on devices where it
68 * doesn't exist. 40 * doesn't exist.
69 */ 41 */
70 mmc@3400000 { 42 mmc@3400000 {
71 status = "okay"; 43 status = "okay";
72 bus-width = <4>; 44 bus-width = <4>;
73 cd-gpios = <&gpio TEGR 45 cd-gpios = <&gpio TEGRA234_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>;
74 disable-wp; 46 disable-wp;
75 }; 47 };
76 48
77 hda@3510000 { 49 hda@3510000 {
78 status = "okay"; 50 status = "okay";
79 }; 51 };
80 52
81 padctl@3520000 { 53 padctl@3520000 {
82 vclamp-usb-supply = <& 54 vclamp-usb-supply = <&vdd_1v8_ao>;
83 avdd-usb-supply = <&vd 55 avdd-usb-supply = <&vdd_3v3_ao>;
84 }; 56 };
85 57
86 i2c@c240000 { 58 i2c@c240000 {
87 status = "okay"; 59 status = "okay";
88 60
89 power-sensor@40 { 61 power-sensor@40 {
90 compatible = " 62 compatible = "ti,ina3221";
91 reg = <0x40>; 63 reg = <0x40>;
92 #address-cells 64 #address-cells = <1>;
93 #size-cells = 65 #size-cells = <0>;
94 66
95 input@0 { 67 input@0 {
96 reg = 68 reg = <0x0>;
97 label 69 label = "VDD_IN";
98 shunt- 70 shunt-resistor-micro-ohms = <5000>;
99 }; 71 };
100 72
101 input@1 { 73 input@1 {
102 reg = 74 reg = <0x1>;
103 label 75 label = "VDD_CPU_GPU_CV";
104 shunt- 76 shunt-resistor-micro-ohms = <5000>;
105 }; 77 };
106 78
107 input@2 { 79 input@2 {
108 reg = 80 reg = <0x2>;
109 label 81 label = "VDD_SOC";
110 shunt- 82 shunt-resistor-micro-ohms = <5000>;
111 }; 83 };
112 }; 84 };
113 }; 85 };
114 86
115 rtc@c2a0000 { 87 rtc@c2a0000 {
116 status = "okay"; 88 status = "okay";
117 }; 89 };
118 90
119 pmc@c360000 { 91 pmc@c360000 {
120 nvidia,invert-interrup 92 nvidia,invert-interrupt;
121 }; 93 };
122 }; 94 };
123 95
124 vdd_5v0_sys: regulator-vdd-5v0-sys { 96 vdd_5v0_sys: regulator-vdd-5v0-sys {
125 compatible = "regulator-fixed" 97 compatible = "regulator-fixed";
126 regulator-name = "VDD_5V0_SYS" 98 regulator-name = "VDD_5V0_SYS";
127 regulator-min-microvolt = <500 99 regulator-min-microvolt = <5000000>;
128 regulator-max-microvolt = <500 100 regulator-max-microvolt = <5000000>;
129 regulator-always-on; 101 regulator-always-on;
130 }; 102 };
131 103
132 vdd_1v8_hs: regulator-vdd-1v8-hs { 104 vdd_1v8_hs: regulator-vdd-1v8-hs {
133 compatible = "regulator-fixed" 105 compatible = "regulator-fixed";
134 regulator-name = "VDD_1V8_HS"; 106 regulator-name = "VDD_1V8_HS";
135 regulator-min-microvolt = <180 107 regulator-min-microvolt = <1800000>;
136 regulator-max-microvolt = <180 108 regulator-max-microvolt = <1800000>;
137 regulator-always-on; 109 regulator-always-on;
138 }; 110 };
139 111
140 vdd_1v8_ao: regulator-vdd-1v8-ao { 112 vdd_1v8_ao: regulator-vdd-1v8-ao {
141 compatible = "regulator-fixed" 113 compatible = "regulator-fixed";
142 regulator-name = "VDD_1V8_AO"; 114 regulator-name = "VDD_1V8_AO";
143 regulator-min-microvolt = <180 115 regulator-min-microvolt = <1800000>;
144 regulator-max-microvolt = <180 116 regulator-max-microvolt = <1800000>;
145 regulator-always-on; 117 regulator-always-on;
146 vin-supply = <&vdd_5v0_sys>; 118 vin-supply = <&vdd_5v0_sys>;
147 }; 119 };
148 120
149 vdd_3v3_ao: regulator-vdd-3v3-ao { 121 vdd_3v3_ao: regulator-vdd-3v3-ao {
150 compatible = "regulator-fixed" 122 compatible = "regulator-fixed";
151 regulator-name = "VDD_3V3_AO"; 123 regulator-name = "VDD_3V3_AO";
152 regulator-min-microvolt = <330 124 regulator-min-microvolt = <33000000>;
153 regulator-max-microvolt = <330 125 regulator-max-microvolt = <33000000>;
154 regulator-always-on; 126 regulator-always-on;
155 vin-supply = <&vdd_5v0_sys>; 127 vin-supply = <&vdd_5v0_sys>;
156 }; <<
157 <<
158 sound { <<
159 compatible = "nvidia,tegra186- <<
160 status = "okay"; <<
161 <<
162 dais = /* ADMAIF (FE) Ports */ <<
163 <&admaif0_port>, <&adma <<
164 <&admaif4_port>, <&adma <<
165 <&admaif8_port>, <&adma <<
166 <&admaif12_port>, <&adm <<
167 <&admaif16_port>, <&adm <<
168 /* XBAR Ports */ <<
169 <&xbar_i2s2_port>, <&xb <<
170 <&xbar_sfc1_in_port>, < <<
171 <&xbar_sfc3_in_port>, < <<
172 <&xbar_mvc1_in_port>, < <<
173 <&xbar_amx1_in1_port>, <<
174 <&xbar_amx1_in3_port>, <<
175 <&xbar_amx2_in1_port>, <<
176 <&xbar_amx2_in3_port>, <<
177 <&xbar_amx3_in1_port>, <<
178 <&xbar_amx3_in3_port>, <<
179 <&xbar_amx4_in1_port>, <<
180 <&xbar_amx4_in3_port>, <<
181 <&xbar_adx1_in_port>, < <<
182 <&xbar_adx3_in_port>, < <<
183 <&xbar_mix_in1_port>, < <<
184 <&xbar_mix_in3_port>, < <<
185 <&xbar_mix_in5_port>, < <<
186 <&xbar_mix_in7_port>, < <<
187 <&xbar_mix_in9_port>, < <<
188 <&xbar_asrc_in1_port>, <<
189 <&xbar_asrc_in3_port>, <<
190 <&xbar_asrc_in5_port>, <<
191 <&xbar_asrc_in7_port>, <<
192 <&xbar_ope1_in_port>, <<
193 /* HW accelerators */ <<
194 <&sfc1_out_port>, <&sfc <<
195 <&sfc3_out_port>, <&sfc <<
196 <&mvc1_out_port>, <&mvc <<
197 <&amx1_out_port>, <&amx <<
198 <&amx3_out_port>, <&amx <<
199 <&adx1_out1_port>, <&ad <<
200 <&adx1_out3_port>, <&ad <<
201 <&adx2_out1_port>, <&ad <<
202 <&adx2_out3_port>, <&ad <<
203 <&adx3_out1_port>, <&ad <<
204 <&adx3_out3_port>, <&ad <<
205 <&adx4_out1_port>, <&ad <<
206 <&adx4_out3_port>, <&ad <<
207 <&mix_out1_port>, <&mix <<
208 <&mix_out4_port>, <&mix <<
209 <&asrc_out1_port>, <&as <<
210 <&asrc_out4_port>, <&as <<
211 <&ope1_out_port>, <<
212 /* BE I/O Ports */ <<
213 <&i2s2_port>, <&i2s4_po <<
214 }; 128 };
215 129
216 thermal-zones { 130 thermal-zones {
217 tj-thermal { 131 tj-thermal {
218 polling-delay = <1000> 132 polling-delay = <1000>;
219 polling-delay-passive 133 polling-delay-passive = <1000>;
220 status = "okay"; 134 status = "okay";
221 135
222 trips { 136 trips {
223 tj_trip_active 137 tj_trip_active0: active-0 {
224 temper 138 temperature = <35000>;
225 hyster 139 hysteresis = <4000>;
226 type = 140 type = "active";
227 }; 141 };
228 142
229 tj_trip_active 143 tj_trip_active1: active-1 {
230 temper 144 temperature = <74000>;
231 hyster 145 hysteresis = <4000>;
232 type = 146 type = "active";
233 }; 147 };
234 148
235 tj_trip_active 149 tj_trip_active2: active-2 {
236 temper 150 temperature = <95000>;
237 hyster 151 hysteresis = <4000>;
238 type = 152 type = "active";
239 }; 153 };
240 }; 154 };
241 }; 155 };
242 }; 156 };
243 }; 157 };
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