1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * OnePlus 5(T) (cheeseburger / dumpling) comm 3 * OnePlus 5(T) (cheeseburger / dumpling) common device tree source based on msm8998-mtp.dtsi
4 * 4 *
5 * Copyright (c) 2021, Jami Kettunen <jamipkett 5 * Copyright (c) 2021, Jami Kettunen <jamipkettunen@gmail.com>
6 * Copyright (c) 2016, The Linux Foundation. A 6 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
7 */ 7 */
8 8
9 /dts-v1/; 9 /dts-v1/;
10 10
11 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
13 #include "msm8998.dtsi" 13 #include "msm8998.dtsi"
14 #include "pm8005.dtsi" <<
15 #include "pm8998.dtsi" 14 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 15 #include "pmi8998.dtsi"
>> 16 #include "pm8005.dtsi"
17 17
18 / { 18 / {
19 /* Required for bootloader to select c 19 /* Required for bootloader to select correct board */
20 qcom,msm-id = <292 0x20001>; /* 8998 v 20 qcom,msm-id = <292 0x20001>; /* 8998 v2.1 */
21 21
22 chosen { 22 chosen {
23 #address-cells = <2>; 23 #address-cells = <2>;
24 #size-cells = <2>; 24 #size-cells = <2>;
25 ranges; 25 ranges;
26 26
27 /* Use display framebuffer set 27 /* Use display framebuffer setup by the UEFI XBL bootloader for simplefb */
28 framebuffer0: framebuffer@9d40 28 framebuffer0: framebuffer@9d400000 {
29 compatible = "simple-f 29 compatible = "simple-framebuffer";
30 reg = <0x0 0x9d400000 30 reg = <0x0 0x9d400000 0x0 0x2400000>;
31 width = <1080>; 31 width = <1080>;
32 height = <1920>; 32 height = <1920>;
33 stride = <(1080 * 4)>; 33 stride = <(1080 * 4)>;
34 format = "a8r8g8b8"; 34 format = "a8r8g8b8";
35 /* <<
36 * That's a lot of cloc <<
37 * to unused clk cleanu <<
38 */ <<
39 clocks = <&mmcc MDSS_A <<
40 <&mmcc MDSS_A <<
41 <&mmcc MDSS_V <<
42 <&mmcc MDSS_M <<
43 <&mmcc MDSS_B <<
44 <&mmcc MDSS_B <<
45 <&mmcc MDSS_P <<
46 <&mmcc MDSS_E <<
47 power-domains = <&mmcc <<
48 }; 35 };
49 }; 36 };
50 37
51 reserved-memory { 38 reserved-memory {
52 /* Bootloader display framebuf 39 /* Bootloader display framebuffer region */
53 cont_splash_mem: memory@9d4000 40 cont_splash_mem: memory@9d400000 {
54 reg = <0x0 0x9d400000 41 reg = <0x0 0x9d400000 0x0 0x2400000>;
55 no-map; 42 no-map;
56 }; 43 };
57 44
58 /* For getting crash logs usin 45 /* For getting crash logs using Android downstream kernels */
59 ramoops@ac000000 { 46 ramoops@ac000000 {
60 compatible = "ramoops" 47 compatible = "ramoops";
61 reg = <0x0 0xac000000 48 reg = <0x0 0xac000000 0x0 0x200000>;
62 console-size = <0x8000 49 console-size = <0x80000>;
63 pmsg-size = <0x40000>; 50 pmsg-size = <0x40000>;
64 record-size = <0x8000> 51 record-size = <0x8000>;
65 ftrace-size = <0x20000 52 ftrace-size = <0x20000>;
66 }; 53 };
67 54
68 /* 55 /*
69 * The following memory region 56 * The following memory regions on downstream are "dynamically allocated"
70 * but given the same addresse 57 * but given the same addresses every time. Hard code them as these addresses
71 * are where the OnePlus signe 58 * are where the OnePlus signed firmware expects them to be.
72 */ 59 */
73 ipa_fws_region: ipa@f6800000 { 60 ipa_fws_region: ipa@f6800000 {
74 compatible = "shared-d 61 compatible = "shared-dma-pool";
75 reg = <0x0 0xf6800000 62 reg = <0x0 0xf6800000 0x0 0x5000>;
76 no-map; 63 no-map;
77 }; 64 };
78 zap_shader_region: gpu@f690000 65 zap_shader_region: gpu@f6900000 {
79 compatible = "shared-d 66 compatible = "shared-dma-pool";
80 reg = <0x0 0xf6900000 67 reg = <0x0 0xf6900000 0x0 0x2000>;
81 no-map; 68 no-map;
82 }; 69 };
83 }; 70 };
84 71
85 gpio-keys { 72 gpio-keys {
86 compatible = "gpio-keys"; 73 compatible = "gpio-keys";
87 label = "Volume buttons"; 74 label = "Volume buttons";
88 autorepeat; 75 autorepeat;
89 76
90 pinctrl-names = "default"; 77 pinctrl-names = "default";
91 pinctrl-0 = <&vol_keys_default 78 pinctrl-0 = <&vol_keys_default>;
92 79
93 button-vol-down { !! 80 vol-down {
94 label = "Volume down"; 81 label = "Volume down";
95 gpios = <&pm8998_gpios !! 82 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>;
96 linux,code = <KEY_VOLU 83 linux,code = <KEY_VOLUMEDOWN>;
97 debounce-interval = <1 84 debounce-interval = <15>;
98 wakeup-source; 85 wakeup-source;
99 }; 86 };
100 87
101 button-vol-up { !! 88 vol-up {
102 label = "Volume up"; 89 label = "Volume up";
103 gpios = <&pm8998_gpios !! 90 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
104 linux,code = <KEY_VOLU 91 linux,code = <KEY_VOLUMEUP>;
105 debounce-interval = <1 92 debounce-interval = <15>;
106 wakeup-source; 93 wakeup-source;
107 }; 94 };
108 }; 95 };
109 96
110 gpio-hall-sensor { 97 gpio-hall-sensor {
111 compatible = "gpio-keys"; 98 compatible = "gpio-keys";
112 label = "Hall effect sensor"; 99 label = "Hall effect sensor";
113 100
114 pinctrl-names = "default"; 101 pinctrl-names = "default";
115 pinctrl-0 = <&hall_sensor_defa 102 pinctrl-0 = <&hall_sensor_default>;
116 103
117 event-hall-sensor { !! 104 hall-sensor {
118 label = "Hall Effect S 105 label = "Hall Effect Sensor";
119 gpios = <&tlmm 124 GPI 106 gpios = <&tlmm 124 GPIO_ACTIVE_LOW>;
120 linux,input-type = <EV 107 linux,input-type = <EV_SW>;
121 linux,code = <SW_LID>; 108 linux,code = <SW_LID>;
122 linux,can-disable; 109 linux,can-disable;
123 wakeup-source; 110 wakeup-source;
124 }; 111 };
125 }; 112 };
126 113
127 vph_pwr: vph-pwr-regulator { 114 vph_pwr: vph-pwr-regulator {
128 compatible = "regulator-fixed" 115 compatible = "regulator-fixed";
129 regulator-name = "vph_pwr"; 116 regulator-name = "vph_pwr";
130 regulator-always-on; 117 regulator-always-on;
131 regulator-boot-on; 118 regulator-boot-on;
132 }; 119 };
133 }; 120 };
134 121
135 /* 122 /*
136 * OnePlus' ADSP firmware requires 30 MiB in t 123 * OnePlus' ADSP firmware requires 30 MiB in total, so increase the adsp_mem
137 * region by 4 MiB to account for this while r 124 * region by 4 MiB to account for this while relocating the other now
138 * conflicting memory nodes accordingly. 125 * conflicting memory nodes accordingly.
139 */ 126 */
140 &adsp_mem { 127 &adsp_mem {
141 reg = <0x0 0x8b200000 0x0 0x1e00000>; 128 reg = <0x0 0x8b200000 0x0 0x1e00000>;
142 }; 129 };
143 &mpss_mem { 130 &mpss_mem {
144 reg = <0x0 0x8d000000 0x0 0x7000000>; 131 reg = <0x0 0x8d000000 0x0 0x7000000>;
145 }; 132 };
146 &venus_mem { 133 &venus_mem {
147 reg = <0x0 0x94000000 0x0 0x500000>; 134 reg = <0x0 0x94000000 0x0 0x500000>;
148 }; 135 };
149 &mba_mem { 136 &mba_mem {
150 reg = <0x0 0x94500000 0x0 0x200000>; 137 reg = <0x0 0x94500000 0x0 0x200000>;
151 }; 138 };
152 &slpi_mem { 139 &slpi_mem {
153 reg = <0x0 0x94700000 0x0 0xf00000>; 140 reg = <0x0 0x94700000 0x0 0xf00000>;
154 }; 141 };
155 &ipa_fw_mem { 142 &ipa_fw_mem {
156 reg = <0x0 0x95600000 0x0 0x10000>; 143 reg = <0x0 0x95600000 0x0 0x10000>;
157 }; 144 };
158 &ipa_gsi_mem { 145 &ipa_gsi_mem {
159 reg = <0x0 0x95610000 0x0 0x5000>; 146 reg = <0x0 0x95610000 0x0 0x5000>;
160 }; 147 };
161 &gpu_mem { 148 &gpu_mem {
162 reg = <0x0 0x95615000 0x0 0x100000>; 149 reg = <0x0 0x95615000 0x0 0x100000>;
163 }; 150 };
164 &wlan_msa_mem { 151 &wlan_msa_mem {
165 reg = <0x0 0x95715000 0x0 0x100000>; 152 reg = <0x0 0x95715000 0x0 0x100000>;
166 }; 153 };
167 154
168 &blsp1_i2c5 { 155 &blsp1_i2c5 {
169 status = "okay"; 156 status = "okay";
170 157
171 touchscreen@20 { 158 touchscreen@20 {
172 compatible = "syna,rmi4-i2c"; 159 compatible = "syna,rmi4-i2c";
173 reg = <0x20>; 160 reg = <0x20>;
174 #address-cells = <1>; 161 #address-cells = <1>;
175 #size-cells = <0>; 162 #size-cells = <0>;
176 163
177 interrupt-parent = <&tlmm>; 164 interrupt-parent = <&tlmm>;
178 interrupts = <125 IRQ_TYPE_EDG 165 interrupts = <125 IRQ_TYPE_EDGE_FALLING>;
179 166
180 pinctrl-names = "default"; 167 pinctrl-names = "default";
181 pinctrl-0 = <&ts_int_active &t 168 pinctrl-0 = <&ts_int_active &ts_reset_active>;
182 169
183 vdd-supply = <&vreg_l28_3p0>; 170 vdd-supply = <&vreg_l28_3p0>;
184 vio-supply = <&vreg_l6a_1p8>; 171 vio-supply = <&vreg_l6a_1p8>;
185 172
186 syna,reset-delay-ms = <20>; 173 syna,reset-delay-ms = <20>;
187 syna,startup-delay-ms = <20>; 174 syna,startup-delay-ms = <20>;
188 175
189 rmi4-f01@1 { 176 rmi4-f01@1 {
190 reg = <0x01>; 177 reg = <0x01>;
191 syna,nosleep-mode = <1 178 syna,nosleep-mode = <1>;
192 }; 179 };
193 180
194 rmi4_f12: rmi4-f12@12 { 181 rmi4_f12: rmi4-f12@12 {
195 reg = <0x12>; 182 reg = <0x12>;
196 syna,rezero-wait-ms = 183 syna,rezero-wait-ms = <20>;
197 syna,sensor-type = <1> 184 syna,sensor-type = <1>;
198 touchscreen-x-mm = <68 185 touchscreen-x-mm = <68>;
199 touchscreen-y-mm = <12 186 touchscreen-y-mm = <122>;
200 }; 187 };
201 }; 188 };
202 }; 189 };
203 190
204 &blsp1_i2c6 { <<
205 status = "okay"; <<
206 <<
207 nfc@28 { <<
208 compatible = "nxp,nxp-nci-i2c" <<
209 reg = <0x28>; <<
210 <<
211 interrupt-parent = <&tlmm>; <<
212 interrupts = <92 IRQ_TYPE_LEVE <<
213 <<
214 enable-gpios = <&tlmm 116 GPIO <<
215 <<
216 pinctrl-names = "default"; <<
217 pinctrl-0 = <&nfc_int_active & <<
218 }; <<
219 }; <<
220 <<
221 &blsp1_uart3 { 191 &blsp1_uart3 {
222 status = "okay"; 192 status = "okay";
223 193
224 bluetooth { 194 bluetooth {
225 compatible = "qcom,wcn3990-bt" 195 compatible = "qcom,wcn3990-bt";
226 196
227 vddio-supply = <&vreg_s4a_1p8> 197 vddio-supply = <&vreg_s4a_1p8>;
228 vddxo-supply = <&vreg_l7a_1p8> 198 vddxo-supply = <&vreg_l7a_1p8>;
229 vddrf-supply = <&vreg_l17a_1p3 199 vddrf-supply = <&vreg_l17a_1p3>;
230 vddch0-supply = <&vreg_l25a_3p 200 vddch0-supply = <&vreg_l25a_3p3>;
231 max-speed = <3200000>; 201 max-speed = <3200000>;
232 }; 202 };
233 }; 203 };
234 204
235 &blsp1_uart3_on { 205 &blsp1_uart3_on {
236 rx-pins { !! 206 rx {
237 /delete-property/ bias-disable 207 /delete-property/ bias-disable;
238 /* 208 /*
239 * Configure a pull-up on 46 ( 209 * Configure a pull-up on 46 (RX). This is needed to
240 * avoid garbage data when the 210 * avoid garbage data when the TX pin of the Bluetooth
241 * module is in tri-state (mod 211 * module is in tri-state (module powered off or not
242 * driving the signal yet). 212 * driving the signal yet).
243 */ 213 */
244 bias-pull-up; 214 bias-pull-up;
245 }; 215 };
246 216
247 cts-pins { !! 217 cts {
248 /delete-property/ bias-disable 218 /delete-property/ bias-disable;
249 /* 219 /*
250 * Configure a pull-down on 47 220 * Configure a pull-down on 47 (CTS) to match the pull
251 * of the Bluetooth module. 221 * of the Bluetooth module.
252 */ 222 */
253 bias-pull-down; 223 bias-pull-down;
254 }; 224 };
255 }; 225 };
256 226
257 &blsp2_uart1 { 227 &blsp2_uart1 {
258 status = "okay"; 228 status = "okay";
259 }; 229 };
260 230
261 &pm8005_regulators { !! 231 &pm8005_lsid1 {
262 /* VDD_GFX supply */ !! 232 pm8005-regulators {
263 pm8005_s1: s1 { !! 233 compatible = "qcom,pm8005-regulators";
264 regulator-min-microvolt = <524 !! 234
265 regulator-max-microvolt = <110 !! 235 vdd_s1-supply = <&vph_pwr>;
266 regulator-enable-ramp-delay = !! 236
267 /* Hack until we rig up the gp !! 237 pm8005_s1: s1 { /* VDD_GFX supply */
268 regulator-always-on; !! 238 regulator-min-microvolt = <524000>;
>> 239 regulator-max-microvolt = <1100000>;
>> 240 regulator-enable-ramp-delay = <500>;
>> 241
>> 242 /* hack until we rig up the gpu consumer */
>> 243 regulator-always-on;
>> 244 };
269 }; 245 };
270 }; 246 };
271 247
272 &pm8998_gpios { !! 248 &pm8998_gpio {
273 vol_keys_default: vol-keys-state { !! 249 vol_keys_default: vol-keys-default {
274 pins = "gpio5", "gpio6"; !! 250 pinconf {
275 function = "normal"; !! 251 pins = "gpio5", "gpio6";
276 bias-pull-up; !! 252 function = "normal";
277 input-enable; !! 253 bias-pull-up;
278 qcom,drive-strength = <PMIC_GP !! 254 input-enable;
>> 255 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
>> 256 };
279 }; 257 };
280 }; 258 };
281 259
282 &qusb2phy { 260 &qusb2phy {
283 status = "okay"; 261 status = "okay";
284 262
285 vdd-supply = <&vreg_l1a_0p875>; 263 vdd-supply = <&vreg_l1a_0p875>;
286 vdda-pll-supply = <&vreg_l12a_1p8>; 264 vdda-pll-supply = <&vreg_l12a_1p8>;
287 vdda-phy-dpdm-supply = <&vreg_l24a_3p0 265 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
288 }; 266 };
289 267
290 &rpm_requests { 268 &rpm_requests {
291 regulators-0 { !! 269 pm8998-regulators {
292 compatible = "qcom,rpm-pm8998- 270 compatible = "qcom,rpm-pm8998-regulators";
293 271
294 vdd_s1-supply = <&vph_pwr>; 272 vdd_s1-supply = <&vph_pwr>;
295 vdd_s2-supply = <&vph_pwr>; 273 vdd_s2-supply = <&vph_pwr>;
296 vdd_s3-supply = <&vph_pwr>; 274 vdd_s3-supply = <&vph_pwr>;
297 vdd_s4-supply = <&vph_pwr>; 275 vdd_s4-supply = <&vph_pwr>;
298 vdd_s5-supply = <&vph_pwr>; 276 vdd_s5-supply = <&vph_pwr>;
299 vdd_s6-supply = <&vph_pwr>; 277 vdd_s6-supply = <&vph_pwr>;
300 vdd_s7-supply = <&vph_pwr>; 278 vdd_s7-supply = <&vph_pwr>;
301 vdd_s8-supply = <&vph_pwr>; 279 vdd_s8-supply = <&vph_pwr>;
302 vdd_s9-supply = <&vph_pwr>; 280 vdd_s9-supply = <&vph_pwr>;
303 vdd_s10-supply = <&vph_pwr>; 281 vdd_s10-supply = <&vph_pwr>;
304 vdd_s11-supply = <&vph_pwr>; 282 vdd_s11-supply = <&vph_pwr>;
305 vdd_s12-supply = <&vph_pwr>; 283 vdd_s12-supply = <&vph_pwr>;
306 vdd_s13-supply = <&vph_pwr>; 284 vdd_s13-supply = <&vph_pwr>;
307 vdd_l1_l27-supply = <&vreg_s7a 285 vdd_l1_l27-supply = <&vreg_s7a_1p025>;
308 vdd_l2_l8_l17-supply = <&vreg_ 286 vdd_l2_l8_l17-supply = <&vreg_s3a_1p35>;
309 vdd_l3_l11-supply = <&vreg_s7a 287 vdd_l3_l11-supply = <&vreg_s7a_1p025>;
310 vdd_l4_l5-supply = <&vreg_s7a_ 288 vdd_l4_l5-supply = <&vreg_s7a_1p025>;
311 vdd_l6-supply = <&vreg_s5a_2p0 289 vdd_l6-supply = <&vreg_s5a_2p04>;
312 vdd_l7_l12_l14_l15-supply = <& 290 vdd_l7_l12_l14_l15-supply = <&vreg_s5a_2p04>;
313 vdd_l9-supply = <&vreg_bob>; 291 vdd_l9-supply = <&vreg_bob>;
314 vdd_l10_l23_l25-supply = <&vre 292 vdd_l10_l23_l25-supply = <&vreg_bob>;
315 vdd_l13_l19_l21-supply = <&vre 293 vdd_l13_l19_l21-supply = <&vreg_bob>;
316 vdd_l16_l28-supply = <&vreg_bo 294 vdd_l16_l28-supply = <&vreg_bob>;
317 vdd_l18_l22-supply = <&vreg_bo 295 vdd_l18_l22-supply = <&vreg_bob>;
318 vdd_l20_l24-supply = <&vreg_bo 296 vdd_l20_l24-supply = <&vreg_bob>;
319 vdd_l26-supply = <&vreg_s3a_1p 297 vdd_l26-supply = <&vreg_s3a_1p35>;
320 vdd_lvs1_lvs2-supply = <&vreg_ 298 vdd_lvs1_lvs2-supply = <&vreg_s4a_1p8>;
321 299
322 vreg_s3a_1p35: s3 { 300 vreg_s3a_1p35: s3 {
323 regulator-min-microvol 301 regulator-min-microvolt = <1352000>;
324 regulator-max-microvol 302 regulator-max-microvolt = <1352000>;
325 }; 303 };
326 <<
327 vreg_s4a_1p8: s4 { 304 vreg_s4a_1p8: s4 {
328 regulator-min-microvol 305 regulator-min-microvolt = <1800000>;
329 regulator-max-microvol 306 regulator-max-microvolt = <1800000>;
330 regulator-allow-set-lo 307 regulator-allow-set-load;
331 }; 308 };
332 <<
333 vreg_s5a_2p04: s5 { 309 vreg_s5a_2p04: s5 {
334 regulator-min-microvol 310 regulator-min-microvolt = <1904000>;
335 regulator-max-microvol 311 regulator-max-microvolt = <2040000>;
336 }; 312 };
337 <<
338 vreg_s7a_1p025: s7 { 313 vreg_s7a_1p025: s7 {
339 regulator-min-microvol 314 regulator-min-microvolt = <900000>;
340 regulator-max-microvol 315 regulator-max-microvolt = <1028000>;
341 }; 316 };
342 <<
343 vreg_l1a_0p875: l1 { 317 vreg_l1a_0p875: l1 {
344 regulator-min-microvol 318 regulator-min-microvolt = <880000>;
345 regulator-max-microvol 319 regulator-max-microvolt = <880000>;
346 }; 320 };
347 <<
348 vreg_l2a_1p2: l2 { 321 vreg_l2a_1p2: l2 {
349 regulator-min-microvol 322 regulator-min-microvolt = <1200000>;
350 regulator-max-microvol 323 regulator-max-microvolt = <1200000>;
351 }; 324 };
352 <<
353 vreg_l3a_1p0: l3 { 325 vreg_l3a_1p0: l3 {
354 regulator-min-microvol 326 regulator-min-microvolt = <1000000>;
355 regulator-max-microvol 327 regulator-max-microvolt = <1000000>;
356 }; 328 };
357 <<
358 vreg_l5a_0p8: l5 { 329 vreg_l5a_0p8: l5 {
359 regulator-min-microvol 330 regulator-min-microvolt = <800000>;
360 regulator-max-microvol 331 regulator-max-microvolt = <800000>;
361 }; 332 };
362 <<
363 vreg_l6a_1p8: l6 { 333 vreg_l6a_1p8: l6 {
364 regulator-min-microvol 334 regulator-min-microvolt = <1808000>;
365 regulator-max-microvol 335 regulator-max-microvolt = <1808000>;
366 }; 336 };
367 <<
368 vreg_l7a_1p8: l7 { 337 vreg_l7a_1p8: l7 {
369 regulator-min-microvol 338 regulator-min-microvolt = <1800000>;
370 regulator-max-microvol 339 regulator-max-microvolt = <1800000>;
371 }; 340 };
372 <<
373 vreg_l8a_1p2: l8 { 341 vreg_l8a_1p2: l8 {
374 regulator-min-microvol 342 regulator-min-microvolt = <1200000>;
375 regulator-max-microvol 343 regulator-max-microvolt = <1200000>;
376 }; 344 };
377 <<
378 vreg_l9a_1p8: l9 { 345 vreg_l9a_1p8: l9 {
379 regulator-min-microvol 346 regulator-min-microvolt = <1808000>;
380 regulator-max-microvol 347 regulator-max-microvolt = <2960000>;
381 }; 348 };
382 <<
383 vreg_l10a_1p8: l10 { 349 vreg_l10a_1p8: l10 {
384 regulator-min-microvol 350 regulator-min-microvolt = <1808000>;
385 regulator-max-microvol 351 regulator-max-microvolt = <2960000>;
386 }; 352 };
387 <<
388 vreg_l11a_1p0: l11 { 353 vreg_l11a_1p0: l11 {
389 regulator-min-microvol 354 regulator-min-microvolt = <1000000>;
390 regulator-max-microvol 355 regulator-max-microvolt = <1000000>;
391 }; 356 };
392 <<
393 vreg_l12a_1p8: l12 { 357 vreg_l12a_1p8: l12 {
394 regulator-min-microvol 358 regulator-min-microvolt = <1800000>;
395 regulator-max-microvol 359 regulator-max-microvolt = <1800000>;
396 }; 360 };
397 <<
398 vreg_l13a_2p95: l13 { 361 vreg_l13a_2p95: l13 {
399 regulator-min-microvol 362 regulator-min-microvolt = <1808000>;
400 regulator-max-microvol 363 regulator-max-microvolt = <2960000>;
401 }; 364 };
402 <<
403 vreg_l14a_1p88: l14 { 365 vreg_l14a_1p88: l14 {
404 regulator-min-microvol 366 regulator-min-microvolt = <1880000>;
405 regulator-max-microvol 367 regulator-max-microvolt = <1880000>;
406 }; 368 };
407 <<
408 vreg_l15a_1p8: l15 { 369 vreg_l15a_1p8: l15 {
409 regulator-min-microvol 370 regulator-min-microvolt = <1800000>;
410 regulator-max-microvol 371 regulator-max-microvolt = <1800000>;
411 }; 372 };
412 <<
413 vreg_l16a_2p7: l16 { 373 vreg_l16a_2p7: l16 {
414 regulator-min-microvol 374 regulator-min-microvolt = <2704000>;
415 regulator-max-microvol 375 regulator-max-microvolt = <2704000>;
416 }; 376 };
417 <<
418 vreg_l17a_1p3: l17 { 377 vreg_l17a_1p3: l17 {
419 regulator-min-microvol 378 regulator-min-microvolt = <1304000>;
420 regulator-max-microvol 379 regulator-max-microvolt = <1304000>;
421 }; 380 };
422 <<
423 vreg_l18a_2p7: l18 { 381 vreg_l18a_2p7: l18 {
424 regulator-min-microvol 382 regulator-min-microvolt = <2704000>;
425 regulator-max-microvol 383 regulator-max-microvolt = <2704000>;
426 }; 384 };
427 <<
428 vreg_l19a_3p0: l19 { 385 vreg_l19a_3p0: l19 {
429 regulator-min-microvol 386 regulator-min-microvolt = <3008000>;
430 regulator-max-microvol 387 regulator-max-microvolt = <3008000>;
431 }; 388 };
432 <<
433 vreg_l20a_2p95: l20 { 389 vreg_l20a_2p95: l20 {
434 regulator-min-microvol 390 regulator-min-microvolt = <2960000>;
435 regulator-max-microvol 391 regulator-max-microvolt = <2960000>;
436 regulator-allow-set-lo 392 regulator-allow-set-load;
437 }; 393 };
438 vreg_l21a_2p95: l21 { 394 vreg_l21a_2p95: l21 {
439 regulator-min-microvol 395 regulator-min-microvolt = <2960000>;
440 regulator-max-microvol 396 regulator-max-microvolt = <2960000>;
441 regulator-system-load <<
442 regulator-allow-set-lo 397 regulator-allow-set-load;
>> 398 regulator-system-load = <800000>;
443 }; 399 };
444 <<
445 vreg_l22a_2p85: l22 { 400 vreg_l22a_2p85: l22 {
446 regulator-min-microvol 401 regulator-min-microvolt = <2864000>;
447 regulator-max-microvol 402 regulator-max-microvolt = <2864000>;
448 }; 403 };
449 <<
450 vreg_l23a_3p3: l23 { 404 vreg_l23a_3p3: l23 {
451 regulator-min-microvol 405 regulator-min-microvolt = <3312000>;
452 regulator-max-microvol 406 regulator-max-microvolt = <3312000>;
453 }; 407 };
454 <<
455 vreg_l24a_3p075: l24 { 408 vreg_l24a_3p075: l24 {
456 regulator-min-microvol 409 regulator-min-microvolt = <3088000>;
457 regulator-max-microvol 410 regulator-max-microvolt = <3088000>;
458 }; 411 };
459 <<
460 vreg_l25a_3p3: l25 { 412 vreg_l25a_3p3: l25 {
461 regulator-min-microvol 413 regulator-min-microvolt = <3104000>;
462 regulator-max-microvol 414 regulator-max-microvolt = <3312000>;
463 }; 415 };
464 <<
465 vreg_l26a_1p2: l26 { 416 vreg_l26a_1p2: l26 {
466 regulator-min-microvol 417 regulator-min-microvolt = <1200000>;
467 regulator-max-microvol 418 regulator-max-microvolt = <1200000>;
468 regulator-allow-set-lo 419 regulator-allow-set-load;
469 }; 420 };
470 <<
471 vreg_l28_3p0: l28 { 421 vreg_l28_3p0: l28 {
472 regulator-min-microvol 422 regulator-min-microvolt = <3008000>;
473 regulator-max-microvol 423 regulator-max-microvolt = <3008000>;
474 }; 424 };
475 <<
476 vreg_lvs1a_1p8: lvs1 { }; 425 vreg_lvs1a_1p8: lvs1 { };
477 vreg_lvs2a_1p8: lvs2 { }; 426 vreg_lvs2a_1p8: lvs2 { };
478 }; 427 };
479 428
480 regulators-1 { !! 429 pmi8998-regulators {
481 compatible = "qcom,rpm-pmi8998 430 compatible = "qcom,rpm-pmi8998-regulators";
482 431
483 vdd_bob-supply = <&vph_pwr>; 432 vdd_bob-supply = <&vph_pwr>;
484 433
485 vreg_bob: bob { 434 vreg_bob: bob {
486 regulator-min-microvol 435 regulator-min-microvolt = <3312000>;
487 regulator-max-microvol 436 regulator-max-microvolt = <3600000>;
488 }; 437 };
489 }; 438 };
490 }; 439 };
491 440
492 &tlmm { 441 &tlmm {
493 gpio-reserved-ranges = <0 4>, <81 4>; 442 gpio-reserved-ranges = <0 4>, <81 4>;
494 443
495 hall_sensor_default: hall-sensor-defau !! 444 hall_sensor_default: hall-sensor-default {
496 pins = "gpio124"; 445 pins = "gpio124";
497 function = "gpio"; 446 function = "gpio";
498 drive-strength = <2>; 447 drive-strength = <2>;
499 bias-disable; 448 bias-disable;
>> 449 input-enable;
500 }; 450 };
501 451
502 ts_int_active: ts-int-active-state { !! 452 ts_int_active: ts-int-active {
503 pins = "gpio125"; 453 pins = "gpio125";
504 function = "gpio"; 454 function = "gpio";
505 drive-strength = <8>; 455 drive-strength = <8>;
506 bias-pull-up; 456 bias-pull-up;
507 }; 457 };
508 458
509 ts_reset_active: ts-reset-active-state !! 459 ts_reset_active: ts-reset-active {
510 pins = "gpio89"; 460 pins = "gpio89";
511 function = "gpio"; 461 function = "gpio";
512 drive-strength = <8>; 462 drive-strength = <8>;
513 bias-pull-up; 463 bias-pull-up;
514 }; 464 };
515 <<
516 nfc_int_active: nfc-int-active-state { <<
517 pins = "gpio92"; <<
518 function = "gpio"; <<
519 drive-strength = <6>; <<
520 bias-pull-up; <<
521 }; <<
522 <<
523 nfc_enable_active: nfc-enable-active-s <<
524 pins = "gpio12", "gpio116"; <<
525 function = "gpio"; <<
526 drive-strength = <6>; <<
527 bias-pull-up; <<
528 }; <<
529 }; 465 };
530 466
531 &ufshc { 467 &ufshc {
532 status = "okay"; 468 status = "okay";
533 469
534 vcc-supply = <&vreg_l20a_2p95>; 470 vcc-supply = <&vreg_l20a_2p95>;
535 vccq-supply = <&vreg_l26a_1p2>; 471 vccq-supply = <&vreg_l26a_1p2>;
536 vccq2-supply = <&vreg_s4a_1p8>; 472 vccq2-supply = <&vreg_s4a_1p8>;
537 vdd-hba-supply = <&vreg_l26a_1p2>; <<
538 vcc-max-microamp = <750000>; 473 vcc-max-microamp = <750000>;
539 vccq-max-microamp = <560000>; 474 vccq-max-microamp = <560000>;
540 vccq2-max-microamp = <750000>; 475 vccq2-max-microamp = <750000>;
541 }; 476 };
542 477
543 &ufsphy { 478 &ufsphy {
544 status = "okay"; 479 status = "okay";
545 480
546 vdda-phy-supply = <&vreg_l1a_0p875>; 481 vdda-phy-supply = <&vreg_l1a_0p875>;
547 vdda-pll-supply = <&vreg_l2a_1p2>; 482 vdda-pll-supply = <&vreg_l2a_1p2>;
>> 483 vddp-ref-clk-supply = <&vreg_l26a_1p2>;
548 }; 484 };
549 485
550 &usb3 { 486 &usb3 {
551 status = "okay"; 487 status = "okay";
552 488
553 /* Disable USB3 clock requirement as t 489 /* Disable USB3 clock requirement as the device only supports USB2 */
554 qcom,select-utmi-as-pipe-clk; 490 qcom,select-utmi-as-pipe-clk;
555 }; 491 };
556 492
557 &usb3_dwc3 { 493 &usb3_dwc3 {
558 /* Drop the unused USB 3 PHY */ 494 /* Drop the unused USB 3 PHY */
559 phys = <&qusb2phy>; 495 phys = <&qusb2phy>;
560 phy-names = "usb2-phy"; 496 phy-names = "usb2-phy";
561 497
562 /* Fastest mode for USB 2 */ 498 /* Fastest mode for USB 2 */
563 maximum-speed = "high-speed"; 499 maximum-speed = "high-speed";
564 500
565 /* Force to peripheral until we can sw 501 /* Force to peripheral until we can switch modes */
566 dr_mode = "peripheral"; 502 dr_mode = "peripheral";
567 }; 503 };
568 504
569 &wifi { 505 &wifi {
570 /* Leave disabled until MSS is functio 506 /* Leave disabled until MSS is functional */
571 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8> 507 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
572 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 508 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
573 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 509 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
574 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 510 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
575 }; 511 };
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