1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019, AngeloGioacchino Del Re< 2 // Copyright (c) 2019, AngeloGioacchino Del Regno <kholk11@gmail.com>
3 3
4 #include <dt-bindings/iio/qcom,spmi-vadc.h> 4 #include <dt-bindings/iio/qcom,spmi-vadc.h>
5 #include <dt-bindings/interrupt-controller/irq 5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/spmi/spmi.h> 6 #include <dt-bindings/spmi/spmi.h>
7 7
8 &spmi_bus { 8 &spmi_bus {
9 pmic@2 { 9 pmic@2 {
10 compatible = "qcom,pmi8950", " 10 compatible = "qcom,pmi8950", "qcom,spmi-pmic";
11 reg = <0x2 SPMI_USID>; 11 reg = <0x2 SPMI_USID>;
12 #address-cells = <1>; 12 #address-cells = <1>;
13 #size-cells = <0>; 13 #size-cells = <0>;
14 14
15 pmi8950_vadc: adc@3100 { 15 pmi8950_vadc: adc@3100 {
16 compatible = "qcom,spm 16 compatible = "qcom,spmi-vadc";
17 reg = <0x3100>; 17 reg = <0x3100>;
18 interrupts = <0x2 0x31 18 interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
19 #address-cells = <1>; 19 #address-cells = <1>;
20 #size-cells = <0>; 20 #size-cells = <0>;
21 #io-channel-cells = <1 21 #io-channel-cells = <1>;
22 22
23 channel@0 { 23 channel@0 {
24 reg = <VADC_US 24 reg = <VADC_USBIN>;
25 qcom,pre-scali 25 qcom,pre-scaling = <1 4>;
26 label = "usbin 26 label = "usbin";
27 }; 27 };
28 28
29 channel@1 { 29 channel@1 {
30 reg = <VADC_DC 30 reg = <VADC_DCIN>;
31 qcom,pre-scali 31 qcom,pre-scaling = <1 4>;
32 label = "dcin" 32 label = "dcin";
33 }; 33 };
34 34
35 channel@2 { 35 channel@2 {
36 reg = <VADC_VC 36 reg = <VADC_VCHG_SNS>;
37 qcom,pre-scali 37 qcom,pre-scaling = <1 1>;
38 label = "vchg_ 38 label = "vchg_sns";
39 }; 39 };
40 40
41 channel@9 { 41 channel@9 {
42 reg = <VADC_RE 42 reg = <VADC_REF_625MV>;
43 qcom,pre-scali 43 qcom,pre-scaling = <1 1>;
44 label = "ref_6 44 label = "ref_625mv";
45 }; 45 };
46 46
47 channel@a { 47 channel@a {
48 reg = <VADC_RE 48 reg = <VADC_REF_1250MV>;
49 qcom,pre-scali 49 qcom,pre-scaling = <1 1>;
50 label = "ref_1 50 label = "ref_1250mv";
51 }; 51 };
52 52
53 channel@d { 53 channel@d {
54 reg = <VADC_SP 54 reg = <VADC_SPARE2>;
55 qcom,pre-scali 55 qcom,pre-scaling = <1 1>;
56 label = "chg_t 56 label = "chg_temp";
57 }; 57 };
58 }; 58 };
59 59
60 pmi8950_mpps: mpps@a000 { 60 pmi8950_mpps: mpps@a000 {
61 compatible = "qcom,pmi 61 compatible = "qcom,pmi8950-mpp", "qcom,spmi-mpp";
62 reg = <0xa000>; 62 reg = <0xa000>;
63 gpio-controller; 63 gpio-controller;
64 gpio-ranges = <&pmi895 64 gpio-ranges = <&pmi8950_mpps 0 0 4>;
65 #gpio-cells = <2>; 65 #gpio-cells = <2>;
66 interrupt-controller; 66 interrupt-controller;
67 #interrupt-cells = <2> 67 #interrupt-cells = <2>;
68 }; 68 };
69 69
70 pmi8950_gpios: gpio@c000 { 70 pmi8950_gpios: gpio@c000 {
71 compatible = "qcom,pmi 71 compatible = "qcom,pmi8950-gpio", "qcom,spmi-gpio";
72 reg = <0xc000>; 72 reg = <0xc000>;
73 gpio-controller; 73 gpio-controller;
74 gpio-ranges = <&pmi895 74 gpio-ranges = <&pmi8950_gpios 0 0 2>;
75 #gpio-cells = <2>; 75 #gpio-cells = <2>;
76 interrupt-controller; 76 interrupt-controller;
77 #interrupt-cells = <2> 77 #interrupt-cells = <2>;
78 }; 78 };
79 }; 79 };
80 80
81 pmic@3 { 81 pmic@3 {
82 compatible = "qcom,pmi8950", " 82 compatible = "qcom,pmi8950", "qcom,spmi-pmic";
83 reg = <0x3 SPMI_USID>; 83 reg = <0x3 SPMI_USID>;
84 #address-cells = <1>; 84 #address-cells = <1>;
85 #size-cells = <0>; 85 #size-cells = <0>;
86 86
87 pmi8950_pwm: pwm { 87 pmi8950_pwm: pwm {
88 compatible = "qcom,pmi 88 compatible = "qcom,pmi8950-pwm";
89 #pwm-cells = <2>; 89 #pwm-cells = <2>;
90 90
91 status = "disabled"; 91 status = "disabled";
92 }; 92 };
93 93
94 pmi8950_wled: leds@d800 { 94 pmi8950_wled: leds@d800 {
95 compatible = "qcom,pmi 95 compatible = "qcom,pmi8950-wled";
96 reg = <0xd800>, <0xd90 96 reg = <0xd800>, <0xd900>;
97 interrupts = <0x3 0xd8 97 interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>,
98 <0x3 0xd8 98 <0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>;
99 interrupt-names = "ovp 99 interrupt-names = "ovp", "short";
100 label = "backlight"; 100 label = "backlight";
101 101
102 status = "disabled"; 102 status = "disabled";
103 }; 103 };
104 }; 104 };
105 }; 105 };
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