1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Copyright (c) 2021, The Linux Foundation. A 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited 4 * Copyright (c) 2022, Linaro Limited
5 */ 5 */
6 6
7 /dts-v1/; 7 /dts-v1/;
8 8
9 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/spmi/spmi.h> 11 #include <dt-bindings/spmi/spmi.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h <<
13 12
14 #include "sa8540p.dtsi" 13 #include "sa8540p.dtsi"
15 #include "sa8540p-pmics.dtsi" 14 #include "sa8540p-pmics.dtsi"
16 15
17 / { 16 / {
18 model = "Qualcomm SA8295P ADP"; 17 model = "Qualcomm SA8295P ADP";
19 compatible = "qcom,sa8295p-adp", "qcom 18 compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
20 19
21 aliases { 20 aliases {
22 serial0 = &uart17; 21 serial0 = &uart17;
23 }; 22 };
24 23
25 chosen { 24 chosen {
26 stdout-path = "serial0:115200n 25 stdout-path = "serial0:115200n8";
27 }; 26 };
28 27
29 dp2-connector { 28 dp2-connector {
30 compatible = "dp-connector"; 29 compatible = "dp-connector";
31 label = "DP2"; 30 label = "DP2";
32 type = "mini"; 31 type = "mini";
33 32
34 hpd-gpios = <&tlmm 20 GPIO_ACT 33 hpd-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
35 34
36 port { 35 port {
37 dp2_connector_in: endp 36 dp2_connector_in: endpoint {
38 remote-endpoin 37 remote-endpoint = <&mdss1_dp0_phy_out>;
39 }; 38 };
40 }; 39 };
41 }; 40 };
42 41
43 dp3-connector { 42 dp3-connector {
44 compatible = "dp-connector"; 43 compatible = "dp-connector";
45 label = "DP3"; 44 label = "DP3";
46 type = "mini"; 45 type = "mini";
47 46
48 hpd-gpios = <&tlmm 45 GPIO_ACT 47 hpd-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
49 48
50 port { 49 port {
51 dp3_connector_in: endp 50 dp3_connector_in: endpoint {
52 remote-endpoin 51 remote-endpoint = <&mdss1_dp1_phy_out>;
53 }; 52 };
54 }; 53 };
55 }; 54 };
56 55
57 edp0-connector { 56 edp0-connector {
58 compatible = "dp-connector"; 57 compatible = "dp-connector";
59 label = "EDP0"; 58 label = "EDP0";
60 type = "mini"; 59 type = "mini";
61 60
62 hpd-gpios = <&tlmm 2 GPIO_ACTI 61 hpd-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
63 62
64 port { 63 port {
65 edp0_connector_in: end 64 edp0_connector_in: endpoint {
66 remote-endpoin 65 remote-endpoint = <&mdss0_dp2_phy_out>;
67 }; 66 };
68 }; 67 };
69 }; 68 };
70 69
71 edp1-connector { 70 edp1-connector {
72 compatible = "dp-connector"; 71 compatible = "dp-connector";
73 label = "EDP1"; 72 label = "EDP1";
74 type = "mini"; 73 type = "mini";
75 74
76 hpd-gpios = <&tlmm 3 GPIO_ACTI 75 hpd-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
77 76
78 port { 77 port {
79 edp1_connector_in: end 78 edp1_connector_in: endpoint {
80 remote-endpoin 79 remote-endpoint = <&mdss0_dp3_phy_out>;
81 }; 80 };
82 }; 81 };
83 }; 82 };
84 83
85 edp2-connector { 84 edp2-connector {
86 compatible = "dp-connector"; 85 compatible = "dp-connector";
87 label = "EDP2"; 86 label = "EDP2";
88 type = "mini"; 87 type = "mini";
89 88
90 hpd-gpios = <&tlmm 7 GPIO_ACTI 89 hpd-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
91 90
92 port { 91 port {
93 edp2_connector_in: end 92 edp2_connector_in: endpoint {
94 remote-endpoin 93 remote-endpoint = <&mdss1_dp2_phy_out>;
95 }; 94 };
96 }; 95 };
97 }; 96 };
98 97
99 edp3-connector { 98 edp3-connector {
100 compatible = "dp-connector"; 99 compatible = "dp-connector";
101 label = "EDP3"; 100 label = "EDP3";
102 type = "mini"; 101 type = "mini";
103 102
104 hpd-gpios = <&tlmm 6 GPIO_ACTI 103 hpd-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
105 104
106 port { 105 port {
107 edp3_connector_in: end 106 edp3_connector_in: endpoint {
108 remote-endpoin 107 remote-endpoint = <&mdss1_dp3_phy_out>;
109 }; 108 };
110 }; 109 };
111 }; 110 };
112 111
113 regulator-usb2-vbus { <<
114 compatible = "regulator-fixed" <<
115 regulator-name = "USB2_VBUS"; <<
116 gpio = <&pmm8540c_gpios 9 GPIO <<
117 pinctrl-0 = <&usb2_en>; <<
118 pinctrl-names = "default"; <<
119 enable-active-high; <<
120 regulator-always-on; <<
121 }; <<
122 <<
123 regulator-usb3-vbus { <<
124 compatible = "regulator-fixed" <<
125 regulator-name = "USB3_VBUS"; <<
126 gpio = <&pmm8540e_gpios 5 GPIO <<
127 pinctrl-0 = <&usb3_en>; <<
128 pinctrl-names = "default"; <<
129 enable-active-high; <<
130 regulator-always-on; <<
131 }; <<
132 <<
133 regulator-usb4-vbus { <<
134 compatible = "regulator-fixed" <<
135 regulator-name = "USB4_VBUS"; <<
136 gpio = <&pmm8540g_gpios 5 GPIO <<
137 pinctrl-0 = <&usb4_en>; <<
138 pinctrl-names = "default"; <<
139 enable-active-high; <<
140 regulator-always-on; <<
141 }; <<
142 <<
143 regulator-usb5-vbus { <<
144 compatible = "regulator-fixed" <<
145 regulator-name = "USB5_VBUS"; <<
146 gpio = <&pmm8540g_gpios 9 GPIO <<
147 pinctrl-0 = <&usb5_en>; <<
148 pinctrl-names = "default"; <<
149 enable-active-high; <<
150 regulator-always-on; <<
151 }; <<
152 <<
153 reserved-memory { 112 reserved-memory {
154 gpu_mem: gpu-mem@8bf00000 { 113 gpu_mem: gpu-mem@8bf00000 {
155 reg = <0 0x8bf00000 0 114 reg = <0 0x8bf00000 0 0x2000>;
156 no-map; 115 no-map;
157 }; 116 };
158 }; 117 };
159 }; 118 };
160 119
161 &apps_rsc { 120 &apps_rsc {
162 regulators-0 { 121 regulators-0 {
163 compatible = "qcom,pm8150-rpmh 122 compatible = "qcom,pm8150-rpmh-regulators";
164 qcom,pmic-id = "a"; 123 qcom,pmic-id = "a";
165 124
166 vreg_l3a: ldo3 { 125 vreg_l3a: ldo3 {
167 regulator-name = "vreg 126 regulator-name = "vreg_l3a";
168 regulator-min-microvol 127 regulator-min-microvolt = <1200000>;
169 regulator-max-microvol 128 regulator-max-microvolt = <1208000>;
170 regulator-initial-mode 129 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
171 }; 130 };
172 131
173 vreg_l5a: ldo5 { 132 vreg_l5a: ldo5 {
174 regulator-name = "vreg 133 regulator-name = "vreg_l5a";
175 regulator-min-microvol 134 regulator-min-microvolt = <912000>;
176 regulator-max-microvol 135 regulator-max-microvolt = <912000>;
177 regulator-initial-mode 136 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
178 }; 137 };
179 138
180 vreg_l7a: ldo7 { 139 vreg_l7a: ldo7 {
181 regulator-name = "vreg 140 regulator-name = "vreg_l7a";
182 regulator-min-microvol 141 regulator-min-microvolt = <1800000>;
183 regulator-max-microvol 142 regulator-max-microvolt = <1800000>;
184 regulator-initial-mode 143 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
185 }; 144 };
186 145
187 vreg_l13a: ldo13 { 146 vreg_l13a: ldo13 {
188 regulator-name = "vreg 147 regulator-name = "vreg_l13a";
189 regulator-min-microvol 148 regulator-min-microvolt = <3072000>;
190 regulator-max-microvol 149 regulator-max-microvolt = <3072000>;
191 regulator-initial-mode 150 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
192 }; 151 };
193 152
194 vreg_l11a: ldo11 { 153 vreg_l11a: ldo11 {
195 regulator-name = "vreg 154 regulator-name = "vreg_l11a";
196 regulator-min-microvol 155 regulator-min-microvolt = <880000>;
197 regulator-max-microvol 156 regulator-max-microvolt = <880000>;
198 regulator-initial-mode 157 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199 }; 158 };
200 }; 159 };
201 160
202 regulators-1 { 161 regulators-1 {
203 compatible = "qcom,pm8150-rpmh 162 compatible = "qcom,pm8150-rpmh-regulators";
204 qcom,pmic-id = "c"; 163 qcom,pmic-id = "c";
205 164
206 vreg_l1c: ldo1 { 165 vreg_l1c: ldo1 {
207 regulator-name = "vreg 166 regulator-name = "vreg_l1c";
208 regulator-min-microvol 167 regulator-min-microvolt = <912000>;
209 regulator-max-microvol 168 regulator-max-microvolt = <912000>;
210 regulator-initial-mode 169 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
211 }; 170 };
212 171
213 vreg_l2c: ldo2 { 172 vreg_l2c: ldo2 {
214 regulator-name = "vreg 173 regulator-name = "vreg_l2c";
215 regulator-min-microvol 174 regulator-min-microvolt = <3072000>;
216 regulator-max-microvol 175 regulator-max-microvolt = <3072000>;
217 regulator-initial-mode 176 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
218 }; 177 };
219 178
220 vreg_l3c: ldo3 { 179 vreg_l3c: ldo3 {
221 regulator-name = "vreg 180 regulator-name = "vreg_l3c";
222 regulator-min-microvol 181 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 182 regulator-max-microvolt = <1200000>;
224 regulator-initial-mode 183 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 regulator-allow-set-lo 184 regulator-allow-set-load;
226 regulator-allowed-mode 185 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
227 186 RPMH_REGULATOR_MODE_HPM>;
228 }; 187 };
229 188
230 vreg_l4c: ldo4 { 189 vreg_l4c: ldo4 {
231 regulator-name = "vreg 190 regulator-name = "vreg_l4c";
232 regulator-min-microvol 191 regulator-min-microvolt = <1200000>;
233 regulator-max-microvol 192 regulator-max-microvolt = <1208000>;
234 regulator-initial-mode 193 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
235 }; 194 };
236 195
237 vreg_l6c: ldo6 { 196 vreg_l6c: ldo6 {
238 regulator-name = "vreg 197 regulator-name = "vreg_l6c";
239 regulator-min-microvol 198 regulator-min-microvolt = <1200000>;
240 regulator-max-microvol 199 regulator-max-microvolt = <1200000>;
241 regulator-initial-mode 200 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
242 regulator-allow-set-lo 201 regulator-allow-set-load;
243 regulator-allowed-mode 202 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
244 203 RPMH_REGULATOR_MODE_HPM>;
245 }; 204 };
246 205
247 vreg_l7c: ldo7 { 206 vreg_l7c: ldo7 {
248 regulator-name = "vreg 207 regulator-name = "vreg_l7c";
249 regulator-min-microvol 208 regulator-min-microvolt = <1800000>;
250 regulator-max-microvol 209 regulator-max-microvolt = <1800000>;
251 regulator-initial-mode 210 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
252 }; 211 };
253 212
254 vreg_l10c: ldo10 { 213 vreg_l10c: ldo10 {
255 regulator-name = "vreg 214 regulator-name = "vreg_l10c";
256 regulator-min-microvol 215 regulator-min-microvolt = <2504000>;
257 regulator-max-microvol 216 regulator-max-microvolt = <2504000>;
258 regulator-initial-mode 217 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259 regulator-allow-set-lo 218 regulator-allow-set-load;
260 regulator-allowed-mode 219 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
261 220 RPMH_REGULATOR_MODE_HPM>;
262 }; 221 };
263 222
264 vreg_l17c: ldo17 { 223 vreg_l17c: ldo17 {
265 regulator-name = "vreg 224 regulator-name = "vreg_l17c";
266 regulator-min-microvol 225 regulator-min-microvolt = <2504000>;
267 regulator-max-microvol 226 regulator-max-microvolt = <2504000>;
268 regulator-initial-mode 227 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269 regulator-allow-set-lo 228 regulator-allow-set-load;
270 regulator-allowed-mode 229 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
271 230 RPMH_REGULATOR_MODE_HPM>;
272 }; 231 };
273 }; 232 };
274 233
275 regulators-2 { 234 regulators-2 {
276 compatible = "qcom,pm8150-rpmh 235 compatible = "qcom,pm8150-rpmh-regulators";
277 qcom,pmic-id = "g"; 236 qcom,pmic-id = "g";
278 237
279 vreg_l3g: ldo3 { 238 vreg_l3g: ldo3 {
280 regulator-name = "vreg 239 regulator-name = "vreg_l3g";
281 regulator-min-microvol 240 regulator-min-microvolt = <1200000>;
282 regulator-max-microvol 241 regulator-max-microvolt = <1200000>;
283 regulator-initial-mode 242 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
284 }; 243 };
285 244
286 vreg_l7g: ldo7 { 245 vreg_l7g: ldo7 {
287 regulator-name = "vreg 246 regulator-name = "vreg_l7g";
288 regulator-min-microvol 247 regulator-min-microvolt = <1800000>;
289 regulator-max-microvol 248 regulator-max-microvolt = <1800000>;
290 regulator-initial-mode 249 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
291 }; 250 };
292 251
293 vreg_l8g: ldo8 { 252 vreg_l8g: ldo8 {
294 regulator-name = "vreg 253 regulator-name = "vreg_l8g";
295 regulator-min-microvol 254 regulator-min-microvolt = <912000>;
296 regulator-max-microvol 255 regulator-max-microvolt = <912000>;
297 regulator-initial-mode 256 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
298 }; 257 };
299 258
300 vreg_l11g: ldo11 { 259 vreg_l11g: ldo11 {
301 regulator-name = "vreg 260 regulator-name = "vreg_l11g";
302 regulator-min-microvol 261 regulator-min-microvolt = <912000>;
303 regulator-max-microvol 262 regulator-max-microvolt = <912000>;
304 regulator-initial-mode 263 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305 }; 264 };
306 }; 265 };
307 }; 266 };
308 267
309 &dispcc0 { 268 &dispcc0 {
310 status = "okay"; 269 status = "okay";
311 }; 270 };
312 271
313 &dispcc1 { 272 &dispcc1 {
314 status = "okay"; 273 status = "okay";
315 }; 274 };
316 275
317 &i2c12 { 276 &i2c12 {
318 pinctrl-0 = <&qup1_i2c4_state>; 277 pinctrl-0 = <&qup1_i2c4_state>;
319 pinctrl-names = "default"; 278 pinctrl-names = "default";
320 279
321 status = "okay"; 280 status = "okay";
322 281
323 vdd_gfx: regulator@39 { 282 vdd_gfx: regulator@39 {
324 compatible = "maxim,max20411"; 283 compatible = "maxim,max20411";
325 reg = <0x39>; 284 reg = <0x39>;
326 285
327 regulator-min-microvolt = <800 286 regulator-min-microvolt = <800000>;
328 regulator-max-microvolt = <800 287 regulator-max-microvolt = <800000>;
329 288
330 enable-gpios = <&pmm8540a_gpio 289 enable-gpios = <&pmm8540a_gpios 2 GPIO_ACTIVE_HIGH>;
331 290
332 pinctrl-0 = <&max20411_en>; 291 pinctrl-0 = <&max20411_en>;
333 pinctrl-names = "default"; 292 pinctrl-names = "default";
334 }; 293 };
335 }; 294 };
336 295
337 &gpucc { 296 &gpucc {
338 vdd-gfx-supply = <&vdd_gfx>; 297 vdd-gfx-supply = <&vdd_gfx>;
339 status = "okay"; 298 status = "okay";
340 }; 299 };
341 300
342 &gmu { 301 &gmu {
343 status = "okay"; 302 status = "okay";
344 }; 303 };
345 304
346 &gpu { 305 &gpu {
347 status = "okay"; 306 status = "okay";
348 307
349 zap-shader { 308 zap-shader {
350 memory-region = <&gpu_mem>; 309 memory-region = <&gpu_mem>;
351 firmware-name = "qcom/sa8295p/ 310 firmware-name = "qcom/sa8295p/a690_zap.mbn";
352 }; 311 };
353 }; 312 };
354 313
355 &gpu_smmu { 314 &gpu_smmu {
356 status = "okay"; 315 status = "okay";
357 }; 316 };
358 317
359 &mdss0 { 318 &mdss0 {
360 status = "okay"; 319 status = "okay";
361 }; 320 };
362 321
363 &mdss0_dp2 { 322 &mdss0_dp2 {
364 data-lanes = <0 1 2 3>; 323 data-lanes = <0 1 2 3>;
365 324
366 status = "okay"; 325 status = "okay";
367 326
368 ports { 327 ports {
369 port@1 { 328 port@1 {
370 reg = <1>; 329 reg = <1>;
371 mdss0_dp2_phy_out: end 330 mdss0_dp2_phy_out: endpoint {
372 remote-endpoin 331 remote-endpoint = <&edp0_connector_in>;
373 }; 332 };
374 }; 333 };
375 }; 334 };
376 }; 335 };
377 336
378 &mdss0_dp2_phy { 337 &mdss0_dp2_phy {
379 vdda-phy-supply = <&vreg_l8g>; 338 vdda-phy-supply = <&vreg_l8g>;
380 vdda-pll-supply = <&vreg_l3g>; 339 vdda-pll-supply = <&vreg_l3g>;
381 340
382 status = "okay"; 341 status = "okay";
383 }; 342 };
384 343
385 &mdss0_dp3 { 344 &mdss0_dp3 {
386 data-lanes = <0 1 2 3>; 345 data-lanes = <0 1 2 3>;
387 346
388 status = "okay"; 347 status = "okay";
389 348
390 ports { 349 ports {
391 port@1 { 350 port@1 {
392 reg = <1>; 351 reg = <1>;
393 mdss0_dp3_phy_out: end 352 mdss0_dp3_phy_out: endpoint {
394 remote-endpoin 353 remote-endpoint = <&edp1_connector_in>;
395 }; 354 };
396 }; 355 };
397 }; 356 };
398 }; 357 };
399 358
400 &mdss0_dp3_phy { 359 &mdss0_dp3_phy {
401 vdda-phy-supply = <&vreg_l8g>; 360 vdda-phy-supply = <&vreg_l8g>;
402 vdda-pll-supply = <&vreg_l3g>; 361 vdda-pll-supply = <&vreg_l3g>;
403 362
404 status = "okay"; 363 status = "okay";
405 }; 364 };
406 365
407 &mdss1 { 366 &mdss1 {
408 status = "okay"; 367 status = "okay";
409 }; 368 };
410 369
411 &mdss1_dp0 { 370 &mdss1_dp0 {
412 data-lanes = <0 1 2 3>; 371 data-lanes = <0 1 2 3>;
413 372
414 status = "okay"; 373 status = "okay";
415 374
416 ports { 375 ports {
417 port@1 { 376 port@1 {
418 reg = <1>; 377 reg = <1>;
419 mdss1_dp0_phy_out: end 378 mdss1_dp0_phy_out: endpoint {
420 remote-endpoin 379 remote-endpoint = <&dp2_connector_in>;
421 }; 380 };
422 }; 381 };
423 }; 382 };
424 }; 383 };
425 384
426 &mdss1_dp0_phy { 385 &mdss1_dp0_phy {
427 vdda-phy-supply = <&vreg_l11g>; 386 vdda-phy-supply = <&vreg_l11g>;
428 vdda-pll-supply = <&vreg_l3g>; 387 vdda-pll-supply = <&vreg_l3g>;
429 388
430 status = "okay"; 389 status = "okay";
431 }; 390 };
432 391
433 &mdss1_dp1 { 392 &mdss1_dp1 {
434 data-lanes = <0 1 2 3>; 393 data-lanes = <0 1 2 3>;
435 394
436 status = "okay"; 395 status = "okay";
437 396
438 ports { 397 ports {
439 port@1 { 398 port@1 {
440 reg = <1>; 399 reg = <1>;
441 mdss1_dp1_phy_out: end 400 mdss1_dp1_phy_out: endpoint {
442 remote-endpoin 401 remote-endpoint = <&dp3_connector_in>;
443 }; 402 };
444 }; 403 };
445 }; 404 };
446 }; 405 };
447 406
448 &mdss1_dp1_phy { 407 &mdss1_dp1_phy {
449 vdda-phy-supply = <&vreg_l11g>; 408 vdda-phy-supply = <&vreg_l11g>;
450 vdda-pll-supply = <&vreg_l3g>; 409 vdda-pll-supply = <&vreg_l3g>;
451 410
452 status = "okay"; 411 status = "okay";
453 }; 412 };
454 413
455 &mdss1_dp2 { 414 &mdss1_dp2 {
456 data-lanes = <0 1 2 3>; 415 data-lanes = <0 1 2 3>;
457 416
458 status = "okay"; 417 status = "okay";
459 418
460 ports { 419 ports {
461 port@1 { 420 port@1 {
462 reg = <1>; 421 reg = <1>;
463 mdss1_dp2_phy_out: end 422 mdss1_dp2_phy_out: endpoint {
464 remote-endpoin 423 remote-endpoint = <&edp2_connector_in>;
465 }; 424 };
466 }; 425 };
467 }; 426 };
468 }; 427 };
469 428
470 &mdss1_dp2_phy { 429 &mdss1_dp2_phy {
471 vdda-phy-supply = <&vreg_l11g>; 430 vdda-phy-supply = <&vreg_l11g>;
472 vdda-pll-supply = <&vreg_l3g>; 431 vdda-pll-supply = <&vreg_l3g>;
473 432
474 status = "okay"; 433 status = "okay";
475 }; 434 };
476 435
477 &mdss1_dp3 { 436 &mdss1_dp3 {
478 data-lanes = <0 1 2 3>; 437 data-lanes = <0 1 2 3>;
479 438
480 status = "okay"; 439 status = "okay";
481 440
482 ports { 441 ports {
483 port@1 { 442 port@1 {
484 reg = <1>; 443 reg = <1>;
485 mdss1_dp3_phy_out: end 444 mdss1_dp3_phy_out: endpoint {
486 remote-endpoin 445 remote-endpoint = <&edp3_connector_in>;
487 }; 446 };
488 }; 447 };
489 }; 448 };
490 }; 449 };
491 450
492 &mdss1_dp3_phy { 451 &mdss1_dp3_phy {
493 vdda-phy-supply = <&vreg_l11g>; 452 vdda-phy-supply = <&vreg_l11g>;
494 vdda-pll-supply = <&vreg_l3g>; 453 vdda-pll-supply = <&vreg_l3g>;
495 454
496 status = "okay"; 455 status = "okay";
497 }; 456 };
498 457
499 &pcie2a { 458 &pcie2a {
500 perst-gpios = <&tlmm 143 GPIO_ACTIVE_L 459 perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
501 wake-gpios = <&tlmm 145 GPIO_ACTIVE_LO 460 wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
502 461
503 pinctrl-names = "default"; 462 pinctrl-names = "default";
504 pinctrl-0 = <&pcie2a_default>; 463 pinctrl-0 = <&pcie2a_default>;
505 464
506 status = "okay"; 465 status = "okay";
507 }; 466 };
508 467
509 &pcie2a_phy { 468 &pcie2a_phy {
510 vdda-phy-supply = <&vreg_l11a>; 469 vdda-phy-supply = <&vreg_l11a>;
511 vdda-pll-supply = <&vreg_l3a>; 470 vdda-pll-supply = <&vreg_l3a>;
512 471
513 status = "okay"; 472 status = "okay";
514 }; 473 };
515 474
516 &pcie3a { 475 &pcie3a {
517 num-lanes = <2>; 476 num-lanes = <2>;
518 477
519 perst-gpios = <&tlmm 151 GPIO_ACTIVE_L 478 perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
520 wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW 479 wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW>;
521 480
522 pinctrl-names = "default"; 481 pinctrl-names = "default";
523 pinctrl-0 = <&pcie3a_default>; 482 pinctrl-0 = <&pcie3a_default>;
524 483
525 status = "okay"; 484 status = "okay";
526 }; 485 };
527 486
528 &pcie3a_phy { 487 &pcie3a_phy {
529 vdda-phy-supply = <&vreg_l11a>; 488 vdda-phy-supply = <&vreg_l11a>;
530 vdda-pll-supply = <&vreg_l3a>; 489 vdda-pll-supply = <&vreg_l3a>;
531 490
532 status = "okay"; 491 status = "okay";
533 }; 492 };
534 493
535 &pcie3b { 494 &pcie3b {
536 perst-gpios = <&tlmm 153 GPIO_ACTIVE_L 495 perst-gpios = <&tlmm 153 GPIO_ACTIVE_LOW>;
537 wake-gpios = <&tlmm 130 GPIO_ACTIVE_LO 496 wake-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
538 497
539 pinctrl-names = "default"; 498 pinctrl-names = "default";
540 pinctrl-0 = <&pcie3b_default>; 499 pinctrl-0 = <&pcie3b_default>;
541 500
542 status = "okay"; 501 status = "okay";
543 }; 502 };
544 503
545 &pcie3b_phy { 504 &pcie3b_phy {
546 vdda-phy-supply = <&vreg_l11a>; 505 vdda-phy-supply = <&vreg_l11a>;
547 vdda-pll-supply = <&vreg_l3a>; 506 vdda-pll-supply = <&vreg_l3a>;
548 507
549 status = "okay"; 508 status = "okay";
550 }; 509 };
551 510
552 &pcie4 { 511 &pcie4 {
553 perst-gpios = <&tlmm 141 GPIO_ACTIVE_L 512 perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
554 wake-gpios = <&tlmm 139 GPIO_ACTIVE_LO 513 wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
555 514
556 pinctrl-names = "default"; 515 pinctrl-names = "default";
557 pinctrl-0 = <&pcie4_default>; 516 pinctrl-0 = <&pcie4_default>;
558 517
559 status = "okay"; 518 status = "okay";
560 }; 519 };
561 520
562 &pcie4_phy { 521 &pcie4_phy {
563 vdda-phy-supply = <&vreg_l11a>; 522 vdda-phy-supply = <&vreg_l11a>;
564 vdda-pll-supply = <&vreg_l3a>; 523 vdda-pll-supply = <&vreg_l3a>;
565 524
566 status = "okay"; 525 status = "okay";
567 }; 526 };
568 527
569 &qup1 { 528 &qup1 {
570 status = "okay"; 529 status = "okay";
571 }; 530 };
572 531
573 &qup2 { 532 &qup2 {
574 status = "okay"; 533 status = "okay";
575 }; 534 };
576 535
577 &remoteproc_adsp { 536 &remoteproc_adsp {
578 firmware-name = "qcom/sa8540p/adsp.mbn 537 firmware-name = "qcom/sa8540p/adsp.mbn";
579 status = "okay"; 538 status = "okay";
580 }; 539 };
581 540
582 &remoteproc_nsp0 { 541 &remoteproc_nsp0 {
583 firmware-name = "qcom/sa8540p/cdsp.mbn 542 firmware-name = "qcom/sa8540p/cdsp.mbn";
584 status = "okay"; 543 status = "okay";
585 }; 544 };
586 545
587 &remoteproc_nsp1 { 546 &remoteproc_nsp1 {
588 firmware-name = "qcom/sa8540p/cdsp1.mb 547 firmware-name = "qcom/sa8540p/cdsp1.mbn";
589 status = "okay"; 548 status = "okay";
590 }; 549 };
591 550
592 &uart17 { 551 &uart17 {
593 compatible = "qcom,geni-debug-uart"; 552 compatible = "qcom,geni-debug-uart";
594 status = "okay"; 553 status = "okay";
595 }; 554 };
596 555
597 &ufs_mem_hc { 556 &ufs_mem_hc {
598 reset-gpios = <&tlmm 228 GPIO_ACTIVE_L 557 reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
599 558
600 vcc-supply = <&vreg_l17c>; 559 vcc-supply = <&vreg_l17c>;
601 vcc-max-microamp = <800000>; 560 vcc-max-microamp = <800000>;
602 vccq-supply = <&vreg_l6c>; 561 vccq-supply = <&vreg_l6c>;
603 vccq-max-microamp = <900000>; 562 vccq-max-microamp = <900000>;
604 563
605 status = "okay"; 564 status = "okay";
606 }; 565 };
607 566
608 &ufs_mem_phy { 567 &ufs_mem_phy {
609 vdda-phy-supply = <&vreg_l8g>; 568 vdda-phy-supply = <&vreg_l8g>;
610 vdda-pll-supply = <&vreg_l3g>; 569 vdda-pll-supply = <&vreg_l3g>;
611 570
612 status = "okay"; 571 status = "okay";
613 }; 572 };
614 573
615 &ufs_card_hc { 574 &ufs_card_hc {
616 reset-gpios = <&tlmm 229 GPIO_ACTIVE_L 575 reset-gpios = <&tlmm 229 GPIO_ACTIVE_LOW>;
617 576
618 vcc-supply = <&vreg_l10c>; 577 vcc-supply = <&vreg_l10c>;
619 vcc-max-microamp = <800000>; 578 vcc-max-microamp = <800000>;
620 vccq-supply = <&vreg_l3c>; 579 vccq-supply = <&vreg_l3c>;
621 vccq-max-microamp = <900000>; 580 vccq-max-microamp = <900000>;
622 581
623 status = "okay"; 582 status = "okay";
624 }; 583 };
625 584
626 &ufs_card_phy { 585 &ufs_card_phy {
627 vdda-phy-supply = <&vreg_l8g>; 586 vdda-phy-supply = <&vreg_l8g>;
628 vdda-pll-supply = <&vreg_l3g>; 587 vdda-pll-supply = <&vreg_l3g>;
629 588
630 status = "okay"; 589 status = "okay";
631 }; 590 };
632 591
633 &usb_0 { 592 &usb_0 {
634 status = "okay"; 593 status = "okay";
635 }; 594 };
636 595
637 &usb_0_dwc3 { 596 &usb_0_dwc3 {
638 /* TODO: Define USB-C connector proper 597 /* TODO: Define USB-C connector properly */
639 dr_mode = "peripheral"; 598 dr_mode = "peripheral";
640 }; 599 };
641 600
642 &usb_0_hsphy { 601 &usb_0_hsphy {
643 vdda-pll-supply = <&vreg_l5a>; 602 vdda-pll-supply = <&vreg_l5a>;
644 vdda18-supply = <&vreg_l7a>; 603 vdda18-supply = <&vreg_l7a>;
645 vdda33-supply = <&vreg_l13a>; 604 vdda33-supply = <&vreg_l13a>;
646 605
647 status = "okay"; 606 status = "okay";
648 }; 607 };
649 608
650 &usb_0_qmpphy { 609 &usb_0_qmpphy {
651 vdda-phy-supply = <&vreg_l3a>; 610 vdda-phy-supply = <&vreg_l3a>;
652 vdda-pll-supply = <&vreg_l5a>; 611 vdda-pll-supply = <&vreg_l5a>;
653 612
654 status = "okay"; 613 status = "okay";
655 }; 614 };
656 615
657 &usb_1 { 616 &usb_1 {
658 status = "okay"; 617 status = "okay";
659 }; 618 };
660 619
661 &usb_1_dwc3 { 620 &usb_1_dwc3 {
662 /* TODO: Define USB-C connector proper 621 /* TODO: Define USB-C connector properly */
663 dr_mode = "host"; 622 dr_mode = "host";
664 }; 623 };
665 624
666 &usb_1_hsphy { 625 &usb_1_hsphy {
667 vdda-pll-supply = <&vreg_l1c>; 626 vdda-pll-supply = <&vreg_l1c>;
668 vdda18-supply = <&vreg_l7c>; 627 vdda18-supply = <&vreg_l7c>;
669 vdda33-supply = <&vreg_l2c>; 628 vdda33-supply = <&vreg_l2c>;
670 629
671 status = "okay"; 630 status = "okay";
672 }; 631 };
673 632
674 &usb_1_qmpphy { 633 &usb_1_qmpphy {
675 vdda-phy-supply = <&vreg_l4c>; 634 vdda-phy-supply = <&vreg_l4c>;
676 vdda-pll-supply = <&vreg_l1c>; 635 vdda-pll-supply = <&vreg_l1c>;
677 636
678 status = "okay"; 637 status = "okay";
679 }; 638 };
680 639
681 &usb_2 { <<
682 status = "okay"; <<
683 }; <<
684 <<
685 &usb_2_hsphy0 { 640 &usb_2_hsphy0 {
686 vdda-pll-supply = <&vreg_l5a>; 641 vdda-pll-supply = <&vreg_l5a>;
687 vdda18-supply = <&vreg_l7g>; 642 vdda18-supply = <&vreg_l7g>;
688 vdda33-supply = <&vreg_l13a>; 643 vdda33-supply = <&vreg_l13a>;
689 644
690 status = "okay"; 645 status = "okay";
691 }; 646 };
692 647
693 &usb_2_hsphy1 { 648 &usb_2_hsphy1 {
694 vdda-pll-supply = <&vreg_l5a>; 649 vdda-pll-supply = <&vreg_l5a>;
695 vdda18-supply = <&vreg_l7g>; 650 vdda18-supply = <&vreg_l7g>;
696 vdda33-supply = <&vreg_l13a>; 651 vdda33-supply = <&vreg_l13a>;
697 652
698 status = "okay"; 653 status = "okay";
699 }; 654 };
700 655
701 &usb_2_hsphy2 { 656 &usb_2_hsphy2 {
702 vdda-pll-supply = <&vreg_l5a>; 657 vdda-pll-supply = <&vreg_l5a>;
703 vdda18-supply = <&vreg_l7g>; 658 vdda18-supply = <&vreg_l7g>;
704 vdda33-supply = <&vreg_l13a>; 659 vdda33-supply = <&vreg_l13a>;
705 660
706 status = "okay"; 661 status = "okay";
707 }; 662 };
708 663
709 &usb_2_hsphy3 { 664 &usb_2_hsphy3 {
710 vdda-pll-supply = <&vreg_l5a>; 665 vdda-pll-supply = <&vreg_l5a>;
711 vdda18-supply = <&vreg_l7g>; 666 vdda18-supply = <&vreg_l7g>;
712 vdda33-supply = <&vreg_l13a>; 667 vdda33-supply = <&vreg_l13a>;
713 668
714 status = "okay"; 669 status = "okay";
715 }; 670 };
716 671
717 &usb_2_qmpphy0 { 672 &usb_2_qmpphy0 {
718 vdda-phy-supply = <&vreg_l3a>; 673 vdda-phy-supply = <&vreg_l3a>;
719 vdda-pll-supply = <&vreg_l5a>; 674 vdda-pll-supply = <&vreg_l5a>;
720 675
721 status = "okay"; 676 status = "okay";
722 }; 677 };
723 678
724 &usb_2_qmpphy1 { 679 &usb_2_qmpphy1 {
725 vdda-phy-supply = <&vreg_l3a>; 680 vdda-phy-supply = <&vreg_l3a>;
726 vdda-pll-supply = <&vreg_l5a>; 681 vdda-pll-supply = <&vreg_l5a>;
727 682
728 status = "okay"; 683 status = "okay";
729 }; 684 };
730 685
731 &xo_board_clk { 686 &xo_board_clk {
732 clock-frequency = <38400000>; 687 clock-frequency = <38400000>;
733 }; 688 };
734 689
735 /* PINCTRL */ 690 /* PINCTRL */
736 691
737 &pmm8540a_gpios { 692 &pmm8540a_gpios {
738 max20411_en: max20411-en-state { 693 max20411_en: max20411-en-state {
739 pins = "gpio2"; 694 pins = "gpio2";
740 function = "normal"; 695 function = "normal";
741 output-enable; 696 output-enable;
742 }; <<
743 }; <<
744 <<
745 &pmm8540c_gpios { <<
746 usb2_en: usb2-en-state { <<
747 pins = "gpio9"; <<
748 function = "normal"; <<
749 qcom,drive-strength = <PMIC_GP <<
750 output-enable; <<
751 power-source = <0>; <<
752 }; <<
753 }; <<
754 <<
755 &pmm8540e_gpios { <<
756 usb3_en: usb3-en-state { <<
757 pins = "gpio5"; <<
758 function = "normal"; <<
759 qcom,drive-strength = <PMIC_GP <<
760 output-enable; <<
761 power-source = <0>; <<
762 }; <<
763 }; <<
764 <<
765 &pmm8540g_gpios { <<
766 usb4_en: usb4-en-state { <<
767 pins = "gpio5"; <<
768 function = "normal"; <<
769 qcom,drive-strength = <PMIC_GP <<
770 output-enable; <<
771 power-source = <0>; <<
772 }; <<
773 <<
774 usb5_en: usb5-en-state { <<
775 pins = "gpio9"; <<
776 function = "normal"; <<
777 qcom,drive-strength = <PMIC_GP <<
778 output-enable; <<
779 power-source = <0>; <<
780 }; 697 };
781 }; 698 };
782 699
783 &tlmm { 700 &tlmm {
784 pcie2a_default: pcie2a-default-state { 701 pcie2a_default: pcie2a-default-state {
785 clkreq-n-pins { 702 clkreq-n-pins {
786 pins = "gpio142"; 703 pins = "gpio142";
787 function = "pcie2a_clk 704 function = "pcie2a_clkreq";
788 drive-strength = <2>; 705 drive-strength = <2>;
789 bias-pull-up; 706 bias-pull-up;
790 }; 707 };
791 708
792 perst-n-pins { 709 perst-n-pins {
793 pins = "gpio143"; 710 pins = "gpio143";
794 function = "gpio"; 711 function = "gpio";
795 drive-strength = <2>; 712 drive-strength = <2>;
796 bias-pull-down; 713 bias-pull-down;
797 }; 714 };
798 715
799 wake-n-pins { 716 wake-n-pins {
800 pins = "gpio145"; 717 pins = "gpio145";
801 function = "gpio"; 718 function = "gpio";
802 drive-strength = <2>; 719 drive-strength = <2>;
803 bias-pull-up; 720 bias-pull-up;
804 }; 721 };
805 }; 722 };
806 723
807 pcie3a_default: pcie3a-default-state { 724 pcie3a_default: pcie3a-default-state {
808 clkreq-n-pins { 725 clkreq-n-pins {
809 pins = "gpio150"; 726 pins = "gpio150";
810 function = "pcie3a_clk 727 function = "pcie3a_clkreq";
811 drive-strength = <2>; 728 drive-strength = <2>;
812 bias-pull-up; 729 bias-pull-up;
813 }; 730 };
814 731
815 perst-n-pins { 732 perst-n-pins {
816 pins = "gpio151"; 733 pins = "gpio151";
817 function = "gpio"; 734 function = "gpio";
818 drive-strength = <2>; 735 drive-strength = <2>;
819 bias-pull-down; 736 bias-pull-down;
820 }; 737 };
821 738
822 wake-n-pins { 739 wake-n-pins {
823 pins = "gpio56"; 740 pins = "gpio56";
824 function = "gpio"; 741 function = "gpio";
825 drive-strength = <2>; 742 drive-strength = <2>;
826 bias-pull-up; 743 bias-pull-up;
827 }; 744 };
828 }; 745 };
829 746
830 pcie3b_default: pcie3b-default-state { 747 pcie3b_default: pcie3b-default-state {
831 clkreq-n-pins { 748 clkreq-n-pins {
832 pins = "gpio152"; 749 pins = "gpio152";
833 function = "pcie3b_clk 750 function = "pcie3b_clkreq";
834 drive-strength = <2>; 751 drive-strength = <2>;
835 bias-pull-up; 752 bias-pull-up;
836 }; 753 };
837 754
838 perst-n-pins { 755 perst-n-pins {
839 pins = "gpio153"; 756 pins = "gpio153";
840 function = "gpio"; 757 function = "gpio";
841 drive-strength = <2>; 758 drive-strength = <2>;
842 bias-pull-down; 759 bias-pull-down;
843 }; 760 };
844 761
845 wake-n-pins { 762 wake-n-pins {
846 pins = "gpio130"; 763 pins = "gpio130";
847 function = "gpio"; 764 function = "gpio";
848 drive-strength = <2>; 765 drive-strength = <2>;
849 bias-pull-up; 766 bias-pull-up;
850 }; 767 };
851 }; 768 };
852 769
853 pcie4_default: pcie4-default-state { 770 pcie4_default: pcie4-default-state {
854 clkreq-n-pins { 771 clkreq-n-pins {
855 pins = "gpio140"; 772 pins = "gpio140";
856 function = "pcie4_clkr 773 function = "pcie4_clkreq";
857 drive-strength = <2>; 774 drive-strength = <2>;
858 bias-pull-up; 775 bias-pull-up;
859 }; 776 };
860 777
861 perst-n-pins { 778 perst-n-pins {
862 pins = "gpio141"; 779 pins = "gpio141";
863 function = "gpio"; 780 function = "gpio";
864 drive-strength = <2>; 781 drive-strength = <2>;
865 bias-pull-down; 782 bias-pull-down;
866 }; 783 };
867 784
868 wake-n-pins { 785 wake-n-pins {
869 pins = "gpio139"; 786 pins = "gpio139";
870 function = "gpio"; 787 function = "gpio";
871 drive-strength = <2>; 788 drive-strength = <2>;
872 bias-pull-up; 789 bias-pull-up;
873 }; 790 };
874 }; 791 };
875 792
876 qup1_i2c4_state: qup1-i2c4-state { 793 qup1_i2c4_state: qup1-i2c4-state {
877 pins = "gpio0", "gpio1"; 794 pins = "gpio0", "gpio1";
878 function = "qup12"; 795 function = "qup12";
879 drive-strength = <2>; 796 drive-strength = <2>;
880 bias-pull-up; 797 bias-pull-up;
881 }; 798 };
882 }; 799 };
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