1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Copyright (c) 2021, The Linux Foundation. A 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited 4 * Copyright (c) 2022, Linaro Limited
5 */ 5 */
6 6
7 /dts-v1/; 7 /dts-v1/;
8 8
9 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/spmi/spmi.h> 11 #include <dt-bindings/spmi/spmi.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h <<
13 12
14 #include "sa8540p.dtsi" 13 #include "sa8540p.dtsi"
15 #include "sa8540p-pmics.dtsi" <<
16 14
17 / { 15 / {
18 model = "Qualcomm SA8295P ADP"; 16 model = "Qualcomm SA8295P ADP";
19 compatible = "qcom,sa8295p-adp", "qcom 17 compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
20 18
21 aliases { 19 aliases {
22 serial0 = &uart17; !! 20 serial0 = &qup2_uart17;
23 }; 21 };
24 22
25 chosen { 23 chosen {
26 stdout-path = "serial0:115200n 24 stdout-path = "serial0:115200n8";
27 }; 25 };
28 <<
29 dp2-connector { <<
30 compatible = "dp-connector"; <<
31 label = "DP2"; <<
32 type = "mini"; <<
33 <<
34 hpd-gpios = <&tlmm 20 GPIO_ACT <<
35 <<
36 port { <<
37 dp2_connector_in: endp <<
38 remote-endpoin <<
39 }; <<
40 }; <<
41 }; <<
42 <<
43 dp3-connector { <<
44 compatible = "dp-connector"; <<
45 label = "DP3"; <<
46 type = "mini"; <<
47 <<
48 hpd-gpios = <&tlmm 45 GPIO_ACT <<
49 <<
50 port { <<
51 dp3_connector_in: endp <<
52 remote-endpoin <<
53 }; <<
54 }; <<
55 }; <<
56 <<
57 edp0-connector { <<
58 compatible = "dp-connector"; <<
59 label = "EDP0"; <<
60 type = "mini"; <<
61 <<
62 hpd-gpios = <&tlmm 2 GPIO_ACTI <<
63 <<
64 port { <<
65 edp0_connector_in: end <<
66 remote-endpoin <<
67 }; <<
68 }; <<
69 }; <<
70 <<
71 edp1-connector { <<
72 compatible = "dp-connector"; <<
73 label = "EDP1"; <<
74 type = "mini"; <<
75 <<
76 hpd-gpios = <&tlmm 3 GPIO_ACTI <<
77 <<
78 port { <<
79 edp1_connector_in: end <<
80 remote-endpoin <<
81 }; <<
82 }; <<
83 }; <<
84 <<
85 edp2-connector { <<
86 compatible = "dp-connector"; <<
87 label = "EDP2"; <<
88 type = "mini"; <<
89 <<
90 hpd-gpios = <&tlmm 7 GPIO_ACTI <<
91 <<
92 port { <<
93 edp2_connector_in: end <<
94 remote-endpoin <<
95 }; <<
96 }; <<
97 }; <<
98 <<
99 edp3-connector { <<
100 compatible = "dp-connector"; <<
101 label = "EDP3"; <<
102 type = "mini"; <<
103 <<
104 hpd-gpios = <&tlmm 6 GPIO_ACTI <<
105 <<
106 port { <<
107 edp3_connector_in: end <<
108 remote-endpoin <<
109 }; <<
110 }; <<
111 }; <<
112 <<
113 regulator-usb2-vbus { <<
114 compatible = "regulator-fixed" <<
115 regulator-name = "USB2_VBUS"; <<
116 gpio = <&pmm8540c_gpios 9 GPIO <<
117 pinctrl-0 = <&usb2_en>; <<
118 pinctrl-names = "default"; <<
119 enable-active-high; <<
120 regulator-always-on; <<
121 }; <<
122 <<
123 regulator-usb3-vbus { <<
124 compatible = "regulator-fixed" <<
125 regulator-name = "USB3_VBUS"; <<
126 gpio = <&pmm8540e_gpios 5 GPIO <<
127 pinctrl-0 = <&usb3_en>; <<
128 pinctrl-names = "default"; <<
129 enable-active-high; <<
130 regulator-always-on; <<
131 }; <<
132 <<
133 regulator-usb4-vbus { <<
134 compatible = "regulator-fixed" <<
135 regulator-name = "USB4_VBUS"; <<
136 gpio = <&pmm8540g_gpios 5 GPIO <<
137 pinctrl-0 = <&usb4_en>; <<
138 pinctrl-names = "default"; <<
139 enable-active-high; <<
140 regulator-always-on; <<
141 }; <<
142 <<
143 regulator-usb5-vbus { <<
144 compatible = "regulator-fixed" <<
145 regulator-name = "USB5_VBUS"; <<
146 gpio = <&pmm8540g_gpios 9 GPIO <<
147 pinctrl-0 = <&usb5_en>; <<
148 pinctrl-names = "default"; <<
149 enable-active-high; <<
150 regulator-always-on; <<
151 }; <<
152 <<
153 reserved-memory { <<
154 gpu_mem: gpu-mem@8bf00000 { <<
155 reg = <0 0x8bf00000 0 <<
156 no-map; <<
157 }; <<
158 }; <<
159 }; 26 };
160 27
161 &apps_rsc { 28 &apps_rsc {
162 regulators-0 { !! 29 pmm8540-a-regulators {
163 compatible = "qcom,pm8150-rpmh 30 compatible = "qcom,pm8150-rpmh-regulators";
164 qcom,pmic-id = "a"; 31 qcom,pmic-id = "a";
165 32
166 vreg_l3a: ldo3 { 33 vreg_l3a: ldo3 {
167 regulator-name = "vreg 34 regulator-name = "vreg_l3a";
168 regulator-min-microvol 35 regulator-min-microvolt = <1200000>;
169 regulator-max-microvol 36 regulator-max-microvolt = <1208000>;
170 regulator-initial-mode 37 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
171 }; 38 };
172 39
173 vreg_l5a: ldo5 { 40 vreg_l5a: ldo5 {
174 regulator-name = "vreg 41 regulator-name = "vreg_l5a";
175 regulator-min-microvol 42 regulator-min-microvolt = <912000>;
176 regulator-max-microvol 43 regulator-max-microvolt = <912000>;
177 regulator-initial-mode 44 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
178 }; 45 };
179 46
180 vreg_l7a: ldo7 { 47 vreg_l7a: ldo7 {
181 regulator-name = "vreg 48 regulator-name = "vreg_l7a";
182 regulator-min-microvol 49 regulator-min-microvolt = <1800000>;
183 regulator-max-microvol 50 regulator-max-microvolt = <1800000>;
184 regulator-initial-mode 51 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
185 }; 52 };
186 53
187 vreg_l13a: ldo13 { 54 vreg_l13a: ldo13 {
188 regulator-name = "vreg 55 regulator-name = "vreg_l13a";
189 regulator-min-microvol 56 regulator-min-microvolt = <3072000>;
190 regulator-max-microvol 57 regulator-max-microvolt = <3072000>;
191 regulator-initial-mode 58 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
192 }; 59 };
193 60
194 vreg_l11a: ldo11 { 61 vreg_l11a: ldo11 {
195 regulator-name = "vreg 62 regulator-name = "vreg_l11a";
196 regulator-min-microvol 63 regulator-min-microvolt = <880000>;
197 regulator-max-microvol 64 regulator-max-microvolt = <880000>;
198 regulator-initial-mode 65 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199 }; 66 };
200 }; 67 };
201 68
202 regulators-1 { !! 69 pmm8540-c-regulators {
203 compatible = "qcom,pm8150-rpmh 70 compatible = "qcom,pm8150-rpmh-regulators";
204 qcom,pmic-id = "c"; 71 qcom,pmic-id = "c";
205 72
206 vreg_l1c: ldo1 { 73 vreg_l1c: ldo1 {
207 regulator-name = "vreg 74 regulator-name = "vreg_l1c";
208 regulator-min-microvol 75 regulator-min-microvolt = <912000>;
209 regulator-max-microvol 76 regulator-max-microvolt = <912000>;
210 regulator-initial-mode 77 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
211 }; 78 };
212 79
213 vreg_l2c: ldo2 { 80 vreg_l2c: ldo2 {
214 regulator-name = "vreg 81 regulator-name = "vreg_l2c";
215 regulator-min-microvol 82 regulator-min-microvolt = <3072000>;
216 regulator-max-microvol 83 regulator-max-microvolt = <3072000>;
217 regulator-initial-mode 84 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
218 }; 85 };
219 86
220 vreg_l3c: ldo3 { 87 vreg_l3c: ldo3 {
221 regulator-name = "vreg 88 regulator-name = "vreg_l3c";
222 regulator-min-microvol 89 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 90 regulator-max-microvolt = <1200000>;
224 regulator-initial-mode 91 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 regulator-allow-set-lo 92 regulator-allow-set-load;
226 regulator-allowed-mode 93 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
227 94 RPMH_REGULATOR_MODE_HPM>;
228 }; 95 };
229 96
230 vreg_l4c: ldo4 { 97 vreg_l4c: ldo4 {
231 regulator-name = "vreg 98 regulator-name = "vreg_l4c";
232 regulator-min-microvol 99 regulator-min-microvolt = <1200000>;
233 regulator-max-microvol 100 regulator-max-microvolt = <1208000>;
234 regulator-initial-mode 101 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
235 }; 102 };
236 103
237 vreg_l6c: ldo6 { 104 vreg_l6c: ldo6 {
238 regulator-name = "vreg 105 regulator-name = "vreg_l6c";
239 regulator-min-microvol 106 regulator-min-microvolt = <1200000>;
240 regulator-max-microvol 107 regulator-max-microvolt = <1200000>;
241 regulator-initial-mode 108 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
242 regulator-allow-set-lo 109 regulator-allow-set-load;
243 regulator-allowed-mode 110 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
244 111 RPMH_REGULATOR_MODE_HPM>;
245 }; 112 };
246 113
247 vreg_l7c: ldo7 { 114 vreg_l7c: ldo7 {
248 regulator-name = "vreg 115 regulator-name = "vreg_l7c";
249 regulator-min-microvol 116 regulator-min-microvolt = <1800000>;
250 regulator-max-microvol 117 regulator-max-microvolt = <1800000>;
251 regulator-initial-mode 118 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
252 }; 119 };
253 120
254 vreg_l10c: ldo10 { 121 vreg_l10c: ldo10 {
255 regulator-name = "vreg 122 regulator-name = "vreg_l10c";
256 regulator-min-microvol 123 regulator-min-microvolt = <2504000>;
257 regulator-max-microvol 124 regulator-max-microvolt = <2504000>;
258 regulator-initial-mode 125 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259 regulator-allow-set-lo 126 regulator-allow-set-load;
260 regulator-allowed-mode 127 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
261 128 RPMH_REGULATOR_MODE_HPM>;
262 }; 129 };
263 130
264 vreg_l17c: ldo17 { 131 vreg_l17c: ldo17 {
265 regulator-name = "vreg 132 regulator-name = "vreg_l17c";
266 regulator-min-microvol 133 regulator-min-microvolt = <2504000>;
267 regulator-max-microvol 134 regulator-max-microvolt = <2504000>;
268 regulator-initial-mode 135 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269 regulator-allow-set-lo 136 regulator-allow-set-load;
270 regulator-allowed-mode 137 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
271 138 RPMH_REGULATOR_MODE_HPM>;
272 }; 139 };
273 }; 140 };
274 141
275 regulators-2 { !! 142 pmm8540-g-regulators {
276 compatible = "qcom,pm8150-rpmh 143 compatible = "qcom,pm8150-rpmh-regulators";
277 qcom,pmic-id = "g"; 144 qcom,pmic-id = "g";
278 145
279 vreg_l3g: ldo3 { 146 vreg_l3g: ldo3 {
280 regulator-name = "vreg 147 regulator-name = "vreg_l3g";
281 regulator-min-microvol 148 regulator-min-microvolt = <1200000>;
282 regulator-max-microvol 149 regulator-max-microvolt = <1200000>;
283 regulator-initial-mode 150 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
284 }; 151 };
285 152
286 vreg_l7g: ldo7 { 153 vreg_l7g: ldo7 {
287 regulator-name = "vreg 154 regulator-name = "vreg_l7g";
288 regulator-min-microvol 155 regulator-min-microvolt = <1800000>;
289 regulator-max-microvol 156 regulator-max-microvolt = <1800000>;
290 regulator-initial-mode 157 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
291 }; 158 };
292 159
293 vreg_l8g: ldo8 { 160 vreg_l8g: ldo8 {
294 regulator-name = "vreg 161 regulator-name = "vreg_l8g";
295 regulator-min-microvol !! 162 regulator-min-microvolt = <880000>;
296 regulator-max-microvol !! 163 regulator-max-microvolt = <880000>;
297 regulator-initial-mode <<
298 }; <<
299 <<
300 vreg_l11g: ldo11 { <<
301 regulator-name = "vreg <<
302 regulator-min-microvol <<
303 regulator-max-microvol <<
304 regulator-initial-mode 164 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305 }; 165 };
306 }; 166 };
307 }; 167 };
308 168
309 &dispcc0 { <<
310 status = "okay"; <<
311 }; <<
312 <<
313 &dispcc1 { <<
314 status = "okay"; <<
315 }; <<
316 <<
317 &i2c12 { <<
318 pinctrl-0 = <&qup1_i2c4_state>; <<
319 pinctrl-names = "default"; <<
320 <<
321 status = "okay"; <<
322 <<
323 vdd_gfx: regulator@39 { <<
324 compatible = "maxim,max20411"; <<
325 reg = <0x39>; <<
326 <<
327 regulator-min-microvolt = <800 <<
328 regulator-max-microvolt = <800 <<
329 <<
330 enable-gpios = <&pmm8540a_gpio <<
331 <<
332 pinctrl-0 = <&max20411_en>; <<
333 pinctrl-names = "default"; <<
334 }; <<
335 }; <<
336 <<
337 &gpucc { <<
338 vdd-gfx-supply = <&vdd_gfx>; <<
339 status = "okay"; <<
340 }; <<
341 <<
342 &gmu { <<
343 status = "okay"; <<
344 }; <<
345 <<
346 &gpu { <<
347 status = "okay"; <<
348 <<
349 zap-shader { <<
350 memory-region = <&gpu_mem>; <<
351 firmware-name = "qcom/sa8295p/ <<
352 }; <<
353 }; <<
354 <<
355 &gpu_smmu { <<
356 status = "okay"; <<
357 }; <<
358 <<
359 &mdss0 { <<
360 status = "okay"; <<
361 }; <<
362 <<
363 &mdss0_dp2 { <<
364 data-lanes = <0 1 2 3>; <<
365 <<
366 status = "okay"; <<
367 <<
368 ports { <<
369 port@1 { <<
370 reg = <1>; <<
371 mdss0_dp2_phy_out: end <<
372 remote-endpoin <<
373 }; <<
374 }; <<
375 }; <<
376 }; <<
377 <<
378 &mdss0_dp2_phy { <<
379 vdda-phy-supply = <&vreg_l8g>; <<
380 vdda-pll-supply = <&vreg_l3g>; <<
381 <<
382 status = "okay"; <<
383 }; <<
384 <<
385 &mdss0_dp3 { <<
386 data-lanes = <0 1 2 3>; <<
387 <<
388 status = "okay"; <<
389 <<
390 ports { <<
391 port@1 { <<
392 reg = <1>; <<
393 mdss0_dp3_phy_out: end <<
394 remote-endpoin <<
395 }; <<
396 }; <<
397 }; <<
398 }; <<
399 <<
400 &mdss0_dp3_phy { <<
401 vdda-phy-supply = <&vreg_l8g>; <<
402 vdda-pll-supply = <&vreg_l3g>; <<
403 <<
404 status = "okay"; <<
405 }; <<
406 <<
407 &mdss1 { <<
408 status = "okay"; <<
409 }; <<
410 <<
411 &mdss1_dp0 { <<
412 data-lanes = <0 1 2 3>; <<
413 <<
414 status = "okay"; <<
415 <<
416 ports { <<
417 port@1 { <<
418 reg = <1>; <<
419 mdss1_dp0_phy_out: end <<
420 remote-endpoin <<
421 }; <<
422 }; <<
423 }; <<
424 }; <<
425 <<
426 &mdss1_dp0_phy { <<
427 vdda-phy-supply = <&vreg_l11g>; <<
428 vdda-pll-supply = <&vreg_l3g>; <<
429 <<
430 status = "okay"; <<
431 }; <<
432 <<
433 &mdss1_dp1 { <<
434 data-lanes = <0 1 2 3>; <<
435 <<
436 status = "okay"; <<
437 <<
438 ports { <<
439 port@1 { <<
440 reg = <1>; <<
441 mdss1_dp1_phy_out: end <<
442 remote-endpoin <<
443 }; <<
444 }; <<
445 }; <<
446 }; <<
447 <<
448 &mdss1_dp1_phy { <<
449 vdda-phy-supply = <&vreg_l11g>; <<
450 vdda-pll-supply = <&vreg_l3g>; <<
451 <<
452 status = "okay"; <<
453 }; <<
454 <<
455 &mdss1_dp2 { <<
456 data-lanes = <0 1 2 3>; <<
457 <<
458 status = "okay"; <<
459 <<
460 ports { <<
461 port@1 { <<
462 reg = <1>; <<
463 mdss1_dp2_phy_out: end <<
464 remote-endpoin <<
465 }; <<
466 }; <<
467 }; <<
468 }; <<
469 <<
470 &mdss1_dp2_phy { <<
471 vdda-phy-supply = <&vreg_l11g>; <<
472 vdda-pll-supply = <&vreg_l3g>; <<
473 <<
474 status = "okay"; <<
475 }; <<
476 <<
477 &mdss1_dp3 { <<
478 data-lanes = <0 1 2 3>; <<
479 <<
480 status = "okay"; <<
481 <<
482 ports { <<
483 port@1 { <<
484 reg = <1>; <<
485 mdss1_dp3_phy_out: end <<
486 remote-endpoin <<
487 }; <<
488 }; <<
489 }; <<
490 }; <<
491 <<
492 &mdss1_dp3_phy { <<
493 vdda-phy-supply = <&vreg_l11g>; <<
494 vdda-pll-supply = <&vreg_l3g>; <<
495 <<
496 status = "okay"; <<
497 }; <<
498 <<
499 &pcie2a { 169 &pcie2a {
500 perst-gpios = <&tlmm 143 GPIO_ACTIVE_L 170 perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
501 wake-gpios = <&tlmm 145 GPIO_ACTIVE_LO 171 wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
502 172
503 pinctrl-names = "default"; 173 pinctrl-names = "default";
504 pinctrl-0 = <&pcie2a_default>; 174 pinctrl-0 = <&pcie2a_default>;
505 175
506 status = "okay"; 176 status = "okay";
507 }; 177 };
508 178
509 &pcie2a_phy { 179 &pcie2a_phy {
510 vdda-phy-supply = <&vreg_l11a>; 180 vdda-phy-supply = <&vreg_l11a>;
511 vdda-pll-supply = <&vreg_l3a>; 181 vdda-pll-supply = <&vreg_l3a>;
512 182
513 status = "okay"; 183 status = "okay";
514 }; 184 };
515 185
516 &pcie3a { 186 &pcie3a {
517 num-lanes = <2>; 187 num-lanes = <2>;
518 188
519 perst-gpios = <&tlmm 151 GPIO_ACTIVE_L 189 perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
520 wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW 190 wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW>;
521 191
522 pinctrl-names = "default"; 192 pinctrl-names = "default";
523 pinctrl-0 = <&pcie3a_default>; 193 pinctrl-0 = <&pcie3a_default>;
524 194
525 status = "okay"; 195 status = "okay";
526 }; 196 };
527 197
528 &pcie3a_phy { 198 &pcie3a_phy {
529 vdda-phy-supply = <&vreg_l11a>; 199 vdda-phy-supply = <&vreg_l11a>;
530 vdda-pll-supply = <&vreg_l3a>; 200 vdda-pll-supply = <&vreg_l3a>;
531 201
532 status = "okay"; 202 status = "okay";
533 }; 203 };
534 204
535 &pcie3b { 205 &pcie3b {
536 perst-gpios = <&tlmm 153 GPIO_ACTIVE_L 206 perst-gpios = <&tlmm 153 GPIO_ACTIVE_LOW>;
537 wake-gpios = <&tlmm 130 GPIO_ACTIVE_LO 207 wake-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
538 208
539 pinctrl-names = "default"; 209 pinctrl-names = "default";
540 pinctrl-0 = <&pcie3b_default>; 210 pinctrl-0 = <&pcie3b_default>;
541 211
542 status = "okay"; 212 status = "okay";
543 }; 213 };
544 214
545 &pcie3b_phy { 215 &pcie3b_phy {
546 vdda-phy-supply = <&vreg_l11a>; 216 vdda-phy-supply = <&vreg_l11a>;
547 vdda-pll-supply = <&vreg_l3a>; 217 vdda-pll-supply = <&vreg_l3a>;
548 218
549 status = "okay"; 219 status = "okay";
550 }; 220 };
551 221
552 &pcie4 { 222 &pcie4 {
553 perst-gpios = <&tlmm 141 GPIO_ACTIVE_L 223 perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
554 wake-gpios = <&tlmm 139 GPIO_ACTIVE_LO 224 wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
555 225
556 pinctrl-names = "default"; 226 pinctrl-names = "default";
557 pinctrl-0 = <&pcie4_default>; 227 pinctrl-0 = <&pcie4_default>;
558 228
559 status = "okay"; 229 status = "okay";
560 }; 230 };
561 231
562 &pcie4_phy { 232 &pcie4_phy {
563 vdda-phy-supply = <&vreg_l11a>; 233 vdda-phy-supply = <&vreg_l11a>;
564 vdda-pll-supply = <&vreg_l3a>; 234 vdda-pll-supply = <&vreg_l3a>;
565 235
566 status = "okay"; 236 status = "okay";
567 }; 237 };
568 238
569 &qup1 { !! 239 &qup2 {
570 status = "okay"; 240 status = "okay";
571 }; 241 };
572 242
573 &qup2 { !! 243 &qup2_uart17 {
>> 244 compatible = "qcom,geni-debug-uart";
574 status = "okay"; 245 status = "okay";
575 }; 246 };
576 247
577 &remoteproc_adsp { 248 &remoteproc_adsp {
578 firmware-name = "qcom/sa8540p/adsp.mbn 249 firmware-name = "qcom/sa8540p/adsp.mbn";
579 status = "okay"; 250 status = "okay";
580 }; 251 };
581 252
582 &remoteproc_nsp0 { 253 &remoteproc_nsp0 {
583 firmware-name = "qcom/sa8540p/cdsp.mbn 254 firmware-name = "qcom/sa8540p/cdsp.mbn";
584 status = "okay"; 255 status = "okay";
585 }; 256 };
586 257
587 &remoteproc_nsp1 { 258 &remoteproc_nsp1 {
588 firmware-name = "qcom/sa8540p/cdsp1.mb 259 firmware-name = "qcom/sa8540p/cdsp1.mbn";
589 status = "okay"; 260 status = "okay";
590 }; 261 };
591 262
592 &uart17 { !! 263 &spmi_bus {
593 compatible = "qcom,geni-debug-uart"; !! 264 pm8450a: pmic@0 {
594 status = "okay"; !! 265 compatible = "qcom,pm8150", "qcom,spmi-pmic";
>> 266 reg = <0x0 SPMI_USID>;
>> 267 #address-cells = <1>;
>> 268 #size-cells = <0>;
>> 269
>> 270 rtc@6000 {
>> 271 compatible = "qcom,pm8941-rtc";
>> 272 reg = <0x6000>;
>> 273 reg-names = "rtc", "alarm";
>> 274 interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
>> 275 wakeup-source;
>> 276 };
>> 277
>> 278 pm8450a_gpios: gpio@c000 {
>> 279 compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
>> 280 reg = <0xc000>;
>> 281 gpio-controller;
>> 282 gpio-ranges = <&pm8450a_gpios 0 0 10>;
>> 283 #gpio-cells = <2>;
>> 284 interrupt-controller;
>> 285 #interrupt-cells = <2>;
>> 286 };
>> 287 };
>> 288
>> 289 pm8450c: pmic@4 {
>> 290 compatible = "qcom,pm8150", "qcom,spmi-pmic";
>> 291 reg = <0x4 SPMI_USID>;
>> 292 #address-cells = <1>;
>> 293 #size-cells = <0>;
>> 294
>> 295 pm8450c_gpios: gpio@c000 {
>> 296 compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
>> 297 reg = <0xc000>;
>> 298 gpio-controller;
>> 299 gpio-ranges = <&pm8450c_gpios 0 0 10>;
>> 300 #gpio-cells = <2>;
>> 301 interrupt-controller;
>> 302 #interrupt-cells = <2>;
>> 303 };
>> 304 };
>> 305
>> 306 pm8450e: pmic@8 {
>> 307 compatible = "qcom,pm8150", "qcom,spmi-pmic";
>> 308 reg = <0x8 SPMI_USID>;
>> 309 #address-cells = <1>;
>> 310 #size-cells = <0>;
>> 311
>> 312 pm8450e_gpios: gpio@c000 {
>> 313 compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
>> 314 reg = <0xc000>;
>> 315 gpio-controller;
>> 316 gpio-ranges = <&pm8450e_gpios 0 0 10>;
>> 317 #gpio-cells = <2>;
>> 318 interrupt-controller;
>> 319 #interrupt-cells = <2>;
>> 320 };
>> 321 };
>> 322
>> 323 pm8450g: pmic@c {
>> 324 compatible = "qcom,pm8150", "qcom,spmi-pmic";
>> 325 reg = <0xc SPMI_USID>;
>> 326 #address-cells = <1>;
>> 327 #size-cells = <0>;
>> 328
>> 329 pm8450g_gpios: gpio@c000 {
>> 330 compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
>> 331 reg = <0xc000>;
>> 332 gpio-controller;
>> 333 gpio-ranges = <&pm8450g_gpios 0 0 10>;
>> 334 #gpio-cells = <2>;
>> 335 interrupt-controller;
>> 336 #interrupt-cells = <2>;
>> 337 };
>> 338 };
595 }; 339 };
596 340
597 &ufs_mem_hc { 341 &ufs_mem_hc {
598 reset-gpios = <&tlmm 228 GPIO_ACTIVE_L 342 reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
599 343
600 vcc-supply = <&vreg_l17c>; 344 vcc-supply = <&vreg_l17c>;
601 vcc-max-microamp = <800000>; 345 vcc-max-microamp = <800000>;
602 vccq-supply = <&vreg_l6c>; 346 vccq-supply = <&vreg_l6c>;
603 vccq-max-microamp = <900000>; 347 vccq-max-microamp = <900000>;
604 348
605 status = "okay"; 349 status = "okay";
606 }; 350 };
607 351
608 &ufs_mem_phy { 352 &ufs_mem_phy {
609 vdda-phy-supply = <&vreg_l8g>; 353 vdda-phy-supply = <&vreg_l8g>;
610 vdda-pll-supply = <&vreg_l3g>; 354 vdda-pll-supply = <&vreg_l3g>;
611 355
612 status = "okay"; 356 status = "okay";
613 }; 357 };
614 358
615 &ufs_card_hc { 359 &ufs_card_hc {
616 reset-gpios = <&tlmm 229 GPIO_ACTIVE_L 360 reset-gpios = <&tlmm 229 GPIO_ACTIVE_LOW>;
617 361
618 vcc-supply = <&vreg_l10c>; 362 vcc-supply = <&vreg_l10c>;
619 vcc-max-microamp = <800000>; 363 vcc-max-microamp = <800000>;
620 vccq-supply = <&vreg_l3c>; 364 vccq-supply = <&vreg_l3c>;
621 vccq-max-microamp = <900000>; 365 vccq-max-microamp = <900000>;
622 366
623 status = "okay"; 367 status = "okay";
624 }; 368 };
625 369
626 &ufs_card_phy { 370 &ufs_card_phy {
627 vdda-phy-supply = <&vreg_l8g>; 371 vdda-phy-supply = <&vreg_l8g>;
628 vdda-pll-supply = <&vreg_l3g>; 372 vdda-pll-supply = <&vreg_l3g>;
629 373
630 status = "okay"; 374 status = "okay";
631 }; 375 };
632 376
633 &usb_0 { 377 &usb_0 {
634 status = "okay"; 378 status = "okay";
635 }; 379 };
636 380
637 &usb_0_dwc3 { 381 &usb_0_dwc3 {
638 /* TODO: Define USB-C connector proper 382 /* TODO: Define USB-C connector properly */
639 dr_mode = "peripheral"; 383 dr_mode = "peripheral";
640 }; 384 };
641 385
642 &usb_0_hsphy { 386 &usb_0_hsphy {
643 vdda-pll-supply = <&vreg_l5a>; 387 vdda-pll-supply = <&vreg_l5a>;
644 vdda18-supply = <&vreg_l7a>; 388 vdda18-supply = <&vreg_l7a>;
645 vdda33-supply = <&vreg_l13a>; 389 vdda33-supply = <&vreg_l13a>;
646 390
647 status = "okay"; 391 status = "okay";
648 }; 392 };
649 393
650 &usb_0_qmpphy { 394 &usb_0_qmpphy {
651 vdda-phy-supply = <&vreg_l3a>; 395 vdda-phy-supply = <&vreg_l3a>;
652 vdda-pll-supply = <&vreg_l5a>; 396 vdda-pll-supply = <&vreg_l5a>;
653 397
654 status = "okay"; 398 status = "okay";
655 }; 399 };
656 400
657 &usb_1 { 401 &usb_1 {
658 status = "okay"; 402 status = "okay";
659 }; 403 };
660 404
661 &usb_1_dwc3 { 405 &usb_1_dwc3 {
662 /* TODO: Define USB-C connector proper 406 /* TODO: Define USB-C connector properly */
663 dr_mode = "host"; 407 dr_mode = "host";
664 }; 408 };
665 409
666 &usb_1_hsphy { 410 &usb_1_hsphy {
667 vdda-pll-supply = <&vreg_l1c>; 411 vdda-pll-supply = <&vreg_l1c>;
668 vdda18-supply = <&vreg_l7c>; 412 vdda18-supply = <&vreg_l7c>;
669 vdda33-supply = <&vreg_l2c>; 413 vdda33-supply = <&vreg_l2c>;
670 414
671 status = "okay"; 415 status = "okay";
672 }; 416 };
673 417
674 &usb_1_qmpphy { 418 &usb_1_qmpphy {
675 vdda-phy-supply = <&vreg_l4c>; 419 vdda-phy-supply = <&vreg_l4c>;
676 vdda-pll-supply = <&vreg_l1c>; 420 vdda-pll-supply = <&vreg_l1c>;
677 421
678 status = "okay"; 422 status = "okay";
679 }; 423 };
680 424
681 &usb_2 { <<
682 status = "okay"; <<
683 }; <<
684 <<
685 &usb_2_hsphy0 { 425 &usb_2_hsphy0 {
686 vdda-pll-supply = <&vreg_l5a>; 426 vdda-pll-supply = <&vreg_l5a>;
687 vdda18-supply = <&vreg_l7g>; 427 vdda18-supply = <&vreg_l7g>;
688 vdda33-supply = <&vreg_l13a>; 428 vdda33-supply = <&vreg_l13a>;
689 429
690 status = "okay"; 430 status = "okay";
691 }; 431 };
692 432
693 &usb_2_hsphy1 { 433 &usb_2_hsphy1 {
694 vdda-pll-supply = <&vreg_l5a>; 434 vdda-pll-supply = <&vreg_l5a>;
695 vdda18-supply = <&vreg_l7g>; 435 vdda18-supply = <&vreg_l7g>;
696 vdda33-supply = <&vreg_l13a>; 436 vdda33-supply = <&vreg_l13a>;
697 437
698 status = "okay"; 438 status = "okay";
699 }; 439 };
700 440
701 &usb_2_hsphy2 { 441 &usb_2_hsphy2 {
702 vdda-pll-supply = <&vreg_l5a>; 442 vdda-pll-supply = <&vreg_l5a>;
703 vdda18-supply = <&vreg_l7g>; 443 vdda18-supply = <&vreg_l7g>;
704 vdda33-supply = <&vreg_l13a>; 444 vdda33-supply = <&vreg_l13a>;
705 445
706 status = "okay"; 446 status = "okay";
707 }; 447 };
708 448
709 &usb_2_hsphy3 { 449 &usb_2_hsphy3 {
710 vdda-pll-supply = <&vreg_l5a>; 450 vdda-pll-supply = <&vreg_l5a>;
711 vdda18-supply = <&vreg_l7g>; 451 vdda18-supply = <&vreg_l7g>;
712 vdda33-supply = <&vreg_l13a>; 452 vdda33-supply = <&vreg_l13a>;
713 453
714 status = "okay"; 454 status = "okay";
715 }; 455 };
716 456
717 &usb_2_qmpphy0 { 457 &usb_2_qmpphy0 {
718 vdda-phy-supply = <&vreg_l3a>; 458 vdda-phy-supply = <&vreg_l3a>;
719 vdda-pll-supply = <&vreg_l5a>; 459 vdda-pll-supply = <&vreg_l5a>;
720 460
721 status = "okay"; 461 status = "okay";
722 }; 462 };
723 463
724 &usb_2_qmpphy1 { 464 &usb_2_qmpphy1 {
725 vdda-phy-supply = <&vreg_l3a>; 465 vdda-phy-supply = <&vreg_l3a>;
726 vdda-pll-supply = <&vreg_l5a>; 466 vdda-pll-supply = <&vreg_l5a>;
727 467
728 status = "okay"; 468 status = "okay";
729 }; 469 };
730 470
731 &xo_board_clk { 471 &xo_board_clk {
732 clock-frequency = <38400000>; 472 clock-frequency = <38400000>;
733 }; 473 };
734 474
735 /* PINCTRL */ 475 /* PINCTRL */
736 476
737 &pmm8540a_gpios { <<
738 max20411_en: max20411-en-state { <<
739 pins = "gpio2"; <<
740 function = "normal"; <<
741 output-enable; <<
742 }; <<
743 }; <<
744 <<
745 &pmm8540c_gpios { <<
746 usb2_en: usb2-en-state { <<
747 pins = "gpio9"; <<
748 function = "normal"; <<
749 qcom,drive-strength = <PMIC_GP <<
750 output-enable; <<
751 power-source = <0>; <<
752 }; <<
753 }; <<
754 <<
755 &pmm8540e_gpios { <<
756 usb3_en: usb3-en-state { <<
757 pins = "gpio5"; <<
758 function = "normal"; <<
759 qcom,drive-strength = <PMIC_GP <<
760 output-enable; <<
761 power-source = <0>; <<
762 }; <<
763 }; <<
764 <<
765 &pmm8540g_gpios { <<
766 usb4_en: usb4-en-state { <<
767 pins = "gpio5"; <<
768 function = "normal"; <<
769 qcom,drive-strength = <PMIC_GP <<
770 output-enable; <<
771 power-source = <0>; <<
772 }; <<
773 <<
774 usb5_en: usb5-en-state { <<
775 pins = "gpio9"; <<
776 function = "normal"; <<
777 qcom,drive-strength = <PMIC_GP <<
778 output-enable; <<
779 power-source = <0>; <<
780 }; <<
781 }; <<
782 <<
783 &tlmm { 477 &tlmm {
784 pcie2a_default: pcie2a-default-state { 478 pcie2a_default: pcie2a-default-state {
785 clkreq-n-pins { 479 clkreq-n-pins {
786 pins = "gpio142"; 480 pins = "gpio142";
787 function = "pcie2a_clk 481 function = "pcie2a_clkreq";
788 drive-strength = <2>; 482 drive-strength = <2>;
789 bias-pull-up; 483 bias-pull-up;
790 }; 484 };
791 485
792 perst-n-pins { 486 perst-n-pins {
793 pins = "gpio143"; 487 pins = "gpio143";
794 function = "gpio"; 488 function = "gpio";
795 drive-strength = <2>; 489 drive-strength = <2>;
796 bias-pull-down; 490 bias-pull-down;
797 }; 491 };
798 492
799 wake-n-pins { 493 wake-n-pins {
800 pins = "gpio145"; 494 pins = "gpio145";
801 function = "gpio"; 495 function = "gpio";
802 drive-strength = <2>; 496 drive-strength = <2>;
803 bias-pull-up; 497 bias-pull-up;
804 }; 498 };
805 }; 499 };
806 500
807 pcie3a_default: pcie3a-default-state { 501 pcie3a_default: pcie3a-default-state {
808 clkreq-n-pins { 502 clkreq-n-pins {
809 pins = "gpio150"; 503 pins = "gpio150";
810 function = "pcie3a_clk 504 function = "pcie3a_clkreq";
811 drive-strength = <2>; 505 drive-strength = <2>;
812 bias-pull-up; 506 bias-pull-up;
813 }; 507 };
814 508
815 perst-n-pins { 509 perst-n-pins {
816 pins = "gpio151"; 510 pins = "gpio151";
817 function = "gpio"; 511 function = "gpio";
818 drive-strength = <2>; 512 drive-strength = <2>;
819 bias-pull-down; 513 bias-pull-down;
820 }; 514 };
821 515
822 wake-n-pins { 516 wake-n-pins {
823 pins = "gpio56"; 517 pins = "gpio56";
824 function = "gpio"; 518 function = "gpio";
825 drive-strength = <2>; 519 drive-strength = <2>;
826 bias-pull-up; 520 bias-pull-up;
827 }; 521 };
828 }; 522 };
829 523
830 pcie3b_default: pcie3b-default-state { 524 pcie3b_default: pcie3b-default-state {
831 clkreq-n-pins { 525 clkreq-n-pins {
832 pins = "gpio152"; 526 pins = "gpio152";
833 function = "pcie3b_clk 527 function = "pcie3b_clkreq";
834 drive-strength = <2>; 528 drive-strength = <2>;
835 bias-pull-up; 529 bias-pull-up;
836 }; 530 };
837 531
838 perst-n-pins { 532 perst-n-pins {
839 pins = "gpio153"; 533 pins = "gpio153";
840 function = "gpio"; 534 function = "gpio";
841 drive-strength = <2>; 535 drive-strength = <2>;
842 bias-pull-down; 536 bias-pull-down;
843 }; 537 };
844 538
845 wake-n-pins { 539 wake-n-pins {
846 pins = "gpio130"; 540 pins = "gpio130";
847 function = "gpio"; 541 function = "gpio";
848 drive-strength = <2>; 542 drive-strength = <2>;
849 bias-pull-up; 543 bias-pull-up;
850 }; 544 };
851 }; 545 };
852 546
853 pcie4_default: pcie4-default-state { 547 pcie4_default: pcie4-default-state {
854 clkreq-n-pins { 548 clkreq-n-pins {
855 pins = "gpio140"; 549 pins = "gpio140";
856 function = "pcie4_clkr 550 function = "pcie4_clkreq";
857 drive-strength = <2>; 551 drive-strength = <2>;
858 bias-pull-up; 552 bias-pull-up;
859 }; 553 };
860 554
861 perst-n-pins { 555 perst-n-pins {
862 pins = "gpio141"; 556 pins = "gpio141";
863 function = "gpio"; 557 function = "gpio";
864 drive-strength = <2>; 558 drive-strength = <2>;
865 bias-pull-down; 559 bias-pull-down;
866 }; 560 };
867 561
868 wake-n-pins { 562 wake-n-pins {
869 pins = "gpio139"; 563 pins = "gpio139";
870 function = "gpio"; 564 function = "gpio";
871 drive-strength = <2>; 565 drive-strength = <2>;
872 bias-pull-up; 566 bias-pull-up;
873 }; 567 };
874 }; <<
875 <<
876 qup1_i2c4_state: qup1-i2c4-state { <<
877 pins = "gpio0", "gpio1"; <<
878 function = "qup12"; <<
879 drive-strength = <2>; <<
880 bias-pull-up; <<
881 }; 568 };
882 }; 569 };
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