1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Copyright (c) 2021, The Linux Foundation. A 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited 4 * Copyright (c) 2022, Linaro Limited
5 */ 5 */
6 6
7 /dts-v1/; 7 /dts-v1/;
8 8
9 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/spmi/spmi.h> 11 #include <dt-bindings/spmi/spmi.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h <<
13 12
14 #include "sa8540p.dtsi" 13 #include "sa8540p.dtsi"
15 #include "sa8540p-pmics.dtsi" 14 #include "sa8540p-pmics.dtsi"
16 15
17 / { 16 / {
18 model = "Qualcomm SA8295P ADP"; 17 model = "Qualcomm SA8295P ADP";
19 compatible = "qcom,sa8295p-adp", "qcom 18 compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
20 19
21 aliases { 20 aliases {
22 serial0 = &uart17; 21 serial0 = &uart17;
23 }; 22 };
24 23
25 chosen { 24 chosen {
26 stdout-path = "serial0:115200n 25 stdout-path = "serial0:115200n8";
27 }; 26 };
28 27
29 dp2-connector { 28 dp2-connector {
30 compatible = "dp-connector"; 29 compatible = "dp-connector";
31 label = "DP2"; 30 label = "DP2";
32 type = "mini"; 31 type = "mini";
33 32
34 hpd-gpios = <&tlmm 20 GPIO_ACT 33 hpd-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
35 34
36 port { 35 port {
37 dp2_connector_in: endp 36 dp2_connector_in: endpoint {
38 remote-endpoin 37 remote-endpoint = <&mdss1_dp0_phy_out>;
39 }; 38 };
40 }; 39 };
41 }; 40 };
42 41
43 dp3-connector { 42 dp3-connector {
44 compatible = "dp-connector"; 43 compatible = "dp-connector";
45 label = "DP3"; 44 label = "DP3";
46 type = "mini"; 45 type = "mini";
47 46
48 hpd-gpios = <&tlmm 45 GPIO_ACT 47 hpd-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
49 48
50 port { 49 port {
51 dp3_connector_in: endp 50 dp3_connector_in: endpoint {
52 remote-endpoin 51 remote-endpoint = <&mdss1_dp1_phy_out>;
53 }; 52 };
54 }; 53 };
55 }; 54 };
56 55
57 edp0-connector { 56 edp0-connector {
58 compatible = "dp-connector"; 57 compatible = "dp-connector";
59 label = "EDP0"; 58 label = "EDP0";
60 type = "mini"; 59 type = "mini";
61 60
62 hpd-gpios = <&tlmm 2 GPIO_ACTI 61 hpd-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
63 62
64 port { 63 port {
65 edp0_connector_in: end 64 edp0_connector_in: endpoint {
66 remote-endpoin 65 remote-endpoint = <&mdss0_dp2_phy_out>;
67 }; 66 };
68 }; 67 };
69 }; 68 };
70 69
71 edp1-connector { 70 edp1-connector {
72 compatible = "dp-connector"; 71 compatible = "dp-connector";
73 label = "EDP1"; 72 label = "EDP1";
74 type = "mini"; 73 type = "mini";
75 74
76 hpd-gpios = <&tlmm 3 GPIO_ACTI 75 hpd-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
77 76
78 port { 77 port {
79 edp1_connector_in: end 78 edp1_connector_in: endpoint {
80 remote-endpoin 79 remote-endpoint = <&mdss0_dp3_phy_out>;
81 }; 80 };
82 }; 81 };
83 }; 82 };
84 83
85 edp2-connector { 84 edp2-connector {
86 compatible = "dp-connector"; 85 compatible = "dp-connector";
87 label = "EDP2"; 86 label = "EDP2";
88 type = "mini"; 87 type = "mini";
89 88
90 hpd-gpios = <&tlmm 7 GPIO_ACTI 89 hpd-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
91 90
92 port { 91 port {
93 edp2_connector_in: end 92 edp2_connector_in: endpoint {
94 remote-endpoin 93 remote-endpoint = <&mdss1_dp2_phy_out>;
95 }; 94 };
96 }; 95 };
97 }; 96 };
98 97
99 edp3-connector { 98 edp3-connector {
100 compatible = "dp-connector"; 99 compatible = "dp-connector";
101 label = "EDP3"; 100 label = "EDP3";
102 type = "mini"; 101 type = "mini";
103 102
104 hpd-gpios = <&tlmm 6 GPIO_ACTI 103 hpd-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
105 104
106 port { 105 port {
107 edp3_connector_in: end 106 edp3_connector_in: endpoint {
108 remote-endpoin 107 remote-endpoint = <&mdss1_dp3_phy_out>;
109 }; 108 };
110 }; 109 };
111 }; 110 };
112 <<
113 regulator-usb2-vbus { <<
114 compatible = "regulator-fixed" <<
115 regulator-name = "USB2_VBUS"; <<
116 gpio = <&pmm8540c_gpios 9 GPIO <<
117 pinctrl-0 = <&usb2_en>; <<
118 pinctrl-names = "default"; <<
119 enable-active-high; <<
120 regulator-always-on; <<
121 }; <<
122 <<
123 regulator-usb3-vbus { <<
124 compatible = "regulator-fixed" <<
125 regulator-name = "USB3_VBUS"; <<
126 gpio = <&pmm8540e_gpios 5 GPIO <<
127 pinctrl-0 = <&usb3_en>; <<
128 pinctrl-names = "default"; <<
129 enable-active-high; <<
130 regulator-always-on; <<
131 }; <<
132 <<
133 regulator-usb4-vbus { <<
134 compatible = "regulator-fixed" <<
135 regulator-name = "USB4_VBUS"; <<
136 gpio = <&pmm8540g_gpios 5 GPIO <<
137 pinctrl-0 = <&usb4_en>; <<
138 pinctrl-names = "default"; <<
139 enable-active-high; <<
140 regulator-always-on; <<
141 }; <<
142 <<
143 regulator-usb5-vbus { <<
144 compatible = "regulator-fixed" <<
145 regulator-name = "USB5_VBUS"; <<
146 gpio = <&pmm8540g_gpios 9 GPIO <<
147 pinctrl-0 = <&usb5_en>; <<
148 pinctrl-names = "default"; <<
149 enable-active-high; <<
150 regulator-always-on; <<
151 }; <<
152 <<
153 reserved-memory { <<
154 gpu_mem: gpu-mem@8bf00000 { <<
155 reg = <0 0x8bf00000 0 <<
156 no-map; <<
157 }; <<
158 }; <<
159 }; 111 };
160 112
161 &apps_rsc { 113 &apps_rsc {
162 regulators-0 { 114 regulators-0 {
163 compatible = "qcom,pm8150-rpmh 115 compatible = "qcom,pm8150-rpmh-regulators";
164 qcom,pmic-id = "a"; 116 qcom,pmic-id = "a";
165 117
166 vreg_l3a: ldo3 { 118 vreg_l3a: ldo3 {
167 regulator-name = "vreg 119 regulator-name = "vreg_l3a";
168 regulator-min-microvol 120 regulator-min-microvolt = <1200000>;
169 regulator-max-microvol 121 regulator-max-microvolt = <1208000>;
170 regulator-initial-mode 122 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
171 }; 123 };
172 124
173 vreg_l5a: ldo5 { 125 vreg_l5a: ldo5 {
174 regulator-name = "vreg 126 regulator-name = "vreg_l5a";
175 regulator-min-microvol 127 regulator-min-microvolt = <912000>;
176 regulator-max-microvol 128 regulator-max-microvolt = <912000>;
177 regulator-initial-mode 129 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
178 }; 130 };
179 131
180 vreg_l7a: ldo7 { 132 vreg_l7a: ldo7 {
181 regulator-name = "vreg 133 regulator-name = "vreg_l7a";
182 regulator-min-microvol 134 regulator-min-microvolt = <1800000>;
183 regulator-max-microvol 135 regulator-max-microvolt = <1800000>;
184 regulator-initial-mode 136 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
185 }; 137 };
186 138
187 vreg_l13a: ldo13 { 139 vreg_l13a: ldo13 {
188 regulator-name = "vreg 140 regulator-name = "vreg_l13a";
189 regulator-min-microvol 141 regulator-min-microvolt = <3072000>;
190 regulator-max-microvol 142 regulator-max-microvolt = <3072000>;
191 regulator-initial-mode 143 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
192 }; 144 };
193 145
194 vreg_l11a: ldo11 { 146 vreg_l11a: ldo11 {
195 regulator-name = "vreg 147 regulator-name = "vreg_l11a";
196 regulator-min-microvol 148 regulator-min-microvolt = <880000>;
197 regulator-max-microvol 149 regulator-max-microvolt = <880000>;
198 regulator-initial-mode 150 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199 }; 151 };
200 }; 152 };
201 153
202 regulators-1 { 154 regulators-1 {
203 compatible = "qcom,pm8150-rpmh 155 compatible = "qcom,pm8150-rpmh-regulators";
204 qcom,pmic-id = "c"; 156 qcom,pmic-id = "c";
205 157
206 vreg_l1c: ldo1 { 158 vreg_l1c: ldo1 {
207 regulator-name = "vreg 159 regulator-name = "vreg_l1c";
208 regulator-min-microvol 160 regulator-min-microvolt = <912000>;
209 regulator-max-microvol 161 regulator-max-microvolt = <912000>;
210 regulator-initial-mode 162 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
211 }; 163 };
212 164
213 vreg_l2c: ldo2 { 165 vreg_l2c: ldo2 {
214 regulator-name = "vreg 166 regulator-name = "vreg_l2c";
215 regulator-min-microvol 167 regulator-min-microvolt = <3072000>;
216 regulator-max-microvol 168 regulator-max-microvolt = <3072000>;
217 regulator-initial-mode 169 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
218 }; 170 };
219 171
220 vreg_l3c: ldo3 { 172 vreg_l3c: ldo3 {
221 regulator-name = "vreg 173 regulator-name = "vreg_l3c";
222 regulator-min-microvol 174 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 175 regulator-max-microvolt = <1200000>;
224 regulator-initial-mode 176 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 regulator-allow-set-lo 177 regulator-allow-set-load;
226 regulator-allowed-mode 178 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
227 179 RPMH_REGULATOR_MODE_HPM>;
228 }; 180 };
229 181
230 vreg_l4c: ldo4 { 182 vreg_l4c: ldo4 {
231 regulator-name = "vreg 183 regulator-name = "vreg_l4c";
232 regulator-min-microvol 184 regulator-min-microvolt = <1200000>;
233 regulator-max-microvol 185 regulator-max-microvolt = <1208000>;
234 regulator-initial-mode 186 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
235 }; 187 };
236 188
237 vreg_l6c: ldo6 { 189 vreg_l6c: ldo6 {
238 regulator-name = "vreg 190 regulator-name = "vreg_l6c";
239 regulator-min-microvol 191 regulator-min-microvolt = <1200000>;
240 regulator-max-microvol 192 regulator-max-microvolt = <1200000>;
241 regulator-initial-mode 193 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
242 regulator-allow-set-lo 194 regulator-allow-set-load;
243 regulator-allowed-mode 195 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
244 196 RPMH_REGULATOR_MODE_HPM>;
245 }; 197 };
246 198
247 vreg_l7c: ldo7 { 199 vreg_l7c: ldo7 {
248 regulator-name = "vreg 200 regulator-name = "vreg_l7c";
249 regulator-min-microvol 201 regulator-min-microvolt = <1800000>;
250 regulator-max-microvol 202 regulator-max-microvolt = <1800000>;
251 regulator-initial-mode 203 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
252 }; 204 };
253 205
254 vreg_l10c: ldo10 { 206 vreg_l10c: ldo10 {
255 regulator-name = "vreg 207 regulator-name = "vreg_l10c";
256 regulator-min-microvol 208 regulator-min-microvolt = <2504000>;
257 regulator-max-microvol 209 regulator-max-microvolt = <2504000>;
258 regulator-initial-mode 210 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259 regulator-allow-set-lo 211 regulator-allow-set-load;
260 regulator-allowed-mode 212 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
261 213 RPMH_REGULATOR_MODE_HPM>;
262 }; 214 };
263 215
264 vreg_l17c: ldo17 { 216 vreg_l17c: ldo17 {
265 regulator-name = "vreg 217 regulator-name = "vreg_l17c";
266 regulator-min-microvol 218 regulator-min-microvolt = <2504000>;
267 regulator-max-microvol 219 regulator-max-microvolt = <2504000>;
268 regulator-initial-mode 220 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269 regulator-allow-set-lo 221 regulator-allow-set-load;
270 regulator-allowed-mode 222 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
271 223 RPMH_REGULATOR_MODE_HPM>;
272 }; 224 };
273 }; 225 };
274 226
275 regulators-2 { 227 regulators-2 {
276 compatible = "qcom,pm8150-rpmh 228 compatible = "qcom,pm8150-rpmh-regulators";
277 qcom,pmic-id = "g"; 229 qcom,pmic-id = "g";
278 230
279 vreg_l3g: ldo3 { 231 vreg_l3g: ldo3 {
280 regulator-name = "vreg 232 regulator-name = "vreg_l3g";
281 regulator-min-microvol 233 regulator-min-microvolt = <1200000>;
282 regulator-max-microvol 234 regulator-max-microvolt = <1200000>;
283 regulator-initial-mode 235 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
284 }; 236 };
285 237
286 vreg_l7g: ldo7 { 238 vreg_l7g: ldo7 {
287 regulator-name = "vreg 239 regulator-name = "vreg_l7g";
288 regulator-min-microvol 240 regulator-min-microvolt = <1800000>;
289 regulator-max-microvol 241 regulator-max-microvolt = <1800000>;
290 regulator-initial-mode 242 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
291 }; 243 };
292 244
293 vreg_l8g: ldo8 { 245 vreg_l8g: ldo8 {
294 regulator-name = "vreg 246 regulator-name = "vreg_l8g";
295 regulator-min-microvol 247 regulator-min-microvolt = <912000>;
296 regulator-max-microvol 248 regulator-max-microvolt = <912000>;
297 regulator-initial-mode 249 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
298 }; 250 };
299 251
300 vreg_l11g: ldo11 { 252 vreg_l11g: ldo11 {
301 regulator-name = "vreg 253 regulator-name = "vreg_l11g";
302 regulator-min-microvol 254 regulator-min-microvolt = <912000>;
303 regulator-max-microvol 255 regulator-max-microvolt = <912000>;
304 regulator-initial-mode 256 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305 }; 257 };
306 }; 258 };
307 }; 259 };
308 260
309 &dispcc0 { 261 &dispcc0 {
310 status = "okay"; 262 status = "okay";
311 }; 263 };
312 264
313 &dispcc1 { 265 &dispcc1 {
314 status = "okay"; 266 status = "okay";
315 }; 267 };
316 268
317 &i2c12 { <<
318 pinctrl-0 = <&qup1_i2c4_state>; <<
319 pinctrl-names = "default"; <<
320 <<
321 status = "okay"; <<
322 <<
323 vdd_gfx: regulator@39 { <<
324 compatible = "maxim,max20411"; <<
325 reg = <0x39>; <<
326 <<
327 regulator-min-microvolt = <800 <<
328 regulator-max-microvolt = <800 <<
329 <<
330 enable-gpios = <&pmm8540a_gpio <<
331 <<
332 pinctrl-0 = <&max20411_en>; <<
333 pinctrl-names = "default"; <<
334 }; <<
335 }; <<
336 <<
337 &gpucc { <<
338 vdd-gfx-supply = <&vdd_gfx>; <<
339 status = "okay"; <<
340 }; <<
341 <<
342 &gmu { <<
343 status = "okay"; <<
344 }; <<
345 <<
346 &gpu { <<
347 status = "okay"; <<
348 <<
349 zap-shader { <<
350 memory-region = <&gpu_mem>; <<
351 firmware-name = "qcom/sa8295p/ <<
352 }; <<
353 }; <<
354 <<
355 &gpu_smmu { <<
356 status = "okay"; <<
357 }; <<
358 <<
359 &mdss0 { 269 &mdss0 {
360 status = "okay"; 270 status = "okay";
361 }; 271 };
362 272
363 &mdss0_dp2 { 273 &mdss0_dp2 {
364 data-lanes = <0 1 2 3>; 274 data-lanes = <0 1 2 3>;
365 275
366 status = "okay"; 276 status = "okay";
367 277
368 ports { 278 ports {
369 port@1 { 279 port@1 {
370 reg = <1>; 280 reg = <1>;
371 mdss0_dp2_phy_out: end 281 mdss0_dp2_phy_out: endpoint {
372 remote-endpoin 282 remote-endpoint = <&edp0_connector_in>;
373 }; 283 };
374 }; 284 };
375 }; 285 };
376 }; 286 };
377 287
378 &mdss0_dp2_phy { 288 &mdss0_dp2_phy {
379 vdda-phy-supply = <&vreg_l8g>; 289 vdda-phy-supply = <&vreg_l8g>;
380 vdda-pll-supply = <&vreg_l3g>; 290 vdda-pll-supply = <&vreg_l3g>;
381 291
382 status = "okay"; 292 status = "okay";
383 }; 293 };
384 294
385 &mdss0_dp3 { 295 &mdss0_dp3 {
386 data-lanes = <0 1 2 3>; 296 data-lanes = <0 1 2 3>;
387 297
388 status = "okay"; 298 status = "okay";
389 299
390 ports { 300 ports {
391 port@1 { 301 port@1 {
392 reg = <1>; 302 reg = <1>;
393 mdss0_dp3_phy_out: end 303 mdss0_dp3_phy_out: endpoint {
394 remote-endpoin 304 remote-endpoint = <&edp1_connector_in>;
395 }; 305 };
396 }; 306 };
397 }; 307 };
398 }; 308 };
399 309
400 &mdss0_dp3_phy { 310 &mdss0_dp3_phy {
401 vdda-phy-supply = <&vreg_l8g>; 311 vdda-phy-supply = <&vreg_l8g>;
402 vdda-pll-supply = <&vreg_l3g>; 312 vdda-pll-supply = <&vreg_l3g>;
403 313
404 status = "okay"; 314 status = "okay";
405 }; 315 };
406 316
407 &mdss1 { 317 &mdss1 {
408 status = "okay"; 318 status = "okay";
409 }; 319 };
410 320
411 &mdss1_dp0 { 321 &mdss1_dp0 {
412 data-lanes = <0 1 2 3>; 322 data-lanes = <0 1 2 3>;
413 323
414 status = "okay"; 324 status = "okay";
415 325
416 ports { 326 ports {
417 port@1 { 327 port@1 {
418 reg = <1>; 328 reg = <1>;
419 mdss1_dp0_phy_out: end 329 mdss1_dp0_phy_out: endpoint {
420 remote-endpoin 330 remote-endpoint = <&dp2_connector_in>;
421 }; 331 };
422 }; 332 };
423 }; 333 };
424 }; 334 };
425 335
426 &mdss1_dp0_phy { 336 &mdss1_dp0_phy {
427 vdda-phy-supply = <&vreg_l11g>; 337 vdda-phy-supply = <&vreg_l11g>;
428 vdda-pll-supply = <&vreg_l3g>; 338 vdda-pll-supply = <&vreg_l3g>;
429 339
430 status = "okay"; 340 status = "okay";
431 }; 341 };
432 342
433 &mdss1_dp1 { 343 &mdss1_dp1 {
434 data-lanes = <0 1 2 3>; 344 data-lanes = <0 1 2 3>;
435 345
436 status = "okay"; 346 status = "okay";
437 347
438 ports { 348 ports {
439 port@1 { 349 port@1 {
440 reg = <1>; 350 reg = <1>;
441 mdss1_dp1_phy_out: end 351 mdss1_dp1_phy_out: endpoint {
442 remote-endpoin 352 remote-endpoint = <&dp3_connector_in>;
443 }; 353 };
444 }; 354 };
445 }; 355 };
446 }; 356 };
447 357
448 &mdss1_dp1_phy { 358 &mdss1_dp1_phy {
449 vdda-phy-supply = <&vreg_l11g>; 359 vdda-phy-supply = <&vreg_l11g>;
450 vdda-pll-supply = <&vreg_l3g>; 360 vdda-pll-supply = <&vreg_l3g>;
451 361
452 status = "okay"; 362 status = "okay";
453 }; 363 };
454 364
455 &mdss1_dp2 { 365 &mdss1_dp2 {
456 data-lanes = <0 1 2 3>; 366 data-lanes = <0 1 2 3>;
457 367
458 status = "okay"; 368 status = "okay";
459 369
460 ports { 370 ports {
461 port@1 { 371 port@1 {
462 reg = <1>; 372 reg = <1>;
463 mdss1_dp2_phy_out: end 373 mdss1_dp2_phy_out: endpoint {
464 remote-endpoin 374 remote-endpoint = <&edp2_connector_in>;
465 }; 375 };
466 }; 376 };
467 }; 377 };
468 }; 378 };
469 379
470 &mdss1_dp2_phy { 380 &mdss1_dp2_phy {
471 vdda-phy-supply = <&vreg_l11g>; 381 vdda-phy-supply = <&vreg_l11g>;
472 vdda-pll-supply = <&vreg_l3g>; 382 vdda-pll-supply = <&vreg_l3g>;
473 383
474 status = "okay"; 384 status = "okay";
475 }; 385 };
476 386
477 &mdss1_dp3 { 387 &mdss1_dp3 {
478 data-lanes = <0 1 2 3>; 388 data-lanes = <0 1 2 3>;
479 389
480 status = "okay"; 390 status = "okay";
481 391
482 ports { 392 ports {
483 port@1 { 393 port@1 {
484 reg = <1>; 394 reg = <1>;
485 mdss1_dp3_phy_out: end 395 mdss1_dp3_phy_out: endpoint {
486 remote-endpoin 396 remote-endpoint = <&edp3_connector_in>;
487 }; 397 };
488 }; 398 };
489 }; 399 };
490 }; 400 };
491 401
492 &mdss1_dp3_phy { 402 &mdss1_dp3_phy {
493 vdda-phy-supply = <&vreg_l11g>; 403 vdda-phy-supply = <&vreg_l11g>;
494 vdda-pll-supply = <&vreg_l3g>; 404 vdda-pll-supply = <&vreg_l3g>;
495 405
496 status = "okay"; 406 status = "okay";
497 }; 407 };
498 408
499 &pcie2a { 409 &pcie2a {
500 perst-gpios = <&tlmm 143 GPIO_ACTIVE_L 410 perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
501 wake-gpios = <&tlmm 145 GPIO_ACTIVE_LO 411 wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
502 412
503 pinctrl-names = "default"; 413 pinctrl-names = "default";
504 pinctrl-0 = <&pcie2a_default>; 414 pinctrl-0 = <&pcie2a_default>;
505 415
506 status = "okay"; 416 status = "okay";
507 }; 417 };
508 418
509 &pcie2a_phy { 419 &pcie2a_phy {
510 vdda-phy-supply = <&vreg_l11a>; 420 vdda-phy-supply = <&vreg_l11a>;
511 vdda-pll-supply = <&vreg_l3a>; 421 vdda-pll-supply = <&vreg_l3a>;
512 422
513 status = "okay"; 423 status = "okay";
514 }; 424 };
515 425
516 &pcie3a { 426 &pcie3a {
517 num-lanes = <2>; 427 num-lanes = <2>;
518 428
519 perst-gpios = <&tlmm 151 GPIO_ACTIVE_L 429 perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
520 wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW 430 wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW>;
521 431
522 pinctrl-names = "default"; 432 pinctrl-names = "default";
523 pinctrl-0 = <&pcie3a_default>; 433 pinctrl-0 = <&pcie3a_default>;
524 434
525 status = "okay"; 435 status = "okay";
526 }; 436 };
527 437
528 &pcie3a_phy { 438 &pcie3a_phy {
529 vdda-phy-supply = <&vreg_l11a>; 439 vdda-phy-supply = <&vreg_l11a>;
530 vdda-pll-supply = <&vreg_l3a>; 440 vdda-pll-supply = <&vreg_l3a>;
531 441
532 status = "okay"; 442 status = "okay";
533 }; 443 };
534 444
535 &pcie3b { 445 &pcie3b {
536 perst-gpios = <&tlmm 153 GPIO_ACTIVE_L 446 perst-gpios = <&tlmm 153 GPIO_ACTIVE_LOW>;
537 wake-gpios = <&tlmm 130 GPIO_ACTIVE_LO 447 wake-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
538 448
539 pinctrl-names = "default"; 449 pinctrl-names = "default";
540 pinctrl-0 = <&pcie3b_default>; 450 pinctrl-0 = <&pcie3b_default>;
541 451
542 status = "okay"; 452 status = "okay";
543 }; 453 };
544 454
545 &pcie3b_phy { 455 &pcie3b_phy {
546 vdda-phy-supply = <&vreg_l11a>; 456 vdda-phy-supply = <&vreg_l11a>;
547 vdda-pll-supply = <&vreg_l3a>; 457 vdda-pll-supply = <&vreg_l3a>;
548 458
549 status = "okay"; 459 status = "okay";
550 }; 460 };
551 461
552 &pcie4 { 462 &pcie4 {
553 perst-gpios = <&tlmm 141 GPIO_ACTIVE_L 463 perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
554 wake-gpios = <&tlmm 139 GPIO_ACTIVE_LO 464 wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
555 465
556 pinctrl-names = "default"; 466 pinctrl-names = "default";
557 pinctrl-0 = <&pcie4_default>; 467 pinctrl-0 = <&pcie4_default>;
558 468
559 status = "okay"; 469 status = "okay";
560 }; 470 };
561 471
562 &pcie4_phy { 472 &pcie4_phy {
563 vdda-phy-supply = <&vreg_l11a>; 473 vdda-phy-supply = <&vreg_l11a>;
564 vdda-pll-supply = <&vreg_l3a>; 474 vdda-pll-supply = <&vreg_l3a>;
565 475
566 status = "okay"; 476 status = "okay";
567 }; 477 };
568 478
569 &qup1 { <<
570 status = "okay"; <<
571 }; <<
572 <<
573 &qup2 { 479 &qup2 {
574 status = "okay"; 480 status = "okay";
575 }; 481 };
576 482
577 &remoteproc_adsp { 483 &remoteproc_adsp {
578 firmware-name = "qcom/sa8540p/adsp.mbn 484 firmware-name = "qcom/sa8540p/adsp.mbn";
579 status = "okay"; 485 status = "okay";
580 }; 486 };
581 487
582 &remoteproc_nsp0 { 488 &remoteproc_nsp0 {
583 firmware-name = "qcom/sa8540p/cdsp.mbn 489 firmware-name = "qcom/sa8540p/cdsp.mbn";
584 status = "okay"; 490 status = "okay";
585 }; 491 };
586 492
587 &remoteproc_nsp1 { 493 &remoteproc_nsp1 {
588 firmware-name = "qcom/sa8540p/cdsp1.mb 494 firmware-name = "qcom/sa8540p/cdsp1.mbn";
589 status = "okay"; 495 status = "okay";
590 }; 496 };
591 497
592 &uart17 { 498 &uart17 {
593 compatible = "qcom,geni-debug-uart"; 499 compatible = "qcom,geni-debug-uart";
594 status = "okay"; 500 status = "okay";
595 }; 501 };
596 502
597 &ufs_mem_hc { 503 &ufs_mem_hc {
598 reset-gpios = <&tlmm 228 GPIO_ACTIVE_L 504 reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
599 505
600 vcc-supply = <&vreg_l17c>; 506 vcc-supply = <&vreg_l17c>;
601 vcc-max-microamp = <800000>; 507 vcc-max-microamp = <800000>;
602 vccq-supply = <&vreg_l6c>; 508 vccq-supply = <&vreg_l6c>;
603 vccq-max-microamp = <900000>; 509 vccq-max-microamp = <900000>;
604 510
605 status = "okay"; 511 status = "okay";
606 }; 512 };
607 513
608 &ufs_mem_phy { 514 &ufs_mem_phy {
609 vdda-phy-supply = <&vreg_l8g>; 515 vdda-phy-supply = <&vreg_l8g>;
610 vdda-pll-supply = <&vreg_l3g>; 516 vdda-pll-supply = <&vreg_l3g>;
611 517
612 status = "okay"; 518 status = "okay";
613 }; 519 };
614 520
615 &ufs_card_hc { 521 &ufs_card_hc {
616 reset-gpios = <&tlmm 229 GPIO_ACTIVE_L 522 reset-gpios = <&tlmm 229 GPIO_ACTIVE_LOW>;
617 523
618 vcc-supply = <&vreg_l10c>; 524 vcc-supply = <&vreg_l10c>;
619 vcc-max-microamp = <800000>; 525 vcc-max-microamp = <800000>;
620 vccq-supply = <&vreg_l3c>; 526 vccq-supply = <&vreg_l3c>;
621 vccq-max-microamp = <900000>; 527 vccq-max-microamp = <900000>;
622 528
623 status = "okay"; 529 status = "okay";
624 }; 530 };
625 531
626 &ufs_card_phy { 532 &ufs_card_phy {
627 vdda-phy-supply = <&vreg_l8g>; 533 vdda-phy-supply = <&vreg_l8g>;
628 vdda-pll-supply = <&vreg_l3g>; 534 vdda-pll-supply = <&vreg_l3g>;
629 535
630 status = "okay"; 536 status = "okay";
631 }; 537 };
632 538
633 &usb_0 { 539 &usb_0 {
634 status = "okay"; 540 status = "okay";
635 }; 541 };
636 542
637 &usb_0_dwc3 { 543 &usb_0_dwc3 {
638 /* TODO: Define USB-C connector proper 544 /* TODO: Define USB-C connector properly */
639 dr_mode = "peripheral"; 545 dr_mode = "peripheral";
640 }; 546 };
641 547
642 &usb_0_hsphy { 548 &usb_0_hsphy {
643 vdda-pll-supply = <&vreg_l5a>; 549 vdda-pll-supply = <&vreg_l5a>;
644 vdda18-supply = <&vreg_l7a>; 550 vdda18-supply = <&vreg_l7a>;
645 vdda33-supply = <&vreg_l13a>; 551 vdda33-supply = <&vreg_l13a>;
646 552
647 status = "okay"; 553 status = "okay";
648 }; 554 };
649 555
650 &usb_0_qmpphy { 556 &usb_0_qmpphy {
651 vdda-phy-supply = <&vreg_l3a>; 557 vdda-phy-supply = <&vreg_l3a>;
652 vdda-pll-supply = <&vreg_l5a>; 558 vdda-pll-supply = <&vreg_l5a>;
653 559
654 status = "okay"; 560 status = "okay";
655 }; 561 };
656 562
657 &usb_1 { 563 &usb_1 {
658 status = "okay"; 564 status = "okay";
659 }; 565 };
660 566
661 &usb_1_dwc3 { 567 &usb_1_dwc3 {
662 /* TODO: Define USB-C connector proper 568 /* TODO: Define USB-C connector properly */
663 dr_mode = "host"; 569 dr_mode = "host";
664 }; 570 };
665 571
666 &usb_1_hsphy { 572 &usb_1_hsphy {
667 vdda-pll-supply = <&vreg_l1c>; 573 vdda-pll-supply = <&vreg_l1c>;
668 vdda18-supply = <&vreg_l7c>; 574 vdda18-supply = <&vreg_l7c>;
669 vdda33-supply = <&vreg_l2c>; 575 vdda33-supply = <&vreg_l2c>;
670 576
671 status = "okay"; 577 status = "okay";
672 }; 578 };
673 579
674 &usb_1_qmpphy { 580 &usb_1_qmpphy {
675 vdda-phy-supply = <&vreg_l4c>; 581 vdda-phy-supply = <&vreg_l4c>;
676 vdda-pll-supply = <&vreg_l1c>; 582 vdda-pll-supply = <&vreg_l1c>;
677 583
678 status = "okay"; 584 status = "okay";
679 }; 585 };
680 586
681 &usb_2 { <<
682 status = "okay"; <<
683 }; <<
684 <<
685 &usb_2_hsphy0 { 587 &usb_2_hsphy0 {
686 vdda-pll-supply = <&vreg_l5a>; 588 vdda-pll-supply = <&vreg_l5a>;
687 vdda18-supply = <&vreg_l7g>; 589 vdda18-supply = <&vreg_l7g>;
688 vdda33-supply = <&vreg_l13a>; 590 vdda33-supply = <&vreg_l13a>;
689 591
690 status = "okay"; 592 status = "okay";
691 }; 593 };
692 594
693 &usb_2_hsphy1 { 595 &usb_2_hsphy1 {
694 vdda-pll-supply = <&vreg_l5a>; 596 vdda-pll-supply = <&vreg_l5a>;
695 vdda18-supply = <&vreg_l7g>; 597 vdda18-supply = <&vreg_l7g>;
696 vdda33-supply = <&vreg_l13a>; 598 vdda33-supply = <&vreg_l13a>;
697 599
698 status = "okay"; 600 status = "okay";
699 }; 601 };
700 602
701 &usb_2_hsphy2 { 603 &usb_2_hsphy2 {
702 vdda-pll-supply = <&vreg_l5a>; 604 vdda-pll-supply = <&vreg_l5a>;
703 vdda18-supply = <&vreg_l7g>; 605 vdda18-supply = <&vreg_l7g>;
704 vdda33-supply = <&vreg_l13a>; 606 vdda33-supply = <&vreg_l13a>;
705 607
706 status = "okay"; 608 status = "okay";
707 }; 609 };
708 610
709 &usb_2_hsphy3 { 611 &usb_2_hsphy3 {
710 vdda-pll-supply = <&vreg_l5a>; 612 vdda-pll-supply = <&vreg_l5a>;
711 vdda18-supply = <&vreg_l7g>; 613 vdda18-supply = <&vreg_l7g>;
712 vdda33-supply = <&vreg_l13a>; 614 vdda33-supply = <&vreg_l13a>;
713 615
714 status = "okay"; 616 status = "okay";
715 }; 617 };
716 618
717 &usb_2_qmpphy0 { 619 &usb_2_qmpphy0 {
718 vdda-phy-supply = <&vreg_l3a>; 620 vdda-phy-supply = <&vreg_l3a>;
719 vdda-pll-supply = <&vreg_l5a>; 621 vdda-pll-supply = <&vreg_l5a>;
720 622
721 status = "okay"; 623 status = "okay";
722 }; 624 };
723 625
724 &usb_2_qmpphy1 { 626 &usb_2_qmpphy1 {
725 vdda-phy-supply = <&vreg_l3a>; 627 vdda-phy-supply = <&vreg_l3a>;
726 vdda-pll-supply = <&vreg_l5a>; 628 vdda-pll-supply = <&vreg_l5a>;
727 629
728 status = "okay"; 630 status = "okay";
729 }; 631 };
730 632
731 &xo_board_clk { 633 &xo_board_clk {
732 clock-frequency = <38400000>; 634 clock-frequency = <38400000>;
733 }; 635 };
734 636
735 /* PINCTRL */ 637 /* PINCTRL */
736 638
737 &pmm8540a_gpios { <<
738 max20411_en: max20411-en-state { <<
739 pins = "gpio2"; <<
740 function = "normal"; <<
741 output-enable; <<
742 }; <<
743 }; <<
744 <<
745 &pmm8540c_gpios { <<
746 usb2_en: usb2-en-state { <<
747 pins = "gpio9"; <<
748 function = "normal"; <<
749 qcom,drive-strength = <PMIC_GP <<
750 output-enable; <<
751 power-source = <0>; <<
752 }; <<
753 }; <<
754 <<
755 &pmm8540e_gpios { <<
756 usb3_en: usb3-en-state { <<
757 pins = "gpio5"; <<
758 function = "normal"; <<
759 qcom,drive-strength = <PMIC_GP <<
760 output-enable; <<
761 power-source = <0>; <<
762 }; <<
763 }; <<
764 <<
765 &pmm8540g_gpios { <<
766 usb4_en: usb4-en-state { <<
767 pins = "gpio5"; <<
768 function = "normal"; <<
769 qcom,drive-strength = <PMIC_GP <<
770 output-enable; <<
771 power-source = <0>; <<
772 }; <<
773 <<
774 usb5_en: usb5-en-state { <<
775 pins = "gpio9"; <<
776 function = "normal"; <<
777 qcom,drive-strength = <PMIC_GP <<
778 output-enable; <<
779 power-source = <0>; <<
780 }; <<
781 }; <<
782 <<
783 &tlmm { 639 &tlmm {
784 pcie2a_default: pcie2a-default-state { 640 pcie2a_default: pcie2a-default-state {
785 clkreq-n-pins { 641 clkreq-n-pins {
786 pins = "gpio142"; 642 pins = "gpio142";
787 function = "pcie2a_clk 643 function = "pcie2a_clkreq";
788 drive-strength = <2>; 644 drive-strength = <2>;
789 bias-pull-up; 645 bias-pull-up;
790 }; 646 };
791 647
792 perst-n-pins { 648 perst-n-pins {
793 pins = "gpio143"; 649 pins = "gpio143";
794 function = "gpio"; 650 function = "gpio";
795 drive-strength = <2>; 651 drive-strength = <2>;
796 bias-pull-down; 652 bias-pull-down;
797 }; 653 };
798 654
799 wake-n-pins { 655 wake-n-pins {
800 pins = "gpio145"; 656 pins = "gpio145";
801 function = "gpio"; 657 function = "gpio";
802 drive-strength = <2>; 658 drive-strength = <2>;
803 bias-pull-up; 659 bias-pull-up;
804 }; 660 };
805 }; 661 };
806 662
807 pcie3a_default: pcie3a-default-state { 663 pcie3a_default: pcie3a-default-state {
808 clkreq-n-pins { 664 clkreq-n-pins {
809 pins = "gpio150"; 665 pins = "gpio150";
810 function = "pcie3a_clk 666 function = "pcie3a_clkreq";
811 drive-strength = <2>; 667 drive-strength = <2>;
812 bias-pull-up; 668 bias-pull-up;
813 }; 669 };
814 670
815 perst-n-pins { 671 perst-n-pins {
816 pins = "gpio151"; 672 pins = "gpio151";
817 function = "gpio"; 673 function = "gpio";
818 drive-strength = <2>; 674 drive-strength = <2>;
819 bias-pull-down; 675 bias-pull-down;
820 }; 676 };
821 677
822 wake-n-pins { 678 wake-n-pins {
823 pins = "gpio56"; 679 pins = "gpio56";
824 function = "gpio"; 680 function = "gpio";
825 drive-strength = <2>; 681 drive-strength = <2>;
826 bias-pull-up; 682 bias-pull-up;
827 }; 683 };
828 }; 684 };
829 685
830 pcie3b_default: pcie3b-default-state { 686 pcie3b_default: pcie3b-default-state {
831 clkreq-n-pins { 687 clkreq-n-pins {
832 pins = "gpio152"; 688 pins = "gpio152";
833 function = "pcie3b_clk 689 function = "pcie3b_clkreq";
834 drive-strength = <2>; 690 drive-strength = <2>;
835 bias-pull-up; 691 bias-pull-up;
836 }; 692 };
837 693
838 perst-n-pins { 694 perst-n-pins {
839 pins = "gpio153"; 695 pins = "gpio153";
840 function = "gpio"; 696 function = "gpio";
841 drive-strength = <2>; 697 drive-strength = <2>;
842 bias-pull-down; 698 bias-pull-down;
843 }; 699 };
844 700
845 wake-n-pins { 701 wake-n-pins {
846 pins = "gpio130"; 702 pins = "gpio130";
847 function = "gpio"; 703 function = "gpio";
848 drive-strength = <2>; 704 drive-strength = <2>;
849 bias-pull-up; 705 bias-pull-up;
850 }; 706 };
851 }; 707 };
852 708
853 pcie4_default: pcie4-default-state { 709 pcie4_default: pcie4-default-state {
854 clkreq-n-pins { 710 clkreq-n-pins {
855 pins = "gpio140"; 711 pins = "gpio140";
856 function = "pcie4_clkr 712 function = "pcie4_clkreq";
857 drive-strength = <2>; 713 drive-strength = <2>;
858 bias-pull-up; 714 bias-pull-up;
859 }; 715 };
860 716
861 perst-n-pins { 717 perst-n-pins {
862 pins = "gpio141"; 718 pins = "gpio141";
863 function = "gpio"; 719 function = "gpio";
864 drive-strength = <2>; 720 drive-strength = <2>;
865 bias-pull-down; 721 bias-pull-down;
866 }; 722 };
867 723
868 wake-n-pins { 724 wake-n-pins {
869 pins = "gpio139"; 725 pins = "gpio139";
870 function = "gpio"; 726 function = "gpio";
871 drive-strength = <2>; 727 drive-strength = <2>;
872 bias-pull-up; 728 bias-pull-up;
873 }; 729 };
874 }; <<
875 <<
876 qup1_i2c4_state: qup1-i2c4-state { <<
877 pins = "gpio0", "gpio1"; <<
878 function = "qup12"; <<
879 drive-strength = <2>; <<
880 bias-pull-up; <<
881 }; 730 };
882 }; 731 };
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