1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Copyright (c) 2021, The Linux Foundation. A 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited 4 * Copyright (c) 2022, Linaro Limited
5 */ 5 */
6 6
7 /dts-v1/; 7 /dts-v1/;
8 8
9 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/spmi/spmi.h> 11 #include <dt-bindings/spmi/spmi.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
13 13
14 #include "sa8540p.dtsi" 14 #include "sa8540p.dtsi"
15 #include "sa8540p-pmics.dtsi" 15 #include "sa8540p-pmics.dtsi"
16 16
17 / { 17 / {
18 model = "Qualcomm SA8295P ADP"; 18 model = "Qualcomm SA8295P ADP";
19 compatible = "qcom,sa8295p-adp", "qcom 19 compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
20 20
21 aliases { 21 aliases {
22 serial0 = &uart17; 22 serial0 = &uart17;
23 }; 23 };
24 24
25 chosen { 25 chosen {
26 stdout-path = "serial0:115200n 26 stdout-path = "serial0:115200n8";
27 }; 27 };
28 28
29 dp2-connector { 29 dp2-connector {
30 compatible = "dp-connector"; 30 compatible = "dp-connector";
31 label = "DP2"; 31 label = "DP2";
32 type = "mini"; 32 type = "mini";
33 33
34 hpd-gpios = <&tlmm 20 GPIO_ACT 34 hpd-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
35 35
36 port { 36 port {
37 dp2_connector_in: endp 37 dp2_connector_in: endpoint {
38 remote-endpoin 38 remote-endpoint = <&mdss1_dp0_phy_out>;
39 }; 39 };
40 }; 40 };
41 }; 41 };
42 42
43 dp3-connector { 43 dp3-connector {
44 compatible = "dp-connector"; 44 compatible = "dp-connector";
45 label = "DP3"; 45 label = "DP3";
46 type = "mini"; 46 type = "mini";
47 47
48 hpd-gpios = <&tlmm 45 GPIO_ACT 48 hpd-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
49 49
50 port { 50 port {
51 dp3_connector_in: endp 51 dp3_connector_in: endpoint {
52 remote-endpoin 52 remote-endpoint = <&mdss1_dp1_phy_out>;
53 }; 53 };
54 }; 54 };
55 }; 55 };
56 56
57 edp0-connector { 57 edp0-connector {
58 compatible = "dp-connector"; 58 compatible = "dp-connector";
59 label = "EDP0"; 59 label = "EDP0";
60 type = "mini"; 60 type = "mini";
61 61
62 hpd-gpios = <&tlmm 2 GPIO_ACTI 62 hpd-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
63 63
64 port { 64 port {
65 edp0_connector_in: end 65 edp0_connector_in: endpoint {
66 remote-endpoin 66 remote-endpoint = <&mdss0_dp2_phy_out>;
67 }; 67 };
68 }; 68 };
69 }; 69 };
70 70
71 edp1-connector { 71 edp1-connector {
72 compatible = "dp-connector"; 72 compatible = "dp-connector";
73 label = "EDP1"; 73 label = "EDP1";
74 type = "mini"; 74 type = "mini";
75 75
76 hpd-gpios = <&tlmm 3 GPIO_ACTI 76 hpd-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
77 77
78 port { 78 port {
79 edp1_connector_in: end 79 edp1_connector_in: endpoint {
80 remote-endpoin 80 remote-endpoint = <&mdss0_dp3_phy_out>;
81 }; 81 };
82 }; 82 };
83 }; 83 };
84 84
85 edp2-connector { 85 edp2-connector {
86 compatible = "dp-connector"; 86 compatible = "dp-connector";
87 label = "EDP2"; 87 label = "EDP2";
88 type = "mini"; 88 type = "mini";
89 89
90 hpd-gpios = <&tlmm 7 GPIO_ACTI 90 hpd-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
91 91
92 port { 92 port {
93 edp2_connector_in: end 93 edp2_connector_in: endpoint {
94 remote-endpoin 94 remote-endpoint = <&mdss1_dp2_phy_out>;
95 }; 95 };
96 }; 96 };
97 }; 97 };
98 98
99 edp3-connector { 99 edp3-connector {
100 compatible = "dp-connector"; 100 compatible = "dp-connector";
101 label = "EDP3"; 101 label = "EDP3";
102 type = "mini"; 102 type = "mini";
103 103
104 hpd-gpios = <&tlmm 6 GPIO_ACTI 104 hpd-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
105 105
106 port { 106 port {
107 edp3_connector_in: end 107 edp3_connector_in: endpoint {
108 remote-endpoin 108 remote-endpoint = <&mdss1_dp3_phy_out>;
109 }; 109 };
110 }; 110 };
111 }; 111 };
112 112
113 regulator-usb2-vbus { 113 regulator-usb2-vbus {
114 compatible = "regulator-fixed" 114 compatible = "regulator-fixed";
115 regulator-name = "USB2_VBUS"; 115 regulator-name = "USB2_VBUS";
116 gpio = <&pmm8540c_gpios 9 GPIO 116 gpio = <&pmm8540c_gpios 9 GPIO_ACTIVE_HIGH>;
117 pinctrl-0 = <&usb2_en>; 117 pinctrl-0 = <&usb2_en>;
118 pinctrl-names = "default"; 118 pinctrl-names = "default";
119 enable-active-high; 119 enable-active-high;
120 regulator-always-on; 120 regulator-always-on;
121 }; 121 };
122 122
123 regulator-usb3-vbus { 123 regulator-usb3-vbus {
124 compatible = "regulator-fixed" 124 compatible = "regulator-fixed";
125 regulator-name = "USB3_VBUS"; 125 regulator-name = "USB3_VBUS";
126 gpio = <&pmm8540e_gpios 5 GPIO 126 gpio = <&pmm8540e_gpios 5 GPIO_ACTIVE_HIGH>;
127 pinctrl-0 = <&usb3_en>; 127 pinctrl-0 = <&usb3_en>;
128 pinctrl-names = "default"; 128 pinctrl-names = "default";
129 enable-active-high; 129 enable-active-high;
130 regulator-always-on; 130 regulator-always-on;
131 }; 131 };
132 132
133 regulator-usb4-vbus { 133 regulator-usb4-vbus {
134 compatible = "regulator-fixed" 134 compatible = "regulator-fixed";
135 regulator-name = "USB4_VBUS"; 135 regulator-name = "USB4_VBUS";
136 gpio = <&pmm8540g_gpios 5 GPIO 136 gpio = <&pmm8540g_gpios 5 GPIO_ACTIVE_HIGH>;
137 pinctrl-0 = <&usb4_en>; 137 pinctrl-0 = <&usb4_en>;
138 pinctrl-names = "default"; 138 pinctrl-names = "default";
139 enable-active-high; 139 enable-active-high;
140 regulator-always-on; 140 regulator-always-on;
141 }; 141 };
142 142
143 regulator-usb5-vbus { 143 regulator-usb5-vbus {
144 compatible = "regulator-fixed" 144 compatible = "regulator-fixed";
145 regulator-name = "USB5_VBUS"; 145 regulator-name = "USB5_VBUS";
146 gpio = <&pmm8540g_gpios 9 GPIO 146 gpio = <&pmm8540g_gpios 9 GPIO_ACTIVE_HIGH>;
147 pinctrl-0 = <&usb5_en>; 147 pinctrl-0 = <&usb5_en>;
148 pinctrl-names = "default"; 148 pinctrl-names = "default";
149 enable-active-high; 149 enable-active-high;
150 regulator-always-on; 150 regulator-always-on;
151 }; 151 };
152 152
153 reserved-memory { 153 reserved-memory {
154 gpu_mem: gpu-mem@8bf00000 { 154 gpu_mem: gpu-mem@8bf00000 {
155 reg = <0 0x8bf00000 0 155 reg = <0 0x8bf00000 0 0x2000>;
156 no-map; 156 no-map;
157 }; 157 };
158 }; 158 };
159 }; 159 };
160 160
161 &apps_rsc { 161 &apps_rsc {
162 regulators-0 { 162 regulators-0 {
163 compatible = "qcom,pm8150-rpmh 163 compatible = "qcom,pm8150-rpmh-regulators";
164 qcom,pmic-id = "a"; 164 qcom,pmic-id = "a";
165 165
166 vreg_l3a: ldo3 { 166 vreg_l3a: ldo3 {
167 regulator-name = "vreg 167 regulator-name = "vreg_l3a";
168 regulator-min-microvol 168 regulator-min-microvolt = <1200000>;
169 regulator-max-microvol 169 regulator-max-microvolt = <1208000>;
170 regulator-initial-mode 170 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
171 }; 171 };
172 172
173 vreg_l5a: ldo5 { 173 vreg_l5a: ldo5 {
174 regulator-name = "vreg 174 regulator-name = "vreg_l5a";
175 regulator-min-microvol 175 regulator-min-microvolt = <912000>;
176 regulator-max-microvol 176 regulator-max-microvolt = <912000>;
177 regulator-initial-mode 177 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
178 }; 178 };
179 179
180 vreg_l7a: ldo7 { 180 vreg_l7a: ldo7 {
181 regulator-name = "vreg 181 regulator-name = "vreg_l7a";
182 regulator-min-microvol 182 regulator-min-microvolt = <1800000>;
183 regulator-max-microvol 183 regulator-max-microvolt = <1800000>;
184 regulator-initial-mode 184 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
185 }; 185 };
186 186
187 vreg_l13a: ldo13 { 187 vreg_l13a: ldo13 {
188 regulator-name = "vreg 188 regulator-name = "vreg_l13a";
189 regulator-min-microvol 189 regulator-min-microvolt = <3072000>;
190 regulator-max-microvol 190 regulator-max-microvolt = <3072000>;
191 regulator-initial-mode 191 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
192 }; 192 };
193 193
194 vreg_l11a: ldo11 { 194 vreg_l11a: ldo11 {
195 regulator-name = "vreg 195 regulator-name = "vreg_l11a";
196 regulator-min-microvol 196 regulator-min-microvolt = <880000>;
197 regulator-max-microvol 197 regulator-max-microvolt = <880000>;
198 regulator-initial-mode 198 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199 }; 199 };
200 }; 200 };
201 201
202 regulators-1 { 202 regulators-1 {
203 compatible = "qcom,pm8150-rpmh 203 compatible = "qcom,pm8150-rpmh-regulators";
204 qcom,pmic-id = "c"; 204 qcom,pmic-id = "c";
205 205
206 vreg_l1c: ldo1 { 206 vreg_l1c: ldo1 {
207 regulator-name = "vreg 207 regulator-name = "vreg_l1c";
208 regulator-min-microvol 208 regulator-min-microvolt = <912000>;
209 regulator-max-microvol 209 regulator-max-microvolt = <912000>;
210 regulator-initial-mode 210 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
211 }; 211 };
212 212
213 vreg_l2c: ldo2 { 213 vreg_l2c: ldo2 {
214 regulator-name = "vreg 214 regulator-name = "vreg_l2c";
215 regulator-min-microvol 215 regulator-min-microvolt = <3072000>;
216 regulator-max-microvol 216 regulator-max-microvolt = <3072000>;
217 regulator-initial-mode 217 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
218 }; 218 };
219 219
220 vreg_l3c: ldo3 { 220 vreg_l3c: ldo3 {
221 regulator-name = "vreg 221 regulator-name = "vreg_l3c";
222 regulator-min-microvol 222 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 223 regulator-max-microvolt = <1200000>;
224 regulator-initial-mode 224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 regulator-allow-set-lo 225 regulator-allow-set-load;
226 regulator-allowed-mode 226 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
227 227 RPMH_REGULATOR_MODE_HPM>;
228 }; 228 };
229 229
230 vreg_l4c: ldo4 { 230 vreg_l4c: ldo4 {
231 regulator-name = "vreg 231 regulator-name = "vreg_l4c";
232 regulator-min-microvol 232 regulator-min-microvolt = <1200000>;
233 regulator-max-microvol 233 regulator-max-microvolt = <1208000>;
234 regulator-initial-mode 234 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
235 }; 235 };
236 236
237 vreg_l6c: ldo6 { 237 vreg_l6c: ldo6 {
238 regulator-name = "vreg 238 regulator-name = "vreg_l6c";
239 regulator-min-microvol 239 regulator-min-microvolt = <1200000>;
240 regulator-max-microvol 240 regulator-max-microvolt = <1200000>;
241 regulator-initial-mode 241 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
242 regulator-allow-set-lo 242 regulator-allow-set-load;
243 regulator-allowed-mode 243 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
244 244 RPMH_REGULATOR_MODE_HPM>;
245 }; 245 };
246 246
247 vreg_l7c: ldo7 { 247 vreg_l7c: ldo7 {
248 regulator-name = "vreg 248 regulator-name = "vreg_l7c";
249 regulator-min-microvol 249 regulator-min-microvolt = <1800000>;
250 regulator-max-microvol 250 regulator-max-microvolt = <1800000>;
251 regulator-initial-mode 251 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
252 }; 252 };
253 253
254 vreg_l10c: ldo10 { 254 vreg_l10c: ldo10 {
255 regulator-name = "vreg 255 regulator-name = "vreg_l10c";
256 regulator-min-microvol 256 regulator-min-microvolt = <2504000>;
257 regulator-max-microvol 257 regulator-max-microvolt = <2504000>;
258 regulator-initial-mode 258 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259 regulator-allow-set-lo 259 regulator-allow-set-load;
260 regulator-allowed-mode 260 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
261 261 RPMH_REGULATOR_MODE_HPM>;
262 }; 262 };
263 263
264 vreg_l17c: ldo17 { 264 vreg_l17c: ldo17 {
265 regulator-name = "vreg 265 regulator-name = "vreg_l17c";
266 regulator-min-microvol 266 regulator-min-microvolt = <2504000>;
267 regulator-max-microvol 267 regulator-max-microvolt = <2504000>;
268 regulator-initial-mode 268 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269 regulator-allow-set-lo 269 regulator-allow-set-load;
270 regulator-allowed-mode 270 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
271 271 RPMH_REGULATOR_MODE_HPM>;
272 }; 272 };
273 }; 273 };
274 274
275 regulators-2 { 275 regulators-2 {
276 compatible = "qcom,pm8150-rpmh 276 compatible = "qcom,pm8150-rpmh-regulators";
277 qcom,pmic-id = "g"; 277 qcom,pmic-id = "g";
278 278
279 vreg_l3g: ldo3 { 279 vreg_l3g: ldo3 {
280 regulator-name = "vreg 280 regulator-name = "vreg_l3g";
281 regulator-min-microvol 281 regulator-min-microvolt = <1200000>;
282 regulator-max-microvol 282 regulator-max-microvolt = <1200000>;
283 regulator-initial-mode 283 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
284 }; 284 };
285 285
286 vreg_l7g: ldo7 { 286 vreg_l7g: ldo7 {
287 regulator-name = "vreg 287 regulator-name = "vreg_l7g";
288 regulator-min-microvol 288 regulator-min-microvolt = <1800000>;
289 regulator-max-microvol 289 regulator-max-microvolt = <1800000>;
290 regulator-initial-mode 290 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
291 }; 291 };
292 292
293 vreg_l8g: ldo8 { 293 vreg_l8g: ldo8 {
294 regulator-name = "vreg 294 regulator-name = "vreg_l8g";
295 regulator-min-microvol 295 regulator-min-microvolt = <912000>;
296 regulator-max-microvol 296 regulator-max-microvolt = <912000>;
297 regulator-initial-mode 297 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
298 }; 298 };
299 299
300 vreg_l11g: ldo11 { 300 vreg_l11g: ldo11 {
301 regulator-name = "vreg 301 regulator-name = "vreg_l11g";
302 regulator-min-microvol 302 regulator-min-microvolt = <912000>;
303 regulator-max-microvol 303 regulator-max-microvolt = <912000>;
304 regulator-initial-mode 304 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305 }; 305 };
306 }; 306 };
307 }; 307 };
308 308
309 &dispcc0 { 309 &dispcc0 {
310 status = "okay"; 310 status = "okay";
311 }; 311 };
312 312
313 &dispcc1 { 313 &dispcc1 {
314 status = "okay"; 314 status = "okay";
315 }; 315 };
316 316
317 &i2c12 { 317 &i2c12 {
318 pinctrl-0 = <&qup1_i2c4_state>; 318 pinctrl-0 = <&qup1_i2c4_state>;
319 pinctrl-names = "default"; 319 pinctrl-names = "default";
320 320
321 status = "okay"; 321 status = "okay";
322 322
323 vdd_gfx: regulator@39 { 323 vdd_gfx: regulator@39 {
324 compatible = "maxim,max20411"; 324 compatible = "maxim,max20411";
325 reg = <0x39>; 325 reg = <0x39>;
326 326
327 regulator-min-microvolt = <800 327 regulator-min-microvolt = <800000>;
328 regulator-max-microvolt = <800 328 regulator-max-microvolt = <800000>;
329 329
330 enable-gpios = <&pmm8540a_gpio 330 enable-gpios = <&pmm8540a_gpios 2 GPIO_ACTIVE_HIGH>;
331 331
332 pinctrl-0 = <&max20411_en>; 332 pinctrl-0 = <&max20411_en>;
333 pinctrl-names = "default"; 333 pinctrl-names = "default";
334 }; 334 };
335 }; 335 };
336 336
337 &gpucc { 337 &gpucc {
338 vdd-gfx-supply = <&vdd_gfx>; 338 vdd-gfx-supply = <&vdd_gfx>;
339 status = "okay"; 339 status = "okay";
340 }; 340 };
341 341
342 &gmu { 342 &gmu {
343 status = "okay"; 343 status = "okay";
344 }; 344 };
345 345
346 &gpu { 346 &gpu {
347 status = "okay"; 347 status = "okay";
348 348
349 zap-shader { 349 zap-shader {
350 memory-region = <&gpu_mem>; 350 memory-region = <&gpu_mem>;
351 firmware-name = "qcom/sa8295p/ 351 firmware-name = "qcom/sa8295p/a690_zap.mbn";
352 }; 352 };
353 }; 353 };
354 354
355 &gpu_smmu { 355 &gpu_smmu {
356 status = "okay"; 356 status = "okay";
357 }; 357 };
358 358
359 &mdss0 { 359 &mdss0 {
360 status = "okay"; 360 status = "okay";
361 }; 361 };
362 362
363 &mdss0_dp2 { 363 &mdss0_dp2 {
364 data-lanes = <0 1 2 3>; 364 data-lanes = <0 1 2 3>;
365 365
366 status = "okay"; 366 status = "okay";
367 367
368 ports { 368 ports {
369 port@1 { 369 port@1 {
370 reg = <1>; 370 reg = <1>;
371 mdss0_dp2_phy_out: end 371 mdss0_dp2_phy_out: endpoint {
372 remote-endpoin 372 remote-endpoint = <&edp0_connector_in>;
373 }; 373 };
374 }; 374 };
375 }; 375 };
376 }; 376 };
377 377
378 &mdss0_dp2_phy { 378 &mdss0_dp2_phy {
379 vdda-phy-supply = <&vreg_l8g>; 379 vdda-phy-supply = <&vreg_l8g>;
380 vdda-pll-supply = <&vreg_l3g>; 380 vdda-pll-supply = <&vreg_l3g>;
381 381
382 status = "okay"; 382 status = "okay";
383 }; 383 };
384 384
385 &mdss0_dp3 { 385 &mdss0_dp3 {
386 data-lanes = <0 1 2 3>; 386 data-lanes = <0 1 2 3>;
387 387
388 status = "okay"; 388 status = "okay";
389 389
390 ports { 390 ports {
391 port@1 { 391 port@1 {
392 reg = <1>; 392 reg = <1>;
393 mdss0_dp3_phy_out: end 393 mdss0_dp3_phy_out: endpoint {
394 remote-endpoin 394 remote-endpoint = <&edp1_connector_in>;
395 }; 395 };
396 }; 396 };
397 }; 397 };
398 }; 398 };
399 399
400 &mdss0_dp3_phy { 400 &mdss0_dp3_phy {
401 vdda-phy-supply = <&vreg_l8g>; 401 vdda-phy-supply = <&vreg_l8g>;
402 vdda-pll-supply = <&vreg_l3g>; 402 vdda-pll-supply = <&vreg_l3g>;
403 403
404 status = "okay"; 404 status = "okay";
405 }; 405 };
406 406
407 &mdss1 { 407 &mdss1 {
408 status = "okay"; 408 status = "okay";
409 }; 409 };
410 410
411 &mdss1_dp0 { 411 &mdss1_dp0 {
412 data-lanes = <0 1 2 3>; 412 data-lanes = <0 1 2 3>;
413 413
414 status = "okay"; 414 status = "okay";
415 415
416 ports { 416 ports {
417 port@1 { 417 port@1 {
418 reg = <1>; 418 reg = <1>;
419 mdss1_dp0_phy_out: end 419 mdss1_dp0_phy_out: endpoint {
420 remote-endpoin 420 remote-endpoint = <&dp2_connector_in>;
421 }; 421 };
422 }; 422 };
423 }; 423 };
424 }; 424 };
425 425
426 &mdss1_dp0_phy { 426 &mdss1_dp0_phy {
427 vdda-phy-supply = <&vreg_l11g>; 427 vdda-phy-supply = <&vreg_l11g>;
428 vdda-pll-supply = <&vreg_l3g>; 428 vdda-pll-supply = <&vreg_l3g>;
429 429
430 status = "okay"; 430 status = "okay";
431 }; 431 };
432 432
433 &mdss1_dp1 { 433 &mdss1_dp1 {
434 data-lanes = <0 1 2 3>; 434 data-lanes = <0 1 2 3>;
435 435
436 status = "okay"; 436 status = "okay";
437 437
438 ports { 438 ports {
439 port@1 { 439 port@1 {
440 reg = <1>; 440 reg = <1>;
441 mdss1_dp1_phy_out: end 441 mdss1_dp1_phy_out: endpoint {
442 remote-endpoin 442 remote-endpoint = <&dp3_connector_in>;
443 }; 443 };
444 }; 444 };
445 }; 445 };
446 }; 446 };
447 447
448 &mdss1_dp1_phy { 448 &mdss1_dp1_phy {
449 vdda-phy-supply = <&vreg_l11g>; 449 vdda-phy-supply = <&vreg_l11g>;
450 vdda-pll-supply = <&vreg_l3g>; 450 vdda-pll-supply = <&vreg_l3g>;
451 451
452 status = "okay"; 452 status = "okay";
453 }; 453 };
454 454
455 &mdss1_dp2 { 455 &mdss1_dp2 {
456 data-lanes = <0 1 2 3>; 456 data-lanes = <0 1 2 3>;
457 457
458 status = "okay"; 458 status = "okay";
459 459
460 ports { 460 ports {
461 port@1 { 461 port@1 {
462 reg = <1>; 462 reg = <1>;
463 mdss1_dp2_phy_out: end 463 mdss1_dp2_phy_out: endpoint {
464 remote-endpoin 464 remote-endpoint = <&edp2_connector_in>;
465 }; 465 };
466 }; 466 };
467 }; 467 };
468 }; 468 };
469 469
470 &mdss1_dp2_phy { 470 &mdss1_dp2_phy {
471 vdda-phy-supply = <&vreg_l11g>; 471 vdda-phy-supply = <&vreg_l11g>;
472 vdda-pll-supply = <&vreg_l3g>; 472 vdda-pll-supply = <&vreg_l3g>;
473 473
474 status = "okay"; 474 status = "okay";
475 }; 475 };
476 476
477 &mdss1_dp3 { 477 &mdss1_dp3 {
478 data-lanes = <0 1 2 3>; 478 data-lanes = <0 1 2 3>;
479 479
480 status = "okay"; 480 status = "okay";
481 481
482 ports { 482 ports {
483 port@1 { 483 port@1 {
484 reg = <1>; 484 reg = <1>;
485 mdss1_dp3_phy_out: end 485 mdss1_dp3_phy_out: endpoint {
486 remote-endpoin 486 remote-endpoint = <&edp3_connector_in>;
487 }; 487 };
488 }; 488 };
489 }; 489 };
490 }; 490 };
491 491
492 &mdss1_dp3_phy { 492 &mdss1_dp3_phy {
493 vdda-phy-supply = <&vreg_l11g>; 493 vdda-phy-supply = <&vreg_l11g>;
494 vdda-pll-supply = <&vreg_l3g>; 494 vdda-pll-supply = <&vreg_l3g>;
495 495
496 status = "okay"; 496 status = "okay";
497 }; 497 };
498 498
499 &pcie2a { 499 &pcie2a {
500 perst-gpios = <&tlmm 143 GPIO_ACTIVE_L 500 perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
501 wake-gpios = <&tlmm 145 GPIO_ACTIVE_LO 501 wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
502 502
503 pinctrl-names = "default"; 503 pinctrl-names = "default";
504 pinctrl-0 = <&pcie2a_default>; 504 pinctrl-0 = <&pcie2a_default>;
505 505
506 status = "okay"; 506 status = "okay";
507 }; 507 };
508 508
509 &pcie2a_phy { 509 &pcie2a_phy {
510 vdda-phy-supply = <&vreg_l11a>; 510 vdda-phy-supply = <&vreg_l11a>;
511 vdda-pll-supply = <&vreg_l3a>; 511 vdda-pll-supply = <&vreg_l3a>;
512 512
513 status = "okay"; 513 status = "okay";
514 }; 514 };
515 515
516 &pcie3a { 516 &pcie3a {
517 num-lanes = <2>; 517 num-lanes = <2>;
518 518
519 perst-gpios = <&tlmm 151 GPIO_ACTIVE_L 519 perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
520 wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW 520 wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW>;
521 521
522 pinctrl-names = "default"; 522 pinctrl-names = "default";
523 pinctrl-0 = <&pcie3a_default>; 523 pinctrl-0 = <&pcie3a_default>;
524 524
525 status = "okay"; 525 status = "okay";
526 }; 526 };
527 527
528 &pcie3a_phy { 528 &pcie3a_phy {
529 vdda-phy-supply = <&vreg_l11a>; 529 vdda-phy-supply = <&vreg_l11a>;
530 vdda-pll-supply = <&vreg_l3a>; 530 vdda-pll-supply = <&vreg_l3a>;
531 531
532 status = "okay"; 532 status = "okay";
533 }; 533 };
534 534
535 &pcie3b { 535 &pcie3b {
536 perst-gpios = <&tlmm 153 GPIO_ACTIVE_L 536 perst-gpios = <&tlmm 153 GPIO_ACTIVE_LOW>;
537 wake-gpios = <&tlmm 130 GPIO_ACTIVE_LO 537 wake-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
538 538
539 pinctrl-names = "default"; 539 pinctrl-names = "default";
540 pinctrl-0 = <&pcie3b_default>; 540 pinctrl-0 = <&pcie3b_default>;
541 541
542 status = "okay"; 542 status = "okay";
543 }; 543 };
544 544
545 &pcie3b_phy { 545 &pcie3b_phy {
546 vdda-phy-supply = <&vreg_l11a>; 546 vdda-phy-supply = <&vreg_l11a>;
547 vdda-pll-supply = <&vreg_l3a>; 547 vdda-pll-supply = <&vreg_l3a>;
548 548
549 status = "okay"; 549 status = "okay";
550 }; 550 };
551 551
552 &pcie4 { 552 &pcie4 {
553 perst-gpios = <&tlmm 141 GPIO_ACTIVE_L 553 perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
554 wake-gpios = <&tlmm 139 GPIO_ACTIVE_LO 554 wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
555 555
556 pinctrl-names = "default"; 556 pinctrl-names = "default";
557 pinctrl-0 = <&pcie4_default>; 557 pinctrl-0 = <&pcie4_default>;
558 558
559 status = "okay"; 559 status = "okay";
560 }; 560 };
561 561
562 &pcie4_phy { 562 &pcie4_phy {
563 vdda-phy-supply = <&vreg_l11a>; 563 vdda-phy-supply = <&vreg_l11a>;
564 vdda-pll-supply = <&vreg_l3a>; 564 vdda-pll-supply = <&vreg_l3a>;
565 565
566 status = "okay"; 566 status = "okay";
567 }; 567 };
568 568
569 &qup1 { 569 &qup1 {
570 status = "okay"; 570 status = "okay";
571 }; 571 };
572 572
573 &qup2 { 573 &qup2 {
574 status = "okay"; 574 status = "okay";
575 }; 575 };
576 576
577 &remoteproc_adsp { 577 &remoteproc_adsp {
578 firmware-name = "qcom/sa8540p/adsp.mbn 578 firmware-name = "qcom/sa8540p/adsp.mbn";
579 status = "okay"; 579 status = "okay";
580 }; 580 };
581 581
582 &remoteproc_nsp0 { 582 &remoteproc_nsp0 {
583 firmware-name = "qcom/sa8540p/cdsp.mbn 583 firmware-name = "qcom/sa8540p/cdsp.mbn";
584 status = "okay"; 584 status = "okay";
585 }; 585 };
586 586
587 &remoteproc_nsp1 { 587 &remoteproc_nsp1 {
588 firmware-name = "qcom/sa8540p/cdsp1.mb 588 firmware-name = "qcom/sa8540p/cdsp1.mbn";
589 status = "okay"; 589 status = "okay";
590 }; 590 };
591 591
592 &uart17 { 592 &uart17 {
593 compatible = "qcom,geni-debug-uart"; 593 compatible = "qcom,geni-debug-uart";
594 status = "okay"; 594 status = "okay";
595 }; 595 };
596 596
597 &ufs_mem_hc { 597 &ufs_mem_hc {
598 reset-gpios = <&tlmm 228 GPIO_ACTIVE_L 598 reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
599 599
600 vcc-supply = <&vreg_l17c>; 600 vcc-supply = <&vreg_l17c>;
601 vcc-max-microamp = <800000>; 601 vcc-max-microamp = <800000>;
602 vccq-supply = <&vreg_l6c>; 602 vccq-supply = <&vreg_l6c>;
603 vccq-max-microamp = <900000>; 603 vccq-max-microamp = <900000>;
604 604
605 status = "okay"; 605 status = "okay";
606 }; 606 };
607 607
608 &ufs_mem_phy { 608 &ufs_mem_phy {
609 vdda-phy-supply = <&vreg_l8g>; 609 vdda-phy-supply = <&vreg_l8g>;
610 vdda-pll-supply = <&vreg_l3g>; 610 vdda-pll-supply = <&vreg_l3g>;
611 611
612 status = "okay"; 612 status = "okay";
613 }; 613 };
614 614
615 &ufs_card_hc { 615 &ufs_card_hc {
616 reset-gpios = <&tlmm 229 GPIO_ACTIVE_L 616 reset-gpios = <&tlmm 229 GPIO_ACTIVE_LOW>;
617 617
618 vcc-supply = <&vreg_l10c>; 618 vcc-supply = <&vreg_l10c>;
619 vcc-max-microamp = <800000>; 619 vcc-max-microamp = <800000>;
620 vccq-supply = <&vreg_l3c>; 620 vccq-supply = <&vreg_l3c>;
621 vccq-max-microamp = <900000>; 621 vccq-max-microamp = <900000>;
622 622
623 status = "okay"; 623 status = "okay";
624 }; 624 };
625 625
626 &ufs_card_phy { 626 &ufs_card_phy {
627 vdda-phy-supply = <&vreg_l8g>; 627 vdda-phy-supply = <&vreg_l8g>;
628 vdda-pll-supply = <&vreg_l3g>; 628 vdda-pll-supply = <&vreg_l3g>;
629 629
630 status = "okay"; 630 status = "okay";
631 }; 631 };
632 632
633 &usb_0 { 633 &usb_0 {
634 status = "okay"; 634 status = "okay";
635 }; 635 };
636 636
637 &usb_0_dwc3 { 637 &usb_0_dwc3 {
638 /* TODO: Define USB-C connector proper 638 /* TODO: Define USB-C connector properly */
639 dr_mode = "peripheral"; 639 dr_mode = "peripheral";
640 }; 640 };
641 641
642 &usb_0_hsphy { 642 &usb_0_hsphy {
643 vdda-pll-supply = <&vreg_l5a>; 643 vdda-pll-supply = <&vreg_l5a>;
644 vdda18-supply = <&vreg_l7a>; 644 vdda18-supply = <&vreg_l7a>;
645 vdda33-supply = <&vreg_l13a>; 645 vdda33-supply = <&vreg_l13a>;
646 646
647 status = "okay"; 647 status = "okay";
648 }; 648 };
649 649
650 &usb_0_qmpphy { 650 &usb_0_qmpphy {
651 vdda-phy-supply = <&vreg_l3a>; 651 vdda-phy-supply = <&vreg_l3a>;
652 vdda-pll-supply = <&vreg_l5a>; 652 vdda-pll-supply = <&vreg_l5a>;
653 653
654 status = "okay"; 654 status = "okay";
655 }; 655 };
656 656
657 &usb_1 { 657 &usb_1 {
658 status = "okay"; 658 status = "okay";
659 }; 659 };
660 660
661 &usb_1_dwc3 { 661 &usb_1_dwc3 {
662 /* TODO: Define USB-C connector proper 662 /* TODO: Define USB-C connector properly */
663 dr_mode = "host"; 663 dr_mode = "host";
664 }; 664 };
665 665
666 &usb_1_hsphy { 666 &usb_1_hsphy {
667 vdda-pll-supply = <&vreg_l1c>; 667 vdda-pll-supply = <&vreg_l1c>;
668 vdda18-supply = <&vreg_l7c>; 668 vdda18-supply = <&vreg_l7c>;
669 vdda33-supply = <&vreg_l2c>; 669 vdda33-supply = <&vreg_l2c>;
670 670
671 status = "okay"; 671 status = "okay";
672 }; 672 };
673 673
674 &usb_1_qmpphy { 674 &usb_1_qmpphy {
675 vdda-phy-supply = <&vreg_l4c>; 675 vdda-phy-supply = <&vreg_l4c>;
676 vdda-pll-supply = <&vreg_l1c>; 676 vdda-pll-supply = <&vreg_l1c>;
677 677
678 status = "okay"; 678 status = "okay";
679 }; 679 };
680 680
681 &usb_2 { 681 &usb_2 {
682 status = "okay"; 682 status = "okay";
683 }; 683 };
684 684
685 &usb_2_hsphy0 { 685 &usb_2_hsphy0 {
686 vdda-pll-supply = <&vreg_l5a>; 686 vdda-pll-supply = <&vreg_l5a>;
687 vdda18-supply = <&vreg_l7g>; 687 vdda18-supply = <&vreg_l7g>;
688 vdda33-supply = <&vreg_l13a>; 688 vdda33-supply = <&vreg_l13a>;
689 689
690 status = "okay"; 690 status = "okay";
691 }; 691 };
692 692
693 &usb_2_hsphy1 { 693 &usb_2_hsphy1 {
694 vdda-pll-supply = <&vreg_l5a>; 694 vdda-pll-supply = <&vreg_l5a>;
695 vdda18-supply = <&vreg_l7g>; 695 vdda18-supply = <&vreg_l7g>;
696 vdda33-supply = <&vreg_l13a>; 696 vdda33-supply = <&vreg_l13a>;
697 697
698 status = "okay"; 698 status = "okay";
699 }; 699 };
700 700
701 &usb_2_hsphy2 { 701 &usb_2_hsphy2 {
702 vdda-pll-supply = <&vreg_l5a>; 702 vdda-pll-supply = <&vreg_l5a>;
703 vdda18-supply = <&vreg_l7g>; 703 vdda18-supply = <&vreg_l7g>;
704 vdda33-supply = <&vreg_l13a>; 704 vdda33-supply = <&vreg_l13a>;
705 705
706 status = "okay"; 706 status = "okay";
707 }; 707 };
708 708
709 &usb_2_hsphy3 { 709 &usb_2_hsphy3 {
710 vdda-pll-supply = <&vreg_l5a>; 710 vdda-pll-supply = <&vreg_l5a>;
711 vdda18-supply = <&vreg_l7g>; 711 vdda18-supply = <&vreg_l7g>;
712 vdda33-supply = <&vreg_l13a>; 712 vdda33-supply = <&vreg_l13a>;
713 713
714 status = "okay"; 714 status = "okay";
715 }; 715 };
716 716
717 &usb_2_qmpphy0 { 717 &usb_2_qmpphy0 {
718 vdda-phy-supply = <&vreg_l3a>; 718 vdda-phy-supply = <&vreg_l3a>;
719 vdda-pll-supply = <&vreg_l5a>; 719 vdda-pll-supply = <&vreg_l5a>;
720 720
721 status = "okay"; 721 status = "okay";
722 }; 722 };
723 723
724 &usb_2_qmpphy1 { 724 &usb_2_qmpphy1 {
725 vdda-phy-supply = <&vreg_l3a>; 725 vdda-phy-supply = <&vreg_l3a>;
726 vdda-pll-supply = <&vreg_l5a>; 726 vdda-pll-supply = <&vreg_l5a>;
727 727
728 status = "okay"; 728 status = "okay";
729 }; 729 };
730 730
731 &xo_board_clk { 731 &xo_board_clk {
732 clock-frequency = <38400000>; 732 clock-frequency = <38400000>;
733 }; 733 };
734 734
735 /* PINCTRL */ 735 /* PINCTRL */
736 736
737 &pmm8540a_gpios { 737 &pmm8540a_gpios {
738 max20411_en: max20411-en-state { 738 max20411_en: max20411-en-state {
739 pins = "gpio2"; 739 pins = "gpio2";
740 function = "normal"; 740 function = "normal";
741 output-enable; 741 output-enable;
742 }; 742 };
743 }; 743 };
744 744
745 &pmm8540c_gpios { 745 &pmm8540c_gpios {
746 usb2_en: usb2-en-state { 746 usb2_en: usb2-en-state {
747 pins = "gpio9"; 747 pins = "gpio9";
748 function = "normal"; 748 function = "normal";
749 qcom,drive-strength = <PMIC_GP 749 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
750 output-enable; 750 output-enable;
751 power-source = <0>; 751 power-source = <0>;
752 }; 752 };
753 }; 753 };
754 754
755 &pmm8540e_gpios { 755 &pmm8540e_gpios {
756 usb3_en: usb3-en-state { 756 usb3_en: usb3-en-state {
757 pins = "gpio5"; 757 pins = "gpio5";
758 function = "normal"; 758 function = "normal";
759 qcom,drive-strength = <PMIC_GP 759 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
760 output-enable; 760 output-enable;
761 power-source = <0>; 761 power-source = <0>;
762 }; 762 };
763 }; 763 };
764 764
765 &pmm8540g_gpios { 765 &pmm8540g_gpios {
766 usb4_en: usb4-en-state { 766 usb4_en: usb4-en-state {
767 pins = "gpio5"; 767 pins = "gpio5";
768 function = "normal"; 768 function = "normal";
769 qcom,drive-strength = <PMIC_GP 769 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
770 output-enable; 770 output-enable;
771 power-source = <0>; 771 power-source = <0>;
772 }; 772 };
773 773
774 usb5_en: usb5-en-state { 774 usb5_en: usb5-en-state {
775 pins = "gpio9"; 775 pins = "gpio9";
776 function = "normal"; 776 function = "normal";
777 qcom,drive-strength = <PMIC_GP 777 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
778 output-enable; 778 output-enable;
779 power-source = <0>; 779 power-source = <0>;
780 }; 780 };
781 }; 781 };
782 782
783 &tlmm { 783 &tlmm {
784 pcie2a_default: pcie2a-default-state { 784 pcie2a_default: pcie2a-default-state {
785 clkreq-n-pins { 785 clkreq-n-pins {
786 pins = "gpio142"; 786 pins = "gpio142";
787 function = "pcie2a_clk 787 function = "pcie2a_clkreq";
788 drive-strength = <2>; 788 drive-strength = <2>;
789 bias-pull-up; 789 bias-pull-up;
790 }; 790 };
791 791
792 perst-n-pins { 792 perst-n-pins {
793 pins = "gpio143"; 793 pins = "gpio143";
794 function = "gpio"; 794 function = "gpio";
795 drive-strength = <2>; 795 drive-strength = <2>;
796 bias-pull-down; 796 bias-pull-down;
797 }; 797 };
798 798
799 wake-n-pins { 799 wake-n-pins {
800 pins = "gpio145"; 800 pins = "gpio145";
801 function = "gpio"; 801 function = "gpio";
802 drive-strength = <2>; 802 drive-strength = <2>;
803 bias-pull-up; 803 bias-pull-up;
804 }; 804 };
805 }; 805 };
806 806
807 pcie3a_default: pcie3a-default-state { 807 pcie3a_default: pcie3a-default-state {
808 clkreq-n-pins { 808 clkreq-n-pins {
809 pins = "gpio150"; 809 pins = "gpio150";
810 function = "pcie3a_clk 810 function = "pcie3a_clkreq";
811 drive-strength = <2>; 811 drive-strength = <2>;
812 bias-pull-up; 812 bias-pull-up;
813 }; 813 };
814 814
815 perst-n-pins { 815 perst-n-pins {
816 pins = "gpio151"; 816 pins = "gpio151";
817 function = "gpio"; 817 function = "gpio";
818 drive-strength = <2>; 818 drive-strength = <2>;
819 bias-pull-down; 819 bias-pull-down;
820 }; 820 };
821 821
822 wake-n-pins { 822 wake-n-pins {
823 pins = "gpio56"; 823 pins = "gpio56";
824 function = "gpio"; 824 function = "gpio";
825 drive-strength = <2>; 825 drive-strength = <2>;
826 bias-pull-up; 826 bias-pull-up;
827 }; 827 };
828 }; 828 };
829 829
830 pcie3b_default: pcie3b-default-state { 830 pcie3b_default: pcie3b-default-state {
831 clkreq-n-pins { 831 clkreq-n-pins {
832 pins = "gpio152"; 832 pins = "gpio152";
833 function = "pcie3b_clk 833 function = "pcie3b_clkreq";
834 drive-strength = <2>; 834 drive-strength = <2>;
835 bias-pull-up; 835 bias-pull-up;
836 }; 836 };
837 837
838 perst-n-pins { 838 perst-n-pins {
839 pins = "gpio153"; 839 pins = "gpio153";
840 function = "gpio"; 840 function = "gpio";
841 drive-strength = <2>; 841 drive-strength = <2>;
842 bias-pull-down; 842 bias-pull-down;
843 }; 843 };
844 844
845 wake-n-pins { 845 wake-n-pins {
846 pins = "gpio130"; 846 pins = "gpio130";
847 function = "gpio"; 847 function = "gpio";
848 drive-strength = <2>; 848 drive-strength = <2>;
849 bias-pull-up; 849 bias-pull-up;
850 }; 850 };
851 }; 851 };
852 852
853 pcie4_default: pcie4-default-state { 853 pcie4_default: pcie4-default-state {
854 clkreq-n-pins { 854 clkreq-n-pins {
855 pins = "gpio140"; 855 pins = "gpio140";
856 function = "pcie4_clkr 856 function = "pcie4_clkreq";
857 drive-strength = <2>; 857 drive-strength = <2>;
858 bias-pull-up; 858 bias-pull-up;
859 }; 859 };
860 860
861 perst-n-pins { 861 perst-n-pins {
862 pins = "gpio141"; 862 pins = "gpio141";
863 function = "gpio"; 863 function = "gpio";
864 drive-strength = <2>; 864 drive-strength = <2>;
865 bias-pull-down; 865 bias-pull-down;
866 }; 866 };
867 867
868 wake-n-pins { 868 wake-n-pins {
869 pins = "gpio139"; 869 pins = "gpio139";
870 function = "gpio"; 870 function = "gpio";
871 drive-strength = <2>; 871 drive-strength = <2>;
872 bias-pull-up; 872 bias-pull-up;
873 }; 873 };
874 }; 874 };
875 875
876 qup1_i2c4_state: qup1-i2c4-state { 876 qup1_i2c4_state: qup1-i2c4-state {
877 pins = "gpio0", "gpio1"; 877 pins = "gpio0", "gpio1";
878 function = "qup12"; 878 function = "qup12";
879 drive-strength = <2>; 879 drive-strength = <2>;
880 bias-pull-up; 880 bias-pull-up;
881 }; 881 };
882 }; 882 };
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