1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Google Zombie board device tree source 3 * Google Zombie board device tree source
4 * 4 *
5 * Copyright 2022 Google LLC. 5 * Copyright 2022 Google LLC.
6 */ 6 */
7 7
8 #include "sc7280-herobrine.dtsi" 8 #include "sc7280-herobrine.dtsi"
9 #include "sc7280-herobrine-audio-rt5682.dtsi" 9 #include "sc7280-herobrine-audio-rt5682.dtsi"
10 10
11 /* 11 /*
12 * ADDITIONS TO FIXED REGULATORS DEFINED IN PA 12 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
13 * 13 *
14 * Sort order matches the order in the parent 14 * Sort order matches the order in the parent files (parents before children).
15 */ 15 */
16 16
17 &pp3300_codec { 17 &pp3300_codec {
18 status = "okay"; 18 status = "okay";
19 }; 19 };
20 20
21 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE 21 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
22 22
23 ap_tp_i2c: &i2c0 { 23 ap_tp_i2c: &i2c0 {
24 clock-frequency = <400000>; 24 clock-frequency = <400000>;
25 status = "okay"; 25 status = "okay";
26 26
27 trackpad: trackpad@15 { 27 trackpad: trackpad@15 {
28 compatible = "hid-over-i2c"; 28 compatible = "hid-over-i2c";
29 reg = <0x15>; 29 reg = <0x15>;
30 pinctrl-names = "default"; 30 pinctrl-names = "default";
31 pinctrl-0 = <&tp_int_odl>; 31 pinctrl-0 = <&tp_int_odl>;
32 32
33 interrupt-parent = <&tlmm>; 33 interrupt-parent = <&tlmm>;
34 interrupts = <7 IRQ_TYPE_EDGE_ 34 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
35 35
36 hid-descr-addr = <0x01>; 36 hid-descr-addr = <0x01>;
37 vdd-supply = <&pp3300_z1>; 37 vdd-supply = <&pp3300_z1>;
38 38
39 wakeup-source; 39 wakeup-source;
40 }; 40 };
41 }; 41 };
42 42
43 &ap_sar_sensor_i2c { 43 &ap_sar_sensor_i2c {
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 &ap_sar_sensor0 { 47 &ap_sar_sensor0 {
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 50
51 &ap_sar_sensor1 { 51 &ap_sar_sensor1 {
52 status = "okay"; 52 status = "okay";
53 }; 53 };
54 54
55 &mdss_edp { 55 &mdss_edp {
56 status = "okay"; 56 status = "okay";
57 }; 57 };
58 58
59 &mdss_edp_phy { 59 &mdss_edp_phy {
60 status = "okay"; 60 status = "okay";
61 }; 61 };
62 62
63 &pm8350c_pwm_backlight { !! 63 /* For nvme */
64 /* Set the PWM period to 320 microseco !! 64 &pcie1 {
65 pwms = <&pm8350c_pwm 3 320000>; !! 65 status = "okay";
>> 66 };
>> 67
>> 68 /* For nvme */
>> 69 &pcie1_phy {
>> 70 status = "okay";
>> 71 };
>> 72
>> 73 &pm8350c_pwm_backlight{
>> 74 /* Set the PWM period to 200 microseconds (5kHz duty cycle) */
>> 75 pwms = <&pm8350c_pwm 3 200000>;
66 }; 76 };
67 77
68 &pwmleds { 78 &pwmleds {
69 status = "okay"; 79 status = "okay";
70 }; 80 };
71 81
72 /* For eMMC */ 82 /* For eMMC */
73 &sdhc_1 { 83 &sdhc_1 {
74 status = "okay"; 84 status = "okay";
75 }; 85 };
76 86
77 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVI 87 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
78 88
79 &ts_rst_conn { 89 &ts_rst_conn {
80 bias-disable; 90 bias-disable;
81 }; 91 };
82 92
83 /* PINCTRL - BOARD-SPECIFIC */ 93 /* PINCTRL - BOARD-SPECIFIC */
84 94
85 /* 95 /*
86 * Methodology for gpio-line-names: 96 * Methodology for gpio-line-names:
87 * - If a pin goes to herobrine board and is n 97 * - If a pin goes to herobrine board and is named it gets that name.
88 * - If a pin goes to herobrine board and is n 98 * - If a pin goes to herobrine board and is not named, it gets no name.
89 * - If a pin is totally internal to Qcard the 99 * - If a pin is totally internal to Qcard then it gets Qcard name.
90 * - If a pin is not hooked up on Qcard, it ge 100 * - If a pin is not hooked up on Qcard, it gets no name.
91 */ 101 */
92 102
93 &pm8350c_gpios { 103 &pm8350c_gpios {
94 gpio-line-names = "FLASH_STROBE_1", 104 gpio-line-names = "FLASH_STROBE_1", /* 1 */
95 "AP_SUSPEND", 105 "AP_SUSPEND",
96 "PM8008_1_RST_N", 106 "PM8008_1_RST_N",
97 "", 107 "",
98 "", 108 "",
99 "", 109 "",
100 "PMIC_EDP_BL_EN", 110 "PMIC_EDP_BL_EN",
101 "PMIC_EDP_BL_PWM", 111 "PMIC_EDP_BL_PWM",
102 ""; 112 "";
103 }; 113 };
104 114
105 &tlmm { 115 &tlmm {
106 gpio-line-names = "AP_TP_I2C_SDA", 116 gpio-line-names = "AP_TP_I2C_SDA", /* 0 */
107 "AP_TP_I2C_SCL", 117 "AP_TP_I2C_SCL",
108 "SSD_RST_L", 118 "SSD_RST_L",
109 "PE_WAKE_ODL", 119 "PE_WAKE_ODL",
110 "AP_SAR_SDA", 120 "AP_SAR_SDA",
111 "AP_SAR_SCL", 121 "AP_SAR_SCL",
112 "PRB_SC_GPIO_6", 122 "PRB_SC_GPIO_6",
113 "TP_INT_ODL", 123 "TP_INT_ODL",
114 "HP_I2C_SDA", 124 "HP_I2C_SDA",
115 "HP_I2C_SCL", 125 "HP_I2C_SCL",
116 126
117 "GNSS_L1_EN", 127 "GNSS_L1_EN", /* 10 */
118 "GNSS_L5_EN", 128 "GNSS_L5_EN",
119 "SPI_AP_MOSI", 129 "SPI_AP_MOSI",
120 "SPI_AP_MISO", 130 "SPI_AP_MISO",
121 "SPI_AP_CLK", 131 "SPI_AP_CLK",
122 "SPI_AP_CS0_L", 132 "SPI_AP_CS0_L",
123 /* 133 /*
124 * AP_FLASH_WP is cr 134 * AP_FLASH_WP is crossystem ABI. Schematics
125 * call it BIOS_FLAS 135 * call it BIOS_FLASH_WP_OD.
126 */ 136 */
127 "AP_FLASH_WP", 137 "AP_FLASH_WP",
128 "", 138 "",
129 "AP_EC_INT_L", 139 "AP_EC_INT_L",
130 "", 140 "",
131 141
132 "UF_CAM_RST_L", 142 "UF_CAM_RST_L", /* 20 */
133 "WF_CAM_RST_L", 143 "WF_CAM_RST_L",
134 "UART_AP_TX_DBG_RX", 144 "UART_AP_TX_DBG_RX",
135 "UART_DBG_TX_AP_RX", 145 "UART_DBG_TX_AP_RX",
136 "", 146 "",
137 "PM8008_IRQ_1", 147 "PM8008_IRQ_1",
138 "HOST2WLAN_SOL", 148 "HOST2WLAN_SOL",
139 "WLAN2HOST_SOL", 149 "WLAN2HOST_SOL",
140 "MOS_BT_UART_CTS", 150 "MOS_BT_UART_CTS",
141 "MOS_BT_UART_RFR", 151 "MOS_BT_UART_RFR",
142 152
143 "MOS_BT_UART_TX", 153 "MOS_BT_UART_TX", /* 30 */
144 "MOS_BT_UART_RX", 154 "MOS_BT_UART_RX",
145 "PRB_SC_GPIO_32", 155 "PRB_SC_GPIO_32",
146 "HUB_RST_L", 156 "HUB_RST_L",
147 "", 157 "",
148 "", 158 "",
149 "AP_SPI_FP_MISO", 159 "AP_SPI_FP_MISO",
150 "AP_SPI_FP_MOSI", 160 "AP_SPI_FP_MOSI",
151 "AP_SPI_FP_CLK", 161 "AP_SPI_FP_CLK",
152 "AP_SPI_FP_CS_L", 162 "AP_SPI_FP_CS_L",
153 163
154 "AP_EC_SPI_MISO", 164 "AP_EC_SPI_MISO", /* 40 */
155 "AP_EC_SPI_MOSI", 165 "AP_EC_SPI_MOSI",
156 "AP_EC_SPI_CLK", 166 "AP_EC_SPI_CLK",
157 "AP_EC_SPI_CS_L", 167 "AP_EC_SPI_CS_L",
158 "LCM_RST_L", 168 "LCM_RST_L",
159 "EARLY_EUD_N", 169 "EARLY_EUD_N",
160 "", 170 "",
161 "DP_HOT_PLUG_DET", 171 "DP_HOT_PLUG_DET",
162 "IO_BRD_MLB_ID0", 172 "IO_BRD_MLB_ID0",
163 "IO_BRD_MLB_ID1", 173 "IO_BRD_MLB_ID1",
164 174
165 "IO_BRD_MLB_ID2", 175 "IO_BRD_MLB_ID2", /* 50 */
166 "SSD_EN", 176 "SSD_EN",
167 "TS_I2C_SDA_CONN", 177 "TS_I2C_SDA_CONN",
168 "TS_I2C_CLK_CONN", 178 "TS_I2C_CLK_CONN",
169 "TS_RST_CONN", 179 "TS_RST_CONN",
170 "TS_INT_CONN", 180 "TS_INT_CONN",
171 "AP_I2C_TPM_SDA", 181 "AP_I2C_TPM_SDA",
172 "AP_I2C_TPM_SCL", 182 "AP_I2C_TPM_SCL",
173 "PRB_SC_GPIO_58", 183 "PRB_SC_GPIO_58",
174 "PRB_SC_GPIO_59", 184 "PRB_SC_GPIO_59",
175 185
176 "EDP_HOT_PLUG_DET_N" 186 "EDP_HOT_PLUG_DET_N", /* 60 */
177 "FP_TO_AP_IRQ_L", 187 "FP_TO_AP_IRQ_L",
178 "", 188 "",
179 "AMP_EN", 189 "AMP_EN",
180 "CAM0_MCLK_GPIO_64", 190 "CAM0_MCLK_GPIO_64",
181 "CAM1_MCLK_GPIO_65", 191 "CAM1_MCLK_GPIO_65",
182 "WF_CAM_MCLK", 192 "WF_CAM_MCLK",
183 "PRB_SC_GPIO_67", 193 "PRB_SC_GPIO_67",
184 "FPMCU_BOOT0", 194 "FPMCU_BOOT0",
185 "UF_CAM_SDA", 195 "UF_CAM_SDA",
186 196
187 "UF_CAM_SCL", 197 "UF_CAM_SCL", /* 70 */
188 "", 198 "",
189 "", 199 "",
190 "WF_CAM_SDA", 200 "WF_CAM_SDA",
191 "WF_CAM_SCL", 201 "WF_CAM_SCL",
192 "", 202 "",
193 "", 203 "",
194 "EN_FP_RAILS", 204 "EN_FP_RAILS",
195 "FP_RST_L", 205 "FP_RST_L",
196 "PCIE1_CLKREQ_ODL", 206 "PCIE1_CLKREQ_ODL",
197 207
198 "EN_PP3300_DX_EDP", 208 "EN_PP3300_DX_EDP", /* 80 */
199 "US_EURO_HS_SEL", 209 "US_EURO_HS_SEL",
200 "FORCED_USB_BOOT", 210 "FORCED_USB_BOOT",
201 "WCD_RESET_N", 211 "WCD_RESET_N",
202 "MOS_WLAN_EN", 212 "MOS_WLAN_EN",
203 "MOS_BT_EN", 213 "MOS_BT_EN",
204 "MOS_SW_CTRL", 214 "MOS_SW_CTRL",
205 "MOS_PCIE0_RST", 215 "MOS_PCIE0_RST",
206 "MOS_PCIE0_CLKREQ_N" 216 "MOS_PCIE0_CLKREQ_N",
207 "MOS_PCIE0_WAKE_N", 217 "MOS_PCIE0_WAKE_N",
208 218
209 "MOS_LAA_AS_EN", 219 "MOS_LAA_AS_EN", /* 90 */
210 "SD_CD_ODL", 220 "SD_CD_ODL",
211 "", 221 "",
212 "", 222 "",
213 "MOS_BT_WLAN_SLIMBUS 223 "MOS_BT_WLAN_SLIMBUS_CLK",
214 "MOS_BT_WLAN_SLIMBUS 224 "MOS_BT_WLAN_SLIMBUS_DAT0",
215 "HP_MCLK", 225 "HP_MCLK",
216 "HP_BCLK", 226 "HP_BCLK",
217 "HP_DOUT", 227 "HP_DOUT",
218 "HP_DIN", 228 "HP_DIN",
219 229
220 "HP_LRCLK", 230 "HP_LRCLK", /* 100 */
221 "HP_IRQ", 231 "HP_IRQ",
222 "", 232 "",
223 "", 233 "",
224 "GSC_AP_INT_ODL", 234 "GSC_AP_INT_ODL",
225 "EN_PP3300_CODEC", 235 "EN_PP3300_CODEC",
226 "AMP_BCLK", 236 "AMP_BCLK",
227 "AMP_DIN", 237 "AMP_DIN",
228 "AMP_LRCLK", 238 "AMP_LRCLK",
229 "UIM1_DATA_GPIO_109" 239 "UIM1_DATA_GPIO_109",
230 240
231 "UIM1_CLK_GPIO_110", 241 "UIM1_CLK_GPIO_110", /* 110 */
232 "UIM1_RESET_GPIO_111 242 "UIM1_RESET_GPIO_111",
233 "PRB_SC_GPIO_112", 243 "PRB_SC_GPIO_112",
234 "UIM0_DATA", 244 "UIM0_DATA",
235 "UIM0_CLK", 245 "UIM0_CLK",
236 "UIM0_RST", 246 "UIM0_RST",
237 "UIM0_PRESENT_ODL", 247 "UIM0_PRESENT_ODL",
238 "SDM_RFFE0_CLK", 248 "SDM_RFFE0_CLK",
239 "SDM_RFFE0_DATA", 249 "SDM_RFFE0_DATA",
240 "WF_CAM_EN", 250 "WF_CAM_EN",
241 251
242 "FASTBOOT_SEL_0", 252 "FASTBOOT_SEL_0", /* 120 */
243 "SC_GPIO_121", 253 "SC_GPIO_121",
244 "FASTBOOT_SEL_1", 254 "FASTBOOT_SEL_1",
245 "SC_GPIO_123", 255 "SC_GPIO_123",
246 "FASTBOOT_SEL_2", 256 "FASTBOOT_SEL_2",
247 "SM_RFFE4_CLK_GRFC_8 257 "SM_RFFE4_CLK_GRFC_8",
248 "SM_RFFE4_DATA_GRFC_ 258 "SM_RFFE4_DATA_GRFC_9",
249 "WLAN_COEX_UART1_RX" 259 "WLAN_COEX_UART1_RX",
250 "WLAN_COEX_UART1_TX" 260 "WLAN_COEX_UART1_TX",
251 "PRB_SC_GPIO_129", 261 "PRB_SC_GPIO_129",
252 262
253 "LCM_ID0", 263 "LCM_ID0", /* 130 */
254 "LCM_ID1", 264 "LCM_ID1",
255 "", 265 "",
256 "SDR_QLINK_REQ", 266 "SDR_QLINK_REQ",
257 "SDR_QLINK_EN", 267 "SDR_QLINK_EN",
258 "QLINK0_WMSS_RESET_N 268 "QLINK0_WMSS_RESET_N",
259 "SMR526_QLINK1_REQ", 269 "SMR526_QLINK1_REQ",
260 "SMR526_QLINK1_EN", 270 "SMR526_QLINK1_EN",
261 "SMR526_QLINK1_WMSS_ 271 "SMR526_QLINK1_WMSS_RESET_N",
262 "PRB_SC_GPIO_139", 272 "PRB_SC_GPIO_139",
263 273
264 "SAR1_IRQ_ODL", 274 "SAR1_IRQ_ODL", /* 140 */
265 "SAR0_IRQ_ODL", 275 "SAR0_IRQ_ODL",
266 "PRB_SC_GPIO_142", 276 "PRB_SC_GPIO_142",
267 "", 277 "",
268 "WCD_SWR_TX_CLK", 278 "WCD_SWR_TX_CLK",
269 "WCD_SWR_TX_DATA0", 279 "WCD_SWR_TX_DATA0",
270 "WCD_SWR_TX_DATA1", 280 "WCD_SWR_TX_DATA1",
271 "WCD_SWR_RX_CLK", 281 "WCD_SWR_RX_CLK",
272 "WCD_SWR_RX_DATA0", 282 "WCD_SWR_RX_DATA0",
273 "WCD_SWR_RX_DATA1", 283 "WCD_SWR_RX_DATA1",
274 284
275 "DMIC01_CLK", 285 "DMIC01_CLK", /* 150 */
276 "DMIC01_DATA", 286 "DMIC01_DATA",
277 "DMIC23_CLK", 287 "DMIC23_CLK",
278 "DMIC23_DATA", 288 "DMIC23_DATA",
279 "", 289 "",
280 "", 290 "",
281 "EC_IN_RW_ODL", 291 "EC_IN_RW_ODL",
282 "HUB_EN", 292 "HUB_EN",
283 "WCD_SWR_TX_DATA2", 293 "WCD_SWR_TX_DATA2",
284 "", 294 "",
285 295
286 "", 296 "", /* 160 */
287 "", 297 "",
288 "", 298 "",
289 "", 299 "",
290 "", 300 "",
291 "", 301 "",
292 "", 302 "",
293 "", 303 "",
294 "", 304 "",
295 "", 305 "",
296 306
297 "", 307 "", /* 170 */
298 "MOS_BLE_UART_TX", 308 "MOS_BLE_UART_TX",
299 "MOS_BLE_UART_RX", 309 "MOS_BLE_UART_RX",
300 "", 310 "",
301 ""; 311 "";
302 }; 312 };
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