1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Google Herobrine baseboard device tree sour
4 *
5 * The set of things in this file is a bit loo
6 * defined as the set of things that the child
7 * common. Since all of the child boards start
8 * design this is hopefully a large set of thi
9 * appear things may "bubble down" out of this
10 * part of the reference design but might not
11 * follow the lead of the SoC dtsi files and l
12 *
13 * Copyright 2022 Google LLC.
14 */
15
16 #include <dt-bindings/input/gpio-keys.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
19
20 #include "sc7280-qcard.dtsi"
21 #include "sc7280-chrome-common.dtsi"
22
23 / {
24 chosen {
25 stdout-path = "serial0:115200n
26 };
27
28 /*
29 * FIXED REGULATORS
30 *
31 * Sort order:
32 * 1. parents above children.
33 * 2. higher voltage above lower volta
34 * 3. alphabetically by node name.
35 */
36
37 /* This is the top level supply and va
38 ppvar_sys: ppvar-sys-regulator {
39 compatible = "regulator-fixed"
40 regulator-name = "ppvar_sys";
41 regulator-always-on;
42 regulator-boot-on;
43 };
44
45 /* This divides ppvar_sys by 2, so vol
46 src_vph_pwr: src-vph-pwr-regulator {
47 compatible = "regulator-fixed"
48 regulator-name = "src_vph_pwr"
49
50 /* EC turns on with switchcap_
51 regulator-always-on;
52 regulator-boot-on;
53
54 vin-supply = <&ppvar_sys>;
55 };
56
57 pp5000_s5: pp5000-s5-regulator {
58 compatible = "regulator-fixed"
59 regulator-name = "pp5000_s5";
60
61 /* EC turns on with en_pp5000_
62 regulator-always-on;
63 regulator-boot-on;
64 regulator-min-microvolt = <500
65 regulator-max-microvolt = <500
66
67 vin-supply = <&ppvar_sys>;
68 };
69
70 pp3300_z1: pp3300-z1-regulator {
71 compatible = "regulator-fixed"
72 regulator-name = "pp3300_z1";
73
74 /* EC turns on with en_pp3300_
75 regulator-always-on;
76 regulator-boot-on;
77 regulator-min-microvolt = <330
78 regulator-max-microvolt = <330
79
80 vin-supply = <&ppvar_sys>;
81 };
82
83 pp3300_codec: pp3300-codec-regulator {
84 compatible = "regulator-fixed"
85 regulator-name = "pp3300_codec
86
87 regulator-min-microvolt = <330
88 regulator-max-microvolt = <330
89
90 gpio = <&tlmm 105 GPIO_ACTIVE_
91 enable-active-high;
92 pinctrl-names = "default";
93 pinctrl-0 = <&en_pp3300_codec>
94
95 vin-supply = <&pp3300_z1>;
96 status = "disabled";
97 };
98
99 pp3300_left_in_mlb: pp3300-left-in-mlb
100 compatible = "regulator-fixed"
101 regulator-name = "pp3300_left_
102
103 regulator-min-microvolt = <330
104 regulator-max-microvolt = <330
105
106 gpio = <&tlmm 80 GPIO_ACTIVE_H
107 enable-active-high;
108 pinctrl-names = "default";
109 pinctrl-0 = <&en_pp3300_dx_edp
110
111 regulator-enable-ramp-delay =
112
113 /*
114 * eDP panel specs nearly alwa
115 * shouldn't turn them off an
116 * Add this as a board constra
117 * between the panel and touch
118 */
119 off-on-delay-us = <500000>;
120
121 /*
122 * Stat the regulator on. This
123 * the slow process of powerin
124 * probe the regulator. It als
125 * off-on-delay immediately on
126 */
127 regulator-boot-on;
128
129 vin-supply = <&pp3300_z1>;
130 };
131
132 pp3300_mcu_fp:
133 pp3300_fp_ls:
134 pp3300_fp_mcu: pp3300-fp-regulator {
135 compatible = "regulator-fixed"
136 regulator-name = "pp3300_fp";
137
138 regulator-min-microvolt = <330
139 regulator-max-microvolt = <330
140
141 regulator-boot-on;
142 regulator-always-on;
143
144 /*
145 * WARNING: it is intentional
146 * The userspace script for up
147 * needs to control the FP reg
148 * hence the signal can't be o
149 */
150
151 pinctrl-names = "default";
152 pinctrl-0 = <&en_fp_rails>;
153
154 vin-supply = <&pp3300_z1>;
155 status = "disabled";
156 };
157
158 pp3300_hub: pp3300-hub-regulator {
159 compatible = "regulator-fixed"
160 regulator-name = "pp3300_hub";
161
162 regulator-min-microvolt = <330
163 regulator-max-microvolt = <330
164
165 /* The BIOS leaves this regula
166 regulator-boot-on;
167
168 gpio = <&tlmm 157 GPIO_ACTIVE_
169 enable-active-high;
170 pinctrl-names = "default";
171 pinctrl-0 = <&hub_en>;
172
173 vin-supply = <&pp3300_z1>;
174 };
175
176 pp3300_tp: pp3300-tp-regulator {
177 compatible = "regulator-fixed"
178 regulator-name = "pp3300_tp";
179
180 regulator-min-microvolt = <330
181 regulator-max-microvolt = <330
182
183 /* AP turns on with PP1800_L18
184 regulator-always-on;
185 regulator-boot-on;
186
187 vin-supply = <&pp3300_z1>;
188 };
189
190 pp3300_ssd: pp3300-ssd-regulator {
191 compatible = "regulator-fixed"
192 regulator-name = "pp3300_ssd";
193
194 regulator-min-microvolt = <330
195 regulator-max-microvolt = <330
196
197 gpio = <&tlmm 51 GPIO_ACTIVE_H
198 enable-active-high;
199 pinctrl-names = "default";
200 pinctrl-0 = <&ssd_en>;
201
202 /*
203 * The bootloaer may have left
204 * off while the PCIe clocks a
205 * so it's better to default t
206 */
207 regulator-boot-on;
208
209 vin-supply = <&pp3300_z1>;
210 };
211
212 pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-r
213 compatible = "regulator-fixed"
214 regulator-name = "pp2850_vcm_w
215
216 regulator-min-microvolt = <285
217 regulator-max-microvolt = <285
218
219 gpio = <&tlmm 119 GPIO_ACTIVE_
220 enable-active-high;
221 pinctrl-names = "default";
222 pinctrl-0 = <&wf_cam_en>;
223
224 vin-supply = <&pp3300_z1>;
225 status = "disabled";
226 };
227
228 pp2850_wf_cam: pp2850-wf-cam-regulator
229 compatible = "regulator-fixed"
230 regulator-name = "pp2850_wf_ca
231
232 regulator-min-microvolt = <285
233 regulator-max-microvolt = <285
234
235 gpio = <&tlmm 119 GPIO_ACTIVE_
236 enable-active-high;
237 /*
238 * The pinconf can only be ref
239 * first regulator and comment
240 *
241 * pinctrl-names = "default";
242 * pinctrl-0 = <&wf_cam_en>;
243 */
244
245 vin-supply = <&pp3300_z1>;
246 status = "disabled";
247 };
248
249 pp1800_fp: pp1800-fp-regulator {
250 compatible = "regulator-fixed"
251 regulator-name = "pp1800_fp";
252
253 regulator-min-microvolt = <180
254 regulator-max-microvolt = <180
255
256 regulator-boot-on;
257 regulator-always-on;
258
259 /*
260 * WARNING: it is intentional
261 * The userspace script for up
262 * needs to control the FP reg
263 * hence the signal can't be o
264 */
265
266 pinctrl-names = "default";
267 pinctrl-0 = <&en_fp_rails>;
268
269 vin-supply = <&pp1800_l18b_s0>
270 status = "disabled";
271 };
272
273 pp1800_wf_cam: pp1800-wf-cam-regulator
274 compatible = "regulator-fixed"
275 regulator-name = "pp1800_wf_ca
276
277 regulator-min-microvolt = <180
278 regulator-max-microvolt = <180
279
280 gpio = <&tlmm 119 GPIO_ACTIVE_
281 enable-active-high;
282 /*
283 * The pinconf can only be ref
284 * first regulator and comment
285 *
286 * pinctrl-names = "default";
287 * pinctrl-0 = <&wf_cam_en>;
288 */
289
290 vin-supply = <&vreg_l19b_s0>;
291 status = "disabled";
292 };
293
294 pp1200_wf_cam: pp1200-wf-cam-regulator
295 compatible = "regulator-fixed"
296 regulator-name = "pp1200_wf_ca
297
298 regulator-min-microvolt = <120
299 regulator-max-microvolt = <120
300
301 gpio = <&tlmm 119 GPIO_ACTIVE_
302 enable-active-high;
303 /*
304 * The pinconf can only be ref
305 * first regulator and comment
306 *
307 * pinctrl-names = "default";
308 * pinctrl-0 = <&wf_cam_en>;
309 */
310
311 vin-supply = <&pp3300_z1>;
312 status = "disabled";
313 };
314
315 /* BOARD-SPECIFIC TOP LEVEL NODES */
316
317 max98360a: audio-codec-0 {
318 compatible = "maxim,max98360a"
319 pinctrl-names = "default";
320 pinctrl-0 = <&_en>;
321 sdmode-gpios = <&tlmm 63 GPIO_
322 #sound-dai-cells = <0>;
323 };
324
325 pwmleds: pwmleds {
326 compatible = "pwm-leds";
327 status = "disabled";
328 keyboard_backlight: led-0 {
329 label = "cros_ec::kbd_
330 function = LED_FUNCTIO
331 pwms = <&cros_ec_pwm 0
332 max-brightness = <1023
333 };
334 };
335 };
336
337 /*
338 * ADJUSTMENTS TO QCARD REGULATORS
339 *
340 * Mostly this is just board-local names for r
341 * Qcard, but this also has some minor regulat
342 *
343 * Names are only listed here if regulators go
344 * testpoint.
345 */
346
347 /* From Qcard to our board; ordered by PMIC-ID
348
349 pp1256_s8b: &vreg_s8b_1p256 {};
350
351 pp1800_l18b_s0: &vreg_l18b_1p8 {};
352 pp1800_l18b: &vreg_l18b_1p8 {};
353
354 vreg_l19b_s0: &vreg_l19b_1p8 {};
355
356 pp1800_alc5682: &vreg_l2c_1p8 {};
357 pp1800_l2c: &vreg_l2c_1p8 {};
358
359 vreg_l4c: &vreg_l4c_1p8_3p0 {};
360
361 ppvar_l6c: &vreg_l6c_2p96 {};
362
363 pp3000_l7c: &vreg_l7c_3p0 {};
364
365 pp1800_prox: &vreg_l8c_1p8 {};
366 pp1800_l8c: &vreg_l8c_1p8 {};
367
368 pp2950_l9c: &vreg_l9c_2p96 {};
369
370 pp1800_lcm: &vreg_l12c_1p8 {};
371 pp1800_mipi: &vreg_l12c_1p8 {};
372 pp1800_l12c: &vreg_l12c_1p8 {};
373
374 pp3300_lcm: &vreg_l13c_3p0 {};
375 pp3300_mipi: &vreg_l13c_3p0 {};
376 pp3300_l13c: &vreg_l13c_3p0 {};
377
378 /* From our board to Qcard; ordered same as no
379
380 vreg_edp_bl: &ppvar_sys {};
381
382 ts_avdd: &pp3300_left_in_mlb {};
383 vreg_edp_3p3: &pp3300_left_in_mlb {};
384
385 /* Regulator overrides from Qcard */
386
387 /*
388 * Herobrine boards only use l2c to power an e
389 * alc5682) and we want that to be at 1.8V, no
390 */
391 &vreg_l2c_1p8 {
392 regulator-min-microvolt = <1800000>;
393 };
394
395 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE
396
397 &edp_panel {
398 /* Our board provides power to the qca
399 power-supply = <&vreg_edp_3p3>;
400 };
401
402 ap_sar_sensor_i2c: &i2c1 {
403 clock-frequency = <400000>;
404 status = "disabled";
405
406 ap_sar_sensor0: proximity@28 {
407 compatible = "semtech,sx9324";
408 reg = <0x28>;
409 #io-channel-cells = <1>;
410 pinctrl-names = "default";
411 pinctrl-0 = <&sar0_irq_odl>;
412
413 interrupt-parent = <&tlmm>;
414 interrupts = <141 IRQ_TYPE_LEV
415
416 vdd-supply = <&pp1800_prox>;
417
418 label = "proximity-wifi_cellul
419 status = "disabled";
420 };
421
422 ap_sar_sensor1: proximity@2c {
423 compatible = "semtech,sx9324";
424 reg = <0x2c>;
425 #io-channel-cells = <1>;
426 pinctrl-names = "default";
427 pinctrl-0 = <&sar1_irq_odl>;
428
429 interrupt-parent = <&tlmm>;
430 interrupts = <140 IRQ_TYPE_LEV
431
432 vdd-supply = <&pp1800_prox>;
433
434 label = "proximity-wifi_cellul
435 status = "disabled";
436 };
437 };
438
439 ap_i2c_tpm: &i2c14 {
440 status = "okay";
441 clock-frequency = <400000>;
442
443 tpm@50 {
444 compatible = "google,cr50";
445 reg = <0x50>;
446
447 pinctrl-names = "default";
448 pinctrl-0 = <&gsc_ap_int_odl>;
449
450 interrupt-parent = <&tlmm>;
451 interrupts = <104 IRQ_TYPE_EDG
452 };
453 };
454
455 &mdss {
456 status = "okay";
457 };
458
459 &mdss_dp {
460 status = "okay";
461 pinctrl-names = "default";
462 pinctrl-0 = <&dp_hot_plug_det>;
463 };
464
465 &mdss_dp_out {
466 data-lanes = <0 1>;
467 link-frequencies = /bits/ 64 <16200000
468 };
469
470 /* NVMe drive, enabled on a per-board basis */
471 &pcie1 {
472 pinctrl-names = "default";
473 pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_r
474
475 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW
476 vddpe-3v3-supply = <&pp3300_ssd>;
477 };
478
479 &pm8350c_pwm {
480 status = "okay";
481 };
482
483 &pm8350c_pwm_backlight {
484 status = "okay";
485
486 /* Our board provides power to the qca
487 power-supply = <&vreg_edp_bl>;
488 };
489
490 &pmk8350_rtc {
491 status = "disabled";
492 };
493
494 &qupv3_id_0 {
495 status = "okay";
496 };
497
498 &qupv3_id_1 {
499 status = "okay";
500 };
501
502 /* SD Card, enabled on a per-board basis */
503 &sdhc_2 {
504 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>,
505 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_
506
507 vmmc-supply = <&pp2950_l9c>;
508 vqmmc-supply = <&ppvar_l6c>;
509
510 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
511 };
512
513 &spi_flash {
514 spi-max-frequency = <50000000>;
515 };
516
517 /* Fingerprint, enabled on a per-board basis *
518 ap_spi_fp: &spi9 {
519 pinctrl-0 = <&qup_spi9_data_clk>, <&qu
520
521 cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
522
523 cros_ec_fp: ec@0 {
524 compatible = "google,cros-ec-f
525 reg = <0>;
526 interrupt-parent = <&tlmm>;
527 interrupts = <61 IRQ_TYPE_LEVE
528 pinctrl-names = "default";
529 pinctrl-0 = <&fp_to_ap_irq_l>,
530 boot0-gpios = <&tlmm 68 GPIO_A
531 reset-gpios = <&tlmm 78 GPIO_A
532 spi-max-frequency = <3000000>;
533 vdd-supply = <&pp3300_fp_mcu>;
534 };
535 };
536
537 ap_ec_spi: &spi10 {
538 status = "okay";
539 pinctrl-0 = <&qup_spi10_data_clk>, <&q
540
541 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
542
543 cros_ec: ec@0 {
544 compatible = "google,cros-ec-s
545 reg = <0>;
546 interrupt-parent = <&tlmm>;
547 interrupts = <18 IRQ_TYPE_LEVE
548 pinctrl-names = "default";
549 pinctrl-0 = <&ap_ec_int_l>;
550 spi-max-frequency = <3000000>;
551 wakeup-source;
552
553 cros_ec_pwm: pwm {
554 compatible = "google,c
555 #pwm-cells = <1>;
556 };
557
558 i2c_tunnel: i2c-tunnel {
559 compatible = "google,c
560 google,remote-bus = <0
561 #address-cells = <1>;
562 #size-cells = <0>;
563 };
564
565 typec {
566 compatible = "google,c
567 #address-cells = <1>;
568 #size-cells = <0>;
569
570 usb_c0: connector@0 {
571 compatible = "
572 reg = <0>;
573 label = "left"
574 power-role = "
575 data-role = "h
576 try-power-role
577 };
578
579 usb_c1: connector@1 {
580 compatible = "
581 reg = <1>;
582 label = "right
583 power-role = "
584 data-role = "h
585 try-power-role
586 };
587 };
588 };
589 };
590
591 #include <arm/cros-ec-keyboard.dtsi>
592 #include <arm/cros-ec-sbs.dtsi>
593
594 &keyboard_controller {
595 function-row-physmap = <
596 MATRIX_KEY(0x00, 0x02, 0)
597 MATRIX_KEY(0x03, 0x02, 0)
598 MATRIX_KEY(0x02, 0x02, 0)
599 MATRIX_KEY(0x01, 0x02, 0)
600 MATRIX_KEY(0x03, 0x04, 0)
601 MATRIX_KEY(0x02, 0x04, 0)
602 MATRIX_KEY(0x01, 0x04, 0)
603 MATRIX_KEY(0x02, 0x09, 0)
604 MATRIX_KEY(0x01, 0x09, 0)
605 MATRIX_KEY(0x00, 0x04, 0)
606 >;
607 linux,keymap = <
608 MATRIX_KEY(0x00, 0x02, KEY_BAC
609 MATRIX_KEY(0x03, 0x02, KEY_REF
610 MATRIX_KEY(0x02, 0x02, KEY_ZOO
611 MATRIX_KEY(0x01, 0x02, KEY_SCA
612 MATRIX_KEY(0x03, 0x04, KEY_SYS
613 MATRIX_KEY(0x02, 0x04, KEY_BRI
614 MATRIX_KEY(0x01, 0x04, KEY_BRI
615 MATRIX_KEY(0x02, 0x09, KEY_MUT
616 MATRIX_KEY(0x01, 0x09, KEY_VOL
617 MATRIX_KEY(0x00, 0x04, KEY_VOL
618
619 CROS_STD_MAIN_KEYMAP
620 >;
621 };
622
623 &usb_1 {
624 status = "okay";
625 };
626
627 &usb_1_dwc3 {
628 dr_mode = "host";
629
630 #address-cells = <1>;
631 #size-cells = <0>;
632
633 /* 2.x hub on port 1 */
634 usb_hub_2_x: hub@1 {
635 compatible = "usbbda,5411";
636 reg = <1>;
637 vdd-supply = <&pp3300_hub>;
638 peer-hub = <&usb_hub_3_x>;
639 };
640
641 /* 3.x hub on port 2 */
642 usb_hub_3_x: hub@2 {
643 compatible = "usbbda,411";
644 reg = <2>;
645 vdd-supply = <&pp3300_hub>;
646 peer-hub = <&usb_hub_2_x>;
647 };
648 };
649
650 &usb_1_hsphy {
651 status = "okay";
652
653 qcom,hs-rise-fall-time-bp = <0>;
654 qcom,squelch-detector-bp = <(-2090)>;
655 qcom,hs-disconnect-bp = <1743>;
656 qcom,hs-amplitude-bp = <1780>;
657 qcom,hs-crossover-voltage-microvolt =
658 qcom,hs-output-impedance-micro-ohms =
659 };
660
661 &usb_1_qmpphy {
662 status = "okay";
663 };
664
665 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVI
666
667 &dp_hot_plug_det {
668 bias-disable;
669 };
670
671 &mi2s1_data0 {
672 drive-strength = <6>;
673 bias-disable;
674 };
675
676 &mi2s1_sclk {
677 drive-strength = <6>;
678 bias-disable;
679 };
680
681 &mi2s1_ws {
682 drive-strength = <6>;
683 bias-disable;
684 };
685
686 &pcie1_clkreq_n {
687 bias-pull-up;
688 drive-strength = <2>;
689 };
690
691 &qspi_cs0 {
692 bias-disable; /* External pu
693 drive-strength = <8>;
694 };
695
696 &qspi_clk {
697 bias-pull-down; /* No external
698 drive-strength = <8>;
699 };
700
701 &qspi_data0 {
702 bias-pull-down; /* No external
703 drive-strength = <8>;
704 };
705
706 &qspi_data1 {
707 bias-disable; /* External pu
708 drive-strength = <8>;
709 };
710
711 /* For ap_tp_i2c */
712 &qup_i2c0_data_clk {
713 /* Has external pull */
714 bias-disable;
715 drive-strength = <2>;
716 };
717
718 /* For ap_i2c_tpm */
719 &qup_i2c14_data_clk {
720 /* Has external pull */
721 bias-disable;
722 drive-strength = <2>;
723 };
724
725 /* For ap_spi_fp */
726 &qup_spi9_data_clk {
727 bias-disable;
728 drive-strength = <2>;
729 };
730
731 /* For ap_spi_fp */
732 &qup_spi9_cs_gpio {
733 bias-disable;
734 drive-strength = <2>;
735 };
736
737 /* For ap_ec_spi */
738 &qup_spi10_data_clk {
739 bias-disable;
740 drive-strength = <2>;
741 };
742
743 /* For ap_ec_spi */
744 &qup_spi10_cs_gpio {
745 bias-disable;
746 drive-strength = <2>;
747 };
748
749 /* For uart_dbg */
750 &qup_uart5_rx {
751 bias-pull-up;
752 };
753
754 /* For uart_dbg */
755 &qup_uart5_tx {
756 bias-disable;
757 drive-strength = <2>;
758 };
759
760 &sdc2_clk {
761 bias-disable;
762 drive-strength = <16>;
763 };
764
765 &sdc2_cmd {
766 bias-pull-up;
767 drive-strength = <10>;
768 };
769
770 &sdc2_data {
771 bias-pull-up;
772 drive-strength = <10>;
773 };
774
775 /* PINCTRL - board-specific pinctrl */
776
777 &pm7325_gpios {
778 /*
779 * On a quick glance it might look lik
780 * that only passes through to a debug
781 * volume up key.
782 */
783 status = "disabled"; /* No GPIOs are c
784 };
785
786 &pmk8350_gpios {
787 status = "disabled"; /* No GPIOs are c
788 };
789
790 &tlmm {
791 /* pinctrl settings for pins that have
792 pinctrl-names = "default";
793 pinctrl-0 = <&bios_flash_wp_od>;
794
795 amp_en: amp-en-state {
796 pins = "gpio63";
797 function = "gpio";
798 bias-disable;
799 drive-strength = <2>;
800 };
801
802 ap_ec_int_l: ap-ec-int-l-state {
803 pins = "gpio18";
804 function = "gpio";
805 bias-pull-up;
806 };
807
808 bios_flash_wp_od: bios-flash-wp-od-sta
809 pins = "gpio16";
810 function = "gpio";
811 /* Has external pull */
812 bias-disable;
813 };
814
815 en_fp_rails: en-fp-rails-state {
816 pins = "gpio77";
817 function = "gpio";
818 bias-disable;
819 drive-strength = <2>;
820 output-high;
821 };
822
823 en_pp3300_codec: en-pp3300-codec-state
824 pins = "gpio105";
825 function = "gpio";
826 bias-disable;
827 drive-strength = <2>;
828 };
829
830 en_pp3300_dx_edp: en-pp3300-dx-edp-sta
831 pins = "gpio80";
832 function = "gpio";
833 bias-disable;
834 drive-strength = <2>;
835 };
836
837 fp_rst_l: fp-rst-l-state {
838 pins = "gpio78";
839 function = "gpio";
840 bias-disable;
841 drive-strength = <2>;
842 };
843
844 fp_to_ap_irq_l: fp-to-ap-irq-l-state {
845 pins = "gpio61";
846 function = "gpio";
847 /* Has external pullup */
848 bias-disable;
849 };
850
851 fpmcu_boot0: fpmcu-boot0-state {
852 pins = "gpio68";
853 function = "gpio";
854 bias-disable;
855 };
856
857 gsc_ap_int_odl: gsc-ap-int-odl-state {
858 pins = "gpio104";
859 function = "gpio";
860 bias-pull-up;
861 };
862
863 hp_irq: hp-irq-state {
864 pins = "gpio101";
865 function = "gpio";
866 bias-pull-up;
867 };
868
869 hub_en: hub-en-state {
870 pins = "gpio157";
871 function = "gpio";
872 bias-disable;
873 drive-strength = <2>;
874 };
875
876 pe_wake_odl: pe-wake-odl-state {
877 pins = "gpio3";
878 function = "gpio";
879 /* Has external pull */
880 bias-disable;
881 drive-strength = <2>;
882 };
883
884 /* For ap_spi_fp */
885 qup_spi9_cs_gpio_init_high: qup-spi9-c
886 pins = "gpio39";
887 function = "gpio";
888 output-high;
889 };
890
891 /* For ap_ec_spi */
892 qup_spi10_cs_gpio_init_high: qup-spi10
893 pins = "gpio43";
894 function = "gpio";
895 output-high;
896 };
897
898 sar0_irq_odl: sar0-irq-odl-state {
899 pins = "gpio141";
900 function = "gpio";
901 bias-pull-up;
902 };
903
904 sar1_irq_odl: sar1-irq-odl-state {
905 pins = "gpio140";
906 function = "gpio";
907 bias-pull-up;
908 };
909
910 sd_cd_odl: sd-cd-odl-state {
911 pins = "gpio91";
912 function = "gpio";
913 bias-pull-up;
914 };
915
916 ssd_en: ssd-en-state {
917 pins = "gpio51";
918 function = "gpio";
919 bias-disable;
920 drive-strength = <2>;
921 };
922
923 ssd_rst_l: ssd-rst-l-state {
924 pins = "gpio2";
925 function = "gpio";
926 bias-disable;
927 drive-strength = <2>;
928 output-low;
929 };
930
931 tp_int_odl: tp-int-odl-state {
932 pins = "gpio7";
933 function = "gpio";
934 /* Has external pullup */
935 bias-disable;
936 };
937
938 wf_cam_en: wf-cam-en-state {
939 pins = "gpio119";
940 function = "gpio";
941 /* Has external pulldown */
942 bias-disable;
943 drive-strength = <2>;
944 };
945 };
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