1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * sc7280 IDP board device tree source (common 3 * sc7280 IDP board device tree source (common between SKU1 and SKU2)
4 * 4 *
5 * Copyright (c) 2021, The Linux Foundation. A 5 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
6 */ 6 */
7 7
>> 8 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk83 9 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes. 10 #include <dt-bindings/input/linux-event-codes.h>
10 #include "sc7280.dtsi" 11 #include "sc7280.dtsi"
11 #include "pm7325.dtsi" 12 #include "pm7325.dtsi"
12 #include "pm8350c.dtsi" 13 #include "pm8350c.dtsi"
13 #include "pmk8350.dtsi" 14 #include "pmk8350.dtsi"
14 15
15 #include "sc7280-chrome-common.dtsi" <<
16 #include "sc7280-herobrine-lte-sku.dtsi" <<
17 <<
18 / { 16 / {
19 aliases { <<
20 bluetooth0 = &bluetooth; <<
21 serial1 = &uart7; <<
22 wifi0 = &wifi; <<
23 }; <<
24 <<
25 max98360a: audio-codec-0 { <<
26 compatible = "maxim,max98360a" <<
27 pinctrl-names = "default"; <<
28 pinctrl-0 = <&_en>; <<
29 sdmode-gpios = <&tlmm 63 GPIO_ <<
30 #sound-dai-cells = <0>; <<
31 }; <<
32 <<
33 wcd9385: audio-codec-1 { <<
34 compatible = "qcom,wcd9385-cod <<
35 pinctrl-names = "default", "sl <<
36 pinctrl-0 = <&wcd_reset_n>; <<
37 pinctrl-1 = <&wcd_reset_n_slee <<
38 <<
39 reset-gpios = <&tlmm 83 GPIO_A <<
40 <<
41 qcom,rx-device = <&wcd_rx>; <<
42 qcom,tx-device = <&wcd_tx>; <<
43 <<
44 vdd-rxtx-supply = <&vreg_l18b_ <<
45 vdd-io-supply = <&vreg_l18b_1p <<
46 vdd-buck-supply = <&vreg_l17b_ <<
47 vdd-mic-bias-supply = <&vreg_b <<
48 <<
49 qcom,micbias1-microvolt = <180 <<
50 qcom,micbias2-microvolt = <180 <<
51 qcom,micbias3-microvolt = <180 <<
52 qcom,micbias4-microvolt = <180 <<
53 <<
54 qcom,mbhc-buttons-vthreshold-m <<
55 <<
56 qcom,mbhc-headset-vthreshold-m <<
57 qcom,mbhc-headphone-vthreshold <<
58 #sound-dai-cells = <1>; <<
59 }; <<
60 <<
61 gpio-keys { 17 gpio-keys {
62 compatible = "gpio-keys"; 18 compatible = "gpio-keys";
63 label = "gpio-keys"; 19 label = "gpio-keys";
64 20
65 pinctrl-names = "default"; 21 pinctrl-names = "default";
66 pinctrl-0 = <&key_vol_up_defau 22 pinctrl-0 = <&key_vol_up_default>;
67 23
68 key-volume-up { !! 24 volume-up {
69 label = "volume_up"; 25 label = "volume_up";
70 gpios = <&pm7325_gpios 26 gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>;
71 linux,input-type = <1> 27 linux,input-type = <1>;
72 linux,code = <KEY_VOLU 28 linux,code = <KEY_VOLUMEUP>;
73 wakeup-source; !! 29 gpio-key,wakeup;
74 debounce-interval = <1 30 debounce-interval = <15>;
75 linux,can-disable; 31 linux,can-disable;
76 }; 32 };
77 }; 33 };
78 34
79 nvme_3v3_regulator: nvme-3v3-regulator 35 nvme_3v3_regulator: nvme-3v3-regulator {
80 compatible = "regulator-fixed" 36 compatible = "regulator-fixed";
81 regulator-name = "VLDO_3V3"; 37 regulator-name = "VLDO_3V3";
82 38
83 regulator-min-microvolt = <330 39 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <330 40 regulator-max-microvolt = <3300000>;
85 41
86 enable-active-high; 42 enable-active-high;
87 pinctrl-names = "default"; 43 pinctrl-names = "default";
88 pinctrl-0 = <&nvme_pwren>; 44 pinctrl-0 = <&nvme_pwren>;
89 }; 45 };
>> 46 };
90 47
91 sound: sound { !! 48 /*
92 compatible = "google,sc7280-he !! 49 * Reserved memory changes
93 model = "sc7280-wcd938x-max983 !! 50 *
94 !! 51 * Delete all unused memory nodes and define the peripheral memory regions
95 audio-routing = !! 52 * required by the board dts.
96 "IN1_HPHL", "HPHL_OUT" !! 53 *
97 "IN2_HPHR", "HPHR_OUT" !! 54 */
98 "AMIC1", "MIC BIAS1", !! 55
99 "AMIC2", "MIC BIAS2", !! 56 /delete-node/ &hyp_mem;
100 "VA DMIC0", "MIC BIAS3 !! 57 /delete-node/ &xbl_mem;
101 "VA DMIC1", "MIC BIAS3 !! 58 /delete-node/ &reserved_xbl_uefi_log;
102 "VA DMIC2", "MIC BIAS1 !! 59 /delete-node/ &sec_apps_mem;
103 "VA DMIC3", "MIC BIAS1 !! 60
104 "TX SWR_ADC0", "ADC1_O !! 61 /* Increase the size from 2.5MB to 8MB */
105 "TX SWR_ADC1", "ADC2_O !! 62 &rmtfs_mem {
106 "TX SWR_ADC2", "ADC3_O !! 63 reg = <0x0 0x9c900000 0x0 0x800000>;
107 "TX SWR_DMIC0", "DMIC1 !! 64 };
108 "TX SWR_DMIC1", "DMIC2 !! 65
109 "TX SWR_DMIC2", "DMIC3 !! 66 / {
110 "TX SWR_DMIC3", "DMIC4 !! 67 reserved-memory {
111 "TX SWR_DMIC4", "DMIC5 !! 68 adsp_mem: memory@86700000 {
112 "TX SWR_DMIC5", "DMIC6 !! 69 reg = <0x0 0x86700000 0x0 0x2800000>;
113 "TX SWR_DMIC6", "DMIC7 !! 70 no-map;
114 "TX SWR_DMIC7", "DMIC8 !! 71 };
115 !! 72
116 #address-cells = <1>; !! 73 camera_mem: memory@8ad00000 {
117 #size-cells = <0>; !! 74 reg = <0x0 0x8ad00000 0x0 0x500000>;
118 !! 75 no-map;
119 dai-link@0 { !! 76 };
120 link-name = "MAX98360A !! 77
121 reg = <0>; !! 78 venus_mem: memory@8b200000 {
122 !! 79 reg = <0x0 0x8b200000 0x0 0x500000>;
123 cpu { !! 80 no-map;
124 sound-dai = <& !! 81 };
125 }; !! 82
126 !! 83 mpss_mem: memory@8b800000 {
127 codec { !! 84 reg = <0x0 0x8b800000 0x0 0xf600000>;
128 sound-dai = <& !! 85 no-map;
129 }; !! 86 };
130 }; !! 87
131 !! 88 wpss_mem: memory@9ae00000 {
132 dai-link@1 { !! 89 reg = <0x0 0x9ae00000 0x0 0x1900000>;
133 link-name = "DisplayPo !! 90 no-map;
134 reg = <1>; !! 91 };
135 !! 92
136 cpu { !! 93 mba_mem: memory@9c700000 {
137 sound-dai = <& !! 94 reg = <0x0 0x9c700000 0x0 0x200000>;
138 }; !! 95 no-map;
139 <<
140 codec { <<
141 sound-dai = <& <<
142 }; <<
143 }; <<
144 <<
145 dai-link@2 { <<
146 link-name = "WCD9385 P <<
147 reg = <2>; <<
148 <<
149 cpu { <<
150 sound-dai = <& <<
151 }; <<
152 <<
153 codec { <<
154 sound-dai = <& <<
155 }; <<
156 }; <<
157 <<
158 dai-link@3 { <<
159 link-name = "WCD9385 C <<
160 reg = <3>; <<
161 <<
162 cpu { <<
163 sound-dai = <& <<
164 }; <<
165 <<
166 codec { <<
167 sound-dai = <& <<
168 }; <<
169 }; <<
170 <<
171 dai-link@4 { <<
172 link-name = "DMIC"; <<
173 reg = <4>; <<
174 <<
175 cpu { <<
176 sound-dai = <& <<
177 }; <<
178 <<
179 codec { <<
180 sound-dai = <& <<
181 }; <<
182 }; 96 };
183 }; 97 };
184 }; 98 };
185 99
186 &apps_rsc { 100 &apps_rsc {
187 regulators-0 { !! 101 pm7325-regulators {
188 compatible = "qcom,pm7325-rpmh 102 compatible = "qcom,pm7325-rpmh-regulators";
189 qcom,pmic-id = "b"; 103 qcom,pmic-id = "b";
190 104
191 vreg_s1b_1p8: smps1 { 105 vreg_s1b_1p8: smps1 {
192 regulator-min-microvol 106 regulator-min-microvolt = <1856000>;
193 regulator-max-microvol 107 regulator-max-microvolt = <2040000>;
194 }; 108 };
195 109
196 vreg_s7b_0p9: smps7 { 110 vreg_s7b_0p9: smps7 {
197 regulator-min-microvol 111 regulator-min-microvolt = <535000>;
198 regulator-max-microvol 112 regulator-max-microvolt = <1120000>;
199 }; 113 };
200 114
201 vreg_s8b_1p2: smps8 { 115 vreg_s8b_1p2: smps8 {
202 regulator-min-microvol 116 regulator-min-microvolt = <1256000>;
203 regulator-max-microvol 117 regulator-max-microvolt = <1500000>;
204 }; 118 };
205 119
206 vreg_l1b_0p8: ldo1 { 120 vreg_l1b_0p8: ldo1 {
207 regulator-min-microvol 121 regulator-min-microvolt = <825000>;
208 regulator-max-microvol 122 regulator-max-microvolt = <925000>;
209 }; 123 };
210 124
211 vreg_l2b_3p0: ldo2 { 125 vreg_l2b_3p0: ldo2 {
212 regulator-min-microvol 126 regulator-min-microvolt = <2700000>;
213 regulator-max-microvol 127 regulator-max-microvolt = <3544000>;
214 }; 128 };
215 129
216 vreg_l6b_1p2: ldo6 { 130 vreg_l6b_1p2: ldo6 {
217 regulator-min-microvol 131 regulator-min-microvolt = <1140000>;
218 regulator-max-microvol 132 regulator-max-microvolt = <1260000>;
219 }; 133 };
220 134
221 vreg_l7b_2p9: ldo7 { 135 vreg_l7b_2p9: ldo7 {
222 regulator-min-microvol 136 regulator-min-microvolt = <2960000>;
223 regulator-max-microvol 137 regulator-max-microvolt = <2960000>;
224 }; 138 };
225 139
226 vreg_l8b_0p9: ldo8 { 140 vreg_l8b_0p9: ldo8 {
227 regulator-min-microvol 141 regulator-min-microvolt = <870000>;
228 regulator-max-microvol 142 regulator-max-microvolt = <970000>;
229 }; 143 };
230 144
231 vreg_l9b_1p2: ldo9 { 145 vreg_l9b_1p2: ldo9 {
232 regulator-min-microvol 146 regulator-min-microvolt = <1080000>;
233 regulator-max-microvol 147 regulator-max-microvolt = <1304000>;
234 }; 148 };
235 149
236 vreg_l11b_1p7: ldo11 { 150 vreg_l11b_1p7: ldo11 {
237 regulator-min-microvol 151 regulator-min-microvolt = <1504000>;
238 regulator-max-microvol 152 regulator-max-microvolt = <2000000>;
239 }; 153 };
240 154
241 vreg_l12b_0p8: ldo12 { 155 vreg_l12b_0p8: ldo12 {
242 regulator-min-microvol 156 regulator-min-microvolt = <751000>;
243 regulator-max-microvol 157 regulator-max-microvolt = <824000>;
244 }; 158 };
245 159
246 vreg_l13b_0p8: ldo13 { 160 vreg_l13b_0p8: ldo13 {
247 regulator-min-microvol 161 regulator-min-microvolt = <530000>;
248 regulator-max-microvol 162 regulator-max-microvolt = <824000>;
249 }; 163 };
250 164
251 vreg_l14b_1p2: ldo14 { 165 vreg_l14b_1p2: ldo14 {
252 regulator-min-microvol 166 regulator-min-microvolt = <1080000>;
253 regulator-max-microvol 167 regulator-max-microvolt = <1304000>;
254 }; 168 };
255 169
256 vreg_l15b_0p8: ldo15 { 170 vreg_l15b_0p8: ldo15 {
257 regulator-min-microvol 171 regulator-min-microvolt = <765000>;
258 regulator-max-microvol 172 regulator-max-microvolt = <1020000>;
259 }; 173 };
260 174
261 vreg_l16b_1p2: ldo16 { 175 vreg_l16b_1p2: ldo16 {
262 regulator-min-microvol 176 regulator-min-microvolt = <1100000>;
263 regulator-max-microvol 177 regulator-max-microvolt = <1300000>;
264 }; 178 };
265 179
266 vreg_l17b_1p8: ldo17 { 180 vreg_l17b_1p8: ldo17 {
267 regulator-min-microvol 181 regulator-min-microvolt = <1700000>;
268 regulator-max-microvol 182 regulator-max-microvolt = <1900000>;
269 }; 183 };
270 184
271 vreg_l18b_1p8: ldo18 { 185 vreg_l18b_1p8: ldo18 {
272 regulator-min-microvol 186 regulator-min-microvolt = <1800000>;
273 regulator-max-microvol 187 regulator-max-microvolt = <2000000>;
274 }; 188 };
275 189
276 vreg_l19b_1p8: ldo19 { 190 vreg_l19b_1p8: ldo19 {
277 regulator-min-microvol 191 regulator-min-microvolt = <1800000>;
278 regulator-max-microvol 192 regulator-max-microvolt = <1800000>;
279 }; 193 };
280 }; 194 };
281 195
282 regulators-1 { !! 196 pm8350c-regulators {
283 compatible = "qcom,pm8350c-rpm 197 compatible = "qcom,pm8350c-rpmh-regulators";
284 qcom,pmic-id = "c"; 198 qcom,pmic-id = "c";
285 199
286 vreg_s1c_2p2: smps1 { 200 vreg_s1c_2p2: smps1 {
287 regulator-min-microvol 201 regulator-min-microvolt = <2190000>;
288 regulator-max-microvol 202 regulator-max-microvolt = <2210000>;
289 }; 203 };
290 204
291 vreg_s9c_1p0: smps9 { 205 vreg_s9c_1p0: smps9 {
292 regulator-min-microvol 206 regulator-min-microvolt = <1010000>;
293 regulator-max-microvol 207 regulator-max-microvolt = <1170000>;
294 }; 208 };
295 209
296 vreg_l1c_1p8: ldo1 { 210 vreg_l1c_1p8: ldo1 {
297 regulator-min-microvol 211 regulator-min-microvolt = <1800000>;
298 regulator-max-microvol 212 regulator-max-microvolt = <1980000>;
299 }; 213 };
300 214
301 vreg_l2c_1p8: ldo2 { 215 vreg_l2c_1p8: ldo2 {
302 regulator-min-microvol 216 regulator-min-microvolt = <1620000>;
303 regulator-max-microvol 217 regulator-max-microvolt = <1980000>;
304 }; 218 };
305 219
306 vreg_l3c_3p0: ldo3 { 220 vreg_l3c_3p0: ldo3 {
307 regulator-min-microvol 221 regulator-min-microvolt = <2800000>;
308 regulator-max-microvol 222 regulator-max-microvolt = <3540000>;
309 }; 223 };
310 224
311 vreg_l4c_1p8: ldo4 { 225 vreg_l4c_1p8: ldo4 {
312 regulator-min-microvol 226 regulator-min-microvolt = <1620000>;
313 regulator-max-microvol 227 regulator-max-microvolt = <3300000>;
314 }; 228 };
315 229
316 vreg_l5c_1p8: ldo5 { 230 vreg_l5c_1p8: ldo5 {
317 regulator-min-microvol 231 regulator-min-microvolt = <1620000>;
318 regulator-max-microvol 232 regulator-max-microvolt = <3300000>;
319 }; 233 };
320 234
321 vreg_l6c_2p9: ldo6 { 235 vreg_l6c_2p9: ldo6 {
322 regulator-min-microvol 236 regulator-min-microvolt = <1800000>;
323 regulator-max-microvol 237 regulator-max-microvolt = <2950000>;
324 }; 238 };
325 239
326 vreg_l7c_3p0: ldo7 { 240 vreg_l7c_3p0: ldo7 {
327 regulator-min-microvol 241 regulator-min-microvolt = <3000000>;
328 regulator-max-microvol 242 regulator-max-microvolt = <3544000>;
329 }; 243 };
330 244
331 vreg_l8c_1p8: ldo8 { 245 vreg_l8c_1p8: ldo8 {
332 regulator-min-microvol 246 regulator-min-microvolt = <1620000>;
333 regulator-max-microvol 247 regulator-max-microvolt = <2000000>;
334 }; 248 };
335 249
336 vreg_l9c_2p9: ldo9 { 250 vreg_l9c_2p9: ldo9 {
337 regulator-min-microvol 251 regulator-min-microvolt = <2960000>;
338 regulator-max-microvol 252 regulator-max-microvolt = <2960000>;
339 }; 253 };
340 254
341 vreg_l10c_0p8: ldo10 { 255 vreg_l10c_0p8: ldo10 {
342 regulator-min-microvol 256 regulator-min-microvolt = <720000>;
343 regulator-max-microvol 257 regulator-max-microvolt = <1050000>;
344 }; 258 };
345 259
346 vreg_l11c_2p8: ldo11 { 260 vreg_l11c_2p8: ldo11 {
347 regulator-min-microvol 261 regulator-min-microvolt = <2800000>;
348 regulator-max-microvol 262 regulator-max-microvolt = <3544000>;
349 }; 263 };
350 264
351 vreg_l12c_1p8: ldo12 { 265 vreg_l12c_1p8: ldo12 {
352 regulator-min-microvol 266 regulator-min-microvolt = <1650000>;
353 regulator-max-microvol 267 regulator-max-microvolt = <2000000>;
354 }; 268 };
355 269
356 vreg_l13c_3p0: ldo13 { 270 vreg_l13c_3p0: ldo13 {
357 regulator-min-microvol 271 regulator-min-microvolt = <2700000>;
358 regulator-max-microvol 272 regulator-max-microvolt = <3544000>;
359 }; 273 };
360 274
361 vreg_bob: bob { 275 vreg_bob: bob {
362 regulator-min-microvol 276 regulator-min-microvolt = <3008000>;
363 regulator-max-microvol 277 regulator-max-microvolt = <3960000>;
364 }; 278 };
365 }; 279 };
366 }; 280 };
367 281
368 &gpi_dma0 { !! 282 &ipa {
369 status = "okay"; <<
370 }; <<
371 <<
372 &gpi_dma1 { <<
373 status = "okay"; 283 status = "okay";
374 }; !! 284 modem-init;
375 <<
376 &lpass_cpu { <<
377 status = "okay"; <<
378 <<
379 pinctrl-names = "default"; <<
380 pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sc <<
381 <<
382 dai-link@1 { <<
383 reg = <MI2S_SECONDARY>; <<
384 qcom,playback-sd-lines = <0>; <<
385 }; <<
386 <<
387 dai-link@5 { <<
388 reg = <LPASS_DP_RX>; <<
389 }; <<
390 <<
391 dai-link@6 { <<
392 reg = <LPASS_CDC_DMA_RX0>; <<
393 }; <<
394 <<
395 dai-link@19 { <<
396 reg = <LPASS_CDC_DMA_TX3>; <<
397 }; <<
398 <<
399 dai-link@25 { <<
400 reg = <LPASS_CDC_DMA_VA_TX0>; <<
401 }; <<
402 }; <<
403 <<
404 &lpass_rx_macro { <<
405 status = "okay"; <<
406 }; <<
407 <<
408 &lpass_tx_macro { <<
409 status = "okay"; <<
410 }; <<
411 <<
412 &lpass_va_macro { <<
413 status = "okay"; <<
414 vdd-micb-supply = <&vreg_bob>; <<
415 }; 285 };
416 286
417 &pcie1 { 287 &pcie1 {
418 status = "okay"; 288 status = "okay";
419 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW !! 289 perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>;
420 290
421 vddpe-3v3-supply = <&nvme_3v3_regulato 291 vddpe-3v3-supply = <&nvme_3v3_regulator>;
422 292
423 pinctrl-names = "default"; 293 pinctrl-names = "default";
424 pinctrl-0 = <&pcie1_reset_n>, <&pcie1_ 294 pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
425 }; 295 };
426 296
427 &pcie1_phy { 297 &pcie1_phy {
428 status = "okay"; 298 status = "okay";
429 299
430 vdda-phy-supply = <&vreg_l10c_0p8>; 300 vdda-phy-supply = <&vreg_l10c_0p8>;
431 vdda-pll-supply = <&vreg_l6b_1p2>; 301 vdda-pll-supply = <&vreg_l6b_1p2>;
432 }; 302 };
433 303
434 &pmk8350_vadc { 304 &pmk8350_vadc {
435 channel@3 { !! 305 pmk8350_die_temp {
436 reg = <PMK8350_ADC7_DIE_TEMP>; 306 reg = <PMK8350_ADC7_DIE_TEMP>;
437 label = "pmk8350_die_temp"; 307 label = "pmk8350_die_temp";
438 qcom,pre-scaling = <1 1>; 308 qcom,pre-scaling = <1 1>;
439 }; 309 };
440 }; 310 };
441 311
442 &qfprom { 312 &qfprom {
443 vcc-supply = <&vreg_l1c_1p8>; 313 vcc-supply = <&vreg_l1c_1p8>;
444 }; 314 };
445 315
>> 316 &qspi {
>> 317 status = "okay";
>> 318 pinctrl-names = "default";
>> 319 pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data01>;
>> 320
>> 321 flash@0 {
>> 322 compatible = "jedec,spi-nor";
>> 323 reg = <0>;
>> 324 spi-max-frequency = <37500000>;
>> 325 spi-tx-bus-width = <2>;
>> 326 spi-rx-bus-width = <2>;
>> 327 };
>> 328 };
>> 329
446 &qupv3_id_0 { 330 &qupv3_id_0 {
447 status = "okay"; 331 status = "okay";
448 }; 332 };
449 333
450 &qupv3_id_1 { 334 &qupv3_id_1 {
451 status = "okay"; 335 status = "okay";
452 }; 336 };
453 337
>> 338 &remoteproc_mpss {
>> 339 status = "okay";
>> 340 compatible = "qcom,sc7280-mss-pil";
>> 341 iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
>> 342 memory-region = <&mba_mem &mpss_mem>;
>> 343 };
>> 344
454 &sdhc_1 { 345 &sdhc_1 {
455 status = "okay"; 346 status = "okay";
456 347
>> 348 pinctrl-names = "default", "sleep";
>> 349 pinctrl-0 = <&sdc1_on>;
>> 350 pinctrl-1 = <&sdc1_off>;
>> 351
457 non-removable; 352 non-removable;
458 no-sd; 353 no-sd;
459 no-sdio; 354 no-sdio;
460 355
461 vmmc-supply = <&vreg_l7b_2p9>; 356 vmmc-supply = <&vreg_l7b_2p9>;
462 vqmmc-supply = <&vreg_l19b_1p8>; 357 vqmmc-supply = <&vreg_l19b_1p8>;
463 }; 358 };
464 359
465 &sdhc_2 { 360 &sdhc_2 {
466 status = "okay"; 361 status = "okay";
467 362
468 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, !! 363 pinctrl-names = "default", "sleep";
469 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_ !! 364 pinctrl-0 = <&sdc2_on>;
>> 365 pinctrl-1 = <&sdc2_off>;
470 366
471 vmmc-supply = <&vreg_l9c_2p9>; 367 vmmc-supply = <&vreg_l9c_2p9>;
472 vqmmc-supply = <&vreg_l6c_2p9>; 368 vqmmc-supply = <&vreg_l6c_2p9>;
473 369
474 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 370 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
475 }; 371 };
476 372
477 &swr0 { <<
478 status = "okay"; <<
479 <<
480 wcd_rx: codec@0,4 { <<
481 compatible = "sdw20217010d00"; <<
482 reg = <0 4>; <<
483 qcom,rx-port-mapping = <1 2 3 <<
484 }; <<
485 }; <<
486 <<
487 &swr1 { <<
488 status = "okay"; <<
489 <<
490 wcd_tx: codec@0,3 { <<
491 compatible = "sdw20217010d00"; <<
492 reg = <0 3>; <<
493 qcom,tx-port-mapping = <1 2 3 <<
494 }; <<
495 }; <<
496 <<
497 &uart5 { 373 &uart5 {
498 status = "okay"; !! 374 compatible = "qcom,geni-debug-uart";
499 }; <<
500 <<
501 &ufs_mem_hc { <<
502 reset-gpios = <&tlmm 175 GPIO_ACTIVE_L <<
503 vcc-supply = <&vreg_l7b_2p9>; <<
504 vcc-max-microamp = <800000>; <<
505 vccq-supply = <&vreg_l9b_1p2>; <<
506 vccq-max-microamp = <900000>; <<
507 vccq2-supply = <&vreg_l9b_1p2>; <<
508 vccq2-max-microamp = <900000>; <<
509 <<
510 status = "okay"; <<
511 }; <<
512 <<
513 &ufs_mem_phy { <<
514 vdda-phy-supply = <&vreg_l10c_0p8>; <<
515 vdda-pll-supply = <&vreg_l6b_1p2>; <<
516 <<
517 status = "okay"; 375 status = "okay";
518 }; 376 };
519 377
520 &usb_1 { 378 &usb_1 {
521 status = "okay"; 379 status = "okay";
522 }; 380 };
523 381
524 &usb_1_dwc3 { 382 &usb_1_dwc3 {
525 dr_mode = "host"; 383 dr_mode = "host";
526 }; 384 };
527 385
528 &usb_1_hsphy { 386 &usb_1_hsphy {
529 status = "okay"; 387 status = "okay";
530 388
531 vdda-pll-supply = <&vreg_l10c_0p8>; 389 vdda-pll-supply = <&vreg_l10c_0p8>;
532 vdda33-supply = <&vreg_l2b_3p0>; 390 vdda33-supply = <&vreg_l2b_3p0>;
533 vdda18-supply = <&vreg_l1c_1p8>; 391 vdda18-supply = <&vreg_l1c_1p8>;
534 qcom,hs-rise-fall-time-bp = <0>; <<
535 qcom,squelch-detector-bp = <(-2090)>; <<
536 qcom,hs-disconnect-bp = <1743>; <<
537 qcom,hs-amplitude-bp = <1780>; <<
538 qcom,hs-crossover-voltage-microvolt = <<
539 qcom,hs-output-impedance-micro-ohms = <<
540 }; 392 };
541 393
542 &usb_1_qmpphy { 394 &usb_1_qmpphy {
543 status = "okay"; 395 status = "okay";
544 396
545 vdda-phy-supply = <&vreg_l6b_1p2>; 397 vdda-phy-supply = <&vreg_l6b_1p2>;
546 vdda-pll-supply = <&vreg_l1b_0p8>; 398 vdda-pll-supply = <&vreg_l1b_0p8>;
547 }; 399 };
548 400
549 &uart7 { !! 401 &usb_2 {
550 status = "okay"; 402 status = "okay";
551 <<
552 /delete-property/interrupts; <<
553 interrupts-extended = <&intc GIC_SPI 6 <<
554 <&tlmm 31 IRQ_ <<
555 pinctrl-names = "default", "sleep"; <<
556 pinctrl-1 = <&qup_uart7_sleep_cts>, <& <<
557 <<
558 bluetooth: bluetooth { <<
559 compatible = "qcom,wcn6750-bt" <<
560 pinctrl-names = "default"; <<
561 pinctrl-0 = <&bt_en>, <&sw_ctr <<
562 enable-gpios = <&tlmm 85 GPIO_ <<
563 swctrl-gpios = <&tlmm 86 GPIO_ <<
564 vddaon-supply = <&vreg_s7b_0p9 <<
565 vddbtcxmx-supply = <&vreg_s7b_ <<
566 vddrfacmn-supply = <&vreg_s7b_ <<
567 vddrfa0p8-supply = <&vreg_s7b_ <<
568 vddrfa1p7-supply = <&vreg_s1b_ <<
569 vddrfa1p2-supply = <&vreg_s8b_ <<
570 vddrfa2p2-supply = <&vreg_s1c_ <<
571 vddasd-supply = <&vreg_l11c_2p <<
572 max-speed = <3200000>; <<
573 }; <<
574 }; <<
575 <<
576 /* PINCTRL - additions to nodes defined in sc7 <<
577 <<
578 &dp_hot_plug_det { <<
579 bias-disable; <<
580 }; <<
581 <<
582 &lpass_dmic01_clk { <<
583 drive-strength = <8>; <<
584 bias-disable; <<
585 }; 403 };
586 404
587 &lpass_dmic01_data { !! 405 &usb_2_dwc3 {
588 bias-pull-down; !! 406 dr_mode = "peripheral";
589 }; 407 };
590 408
591 &lpass_dmic23_clk { !! 409 &usb_2_hsphy {
592 drive-strength = <8>; !! 410 status = "okay";
593 bias-disable; <<
594 }; <<
595 <<
596 &lpass_dmic23_data { <<
597 bias-pull-down; <<
598 }; <<
599 <<
600 &lpass_rx_swr_clk { <<
601 drive-strength = <2>; <<
602 slew-rate = <1>; <<
603 bias-disable; <<
604 }; <<
605 <<
606 &lpass_rx_swr_data { <<
607 drive-strength = <2>; <<
608 slew-rate = <1>; <<
609 bias-bus-hold; <<
610 }; <<
611 <<
612 &lpass_tx_swr_clk { <<
613 drive-strength = <2>; <<
614 slew-rate = <1>; <<
615 bias-disable; <<
616 }; <<
617 411
618 &lpass_tx_swr_data { !! 412 vdda-pll-supply = <&vreg_l10c_0p8>;
619 drive-strength = <2>; !! 413 vdda33-supply = <&vreg_l2b_3p0>;
620 slew-rate = <1>; !! 414 vdda18-supply = <&vreg_l1c_1p8>;
621 bias-bus-hold; <<
622 }; 415 };
623 416
624 &mi2s1_data0 { !! 417 &uart7 {
625 drive-strength = <6>; !! 418 status = "okay";
626 bias-disable; <<
627 }; <<
628 419
629 &mi2s1_sclk { !! 420 /delete-property/interrupts;
630 drive-strength = <6>; !! 421 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
631 bias-disable; !! 422 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
>> 423 pinctrl-names = "default", "sleep";
>> 424 pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
632 }; 425 };
633 426
634 &mi2s1_ws { !! 427 /* PINCTRL - additions to nodes defined in sc7280.dtsi */
635 drive-strength = <6>; <<
636 }; <<
637 428
638 &pm7325_gpios { 429 &pm7325_gpios {
639 key_vol_up_default: key-vol-up-state { !! 430 key_vol_up_default: key-vol-up-default {
640 pins = "gpio6"; 431 pins = "gpio6";
641 function = "normal"; 432 function = "normal";
642 input-enable; 433 input-enable;
643 bias-pull-up; 434 bias-pull-up;
644 power-source = <0>; 435 power-source = <0>;
645 qcom,drive-strength = <3>; 436 qcom,drive-strength = <3>;
646 }; 437 };
647 }; 438 };
648 439
649 &pcie1_clkreq_n { <<
650 bias-pull-up; <<
651 drive-strength = <2>; <<
652 }; <<
653 <<
654 &qspi_cs0 { 440 &qspi_cs0 {
655 bias-disable; /* External pu !! 441 bias-disable;
656 }; 442 };
657 443
658 &qspi_clk { 444 &qspi_clk {
659 bias-pull-down; /* No external !! 445 bias-disable;
660 }; <<
661 <<
662 &qspi_data0 { <<
663 bias-pull-down; /* No external <<
664 }; 446 };
665 447
666 &qspi_data1 { !! 448 &qspi_data01 {
667 bias-pull-down; /* No external !! 449 /* High-Z when no transfers; nice to park the lines */
>> 450 bias-pull-up;
668 }; 451 };
669 452
670 &qup_uart5_tx { 453 &qup_uart5_tx {
671 drive-strength = <2>; 454 drive-strength = <2>;
672 bias-disable; 455 bias-disable;
673 }; 456 };
674 457
675 &qup_uart5_rx { 458 &qup_uart5_rx {
676 drive-strength = <2>; 459 drive-strength = <2>;
677 bias-pull-up; 460 bias-pull-up;
678 }; 461 };
679 462
680 &qup_uart7_cts { 463 &qup_uart7_cts {
681 /* 464 /*
682 * Configure a bias-bus-hold on CTS to 465 * Configure a bias-bus-hold on CTS to lower power
683 * usage when Bluetooth is turned off. 466 * usage when Bluetooth is turned off. Bus hold will
684 * maintain a low power state regardle 467 * maintain a low power state regardless of whether
685 * the Bluetooth module drives the pin 468 * the Bluetooth module drives the pin in either
686 * direction or leaves the pin fully u 469 * direction or leaves the pin fully unpowered.
687 */ 470 */
688 bias-bus-hold; 471 bias-bus-hold;
689 }; 472 };
690 473
691 &qup_uart7_rts { 474 &qup_uart7_rts {
692 /* We'll drive RTS, so no pull */ 475 /* We'll drive RTS, so no pull */
693 drive-strength = <2>; 476 drive-strength = <2>;
694 bias-disable; 477 bias-disable;
695 }; 478 };
696 479
697 &qup_uart7_tx { 480 &qup_uart7_tx {
698 /* We'll drive TX, so no pull */ 481 /* We'll drive TX, so no pull */
699 drive-strength = <2>; 482 drive-strength = <2>;
700 bias-disable; 483 bias-disable;
701 }; 484 };
702 485
703 &qup_uart7_rx { 486 &qup_uart7_rx {
704 /* 487 /*
705 * Configure a pull-up on RX. This is 488 * Configure a pull-up on RX. This is needed to avoid
706 * garbage data when the TX pin of the 489 * garbage data when the TX pin of the Bluetooth module is
707 * in tri-state (module powered off or 490 * in tri-state (module powered off or not driving the
708 * signal yet). 491 * signal yet).
709 */ 492 */
710 bias-pull-up; 493 bias-pull-up;
711 }; 494 };
712 495
713 &sdc1_clk { <<
714 bias-disable; <<
715 drive-strength = <16>; <<
716 }; <<
717 <<
718 &sdc1_cmd { <<
719 bias-pull-up; <<
720 drive-strength = <10>; <<
721 }; <<
722 <<
723 &sdc1_data { <<
724 bias-pull-up; <<
725 drive-strength = <10>; <<
726 }; <<
727 <<
728 &sdc1_rclk { <<
729 bias-pull-down; <<
730 }; <<
731 <<
732 &sdc2_clk { <<
733 bias-disable; <<
734 drive-strength = <16>; <<
735 }; <<
736 <<
737 &sdc2_cmd { <<
738 bias-pull-up; <<
739 drive-strength = <10>; <<
740 }; <<
741 <<
742 &sdc2_data { <<
743 bias-pull-up; <<
744 drive-strength = <10>; <<
745 }; <<
746 <<
747 &tlmm { 496 &tlmm {
748 amp_en: amp-en-state { !! 497 nvme_pwren: nvme-pwren {
749 pins = "gpio63"; <<
750 function = "gpio"; <<
751 bias-pull-down; <<
752 drive-strength = <2>; <<
753 }; <<
754 <<
755 bt_en: bt-en-state { <<
756 pins = "gpio85"; <<
757 function = "gpio"; <<
758 output-low; <<
759 bias-disable; <<
760 }; <<
761 <<
762 nvme_pwren: nvme-pwren-state { <<
763 function = "gpio"; 498 function = "gpio";
764 }; 499 };
765 500
766 pcie1_reset_n: pcie1-reset-n-state { !! 501 pcie1_reset_n: pcie1-reset-n {
767 pins = "gpio2"; 502 pins = "gpio2";
768 function = "gpio"; 503 function = "gpio";
769 504
770 drive-strength = <16>; 505 drive-strength = <16>;
771 output-low; 506 output-low;
772 bias-disable; 507 bias-disable;
773 }; 508 };
774 509
775 pcie1_wake_n: pcie1-wake-n-state { !! 510 pcie1_wake_n: pcie1-wake-n {
776 pins = "gpio3"; 511 pins = "gpio3";
777 function = "gpio"; 512 function = "gpio";
778 513
779 drive-strength = <2>; 514 drive-strength = <2>;
780 bias-pull-up; 515 bias-pull-up;
781 }; 516 };
782 517
783 qup_uart7_sleep_cts: qup-uart7-sleep-c !! 518 qup_uart7_sleep_cts: qup-uart7-sleep-cts {
784 pins = "gpio28"; 519 pins = "gpio28";
785 function = "gpio"; 520 function = "gpio";
786 /* 521 /*
787 * Configure a bias-bus-hold o 522 * Configure a bias-bus-hold on CTS to lower power
788 * usage when Bluetooth is tur 523 * usage when Bluetooth is turned off. Bus hold will
789 * maintain a low power state 524 * maintain a low power state regardless of whether
790 * the Bluetooth module drives 525 * the Bluetooth module drives the pin in either
791 * direction or leaves the pin 526 * direction or leaves the pin fully unpowered.
792 */ 527 */
793 bias-bus-hold; 528 bias-bus-hold;
794 }; 529 };
795 530
796 qup_uart7_sleep_rts: qup-uart7-sleep-r !! 531 qup_uart7_sleep_rts: qup-uart7-sleep-rts {
797 pins = "gpio29"; 532 pins = "gpio29";
798 function = "gpio"; 533 function = "gpio";
799 /* 534 /*
800 * Configure pull-down on RTS. 535 * Configure pull-down on RTS. As RTS is active low
801 * signal, pull it low to indi 536 * signal, pull it low to indicate the BT SoC that it
802 * can wakeup the system anyti 537 * can wakeup the system anytime from suspend state by
803 * pulling RX low (by sending 538 * pulling RX low (by sending wakeup bytes).
804 */ 539 */
805 bias-pull-down; 540 bias-pull-down;
806 }; 541 };
807 542
808 qup_uart7_sleep_tx: qup-uart7-sleep-tx !! 543 qup_uart7_sleep_tx: qup-uart7-sleep-tx {
809 pins = "gpio30"; 544 pins = "gpio30";
810 function = "gpio"; 545 function = "gpio";
811 /* 546 /*
812 * Configure pull-up on TX whe 547 * Configure pull-up on TX when it isn't actively driven
813 * to prevent BT SoC from rece 548 * to prevent BT SoC from receiving garbage during sleep.
814 */ 549 */
815 bias-pull-up; 550 bias-pull-up;
816 }; 551 };
817 552
818 qup_uart7_sleep_rx: qup-uart7-sleep-rx !! 553 qup_uart7_sleep_rx: qup-uart7-sleep-rx {
819 pins = "gpio31"; 554 pins = "gpio31";
820 function = "gpio"; 555 function = "gpio";
821 /* 556 /*
822 * Configure a pull-up on RX. 557 * Configure a pull-up on RX. This is needed to avoid
823 * garbage data when the TX pi 558 * garbage data when the TX pin of the Bluetooth module
824 * is floating which may cause 559 * is floating which may cause spurious wakeups.
825 */ 560 */
826 bias-pull-up; 561 bias-pull-up;
827 }; 562 };
>> 563 };
>> 564
>> 565 &sdc1_on {
>> 566 clk {
>> 567 bias-disable;
>> 568 drive-strength = <16>;
>> 569 };
>> 570
>> 571 cmd {
>> 572 bias-pull-up;
>> 573 drive-strength = <10>;
>> 574 };
828 575
829 sd_cd: sd-cd-state { !! 576 data {
830 pins = "gpio91"; <<
831 function = "gpio"; <<
832 bias-pull-up; 577 bias-pull-up;
>> 578 drive-strength = <10>;
833 }; 579 };
834 580
835 sw_ctrl: sw-ctrl-state { !! 581 rclk {
836 pins = "gpio86"; <<
837 function = "gpio"; <<
838 bias-pull-down; 582 bias-pull-down;
839 }; 583 };
>> 584 };
840 585
841 wcd_reset_n: wcd-reset-n-state { !! 586 &sdc2_on {
842 pins = "gpio83"; !! 587 clk {
843 function = "gpio"; !! 588 bias-disable;
844 drive-strength = <8>; !! 589 drive-strength = <16>;
845 }; 590 };
846 591
847 wcd_reset_n_sleep: wcd-reset-n-sleep-s !! 592 cmd {
848 pins = "gpio83"; !! 593 bias-pull-up;
849 function = "gpio"; !! 594 drive-strength = <10>;
850 drive-strength = <8>; !! 595 };
851 bias-disable; !! 596
>> 597 data {
>> 598 bias-pull-up;
>> 599 drive-strength = <10>;
>> 600 };
>> 601
>> 602 sd-cd {
>> 603 pins = "gpio91";
>> 604 bias-pull-up;
852 }; 605 };
853 }; 606 };
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