1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * sc7280 IDP board device tree source (common 3 * sc7280 IDP board device tree source (common between SKU1 and SKU2)
4 * 4 *
5 * Copyright (c) 2021, The Linux Foundation. A 5 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
6 */ 6 */
7 7
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk83 8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes. 9 #include <dt-bindings/input/linux-event-codes.h>
10 #include "sc7280.dtsi" 10 #include "sc7280.dtsi"
11 #include "pm7325.dtsi" 11 #include "pm7325.dtsi"
12 #include "pm8350c.dtsi" 12 #include "pm8350c.dtsi"
13 #include "pmk8350.dtsi" 13 #include "pmk8350.dtsi"
14 14
15 #include "sc7280-chrome-common.dtsi" 15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi" 16 #include "sc7280-herobrine-lte-sku.dtsi"
17 17
18 / { 18 / {
19 aliases { 19 aliases {
20 bluetooth0 = &bluetooth; 20 bluetooth0 = &bluetooth;
21 serial1 = &uart7; 21 serial1 = &uart7;
22 wifi0 = &wifi; <<
23 }; 22 };
24 23
25 max98360a: audio-codec-0 { 24 max98360a: audio-codec-0 {
26 compatible = "maxim,max98360a" 25 compatible = "maxim,max98360a";
27 pinctrl-names = "default"; 26 pinctrl-names = "default";
28 pinctrl-0 = <&_en>; 27 pinctrl-0 = <&_en>;
29 sdmode-gpios = <&tlmm 63 GPIO_ 28 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
30 #sound-dai-cells = <0>; 29 #sound-dai-cells = <0>;
31 }; 30 };
32 31
33 wcd9385: audio-codec-1 { 32 wcd9385: audio-codec-1 {
34 compatible = "qcom,wcd9385-cod 33 compatible = "qcom,wcd9385-codec";
35 pinctrl-names = "default", "sl 34 pinctrl-names = "default", "sleep";
36 pinctrl-0 = <&wcd_reset_n>; 35 pinctrl-0 = <&wcd_reset_n>;
37 pinctrl-1 = <&wcd_reset_n_slee 36 pinctrl-1 = <&wcd_reset_n_sleep>;
38 37
39 reset-gpios = <&tlmm 83 GPIO_A 38 reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>;
40 39
41 qcom,rx-device = <&wcd_rx>; 40 qcom,rx-device = <&wcd_rx>;
42 qcom,tx-device = <&wcd_tx>; 41 qcom,tx-device = <&wcd_tx>;
43 42
44 vdd-rxtx-supply = <&vreg_l18b_ 43 vdd-rxtx-supply = <&vreg_l18b_1p8>;
45 vdd-io-supply = <&vreg_l18b_1p 44 vdd-io-supply = <&vreg_l18b_1p8>;
46 vdd-buck-supply = <&vreg_l17b_ 45 vdd-buck-supply = <&vreg_l17b_1p8>;
47 vdd-mic-bias-supply = <&vreg_b 46 vdd-mic-bias-supply = <&vreg_bob>;
48 47
49 qcom,micbias1-microvolt = <180 48 qcom,micbias1-microvolt = <1800000>;
50 qcom,micbias2-microvolt = <180 49 qcom,micbias2-microvolt = <1800000>;
51 qcom,micbias3-microvolt = <180 50 qcom,micbias3-microvolt = <1800000>;
52 qcom,micbias4-microvolt = <180 51 qcom,micbias4-microvolt = <1800000>;
53 52
54 qcom,mbhc-buttons-vthreshold-m 53 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
55 54 500000 500000 500000>;
56 qcom,mbhc-headset-vthreshold-m 55 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
57 qcom,mbhc-headphone-vthreshold 56 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
58 #sound-dai-cells = <1>; 57 #sound-dai-cells = <1>;
59 }; 58 };
60 59
61 gpio-keys { 60 gpio-keys {
62 compatible = "gpio-keys"; 61 compatible = "gpio-keys";
63 label = "gpio-keys"; 62 label = "gpio-keys";
64 63
65 pinctrl-names = "default"; 64 pinctrl-names = "default";
66 pinctrl-0 = <&key_vol_up_defau 65 pinctrl-0 = <&key_vol_up_default>;
67 66
68 key-volume-up { 67 key-volume-up {
69 label = "volume_up"; 68 label = "volume_up";
70 gpios = <&pm7325_gpios 69 gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>;
71 linux,input-type = <1> 70 linux,input-type = <1>;
72 linux,code = <KEY_VOLU 71 linux,code = <KEY_VOLUMEUP>;
73 wakeup-source; !! 72 gpio-key,wakeup;
74 debounce-interval = <1 73 debounce-interval = <15>;
75 linux,can-disable; 74 linux,can-disable;
76 }; 75 };
77 }; 76 };
78 77
79 nvme_3v3_regulator: nvme-3v3-regulator 78 nvme_3v3_regulator: nvme-3v3-regulator {
80 compatible = "regulator-fixed" 79 compatible = "regulator-fixed";
81 regulator-name = "VLDO_3V3"; 80 regulator-name = "VLDO_3V3";
82 81
83 regulator-min-microvolt = <330 82 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <330 83 regulator-max-microvolt = <3300000>;
85 84
86 enable-active-high; 85 enable-active-high;
87 pinctrl-names = "default"; 86 pinctrl-names = "default";
88 pinctrl-0 = <&nvme_pwren>; 87 pinctrl-0 = <&nvme_pwren>;
89 }; 88 };
90 89
91 sound: sound { 90 sound: sound {
92 compatible = "google,sc7280-he 91 compatible = "google,sc7280-herobrine";
93 model = "sc7280-wcd938x-max983 92 model = "sc7280-wcd938x-max98360a-1mic";
94 93
95 audio-routing = 94 audio-routing =
96 "IN1_HPHL", "HPHL_OUT" 95 "IN1_HPHL", "HPHL_OUT",
97 "IN2_HPHR", "HPHR_OUT" 96 "IN2_HPHR", "HPHR_OUT",
98 "AMIC1", "MIC BIAS1", 97 "AMIC1", "MIC BIAS1",
99 "AMIC2", "MIC BIAS2", 98 "AMIC2", "MIC BIAS2",
100 "VA DMIC0", "MIC BIAS3 99 "VA DMIC0", "MIC BIAS3",
101 "VA DMIC1", "MIC BIAS3 100 "VA DMIC1", "MIC BIAS3",
102 "VA DMIC2", "MIC BIAS1 101 "VA DMIC2", "MIC BIAS1",
103 "VA DMIC3", "MIC BIAS1 102 "VA DMIC3", "MIC BIAS1",
104 "TX SWR_ADC0", "ADC1_O 103 "TX SWR_ADC0", "ADC1_OUTPUT",
105 "TX SWR_ADC1", "ADC2_O 104 "TX SWR_ADC1", "ADC2_OUTPUT",
106 "TX SWR_ADC2", "ADC3_O 105 "TX SWR_ADC2", "ADC3_OUTPUT",
107 "TX SWR_DMIC0", "DMIC1 106 "TX SWR_DMIC0", "DMIC1_OUTPUT",
108 "TX SWR_DMIC1", "DMIC2 107 "TX SWR_DMIC1", "DMIC2_OUTPUT",
109 "TX SWR_DMIC2", "DMIC3 108 "TX SWR_DMIC2", "DMIC3_OUTPUT",
110 "TX SWR_DMIC3", "DMIC4 109 "TX SWR_DMIC3", "DMIC4_OUTPUT",
111 "TX SWR_DMIC4", "DMIC5 110 "TX SWR_DMIC4", "DMIC5_OUTPUT",
112 "TX SWR_DMIC5", "DMIC6 111 "TX SWR_DMIC5", "DMIC6_OUTPUT",
113 "TX SWR_DMIC6", "DMIC7 112 "TX SWR_DMIC6", "DMIC7_OUTPUT",
114 "TX SWR_DMIC7", "DMIC8 113 "TX SWR_DMIC7", "DMIC8_OUTPUT";
115 114
>> 115 qcom,msm-mbhc-hphl-swh = <1>;
>> 116 qcom,msm-mbhc-gnd-swh = <1>;
>> 117
116 #address-cells = <1>; 118 #address-cells = <1>;
117 #size-cells = <0>; 119 #size-cells = <0>;
>> 120 #sound-dai-cells = <0>;
118 121
119 dai-link@0 { 122 dai-link@0 {
120 link-name = "MAX98360A 123 link-name = "MAX98360A";
121 reg = <0>; 124 reg = <0>;
122 125
123 cpu { 126 cpu {
124 sound-dai = <& 127 sound-dai = <&lpass_cpu MI2S_SECONDARY>;
125 }; 128 };
126 129
127 codec { 130 codec {
128 sound-dai = <& 131 sound-dai = <&max98360a>;
129 }; 132 };
130 }; 133 };
131 134
132 dai-link@1 { 135 dai-link@1 {
133 link-name = "DisplayPo 136 link-name = "DisplayPort";
134 reg = <1>; 137 reg = <1>;
135 138
136 cpu { 139 cpu {
137 sound-dai = <& 140 sound-dai = <&lpass_cpu LPASS_DP_RX>;
138 }; 141 };
139 142
140 codec { 143 codec {
141 sound-dai = <& 144 sound-dai = <&mdss_dp>;
142 }; 145 };
143 }; 146 };
144 147
145 dai-link@2 { 148 dai-link@2 {
146 link-name = "WCD9385 P 149 link-name = "WCD9385 Playback";
147 reg = <2>; 150 reg = <2>;
148 151
149 cpu { 152 cpu {
150 sound-dai = <& 153 sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
151 }; 154 };
152 155
153 codec { 156 codec {
154 sound-dai = <& 157 sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
155 }; 158 };
156 }; 159 };
157 160
158 dai-link@3 { 161 dai-link@3 {
159 link-name = "WCD9385 C 162 link-name = "WCD9385 Capture";
160 reg = <3>; 163 reg = <3>;
161 164
162 cpu { 165 cpu {
163 sound-dai = <& 166 sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
164 }; 167 };
165 168
166 codec { 169 codec {
167 sound-dai = <& 170 sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
168 }; 171 };
169 }; 172 };
170 173
171 dai-link@4 { 174 dai-link@4 {
172 link-name = "DMIC"; 175 link-name = "DMIC";
173 reg = <4>; 176 reg = <4>;
174 177
175 cpu { 178 cpu {
176 sound-dai = <& 179 sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
177 }; 180 };
178 181
179 codec { 182 codec {
180 sound-dai = <& 183 sound-dai = <&lpass_va_macro 0>;
181 }; 184 };
182 }; 185 };
183 }; 186 };
184 }; 187 };
185 188
186 &apps_rsc { 189 &apps_rsc {
187 regulators-0 { !! 190 pm7325-regulators {
188 compatible = "qcom,pm7325-rpmh 191 compatible = "qcom,pm7325-rpmh-regulators";
189 qcom,pmic-id = "b"; 192 qcom,pmic-id = "b";
190 193
191 vreg_s1b_1p8: smps1 { 194 vreg_s1b_1p8: smps1 {
192 regulator-min-microvol 195 regulator-min-microvolt = <1856000>;
193 regulator-max-microvol 196 regulator-max-microvolt = <2040000>;
194 }; 197 };
195 198
196 vreg_s7b_0p9: smps7 { 199 vreg_s7b_0p9: smps7 {
197 regulator-min-microvol 200 regulator-min-microvolt = <535000>;
198 regulator-max-microvol 201 regulator-max-microvolt = <1120000>;
199 }; 202 };
200 203
201 vreg_s8b_1p2: smps8 { 204 vreg_s8b_1p2: smps8 {
202 regulator-min-microvol 205 regulator-min-microvolt = <1256000>;
203 regulator-max-microvol 206 regulator-max-microvolt = <1500000>;
204 }; 207 };
205 208
206 vreg_l1b_0p8: ldo1 { 209 vreg_l1b_0p8: ldo1 {
207 regulator-min-microvol 210 regulator-min-microvolt = <825000>;
208 regulator-max-microvol 211 regulator-max-microvolt = <925000>;
209 }; 212 };
210 213
211 vreg_l2b_3p0: ldo2 { 214 vreg_l2b_3p0: ldo2 {
212 regulator-min-microvol 215 regulator-min-microvolt = <2700000>;
213 regulator-max-microvol 216 regulator-max-microvolt = <3544000>;
214 }; 217 };
215 218
216 vreg_l6b_1p2: ldo6 { 219 vreg_l6b_1p2: ldo6 {
217 regulator-min-microvol 220 regulator-min-microvolt = <1140000>;
218 regulator-max-microvol 221 regulator-max-microvolt = <1260000>;
219 }; 222 };
220 223
221 vreg_l7b_2p9: ldo7 { 224 vreg_l7b_2p9: ldo7 {
222 regulator-min-microvol 225 regulator-min-microvolt = <2960000>;
223 regulator-max-microvol 226 regulator-max-microvolt = <2960000>;
224 }; 227 };
225 228
226 vreg_l8b_0p9: ldo8 { 229 vreg_l8b_0p9: ldo8 {
227 regulator-min-microvol 230 regulator-min-microvolt = <870000>;
228 regulator-max-microvol 231 regulator-max-microvolt = <970000>;
229 }; 232 };
230 233
231 vreg_l9b_1p2: ldo9 { 234 vreg_l9b_1p2: ldo9 {
232 regulator-min-microvol 235 regulator-min-microvolt = <1080000>;
233 regulator-max-microvol 236 regulator-max-microvolt = <1304000>;
234 }; 237 };
235 238
236 vreg_l11b_1p7: ldo11 { 239 vreg_l11b_1p7: ldo11 {
237 regulator-min-microvol 240 regulator-min-microvolt = <1504000>;
238 regulator-max-microvol 241 regulator-max-microvolt = <2000000>;
239 }; 242 };
240 243
241 vreg_l12b_0p8: ldo12 { 244 vreg_l12b_0p8: ldo12 {
242 regulator-min-microvol 245 regulator-min-microvolt = <751000>;
243 regulator-max-microvol 246 regulator-max-microvolt = <824000>;
244 }; 247 };
245 248
246 vreg_l13b_0p8: ldo13 { 249 vreg_l13b_0p8: ldo13 {
247 regulator-min-microvol 250 regulator-min-microvolt = <530000>;
248 regulator-max-microvol 251 regulator-max-microvolt = <824000>;
249 }; 252 };
250 253
251 vreg_l14b_1p2: ldo14 { 254 vreg_l14b_1p2: ldo14 {
252 regulator-min-microvol 255 regulator-min-microvolt = <1080000>;
253 regulator-max-microvol 256 regulator-max-microvolt = <1304000>;
254 }; 257 };
255 258
256 vreg_l15b_0p8: ldo15 { 259 vreg_l15b_0p8: ldo15 {
257 regulator-min-microvol 260 regulator-min-microvolt = <765000>;
258 regulator-max-microvol 261 regulator-max-microvolt = <1020000>;
259 }; 262 };
260 263
261 vreg_l16b_1p2: ldo16 { 264 vreg_l16b_1p2: ldo16 {
262 regulator-min-microvol 265 regulator-min-microvolt = <1100000>;
263 regulator-max-microvol 266 regulator-max-microvolt = <1300000>;
264 }; 267 };
265 268
266 vreg_l17b_1p8: ldo17 { 269 vreg_l17b_1p8: ldo17 {
267 regulator-min-microvol 270 regulator-min-microvolt = <1700000>;
268 regulator-max-microvol 271 regulator-max-microvolt = <1900000>;
269 }; 272 };
270 273
271 vreg_l18b_1p8: ldo18 { 274 vreg_l18b_1p8: ldo18 {
272 regulator-min-microvol 275 regulator-min-microvolt = <1800000>;
273 regulator-max-microvol 276 regulator-max-microvolt = <2000000>;
274 }; 277 };
275 278
276 vreg_l19b_1p8: ldo19 { 279 vreg_l19b_1p8: ldo19 {
277 regulator-min-microvol 280 regulator-min-microvolt = <1800000>;
278 regulator-max-microvol 281 regulator-max-microvolt = <1800000>;
279 }; 282 };
280 }; 283 };
281 284
282 regulators-1 { !! 285 pm8350c-regulators {
283 compatible = "qcom,pm8350c-rpm 286 compatible = "qcom,pm8350c-rpmh-regulators";
284 qcom,pmic-id = "c"; 287 qcom,pmic-id = "c";
285 288
286 vreg_s1c_2p2: smps1 { 289 vreg_s1c_2p2: smps1 {
287 regulator-min-microvol 290 regulator-min-microvolt = <2190000>;
288 regulator-max-microvol 291 regulator-max-microvolt = <2210000>;
289 }; 292 };
290 293
291 vreg_s9c_1p0: smps9 { 294 vreg_s9c_1p0: smps9 {
292 regulator-min-microvol 295 regulator-min-microvolt = <1010000>;
293 regulator-max-microvol 296 regulator-max-microvolt = <1170000>;
294 }; 297 };
295 298
296 vreg_l1c_1p8: ldo1 { 299 vreg_l1c_1p8: ldo1 {
297 regulator-min-microvol 300 regulator-min-microvolt = <1800000>;
298 regulator-max-microvol 301 regulator-max-microvolt = <1980000>;
299 }; 302 };
300 303
301 vreg_l2c_1p8: ldo2 { 304 vreg_l2c_1p8: ldo2 {
302 regulator-min-microvol 305 regulator-min-microvolt = <1620000>;
303 regulator-max-microvol 306 regulator-max-microvolt = <1980000>;
304 }; 307 };
305 308
306 vreg_l3c_3p0: ldo3 { 309 vreg_l3c_3p0: ldo3 {
307 regulator-min-microvol 310 regulator-min-microvolt = <2800000>;
308 regulator-max-microvol 311 regulator-max-microvolt = <3540000>;
309 }; 312 };
310 313
311 vreg_l4c_1p8: ldo4 { 314 vreg_l4c_1p8: ldo4 {
312 regulator-min-microvol 315 regulator-min-microvolt = <1620000>;
313 regulator-max-microvol 316 regulator-max-microvolt = <3300000>;
314 }; 317 };
315 318
316 vreg_l5c_1p8: ldo5 { 319 vreg_l5c_1p8: ldo5 {
317 regulator-min-microvol 320 regulator-min-microvolt = <1620000>;
318 regulator-max-microvol 321 regulator-max-microvolt = <3300000>;
319 }; 322 };
320 323
321 vreg_l6c_2p9: ldo6 { 324 vreg_l6c_2p9: ldo6 {
322 regulator-min-microvol 325 regulator-min-microvolt = <1800000>;
323 regulator-max-microvol 326 regulator-max-microvolt = <2950000>;
324 }; 327 };
325 328
326 vreg_l7c_3p0: ldo7 { 329 vreg_l7c_3p0: ldo7 {
327 regulator-min-microvol 330 regulator-min-microvolt = <3000000>;
328 regulator-max-microvol 331 regulator-max-microvolt = <3544000>;
329 }; 332 };
330 333
331 vreg_l8c_1p8: ldo8 { 334 vreg_l8c_1p8: ldo8 {
332 regulator-min-microvol 335 regulator-min-microvolt = <1620000>;
333 regulator-max-microvol 336 regulator-max-microvolt = <2000000>;
334 }; 337 };
335 338
336 vreg_l9c_2p9: ldo9 { 339 vreg_l9c_2p9: ldo9 {
337 regulator-min-microvol 340 regulator-min-microvolt = <2960000>;
338 regulator-max-microvol 341 regulator-max-microvolt = <2960000>;
339 }; 342 };
340 343
341 vreg_l10c_0p8: ldo10 { 344 vreg_l10c_0p8: ldo10 {
342 regulator-min-microvol 345 regulator-min-microvolt = <720000>;
343 regulator-max-microvol 346 regulator-max-microvolt = <1050000>;
344 }; 347 };
345 348
346 vreg_l11c_2p8: ldo11 { 349 vreg_l11c_2p8: ldo11 {
347 regulator-min-microvol 350 regulator-min-microvolt = <2800000>;
348 regulator-max-microvol 351 regulator-max-microvolt = <3544000>;
349 }; 352 };
350 353
351 vreg_l12c_1p8: ldo12 { 354 vreg_l12c_1p8: ldo12 {
352 regulator-min-microvol 355 regulator-min-microvolt = <1650000>;
353 regulator-max-microvol 356 regulator-max-microvolt = <2000000>;
354 }; 357 };
355 358
356 vreg_l13c_3p0: ldo13 { 359 vreg_l13c_3p0: ldo13 {
357 regulator-min-microvol 360 regulator-min-microvolt = <2700000>;
358 regulator-max-microvol 361 regulator-max-microvolt = <3544000>;
359 }; 362 };
360 363
361 vreg_bob: bob { 364 vreg_bob: bob {
362 regulator-min-microvol 365 regulator-min-microvolt = <3008000>;
363 regulator-max-microvol 366 regulator-max-microvolt = <3960000>;
364 }; 367 };
365 }; 368 };
366 }; 369 };
367 370
368 &gpi_dma0 { 371 &gpi_dma0 {
369 status = "okay"; 372 status = "okay";
370 }; 373 };
371 374
372 &gpi_dma1 { 375 &gpi_dma1 {
373 status = "okay"; 376 status = "okay";
374 }; 377 };
375 378
>> 379 &ipa {
>> 380 status = "okay";
>> 381 modem-init;
>> 382 };
>> 383
376 &lpass_cpu { 384 &lpass_cpu {
377 status = "okay"; 385 status = "okay";
378 386
379 pinctrl-names = "default"; 387 pinctrl-names = "default";
380 pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sc 388 pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
381 389
382 dai-link@1 { 390 dai-link@1 {
383 reg = <MI2S_SECONDARY>; 391 reg = <MI2S_SECONDARY>;
384 qcom,playback-sd-lines = <0>; 392 qcom,playback-sd-lines = <0>;
385 }; 393 };
386 394
387 dai-link@5 { 395 dai-link@5 {
388 reg = <LPASS_DP_RX>; 396 reg = <LPASS_DP_RX>;
389 }; 397 };
390 398
391 dai-link@6 { 399 dai-link@6 {
392 reg = <LPASS_CDC_DMA_RX0>; 400 reg = <LPASS_CDC_DMA_RX0>;
393 }; 401 };
394 402
395 dai-link@19 { 403 dai-link@19 {
396 reg = <LPASS_CDC_DMA_TX3>; 404 reg = <LPASS_CDC_DMA_TX3>;
397 }; 405 };
398 406
399 dai-link@25 { 407 dai-link@25 {
400 reg = <LPASS_CDC_DMA_VA_TX0>; 408 reg = <LPASS_CDC_DMA_VA_TX0>;
401 }; 409 };
402 }; 410 };
403 411
404 &lpass_rx_macro { 412 &lpass_rx_macro {
405 status = "okay"; 413 status = "okay";
406 }; 414 };
407 415
408 &lpass_tx_macro { 416 &lpass_tx_macro {
409 status = "okay"; 417 status = "okay";
410 }; 418 };
411 419
412 &lpass_va_macro { 420 &lpass_va_macro {
413 status = "okay"; 421 status = "okay";
414 vdd-micb-supply = <&vreg_bob>; 422 vdd-micb-supply = <&vreg_bob>;
415 }; 423 };
416 424
417 &pcie1 { 425 &pcie1 {
418 status = "okay"; 426 status = "okay";
419 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW 427 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
420 428
421 vddpe-3v3-supply = <&nvme_3v3_regulato 429 vddpe-3v3-supply = <&nvme_3v3_regulator>;
422 430
423 pinctrl-names = "default"; 431 pinctrl-names = "default";
424 pinctrl-0 = <&pcie1_reset_n>, <&pcie1_ 432 pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
425 }; 433 };
426 434
427 &pcie1_phy { 435 &pcie1_phy {
428 status = "okay"; 436 status = "okay";
429 437
430 vdda-phy-supply = <&vreg_l10c_0p8>; 438 vdda-phy-supply = <&vreg_l10c_0p8>;
431 vdda-pll-supply = <&vreg_l6b_1p2>; 439 vdda-pll-supply = <&vreg_l6b_1p2>;
432 }; 440 };
433 441
434 &pmk8350_vadc { 442 &pmk8350_vadc {
435 channel@3 { !! 443 pmk8350-die-temp@3 {
436 reg = <PMK8350_ADC7_DIE_TEMP>; 444 reg = <PMK8350_ADC7_DIE_TEMP>;
437 label = "pmk8350_die_temp"; 445 label = "pmk8350_die_temp";
438 qcom,pre-scaling = <1 1>; 446 qcom,pre-scaling = <1 1>;
439 }; 447 };
440 }; 448 };
441 449
442 &qfprom { 450 &qfprom {
443 vcc-supply = <&vreg_l1c_1p8>; 451 vcc-supply = <&vreg_l1c_1p8>;
444 }; 452 };
445 453
446 &qupv3_id_0 { 454 &qupv3_id_0 {
447 status = "okay"; 455 status = "okay";
448 }; 456 };
449 457
450 &qupv3_id_1 { 458 &qupv3_id_1 {
451 status = "okay"; 459 status = "okay";
452 }; 460 };
453 461
454 &sdhc_1 { 462 &sdhc_1 {
455 status = "okay"; 463 status = "okay";
456 464
457 non-removable; 465 non-removable;
458 no-sd; 466 no-sd;
459 no-sdio; 467 no-sdio;
460 468
461 vmmc-supply = <&vreg_l7b_2p9>; 469 vmmc-supply = <&vreg_l7b_2p9>;
462 vqmmc-supply = <&vreg_l19b_1p8>; 470 vqmmc-supply = <&vreg_l19b_1p8>;
463 }; 471 };
464 472
465 &sdhc_2 { 473 &sdhc_2 {
466 status = "okay"; 474 status = "okay";
467 475
468 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, 476 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>;
469 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_ 477 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>;
470 478
471 vmmc-supply = <&vreg_l9c_2p9>; 479 vmmc-supply = <&vreg_l9c_2p9>;
472 vqmmc-supply = <&vreg_l6c_2p9>; 480 vqmmc-supply = <&vreg_l6c_2p9>;
473 481
474 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 482 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
475 }; 483 };
476 484
477 &swr0 { 485 &swr0 {
478 status = "okay"; 486 status = "okay";
479 487
480 wcd_rx: codec@0,4 { 488 wcd_rx: codec@0,4 {
481 compatible = "sdw20217010d00"; 489 compatible = "sdw20217010d00";
482 reg = <0 4>; 490 reg = <0 4>;
>> 491 #sound-dai-cells = <1>;
483 qcom,rx-port-mapping = <1 2 3 492 qcom,rx-port-mapping = <1 2 3 4 5>;
484 }; 493 };
485 }; 494 };
486 495
487 &swr1 { 496 &swr1 {
488 status = "okay"; 497 status = "okay";
489 498
490 wcd_tx: codec@0,3 { 499 wcd_tx: codec@0,3 {
491 compatible = "sdw20217010d00"; 500 compatible = "sdw20217010d00";
492 reg = <0 3>; 501 reg = <0 3>;
>> 502 #sound-dai-cells = <1>;
493 qcom,tx-port-mapping = <1 2 3 503 qcom,tx-port-mapping = <1 2 3 4>;
494 }; 504 };
495 }; 505 };
496 506
497 &uart5 { 507 &uart5 {
498 status = "okay"; !! 508 compatible = "qcom,geni-debug-uart";
499 }; <<
500 <<
501 &ufs_mem_hc { <<
502 reset-gpios = <&tlmm 175 GPIO_ACTIVE_L <<
503 vcc-supply = <&vreg_l7b_2p9>; <<
504 vcc-max-microamp = <800000>; <<
505 vccq-supply = <&vreg_l9b_1p2>; <<
506 vccq-max-microamp = <900000>; <<
507 vccq2-supply = <&vreg_l9b_1p2>; <<
508 vccq2-max-microamp = <900000>; <<
509 <<
510 status = "okay"; <<
511 }; <<
512 <<
513 &ufs_mem_phy { <<
514 vdda-phy-supply = <&vreg_l10c_0p8>; <<
515 vdda-pll-supply = <&vreg_l6b_1p2>; <<
516 <<
517 status = "okay"; 509 status = "okay";
518 }; 510 };
519 511
520 &usb_1 { 512 &usb_1 {
521 status = "okay"; 513 status = "okay";
522 }; 514 };
523 515
524 &usb_1_dwc3 { 516 &usb_1_dwc3 {
525 dr_mode = "host"; 517 dr_mode = "host";
526 }; 518 };
527 519
528 &usb_1_hsphy { 520 &usb_1_hsphy {
529 status = "okay"; 521 status = "okay";
530 522
531 vdda-pll-supply = <&vreg_l10c_0p8>; 523 vdda-pll-supply = <&vreg_l10c_0p8>;
532 vdda33-supply = <&vreg_l2b_3p0>; 524 vdda33-supply = <&vreg_l2b_3p0>;
533 vdda18-supply = <&vreg_l1c_1p8>; 525 vdda18-supply = <&vreg_l1c_1p8>;
534 qcom,hs-rise-fall-time-bp = <0>; 526 qcom,hs-rise-fall-time-bp = <0>;
535 qcom,squelch-detector-bp = <(-2090)>; 527 qcom,squelch-detector-bp = <(-2090)>;
536 qcom,hs-disconnect-bp = <1743>; 528 qcom,hs-disconnect-bp = <1743>;
537 qcom,hs-amplitude-bp = <1780>; 529 qcom,hs-amplitude-bp = <1780>;
538 qcom,hs-crossover-voltage-microvolt = 530 qcom,hs-crossover-voltage-microvolt = <(-31000)>;
539 qcom,hs-output-impedance-micro-ohms = 531 qcom,hs-output-impedance-micro-ohms = <2600000>;
540 }; 532 };
541 533
542 &usb_1_qmpphy { 534 &usb_1_qmpphy {
543 status = "okay"; 535 status = "okay";
544 536
545 vdda-phy-supply = <&vreg_l6b_1p2>; 537 vdda-phy-supply = <&vreg_l6b_1p2>;
546 vdda-pll-supply = <&vreg_l1b_0p8>; 538 vdda-pll-supply = <&vreg_l1b_0p8>;
547 }; 539 };
548 540
549 &uart7 { 541 &uart7 {
550 status = "okay"; 542 status = "okay";
551 543
552 /delete-property/interrupts; 544 /delete-property/interrupts;
553 interrupts-extended = <&intc GIC_SPI 6 545 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
554 <&tlmm 31 IRQ_ 546 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
555 pinctrl-names = "default", "sleep"; 547 pinctrl-names = "default", "sleep";
556 pinctrl-1 = <&qup_uart7_sleep_cts>, <& 548 pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
557 549
558 bluetooth: bluetooth { 550 bluetooth: bluetooth {
559 compatible = "qcom,wcn6750-bt" 551 compatible = "qcom,wcn6750-bt";
560 pinctrl-names = "default"; 552 pinctrl-names = "default";
561 pinctrl-0 = <&bt_en>, <&sw_ctr 553 pinctrl-0 = <&bt_en>, <&sw_ctrl>;
562 enable-gpios = <&tlmm 85 GPIO_ 554 enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
563 swctrl-gpios = <&tlmm 86 GPIO_ 555 swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
564 vddaon-supply = <&vreg_s7b_0p9 556 vddaon-supply = <&vreg_s7b_0p9>;
565 vddbtcxmx-supply = <&vreg_s7b_ 557 vddbtcxmx-supply = <&vreg_s7b_0p9>;
566 vddrfacmn-supply = <&vreg_s7b_ 558 vddrfacmn-supply = <&vreg_s7b_0p9>;
567 vddrfa0p8-supply = <&vreg_s7b_ 559 vddrfa0p8-supply = <&vreg_s7b_0p9>;
568 vddrfa1p7-supply = <&vreg_s1b_ 560 vddrfa1p7-supply = <&vreg_s1b_1p8>;
569 vddrfa1p2-supply = <&vreg_s8b_ 561 vddrfa1p2-supply = <&vreg_s8b_1p2>;
570 vddrfa2p2-supply = <&vreg_s1c_ 562 vddrfa2p2-supply = <&vreg_s1c_2p2>;
571 vddasd-supply = <&vreg_l11c_2p 563 vddasd-supply = <&vreg_l11c_2p8>;
572 max-speed = <3200000>; 564 max-speed = <3200000>;
573 }; 565 };
574 }; 566 };
575 567
576 /* PINCTRL - additions to nodes defined in sc7 568 /* PINCTRL - additions to nodes defined in sc7280.dtsi */
577 569
578 &dp_hot_plug_det { 570 &dp_hot_plug_det {
579 bias-disable; 571 bias-disable;
580 }; 572 };
581 573
582 &lpass_dmic01_clk { 574 &lpass_dmic01_clk {
583 drive-strength = <8>; 575 drive-strength = <8>;
584 bias-disable; 576 bias-disable;
585 }; 577 };
586 578
587 &lpass_dmic01_data { 579 &lpass_dmic01_data {
588 bias-pull-down; 580 bias-pull-down;
589 }; 581 };
590 582
591 &lpass_dmic23_clk { 583 &lpass_dmic23_clk {
592 drive-strength = <8>; 584 drive-strength = <8>;
593 bias-disable; 585 bias-disable;
594 }; 586 };
595 587
596 &lpass_dmic23_data { 588 &lpass_dmic23_data {
597 bias-pull-down; 589 bias-pull-down;
598 }; 590 };
599 591
600 &lpass_rx_swr_clk { 592 &lpass_rx_swr_clk {
601 drive-strength = <2>; 593 drive-strength = <2>;
602 slew-rate = <1>; 594 slew-rate = <1>;
603 bias-disable; 595 bias-disable;
604 }; 596 };
605 597
606 &lpass_rx_swr_data { 598 &lpass_rx_swr_data {
607 drive-strength = <2>; 599 drive-strength = <2>;
608 slew-rate = <1>; 600 slew-rate = <1>;
609 bias-bus-hold; 601 bias-bus-hold;
610 }; 602 };
611 603
612 &lpass_tx_swr_clk { 604 &lpass_tx_swr_clk {
613 drive-strength = <2>; 605 drive-strength = <2>;
614 slew-rate = <1>; 606 slew-rate = <1>;
615 bias-disable; 607 bias-disable;
616 }; 608 };
617 609
618 &lpass_tx_swr_data { 610 &lpass_tx_swr_data {
619 drive-strength = <2>; 611 drive-strength = <2>;
620 slew-rate = <1>; 612 slew-rate = <1>;
621 bias-bus-hold; 613 bias-bus-hold;
622 }; 614 };
623 615
624 &mi2s1_data0 { 616 &mi2s1_data0 {
625 drive-strength = <6>; 617 drive-strength = <6>;
626 bias-disable; 618 bias-disable;
627 }; 619 };
628 620
629 &mi2s1_sclk { 621 &mi2s1_sclk {
630 drive-strength = <6>; 622 drive-strength = <6>;
631 bias-disable; 623 bias-disable;
632 }; 624 };
633 625
634 &mi2s1_ws { 626 &mi2s1_ws {
635 drive-strength = <6>; 627 drive-strength = <6>;
636 }; 628 };
637 629
638 &pm7325_gpios { 630 &pm7325_gpios {
639 key_vol_up_default: key-vol-up-state { 631 key_vol_up_default: key-vol-up-state {
640 pins = "gpio6"; 632 pins = "gpio6";
641 function = "normal"; 633 function = "normal";
642 input-enable; 634 input-enable;
643 bias-pull-up; 635 bias-pull-up;
644 power-source = <0>; 636 power-source = <0>;
645 qcom,drive-strength = <3>; 637 qcom,drive-strength = <3>;
646 }; 638 };
647 }; 639 };
648 640
649 &pcie1_clkreq_n { 641 &pcie1_clkreq_n {
650 bias-pull-up; 642 bias-pull-up;
651 drive-strength = <2>; 643 drive-strength = <2>;
652 }; 644 };
653 645
654 &qspi_cs0 { 646 &qspi_cs0 {
655 bias-disable; /* External pu !! 647 bias-disable;
656 }; 648 };
657 649
658 &qspi_clk { 650 &qspi_clk {
659 bias-pull-down; /* No external !! 651 bias-disable;
660 }; <<
661 <<
662 &qspi_data0 { <<
663 bias-pull-down; /* No external <<
664 }; 652 };
665 653
666 &qspi_data1 { !! 654 &qspi_data01 {
667 bias-pull-down; /* No external !! 655 /* High-Z when no transfers; nice to park the lines */
>> 656 bias-pull-up;
668 }; 657 };
669 658
670 &qup_uart5_tx { 659 &qup_uart5_tx {
671 drive-strength = <2>; 660 drive-strength = <2>;
672 bias-disable; 661 bias-disable;
673 }; 662 };
674 663
675 &qup_uart5_rx { 664 &qup_uart5_rx {
676 drive-strength = <2>; 665 drive-strength = <2>;
677 bias-pull-up; 666 bias-pull-up;
678 }; 667 };
679 668
680 &qup_uart7_cts { 669 &qup_uart7_cts {
681 /* 670 /*
682 * Configure a bias-bus-hold on CTS to 671 * Configure a bias-bus-hold on CTS to lower power
683 * usage when Bluetooth is turned off. 672 * usage when Bluetooth is turned off. Bus hold will
684 * maintain a low power state regardle 673 * maintain a low power state regardless of whether
685 * the Bluetooth module drives the pin 674 * the Bluetooth module drives the pin in either
686 * direction or leaves the pin fully u 675 * direction or leaves the pin fully unpowered.
687 */ 676 */
688 bias-bus-hold; 677 bias-bus-hold;
689 }; 678 };
690 679
691 &qup_uart7_rts { 680 &qup_uart7_rts {
692 /* We'll drive RTS, so no pull */ 681 /* We'll drive RTS, so no pull */
693 drive-strength = <2>; 682 drive-strength = <2>;
694 bias-disable; 683 bias-disable;
695 }; 684 };
696 685
697 &qup_uart7_tx { 686 &qup_uart7_tx {
698 /* We'll drive TX, so no pull */ 687 /* We'll drive TX, so no pull */
699 drive-strength = <2>; 688 drive-strength = <2>;
700 bias-disable; 689 bias-disable;
701 }; 690 };
702 691
703 &qup_uart7_rx { 692 &qup_uart7_rx {
704 /* 693 /*
705 * Configure a pull-up on RX. This is 694 * Configure a pull-up on RX. This is needed to avoid
706 * garbage data when the TX pin of the 695 * garbage data when the TX pin of the Bluetooth module is
707 * in tri-state (module powered off or 696 * in tri-state (module powered off or not driving the
708 * signal yet). 697 * signal yet).
709 */ 698 */
710 bias-pull-up; 699 bias-pull-up;
711 }; 700 };
712 701
713 &sdc1_clk { 702 &sdc1_clk {
714 bias-disable; 703 bias-disable;
715 drive-strength = <16>; 704 drive-strength = <16>;
716 }; 705 };
717 706
718 &sdc1_cmd { 707 &sdc1_cmd {
719 bias-pull-up; 708 bias-pull-up;
720 drive-strength = <10>; 709 drive-strength = <10>;
721 }; 710 };
722 711
723 &sdc1_data { 712 &sdc1_data {
724 bias-pull-up; 713 bias-pull-up;
725 drive-strength = <10>; 714 drive-strength = <10>;
726 }; 715 };
727 716
728 &sdc1_rclk { 717 &sdc1_rclk {
729 bias-pull-down; 718 bias-pull-down;
730 }; 719 };
731 720
732 &sdc2_clk { 721 &sdc2_clk {
733 bias-disable; 722 bias-disable;
734 drive-strength = <16>; 723 drive-strength = <16>;
735 }; 724 };
736 725
737 &sdc2_cmd { 726 &sdc2_cmd {
738 bias-pull-up; 727 bias-pull-up;
739 drive-strength = <10>; 728 drive-strength = <10>;
740 }; 729 };
741 730
742 &sdc2_data { 731 &sdc2_data {
743 bias-pull-up; 732 bias-pull-up;
744 drive-strength = <10>; 733 drive-strength = <10>;
745 }; 734 };
746 735
747 &tlmm { 736 &tlmm {
748 amp_en: amp-en-state { 737 amp_en: amp-en-state {
749 pins = "gpio63"; 738 pins = "gpio63";
750 function = "gpio"; <<
751 bias-pull-down; 739 bias-pull-down;
752 drive-strength = <2>; 740 drive-strength = <2>;
753 }; 741 };
754 742
755 bt_en: bt-en-state { 743 bt_en: bt-en-state {
756 pins = "gpio85"; 744 pins = "gpio85";
757 function = "gpio"; 745 function = "gpio";
758 output-low; 746 output-low;
759 bias-disable; 747 bias-disable;
760 }; 748 };
761 749
762 nvme_pwren: nvme-pwren-state { 750 nvme_pwren: nvme-pwren-state {
763 function = "gpio"; 751 function = "gpio";
764 }; 752 };
765 753
766 pcie1_reset_n: pcie1-reset-n-state { 754 pcie1_reset_n: pcie1-reset-n-state {
767 pins = "gpio2"; 755 pins = "gpio2";
768 function = "gpio"; 756 function = "gpio";
769 757
770 drive-strength = <16>; 758 drive-strength = <16>;
771 output-low; 759 output-low;
772 bias-disable; 760 bias-disable;
773 }; 761 };
774 762
775 pcie1_wake_n: pcie1-wake-n-state { 763 pcie1_wake_n: pcie1-wake-n-state {
776 pins = "gpio3"; 764 pins = "gpio3";
777 function = "gpio"; 765 function = "gpio";
778 766
779 drive-strength = <2>; 767 drive-strength = <2>;
780 bias-pull-up; 768 bias-pull-up;
781 }; 769 };
782 770
783 qup_uart7_sleep_cts: qup-uart7-sleep-c 771 qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {
784 pins = "gpio28"; 772 pins = "gpio28";
785 function = "gpio"; 773 function = "gpio";
786 /* 774 /*
787 * Configure a bias-bus-hold o 775 * Configure a bias-bus-hold on CTS to lower power
788 * usage when Bluetooth is tur 776 * usage when Bluetooth is turned off. Bus hold will
789 * maintain a low power state 777 * maintain a low power state regardless of whether
790 * the Bluetooth module drives 778 * the Bluetooth module drives the pin in either
791 * direction or leaves the pin 779 * direction or leaves the pin fully unpowered.
792 */ 780 */
793 bias-bus-hold; 781 bias-bus-hold;
794 }; 782 };
795 783
796 qup_uart7_sleep_rts: qup-uart7-sleep-r 784 qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {
797 pins = "gpio29"; 785 pins = "gpio29";
798 function = "gpio"; 786 function = "gpio";
799 /* 787 /*
800 * Configure pull-down on RTS. 788 * Configure pull-down on RTS. As RTS is active low
801 * signal, pull it low to indi 789 * signal, pull it low to indicate the BT SoC that it
802 * can wakeup the system anyti 790 * can wakeup the system anytime from suspend state by
803 * pulling RX low (by sending 791 * pulling RX low (by sending wakeup bytes).
804 */ 792 */
805 bias-pull-down; 793 bias-pull-down;
806 }; 794 };
807 795
808 qup_uart7_sleep_tx: qup-uart7-sleep-tx 796 qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {
809 pins = "gpio30"; 797 pins = "gpio30";
810 function = "gpio"; 798 function = "gpio";
811 /* 799 /*
812 * Configure pull-up on TX whe 800 * Configure pull-up on TX when it isn't actively driven
813 * to prevent BT SoC from rece 801 * to prevent BT SoC from receiving garbage during sleep.
814 */ 802 */
815 bias-pull-up; 803 bias-pull-up;
816 }; 804 };
817 805
818 qup_uart7_sleep_rx: qup-uart7-sleep-rx 806 qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {
819 pins = "gpio31"; 807 pins = "gpio31";
820 function = "gpio"; 808 function = "gpio";
821 /* 809 /*
822 * Configure a pull-up on RX. 810 * Configure a pull-up on RX. This is needed to avoid
823 * garbage data when the TX pi 811 * garbage data when the TX pin of the Bluetooth module
824 * is floating which may cause 812 * is floating which may cause spurious wakeups.
825 */ 813 */
826 bias-pull-up; 814 bias-pull-up;
827 }; 815 };
828 816
829 sd_cd: sd-cd-state { 817 sd_cd: sd-cd-state {
830 pins = "gpio91"; 818 pins = "gpio91";
831 function = "gpio"; 819 function = "gpio";
832 bias-pull-up; 820 bias-pull-up;
833 }; 821 };
834 822
835 sw_ctrl: sw-ctrl-state { 823 sw_ctrl: sw-ctrl-state {
836 pins = "gpio86"; 824 pins = "gpio86";
837 function = "gpio"; 825 function = "gpio";
838 bias-pull-down; 826 bias-pull-down;
839 }; 827 };
840 828
841 wcd_reset_n: wcd-reset-n-state { 829 wcd_reset_n: wcd-reset-n-state {
842 pins = "gpio83"; 830 pins = "gpio83";
843 function = "gpio"; 831 function = "gpio";
844 drive-strength = <8>; 832 drive-strength = <8>;
845 }; 833 };
846 834
847 wcd_reset_n_sleep: wcd-reset-n-sleep-s 835 wcd_reset_n_sleep: wcd-reset-n-sleep-state {
848 pins = "gpio83"; 836 pins = "gpio83";
849 function = "gpio"; 837 function = "gpio";
850 drive-strength = <8>; 838 drive-strength = <8>;
851 bias-disable; 839 bias-disable;
852 }; 840 };
853 }; 841 };
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