1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * sc7280 IDP board device tree source (common 3 * sc7280 IDP board device tree source (common between SKU1 and SKU2)
4 * 4 *
5 * Copyright (c) 2021, The Linux Foundation. A 5 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
6 */ 6 */
7 7
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk83 8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes. 9 #include <dt-bindings/input/linux-event-codes.h>
10 #include "sc7280.dtsi" 10 #include "sc7280.dtsi"
11 #include "pm7325.dtsi" 11 #include "pm7325.dtsi"
12 #include "pm8350c.dtsi" 12 #include "pm8350c.dtsi"
13 #include "pmk8350.dtsi" 13 #include "pmk8350.dtsi"
14 14
15 #include "sc7280-chrome-common.dtsi" 15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi" 16 #include "sc7280-herobrine-lte-sku.dtsi"
17 17
18 / { 18 / {
19 aliases { 19 aliases {
20 bluetooth0 = &bluetooth; 20 bluetooth0 = &bluetooth;
21 serial1 = &uart7; 21 serial1 = &uart7;
22 wifi0 = &wifi; 22 wifi0 = &wifi;
23 }; 23 };
24 24
25 max98360a: audio-codec-0 { 25 max98360a: audio-codec-0 {
26 compatible = "maxim,max98360a" 26 compatible = "maxim,max98360a";
27 pinctrl-names = "default"; 27 pinctrl-names = "default";
28 pinctrl-0 = <&_en>; 28 pinctrl-0 = <&_en>;
29 sdmode-gpios = <&tlmm 63 GPIO_ 29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
30 #sound-dai-cells = <0>; 30 #sound-dai-cells = <0>;
31 }; 31 };
32 32
33 wcd9385: audio-codec-1 { 33 wcd9385: audio-codec-1 {
34 compatible = "qcom,wcd9385-cod 34 compatible = "qcom,wcd9385-codec";
35 pinctrl-names = "default", "sl 35 pinctrl-names = "default", "sleep";
36 pinctrl-0 = <&wcd_reset_n>; 36 pinctrl-0 = <&wcd_reset_n>;
37 pinctrl-1 = <&wcd_reset_n_slee 37 pinctrl-1 = <&wcd_reset_n_sleep>;
38 38
39 reset-gpios = <&tlmm 83 GPIO_A 39 reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>;
40 40
41 qcom,rx-device = <&wcd_rx>; 41 qcom,rx-device = <&wcd_rx>;
42 qcom,tx-device = <&wcd_tx>; 42 qcom,tx-device = <&wcd_tx>;
43 43
44 vdd-rxtx-supply = <&vreg_l18b_ 44 vdd-rxtx-supply = <&vreg_l18b_1p8>;
45 vdd-io-supply = <&vreg_l18b_1p 45 vdd-io-supply = <&vreg_l18b_1p8>;
46 vdd-buck-supply = <&vreg_l17b_ 46 vdd-buck-supply = <&vreg_l17b_1p8>;
47 vdd-mic-bias-supply = <&vreg_b 47 vdd-mic-bias-supply = <&vreg_bob>;
48 48
49 qcom,micbias1-microvolt = <180 49 qcom,micbias1-microvolt = <1800000>;
50 qcom,micbias2-microvolt = <180 50 qcom,micbias2-microvolt = <1800000>;
51 qcom,micbias3-microvolt = <180 51 qcom,micbias3-microvolt = <1800000>;
52 qcom,micbias4-microvolt = <180 52 qcom,micbias4-microvolt = <1800000>;
53 53
54 qcom,mbhc-buttons-vthreshold-m 54 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
55 55 500000 500000 500000>;
56 qcom,mbhc-headset-vthreshold-m 56 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
57 qcom,mbhc-headphone-vthreshold 57 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
58 #sound-dai-cells = <1>; 58 #sound-dai-cells = <1>;
59 }; 59 };
60 60
61 gpio-keys { 61 gpio-keys {
62 compatible = "gpio-keys"; 62 compatible = "gpio-keys";
63 label = "gpio-keys"; 63 label = "gpio-keys";
64 64
65 pinctrl-names = "default"; 65 pinctrl-names = "default";
66 pinctrl-0 = <&key_vol_up_defau 66 pinctrl-0 = <&key_vol_up_default>;
67 67
68 key-volume-up { 68 key-volume-up {
69 label = "volume_up"; 69 label = "volume_up";
70 gpios = <&pm7325_gpios 70 gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>;
71 linux,input-type = <1> 71 linux,input-type = <1>;
72 linux,code = <KEY_VOLU 72 linux,code = <KEY_VOLUMEUP>;
73 wakeup-source; 73 wakeup-source;
74 debounce-interval = <1 74 debounce-interval = <15>;
75 linux,can-disable; 75 linux,can-disable;
76 }; 76 };
77 }; 77 };
78 78
79 nvme_3v3_regulator: nvme-3v3-regulator 79 nvme_3v3_regulator: nvme-3v3-regulator {
80 compatible = "regulator-fixed" 80 compatible = "regulator-fixed";
81 regulator-name = "VLDO_3V3"; 81 regulator-name = "VLDO_3V3";
82 82
83 regulator-min-microvolt = <330 83 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <330 84 regulator-max-microvolt = <3300000>;
85 85
86 enable-active-high; 86 enable-active-high;
87 pinctrl-names = "default"; 87 pinctrl-names = "default";
88 pinctrl-0 = <&nvme_pwren>; 88 pinctrl-0 = <&nvme_pwren>;
89 }; 89 };
90 90
91 sound: sound { 91 sound: sound {
92 compatible = "google,sc7280-he 92 compatible = "google,sc7280-herobrine";
93 model = "sc7280-wcd938x-max983 93 model = "sc7280-wcd938x-max98360a-1mic";
94 94
95 audio-routing = 95 audio-routing =
96 "IN1_HPHL", "HPHL_OUT" 96 "IN1_HPHL", "HPHL_OUT",
97 "IN2_HPHR", "HPHR_OUT" 97 "IN2_HPHR", "HPHR_OUT",
98 "AMIC1", "MIC BIAS1", 98 "AMIC1", "MIC BIAS1",
99 "AMIC2", "MIC BIAS2", 99 "AMIC2", "MIC BIAS2",
100 "VA DMIC0", "MIC BIAS3 100 "VA DMIC0", "MIC BIAS3",
101 "VA DMIC1", "MIC BIAS3 101 "VA DMIC1", "MIC BIAS3",
102 "VA DMIC2", "MIC BIAS1 102 "VA DMIC2", "MIC BIAS1",
103 "VA DMIC3", "MIC BIAS1 103 "VA DMIC3", "MIC BIAS1",
104 "TX SWR_ADC0", "ADC1_O 104 "TX SWR_ADC0", "ADC1_OUTPUT",
105 "TX SWR_ADC1", "ADC2_O 105 "TX SWR_ADC1", "ADC2_OUTPUT",
106 "TX SWR_ADC2", "ADC3_O 106 "TX SWR_ADC2", "ADC3_OUTPUT",
107 "TX SWR_DMIC0", "DMIC1 107 "TX SWR_DMIC0", "DMIC1_OUTPUT",
108 "TX SWR_DMIC1", "DMIC2 108 "TX SWR_DMIC1", "DMIC2_OUTPUT",
109 "TX SWR_DMIC2", "DMIC3 109 "TX SWR_DMIC2", "DMIC3_OUTPUT",
110 "TX SWR_DMIC3", "DMIC4 110 "TX SWR_DMIC3", "DMIC4_OUTPUT",
111 "TX SWR_DMIC4", "DMIC5 111 "TX SWR_DMIC4", "DMIC5_OUTPUT",
112 "TX SWR_DMIC5", "DMIC6 112 "TX SWR_DMIC5", "DMIC6_OUTPUT",
113 "TX SWR_DMIC6", "DMIC7 113 "TX SWR_DMIC6", "DMIC7_OUTPUT",
114 "TX SWR_DMIC7", "DMIC8 114 "TX SWR_DMIC7", "DMIC8_OUTPUT";
115 115
116 #address-cells = <1>; 116 #address-cells = <1>;
117 #size-cells = <0>; 117 #size-cells = <0>;
118 118
119 dai-link@0 { 119 dai-link@0 {
120 link-name = "MAX98360A 120 link-name = "MAX98360A";
121 reg = <0>; 121 reg = <0>;
122 122
123 cpu { 123 cpu {
124 sound-dai = <& 124 sound-dai = <&lpass_cpu MI2S_SECONDARY>;
125 }; 125 };
126 126
127 codec { 127 codec {
128 sound-dai = <& 128 sound-dai = <&max98360a>;
129 }; 129 };
130 }; 130 };
131 131
132 dai-link@1 { 132 dai-link@1 {
133 link-name = "DisplayPo 133 link-name = "DisplayPort";
134 reg = <1>; 134 reg = <1>;
135 135
136 cpu { 136 cpu {
137 sound-dai = <& 137 sound-dai = <&lpass_cpu LPASS_DP_RX>;
138 }; 138 };
139 139
140 codec { 140 codec {
141 sound-dai = <& 141 sound-dai = <&mdss_dp>;
142 }; 142 };
143 }; 143 };
144 144
145 dai-link@2 { 145 dai-link@2 {
146 link-name = "WCD9385 P 146 link-name = "WCD9385 Playback";
147 reg = <2>; 147 reg = <2>;
148 148
149 cpu { 149 cpu {
150 sound-dai = <& 150 sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
151 }; 151 };
152 152
153 codec { 153 codec {
154 sound-dai = <& 154 sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
155 }; 155 };
156 }; 156 };
157 157
158 dai-link@3 { 158 dai-link@3 {
159 link-name = "WCD9385 C 159 link-name = "WCD9385 Capture";
160 reg = <3>; 160 reg = <3>;
161 161
162 cpu { 162 cpu {
163 sound-dai = <& 163 sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
164 }; 164 };
165 165
166 codec { 166 codec {
167 sound-dai = <& 167 sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
168 }; 168 };
169 }; 169 };
170 170
171 dai-link@4 { 171 dai-link@4 {
172 link-name = "DMIC"; 172 link-name = "DMIC";
173 reg = <4>; 173 reg = <4>;
174 174
175 cpu { 175 cpu {
176 sound-dai = <& 176 sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
177 }; 177 };
178 178
179 codec { 179 codec {
180 sound-dai = <& 180 sound-dai = <&lpass_va_macro 0>;
181 }; 181 };
182 }; 182 };
183 }; 183 };
184 }; 184 };
185 185
186 &apps_rsc { 186 &apps_rsc {
187 regulators-0 { 187 regulators-0 {
188 compatible = "qcom,pm7325-rpmh 188 compatible = "qcom,pm7325-rpmh-regulators";
189 qcom,pmic-id = "b"; 189 qcom,pmic-id = "b";
190 190
191 vreg_s1b_1p8: smps1 { 191 vreg_s1b_1p8: smps1 {
192 regulator-min-microvol 192 regulator-min-microvolt = <1856000>;
193 regulator-max-microvol 193 regulator-max-microvolt = <2040000>;
194 }; 194 };
195 195
196 vreg_s7b_0p9: smps7 { 196 vreg_s7b_0p9: smps7 {
197 regulator-min-microvol 197 regulator-min-microvolt = <535000>;
198 regulator-max-microvol 198 regulator-max-microvolt = <1120000>;
199 }; 199 };
200 200
201 vreg_s8b_1p2: smps8 { 201 vreg_s8b_1p2: smps8 {
202 regulator-min-microvol 202 regulator-min-microvolt = <1256000>;
203 regulator-max-microvol 203 regulator-max-microvolt = <1500000>;
204 }; 204 };
205 205
206 vreg_l1b_0p8: ldo1 { 206 vreg_l1b_0p8: ldo1 {
207 regulator-min-microvol 207 regulator-min-microvolt = <825000>;
208 regulator-max-microvol 208 regulator-max-microvolt = <925000>;
209 }; 209 };
210 210
211 vreg_l2b_3p0: ldo2 { 211 vreg_l2b_3p0: ldo2 {
212 regulator-min-microvol 212 regulator-min-microvolt = <2700000>;
213 regulator-max-microvol 213 regulator-max-microvolt = <3544000>;
214 }; 214 };
215 215
216 vreg_l6b_1p2: ldo6 { 216 vreg_l6b_1p2: ldo6 {
217 regulator-min-microvol 217 regulator-min-microvolt = <1140000>;
218 regulator-max-microvol 218 regulator-max-microvolt = <1260000>;
219 }; 219 };
220 220
221 vreg_l7b_2p9: ldo7 { 221 vreg_l7b_2p9: ldo7 {
222 regulator-min-microvol 222 regulator-min-microvolt = <2960000>;
223 regulator-max-microvol 223 regulator-max-microvolt = <2960000>;
224 }; 224 };
225 225
226 vreg_l8b_0p9: ldo8 { 226 vreg_l8b_0p9: ldo8 {
227 regulator-min-microvol 227 regulator-min-microvolt = <870000>;
228 regulator-max-microvol 228 regulator-max-microvolt = <970000>;
229 }; 229 };
230 230
231 vreg_l9b_1p2: ldo9 { 231 vreg_l9b_1p2: ldo9 {
232 regulator-min-microvol 232 regulator-min-microvolt = <1080000>;
233 regulator-max-microvol 233 regulator-max-microvolt = <1304000>;
234 }; 234 };
235 235
236 vreg_l11b_1p7: ldo11 { 236 vreg_l11b_1p7: ldo11 {
237 regulator-min-microvol 237 regulator-min-microvolt = <1504000>;
238 regulator-max-microvol 238 regulator-max-microvolt = <2000000>;
239 }; 239 };
240 240
241 vreg_l12b_0p8: ldo12 { 241 vreg_l12b_0p8: ldo12 {
242 regulator-min-microvol 242 regulator-min-microvolt = <751000>;
243 regulator-max-microvol 243 regulator-max-microvolt = <824000>;
244 }; 244 };
245 245
246 vreg_l13b_0p8: ldo13 { 246 vreg_l13b_0p8: ldo13 {
247 regulator-min-microvol 247 regulator-min-microvolt = <530000>;
248 regulator-max-microvol 248 regulator-max-microvolt = <824000>;
249 }; 249 };
250 250
251 vreg_l14b_1p2: ldo14 { 251 vreg_l14b_1p2: ldo14 {
252 regulator-min-microvol 252 regulator-min-microvolt = <1080000>;
253 regulator-max-microvol 253 regulator-max-microvolt = <1304000>;
254 }; 254 };
255 255
256 vreg_l15b_0p8: ldo15 { 256 vreg_l15b_0p8: ldo15 {
257 regulator-min-microvol 257 regulator-min-microvolt = <765000>;
258 regulator-max-microvol 258 regulator-max-microvolt = <1020000>;
259 }; 259 };
260 260
261 vreg_l16b_1p2: ldo16 { 261 vreg_l16b_1p2: ldo16 {
262 regulator-min-microvol 262 regulator-min-microvolt = <1100000>;
263 regulator-max-microvol 263 regulator-max-microvolt = <1300000>;
264 }; 264 };
265 265
266 vreg_l17b_1p8: ldo17 { 266 vreg_l17b_1p8: ldo17 {
267 regulator-min-microvol 267 regulator-min-microvolt = <1700000>;
268 regulator-max-microvol 268 regulator-max-microvolt = <1900000>;
269 }; 269 };
270 270
271 vreg_l18b_1p8: ldo18 { 271 vreg_l18b_1p8: ldo18 {
272 regulator-min-microvol 272 regulator-min-microvolt = <1800000>;
273 regulator-max-microvol 273 regulator-max-microvolt = <2000000>;
274 }; 274 };
275 275
276 vreg_l19b_1p8: ldo19 { 276 vreg_l19b_1p8: ldo19 {
277 regulator-min-microvol 277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvol 278 regulator-max-microvolt = <1800000>;
279 }; 279 };
280 }; 280 };
281 281
282 regulators-1 { 282 regulators-1 {
283 compatible = "qcom,pm8350c-rpm 283 compatible = "qcom,pm8350c-rpmh-regulators";
284 qcom,pmic-id = "c"; 284 qcom,pmic-id = "c";
285 285
286 vreg_s1c_2p2: smps1 { 286 vreg_s1c_2p2: smps1 {
287 regulator-min-microvol 287 regulator-min-microvolt = <2190000>;
288 regulator-max-microvol 288 regulator-max-microvolt = <2210000>;
289 }; 289 };
290 290
291 vreg_s9c_1p0: smps9 { 291 vreg_s9c_1p0: smps9 {
292 regulator-min-microvol 292 regulator-min-microvolt = <1010000>;
293 regulator-max-microvol 293 regulator-max-microvolt = <1170000>;
294 }; 294 };
295 295
296 vreg_l1c_1p8: ldo1 { 296 vreg_l1c_1p8: ldo1 {
297 regulator-min-microvol 297 regulator-min-microvolt = <1800000>;
298 regulator-max-microvol 298 regulator-max-microvolt = <1980000>;
299 }; 299 };
300 300
301 vreg_l2c_1p8: ldo2 { 301 vreg_l2c_1p8: ldo2 {
302 regulator-min-microvol 302 regulator-min-microvolt = <1620000>;
303 regulator-max-microvol 303 regulator-max-microvolt = <1980000>;
304 }; 304 };
305 305
306 vreg_l3c_3p0: ldo3 { 306 vreg_l3c_3p0: ldo3 {
307 regulator-min-microvol 307 regulator-min-microvolt = <2800000>;
308 regulator-max-microvol 308 regulator-max-microvolt = <3540000>;
309 }; 309 };
310 310
311 vreg_l4c_1p8: ldo4 { 311 vreg_l4c_1p8: ldo4 {
312 regulator-min-microvol 312 regulator-min-microvolt = <1620000>;
313 regulator-max-microvol 313 regulator-max-microvolt = <3300000>;
314 }; 314 };
315 315
316 vreg_l5c_1p8: ldo5 { 316 vreg_l5c_1p8: ldo5 {
317 regulator-min-microvol 317 regulator-min-microvolt = <1620000>;
318 regulator-max-microvol 318 regulator-max-microvolt = <3300000>;
319 }; 319 };
320 320
321 vreg_l6c_2p9: ldo6 { 321 vreg_l6c_2p9: ldo6 {
322 regulator-min-microvol 322 regulator-min-microvolt = <1800000>;
323 regulator-max-microvol 323 regulator-max-microvolt = <2950000>;
324 }; 324 };
325 325
326 vreg_l7c_3p0: ldo7 { 326 vreg_l7c_3p0: ldo7 {
327 regulator-min-microvol 327 regulator-min-microvolt = <3000000>;
328 regulator-max-microvol 328 regulator-max-microvolt = <3544000>;
329 }; 329 };
330 330
331 vreg_l8c_1p8: ldo8 { 331 vreg_l8c_1p8: ldo8 {
332 regulator-min-microvol 332 regulator-min-microvolt = <1620000>;
333 regulator-max-microvol 333 regulator-max-microvolt = <2000000>;
334 }; 334 };
335 335
336 vreg_l9c_2p9: ldo9 { 336 vreg_l9c_2p9: ldo9 {
337 regulator-min-microvol 337 regulator-min-microvolt = <2960000>;
338 regulator-max-microvol 338 regulator-max-microvolt = <2960000>;
339 }; 339 };
340 340
341 vreg_l10c_0p8: ldo10 { 341 vreg_l10c_0p8: ldo10 {
342 regulator-min-microvol 342 regulator-min-microvolt = <720000>;
343 regulator-max-microvol 343 regulator-max-microvolt = <1050000>;
344 }; 344 };
345 345
346 vreg_l11c_2p8: ldo11 { 346 vreg_l11c_2p8: ldo11 {
347 regulator-min-microvol 347 regulator-min-microvolt = <2800000>;
348 regulator-max-microvol 348 regulator-max-microvolt = <3544000>;
349 }; 349 };
350 350
351 vreg_l12c_1p8: ldo12 { 351 vreg_l12c_1p8: ldo12 {
352 regulator-min-microvol 352 regulator-min-microvolt = <1650000>;
353 regulator-max-microvol 353 regulator-max-microvolt = <2000000>;
354 }; 354 };
355 355
356 vreg_l13c_3p0: ldo13 { 356 vreg_l13c_3p0: ldo13 {
357 regulator-min-microvol 357 regulator-min-microvolt = <2700000>;
358 regulator-max-microvol 358 regulator-max-microvolt = <3544000>;
359 }; 359 };
360 360
361 vreg_bob: bob { 361 vreg_bob: bob {
362 regulator-min-microvol 362 regulator-min-microvolt = <3008000>;
363 regulator-max-microvol 363 regulator-max-microvolt = <3960000>;
364 }; 364 };
365 }; 365 };
366 }; 366 };
367 367
368 &gpi_dma0 { 368 &gpi_dma0 {
369 status = "okay"; 369 status = "okay";
370 }; 370 };
371 371
372 &gpi_dma1 { 372 &gpi_dma1 {
373 status = "okay"; 373 status = "okay";
374 }; 374 };
375 375
376 &lpass_cpu { 376 &lpass_cpu {
377 status = "okay"; 377 status = "okay";
378 378
379 pinctrl-names = "default"; 379 pinctrl-names = "default";
380 pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sc 380 pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
381 381
382 dai-link@1 { 382 dai-link@1 {
383 reg = <MI2S_SECONDARY>; 383 reg = <MI2S_SECONDARY>;
384 qcom,playback-sd-lines = <0>; 384 qcom,playback-sd-lines = <0>;
385 }; 385 };
386 386
387 dai-link@5 { 387 dai-link@5 {
388 reg = <LPASS_DP_RX>; 388 reg = <LPASS_DP_RX>;
389 }; 389 };
390 390
391 dai-link@6 { 391 dai-link@6 {
392 reg = <LPASS_CDC_DMA_RX0>; 392 reg = <LPASS_CDC_DMA_RX0>;
393 }; 393 };
394 394
395 dai-link@19 { 395 dai-link@19 {
396 reg = <LPASS_CDC_DMA_TX3>; 396 reg = <LPASS_CDC_DMA_TX3>;
397 }; 397 };
398 398
399 dai-link@25 { 399 dai-link@25 {
400 reg = <LPASS_CDC_DMA_VA_TX0>; 400 reg = <LPASS_CDC_DMA_VA_TX0>;
401 }; 401 };
402 }; 402 };
403 403
404 &lpass_rx_macro { 404 &lpass_rx_macro {
405 status = "okay"; 405 status = "okay";
406 }; 406 };
407 407
408 &lpass_tx_macro { 408 &lpass_tx_macro {
409 status = "okay"; 409 status = "okay";
410 }; 410 };
411 411
412 &lpass_va_macro { 412 &lpass_va_macro {
413 status = "okay"; 413 status = "okay";
414 vdd-micb-supply = <&vreg_bob>; 414 vdd-micb-supply = <&vreg_bob>;
415 }; 415 };
416 416
417 &pcie1 { 417 &pcie1 {
418 status = "okay"; 418 status = "okay";
419 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW 419 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
420 420
421 vddpe-3v3-supply = <&nvme_3v3_regulato 421 vddpe-3v3-supply = <&nvme_3v3_regulator>;
422 422
423 pinctrl-names = "default"; 423 pinctrl-names = "default";
424 pinctrl-0 = <&pcie1_reset_n>, <&pcie1_ 424 pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
425 }; 425 };
426 426
427 &pcie1_phy { 427 &pcie1_phy {
428 status = "okay"; 428 status = "okay";
429 429
430 vdda-phy-supply = <&vreg_l10c_0p8>; 430 vdda-phy-supply = <&vreg_l10c_0p8>;
431 vdda-pll-supply = <&vreg_l6b_1p2>; 431 vdda-pll-supply = <&vreg_l6b_1p2>;
432 }; 432 };
433 433
434 &pmk8350_vadc { 434 &pmk8350_vadc {
435 channel@3 { 435 channel@3 {
436 reg = <PMK8350_ADC7_DIE_TEMP>; 436 reg = <PMK8350_ADC7_DIE_TEMP>;
437 label = "pmk8350_die_temp"; 437 label = "pmk8350_die_temp";
438 qcom,pre-scaling = <1 1>; 438 qcom,pre-scaling = <1 1>;
439 }; 439 };
440 }; 440 };
441 441
442 &qfprom { 442 &qfprom {
443 vcc-supply = <&vreg_l1c_1p8>; 443 vcc-supply = <&vreg_l1c_1p8>;
444 }; 444 };
445 445
446 &qupv3_id_0 { 446 &qupv3_id_0 {
447 status = "okay"; 447 status = "okay";
448 }; 448 };
449 449
450 &qupv3_id_1 { 450 &qupv3_id_1 {
451 status = "okay"; 451 status = "okay";
452 }; 452 };
453 453
454 &sdhc_1 { 454 &sdhc_1 {
455 status = "okay"; 455 status = "okay";
456 456
457 non-removable; 457 non-removable;
458 no-sd; 458 no-sd;
459 no-sdio; 459 no-sdio;
460 460
461 vmmc-supply = <&vreg_l7b_2p9>; 461 vmmc-supply = <&vreg_l7b_2p9>;
462 vqmmc-supply = <&vreg_l19b_1p8>; 462 vqmmc-supply = <&vreg_l19b_1p8>;
463 }; 463 };
464 464
465 &sdhc_2 { 465 &sdhc_2 {
466 status = "okay"; 466 status = "okay";
467 467
468 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, 468 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>;
469 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_ 469 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>;
470 470
471 vmmc-supply = <&vreg_l9c_2p9>; 471 vmmc-supply = <&vreg_l9c_2p9>;
472 vqmmc-supply = <&vreg_l6c_2p9>; 472 vqmmc-supply = <&vreg_l6c_2p9>;
473 473
474 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 474 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
475 }; 475 };
476 476
477 &swr0 { 477 &swr0 {
478 status = "okay"; 478 status = "okay";
479 479
480 wcd_rx: codec@0,4 { 480 wcd_rx: codec@0,4 {
481 compatible = "sdw20217010d00"; 481 compatible = "sdw20217010d00";
482 reg = <0 4>; 482 reg = <0 4>;
483 qcom,rx-port-mapping = <1 2 3 483 qcom,rx-port-mapping = <1 2 3 4 5>;
484 }; 484 };
485 }; 485 };
486 486
487 &swr1 { 487 &swr1 {
488 status = "okay"; 488 status = "okay";
489 489
490 wcd_tx: codec@0,3 { 490 wcd_tx: codec@0,3 {
491 compatible = "sdw20217010d00"; 491 compatible = "sdw20217010d00";
492 reg = <0 3>; 492 reg = <0 3>;
493 qcom,tx-port-mapping = <1 2 3 493 qcom,tx-port-mapping = <1 2 3 4>;
494 }; 494 };
495 }; 495 };
496 496
497 &uart5 { 497 &uart5 {
498 status = "okay"; !! 498 compatible = "qcom,geni-debug-uart";
499 }; <<
500 <<
501 &ufs_mem_hc { <<
502 reset-gpios = <&tlmm 175 GPIO_ACTIVE_L <<
503 vcc-supply = <&vreg_l7b_2p9>; <<
504 vcc-max-microamp = <800000>; <<
505 vccq-supply = <&vreg_l9b_1p2>; <<
506 vccq-max-microamp = <900000>; <<
507 vccq2-supply = <&vreg_l9b_1p2>; <<
508 vccq2-max-microamp = <900000>; <<
509 <<
510 status = "okay"; <<
511 }; <<
512 <<
513 &ufs_mem_phy { <<
514 vdda-phy-supply = <&vreg_l10c_0p8>; <<
515 vdda-pll-supply = <&vreg_l6b_1p2>; <<
516 <<
517 status = "okay"; 499 status = "okay";
518 }; 500 };
519 501
520 &usb_1 { 502 &usb_1 {
521 status = "okay"; 503 status = "okay";
522 }; 504 };
523 505
524 &usb_1_dwc3 { 506 &usb_1_dwc3 {
525 dr_mode = "host"; 507 dr_mode = "host";
526 }; 508 };
527 509
528 &usb_1_hsphy { 510 &usb_1_hsphy {
529 status = "okay"; 511 status = "okay";
530 512
531 vdda-pll-supply = <&vreg_l10c_0p8>; 513 vdda-pll-supply = <&vreg_l10c_0p8>;
532 vdda33-supply = <&vreg_l2b_3p0>; 514 vdda33-supply = <&vreg_l2b_3p0>;
533 vdda18-supply = <&vreg_l1c_1p8>; 515 vdda18-supply = <&vreg_l1c_1p8>;
534 qcom,hs-rise-fall-time-bp = <0>; 516 qcom,hs-rise-fall-time-bp = <0>;
535 qcom,squelch-detector-bp = <(-2090)>; 517 qcom,squelch-detector-bp = <(-2090)>;
536 qcom,hs-disconnect-bp = <1743>; 518 qcom,hs-disconnect-bp = <1743>;
537 qcom,hs-amplitude-bp = <1780>; 519 qcom,hs-amplitude-bp = <1780>;
538 qcom,hs-crossover-voltage-microvolt = 520 qcom,hs-crossover-voltage-microvolt = <(-31000)>;
539 qcom,hs-output-impedance-micro-ohms = 521 qcom,hs-output-impedance-micro-ohms = <2600000>;
540 }; 522 };
541 523
542 &usb_1_qmpphy { 524 &usb_1_qmpphy {
543 status = "okay"; 525 status = "okay";
544 526
545 vdda-phy-supply = <&vreg_l6b_1p2>; 527 vdda-phy-supply = <&vreg_l6b_1p2>;
546 vdda-pll-supply = <&vreg_l1b_0p8>; 528 vdda-pll-supply = <&vreg_l1b_0p8>;
547 }; 529 };
548 530
549 &uart7 { 531 &uart7 {
550 status = "okay"; 532 status = "okay";
551 533
552 /delete-property/interrupts; 534 /delete-property/interrupts;
553 interrupts-extended = <&intc GIC_SPI 6 535 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
554 <&tlmm 31 IRQ_ 536 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
555 pinctrl-names = "default", "sleep"; 537 pinctrl-names = "default", "sleep";
556 pinctrl-1 = <&qup_uart7_sleep_cts>, <& 538 pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
557 539
558 bluetooth: bluetooth { 540 bluetooth: bluetooth {
559 compatible = "qcom,wcn6750-bt" 541 compatible = "qcom,wcn6750-bt";
560 pinctrl-names = "default"; 542 pinctrl-names = "default";
561 pinctrl-0 = <&bt_en>, <&sw_ctr 543 pinctrl-0 = <&bt_en>, <&sw_ctrl>;
562 enable-gpios = <&tlmm 85 GPIO_ 544 enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
563 swctrl-gpios = <&tlmm 86 GPIO_ 545 swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
564 vddaon-supply = <&vreg_s7b_0p9 546 vddaon-supply = <&vreg_s7b_0p9>;
565 vddbtcxmx-supply = <&vreg_s7b_ 547 vddbtcxmx-supply = <&vreg_s7b_0p9>;
566 vddrfacmn-supply = <&vreg_s7b_ 548 vddrfacmn-supply = <&vreg_s7b_0p9>;
567 vddrfa0p8-supply = <&vreg_s7b_ 549 vddrfa0p8-supply = <&vreg_s7b_0p9>;
568 vddrfa1p7-supply = <&vreg_s1b_ 550 vddrfa1p7-supply = <&vreg_s1b_1p8>;
569 vddrfa1p2-supply = <&vreg_s8b_ 551 vddrfa1p2-supply = <&vreg_s8b_1p2>;
570 vddrfa2p2-supply = <&vreg_s1c_ 552 vddrfa2p2-supply = <&vreg_s1c_2p2>;
571 vddasd-supply = <&vreg_l11c_2p 553 vddasd-supply = <&vreg_l11c_2p8>;
572 max-speed = <3200000>; 554 max-speed = <3200000>;
573 }; 555 };
574 }; 556 };
575 557
576 /* PINCTRL - additions to nodes defined in sc7 558 /* PINCTRL - additions to nodes defined in sc7280.dtsi */
577 559
578 &dp_hot_plug_det { 560 &dp_hot_plug_det {
579 bias-disable; 561 bias-disable;
580 }; 562 };
581 563
582 &lpass_dmic01_clk { 564 &lpass_dmic01_clk {
583 drive-strength = <8>; 565 drive-strength = <8>;
584 bias-disable; 566 bias-disable;
585 }; 567 };
586 568
587 &lpass_dmic01_data { 569 &lpass_dmic01_data {
588 bias-pull-down; 570 bias-pull-down;
589 }; 571 };
590 572
591 &lpass_dmic23_clk { 573 &lpass_dmic23_clk {
592 drive-strength = <8>; 574 drive-strength = <8>;
593 bias-disable; 575 bias-disable;
594 }; 576 };
595 577
596 &lpass_dmic23_data { 578 &lpass_dmic23_data {
597 bias-pull-down; 579 bias-pull-down;
598 }; 580 };
599 581
600 &lpass_rx_swr_clk { 582 &lpass_rx_swr_clk {
601 drive-strength = <2>; 583 drive-strength = <2>;
602 slew-rate = <1>; 584 slew-rate = <1>;
603 bias-disable; 585 bias-disable;
604 }; 586 };
605 587
606 &lpass_rx_swr_data { 588 &lpass_rx_swr_data {
607 drive-strength = <2>; 589 drive-strength = <2>;
608 slew-rate = <1>; 590 slew-rate = <1>;
609 bias-bus-hold; 591 bias-bus-hold;
610 }; 592 };
611 593
612 &lpass_tx_swr_clk { 594 &lpass_tx_swr_clk {
613 drive-strength = <2>; 595 drive-strength = <2>;
614 slew-rate = <1>; 596 slew-rate = <1>;
615 bias-disable; 597 bias-disable;
616 }; 598 };
617 599
618 &lpass_tx_swr_data { 600 &lpass_tx_swr_data {
619 drive-strength = <2>; 601 drive-strength = <2>;
620 slew-rate = <1>; 602 slew-rate = <1>;
621 bias-bus-hold; 603 bias-bus-hold;
622 }; 604 };
623 605
624 &mi2s1_data0 { 606 &mi2s1_data0 {
625 drive-strength = <6>; 607 drive-strength = <6>;
626 bias-disable; 608 bias-disable;
627 }; 609 };
628 610
629 &mi2s1_sclk { 611 &mi2s1_sclk {
630 drive-strength = <6>; 612 drive-strength = <6>;
631 bias-disable; 613 bias-disable;
632 }; 614 };
633 615
634 &mi2s1_ws { 616 &mi2s1_ws {
635 drive-strength = <6>; 617 drive-strength = <6>;
636 }; 618 };
637 619
638 &pm7325_gpios { 620 &pm7325_gpios {
639 key_vol_up_default: key-vol-up-state { 621 key_vol_up_default: key-vol-up-state {
640 pins = "gpio6"; 622 pins = "gpio6";
641 function = "normal"; 623 function = "normal";
642 input-enable; 624 input-enable;
643 bias-pull-up; 625 bias-pull-up;
644 power-source = <0>; 626 power-source = <0>;
645 qcom,drive-strength = <3>; 627 qcom,drive-strength = <3>;
646 }; 628 };
647 }; 629 };
648 630
649 &pcie1_clkreq_n { 631 &pcie1_clkreq_n {
650 bias-pull-up; 632 bias-pull-up;
651 drive-strength = <2>; 633 drive-strength = <2>;
652 }; 634 };
653 635
654 &qspi_cs0 { 636 &qspi_cs0 {
655 bias-disable; /* External pu 637 bias-disable; /* External pullup */
656 }; 638 };
657 639
658 &qspi_clk { 640 &qspi_clk {
659 bias-pull-down; /* No external 641 bias-pull-down; /* No external pulls or external pulldown */
660 }; 642 };
661 643
662 &qspi_data0 { 644 &qspi_data0 {
663 bias-pull-down; /* No external 645 bias-pull-down; /* No external pulls or external pulldown */
664 }; 646 };
665 647
666 &qspi_data1 { 648 &qspi_data1 {
667 bias-pull-down; /* No external 649 bias-pull-down; /* No external pulls or external pulldown */
668 }; 650 };
669 651
670 &qup_uart5_tx { 652 &qup_uart5_tx {
671 drive-strength = <2>; 653 drive-strength = <2>;
672 bias-disable; 654 bias-disable;
673 }; 655 };
674 656
675 &qup_uart5_rx { 657 &qup_uart5_rx {
676 drive-strength = <2>; 658 drive-strength = <2>;
677 bias-pull-up; 659 bias-pull-up;
678 }; 660 };
679 661
680 &qup_uart7_cts { 662 &qup_uart7_cts {
681 /* 663 /*
682 * Configure a bias-bus-hold on CTS to 664 * Configure a bias-bus-hold on CTS to lower power
683 * usage when Bluetooth is turned off. 665 * usage when Bluetooth is turned off. Bus hold will
684 * maintain a low power state regardle 666 * maintain a low power state regardless of whether
685 * the Bluetooth module drives the pin 667 * the Bluetooth module drives the pin in either
686 * direction or leaves the pin fully u 668 * direction or leaves the pin fully unpowered.
687 */ 669 */
688 bias-bus-hold; 670 bias-bus-hold;
689 }; 671 };
690 672
691 &qup_uart7_rts { 673 &qup_uart7_rts {
692 /* We'll drive RTS, so no pull */ 674 /* We'll drive RTS, so no pull */
693 drive-strength = <2>; 675 drive-strength = <2>;
694 bias-disable; 676 bias-disable;
695 }; 677 };
696 678
697 &qup_uart7_tx { 679 &qup_uart7_tx {
698 /* We'll drive TX, so no pull */ 680 /* We'll drive TX, so no pull */
699 drive-strength = <2>; 681 drive-strength = <2>;
700 bias-disable; 682 bias-disable;
701 }; 683 };
702 684
703 &qup_uart7_rx { 685 &qup_uart7_rx {
704 /* 686 /*
705 * Configure a pull-up on RX. This is 687 * Configure a pull-up on RX. This is needed to avoid
706 * garbage data when the TX pin of the 688 * garbage data when the TX pin of the Bluetooth module is
707 * in tri-state (module powered off or 689 * in tri-state (module powered off or not driving the
708 * signal yet). 690 * signal yet).
709 */ 691 */
710 bias-pull-up; 692 bias-pull-up;
711 }; 693 };
712 694
713 &sdc1_clk { 695 &sdc1_clk {
714 bias-disable; 696 bias-disable;
715 drive-strength = <16>; 697 drive-strength = <16>;
716 }; 698 };
717 699
718 &sdc1_cmd { 700 &sdc1_cmd {
719 bias-pull-up; 701 bias-pull-up;
720 drive-strength = <10>; 702 drive-strength = <10>;
721 }; 703 };
722 704
723 &sdc1_data { 705 &sdc1_data {
724 bias-pull-up; 706 bias-pull-up;
725 drive-strength = <10>; 707 drive-strength = <10>;
726 }; 708 };
727 709
728 &sdc1_rclk { 710 &sdc1_rclk {
729 bias-pull-down; 711 bias-pull-down;
730 }; 712 };
731 713
732 &sdc2_clk { 714 &sdc2_clk {
733 bias-disable; 715 bias-disable;
734 drive-strength = <16>; 716 drive-strength = <16>;
735 }; 717 };
736 718
737 &sdc2_cmd { 719 &sdc2_cmd {
738 bias-pull-up; 720 bias-pull-up;
739 drive-strength = <10>; 721 drive-strength = <10>;
740 }; 722 };
741 723
742 &sdc2_data { 724 &sdc2_data {
743 bias-pull-up; 725 bias-pull-up;
744 drive-strength = <10>; 726 drive-strength = <10>;
745 }; 727 };
746 728
747 &tlmm { 729 &tlmm {
748 amp_en: amp-en-state { 730 amp_en: amp-en-state {
749 pins = "gpio63"; 731 pins = "gpio63";
750 function = "gpio"; 732 function = "gpio";
751 bias-pull-down; 733 bias-pull-down;
752 drive-strength = <2>; 734 drive-strength = <2>;
753 }; 735 };
754 736
755 bt_en: bt-en-state { 737 bt_en: bt-en-state {
756 pins = "gpio85"; 738 pins = "gpio85";
757 function = "gpio"; 739 function = "gpio";
758 output-low; 740 output-low;
759 bias-disable; 741 bias-disable;
760 }; 742 };
761 743
762 nvme_pwren: nvme-pwren-state { 744 nvme_pwren: nvme-pwren-state {
763 function = "gpio"; 745 function = "gpio";
764 }; 746 };
765 747
766 pcie1_reset_n: pcie1-reset-n-state { 748 pcie1_reset_n: pcie1-reset-n-state {
767 pins = "gpio2"; 749 pins = "gpio2";
768 function = "gpio"; 750 function = "gpio";
769 751
770 drive-strength = <16>; 752 drive-strength = <16>;
771 output-low; 753 output-low;
772 bias-disable; 754 bias-disable;
773 }; 755 };
774 756
775 pcie1_wake_n: pcie1-wake-n-state { 757 pcie1_wake_n: pcie1-wake-n-state {
776 pins = "gpio3"; 758 pins = "gpio3";
777 function = "gpio"; 759 function = "gpio";
778 760
779 drive-strength = <2>; 761 drive-strength = <2>;
780 bias-pull-up; 762 bias-pull-up;
781 }; 763 };
782 764
783 qup_uart7_sleep_cts: qup-uart7-sleep-c 765 qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {
784 pins = "gpio28"; 766 pins = "gpio28";
785 function = "gpio"; 767 function = "gpio";
786 /* 768 /*
787 * Configure a bias-bus-hold o 769 * Configure a bias-bus-hold on CTS to lower power
788 * usage when Bluetooth is tur 770 * usage when Bluetooth is turned off. Bus hold will
789 * maintain a low power state 771 * maintain a low power state regardless of whether
790 * the Bluetooth module drives 772 * the Bluetooth module drives the pin in either
791 * direction or leaves the pin 773 * direction or leaves the pin fully unpowered.
792 */ 774 */
793 bias-bus-hold; 775 bias-bus-hold;
794 }; 776 };
795 777
796 qup_uart7_sleep_rts: qup-uart7-sleep-r 778 qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {
797 pins = "gpio29"; 779 pins = "gpio29";
798 function = "gpio"; 780 function = "gpio";
799 /* 781 /*
800 * Configure pull-down on RTS. 782 * Configure pull-down on RTS. As RTS is active low
801 * signal, pull it low to indi 783 * signal, pull it low to indicate the BT SoC that it
802 * can wakeup the system anyti 784 * can wakeup the system anytime from suspend state by
803 * pulling RX low (by sending 785 * pulling RX low (by sending wakeup bytes).
804 */ 786 */
805 bias-pull-down; 787 bias-pull-down;
806 }; 788 };
807 789
808 qup_uart7_sleep_tx: qup-uart7-sleep-tx 790 qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {
809 pins = "gpio30"; 791 pins = "gpio30";
810 function = "gpio"; 792 function = "gpio";
811 /* 793 /*
812 * Configure pull-up on TX whe 794 * Configure pull-up on TX when it isn't actively driven
813 * to prevent BT SoC from rece 795 * to prevent BT SoC from receiving garbage during sleep.
814 */ 796 */
815 bias-pull-up; 797 bias-pull-up;
816 }; 798 };
817 799
818 qup_uart7_sleep_rx: qup-uart7-sleep-rx 800 qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {
819 pins = "gpio31"; 801 pins = "gpio31";
820 function = "gpio"; 802 function = "gpio";
821 /* 803 /*
822 * Configure a pull-up on RX. 804 * Configure a pull-up on RX. This is needed to avoid
823 * garbage data when the TX pi 805 * garbage data when the TX pin of the Bluetooth module
824 * is floating which may cause 806 * is floating which may cause spurious wakeups.
825 */ 807 */
826 bias-pull-up; 808 bias-pull-up;
827 }; 809 };
828 810
829 sd_cd: sd-cd-state { 811 sd_cd: sd-cd-state {
830 pins = "gpio91"; 812 pins = "gpio91";
831 function = "gpio"; 813 function = "gpio";
832 bias-pull-up; 814 bias-pull-up;
833 }; 815 };
834 816
835 sw_ctrl: sw-ctrl-state { 817 sw_ctrl: sw-ctrl-state {
836 pins = "gpio86"; 818 pins = "gpio86";
837 function = "gpio"; 819 function = "gpio";
838 bias-pull-down; 820 bias-pull-down;
839 }; 821 };
840 822
841 wcd_reset_n: wcd-reset-n-state { 823 wcd_reset_n: wcd-reset-n-state {
842 pins = "gpio83"; 824 pins = "gpio83";
843 function = "gpio"; 825 function = "gpio";
844 drive-strength = <8>; 826 drive-strength = <8>;
845 }; 827 };
846 828
847 wcd_reset_n_sleep: wcd-reset-n-sleep-s 829 wcd_reset_n_sleep: wcd-reset-n-sleep-state {
848 pins = "gpio83"; 830 pins = "gpio83";
849 function = "gpio"; 831 function = "gpio";
850 drive-strength = <8>; 832 drive-strength = <8>;
851 bias-disable; 833 bias-disable;
852 }; 834 };
853 }; 835 };
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