1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> !! 8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 13 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" <<
15 #include "pm8998.dtsi" 14 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 15 #include "pmi8998.dtsi"
17 16
18 / { 17 / {
19 model = "Thundercomm Dragonboard 845c" 18 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 19 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; <<
22 qcom,board-id = <8 0>; <<
23 20
24 aliases { 21 aliases {
25 serial0 = &uart9; 22 serial0 = &uart9;
26 serial1 = &uart6; !! 23 hsuart0 = &uart6;
27 }; 24 };
28 25
29 chosen { 26 chosen {
30 stdout-path = "serial0:115200n 27 stdout-path = "serial0:115200n8";
31 }; 28 };
32 29
33 /* Fixed crystal oscillator dedicated <<
34 clk40M: can-clock { <<
35 compatible = "fixed-clock"; <<
36 #clock-cells = <0>; <<
37 clock-frequency = <40000000>; <<
38 }; <<
39 <<
40 dc12v: dc12v-regulator { 30 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 31 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 32 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 33 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 34 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 35 regulator-always-on;
46 }; 36 };
47 37
48 gpio-keys { !! 38 gpio_keys {
49 compatible = "gpio-keys"; 39 compatible = "gpio-keys";
50 autorepeat; 40 autorepeat;
51 41
52 pinctrl-names = "default"; 42 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 43 pinctrl-0 = <&vol_up_pin_a>;
54 44
55 key-vol-up { !! 45 vol-up {
56 label = "Volume Up"; 46 label = "Volume Up";
57 linux,code = <KEY_VOLU 47 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios !! 48 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
59 }; 49 };
60 }; 50 };
61 51
62 leds { 52 leds {
63 compatible = "gpio-leds"; 53 compatible = "gpio-leds";
64 54
65 led-0 { !! 55 user4 {
66 label = "green:user4"; 56 label = "green:user4";
67 function = LED_FUNCTIO !! 57 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
68 color = <LED_COLOR_ID_ !! 58 linux,default-trigger = "panic-indicator";
69 gpios = <&pm8998_gpios <<
70 default-state = "off"; 59 default-state = "off";
71 panic-indicator; <<
72 }; 60 };
73 61
74 led-1 { !! 62 wlan {
75 label = "yellow:wlan"; 63 label = "yellow:wlan";
76 function = LED_FUNCTIO !! 64 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
77 color = <LED_COLOR_ID_ <<
78 gpios = <&pm8998_gpios <<
79 linux,default-trigger 65 linux,default-trigger = "phy0tx";
80 default-state = "off"; 66 default-state = "off";
81 }; 67 };
82 68
83 led-2 { !! 69 bt {
84 label = "blue:bt"; 70 label = "blue:bt";
85 function = LED_FUNCTIO !! 71 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
86 color = <LED_COLOR_ID_ <<
87 gpios = <&pm8998_gpios <<
88 linux,default-trigger 72 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 73 default-state = "off";
90 }; 74 };
91 }; 75 };
92 76
93 hdmi-out { 77 hdmi-out {
94 compatible = "hdmi-connector"; 78 compatible = "hdmi-connector";
95 type = "a"; 79 type = "a";
96 80
97 port { 81 port {
98 hdmi_con: endpoint { 82 hdmi_con: endpoint {
99 remote-endpoin 83 remote-endpoint = <<9611_out>;
100 }; 84 };
101 }; 85 };
102 }; 86 };
103 87
104 reserved-memory { <<
105 /* Cont splash region set up b <<
106 cont_splash_mem: framebuffer@9 <<
107 reg = <0x0 0x9d400000 <<
108 no-map; <<
109 }; <<
110 }; <<
111 <<
112 lt9611_1v8: lt9611-vdd18-regulator { 88 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 89 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 90 regulator-name = "LT9611_1V8";
115 91
116 vin-supply = <&vdc_5v>; 92 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 93 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 94 regulator-max-microvolt = <1800000>;
119 95
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 96 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 97 enable-active-high;
122 }; 98 };
123 99
124 lt9611_3v3: lt9611-3v3 { 100 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 101 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 102 regulator-name = "LT9611_3V3";
127 103
128 vin-supply = <&vdc_3v3>; 104 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 105 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 106 regulator-max-microvolt = <3300000>;
131 107
132 /* !! 108 // TODO: make it possible to drive same GPIO from two clients
133 * TODO: make it possible to d !! 109 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
134 * gpio = <&tlmm 89 GPIO_ACTIV !! 110 // enable-active-high;
135 * enable-active-high; <<
136 */ <<
137 }; 111 };
138 112
139 pcie0_1p05v: pcie-0-1p05v-regulator { 113 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 114 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 115 regulator-name = "PCIE0_1.05V";
142 116
143 vin-supply = <&vbat>; 117 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 118 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 119 regulator-max-microvolt = <1050000>;
146 120
147 /* !! 121 // TODO: make it possible to drive same GPIO from two clients
148 * TODO: make it possible to d !! 122 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
149 * gpio = <&tlmm 90 GPIO_ACTIV !! 123 // enable-active-high;
150 * enable-active-high; <<
151 */ <<
152 }; 124 };
153 125
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator !! 126 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
155 compatible = "regulator-fixed" 127 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 128 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 129 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 130 regulator-max-microvolt = <1200000>;
159 enable-active-high; 131 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ !! 132 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 133 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 134 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 135 vin-supply = <&vbat>;
164 }; 136 };
165 137
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator !! 138 cam0_avdd_2v8: reg_cam0_avdd_2v8 {
167 compatible = "regulator-fixed" 139 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 140 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 141 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 142 regulator-max-microvolt = <2800000>;
171 enable-active-high; 143 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ !! 144 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 145 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 146 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 147 vin-supply = <&vbat>;
176 }; 148 };
177 149
178 /* This regulator is enabled when the 150 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator !! 151 cam3_avdd_2v8: reg_cam3_avdd_2v8 {
180 compatible = "regulator-fixed" 152 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 153 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 154 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 155 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 156 regulator-always-on;
185 vin-supply = <&vbat>; 157 vin-supply = <&vbat>;
186 }; 158 };
187 159
188 pcie0_3p3v_dual: vldo-3v3-regulator { 160 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 161 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 162 regulator-name = "VLDO_3V3";
191 163
192 vin-supply = <&vbat>; 164 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 165 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 166 regulator-max-microvolt = <3300000>;
195 167
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 168 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 169 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 170
205 pinctrl-names = "default"; 171 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 172 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 173 };
208 174
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 175 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 176 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 177 regulator-name = "V5P0_HDMIOUT";
212 178
213 vin-supply = <&vdc_5v>; 179 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 180 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 181 regulator-max-microvolt = <500000>;
216 182
217 /* !! 183 // TODO: make it possible to drive same GPIO from two clients
218 * TODO: make it possible to d !! 184 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
219 * gpio = <&tlmm 89 GPIO_ACTIV !! 185 // enable-active-high;
220 * enable-active-high; <<
221 */ <<
222 }; 186 };
223 187
224 vbat: vbat-regulator { 188 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 189 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 190 regulator-name = "VBAT";
227 191
228 vin-supply = <&dc12v>; 192 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 193 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 194 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 195 regulator-always-on;
232 }; 196 };
233 197
234 vbat_som: vbat-som-regulator { 198 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 199 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 200 regulator-name = "VBAT_SOM";
237 201
238 vin-supply = <&dc12v>; 202 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 203 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 204 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 205 regulator-always-on;
242 }; 206 };
243 207
244 vdc_3v3: vdc-3v3-regulator { 208 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 209 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 210 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 211 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 212 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 213 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 214 regulator-always-on;
251 }; 215 };
252 216
253 vdc_5v: vdc-5v-regulator { 217 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 218 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 219 regulator-name = "VDC_5V";
256 220
257 vin-supply = <&dc12v>; 221 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 222 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 223 regulator-max-microvolt = <500000>;
260 regulator-always-on; 224 regulator-always-on;
261 }; 225 };
262 226
263 vreg_s4a_1p8: vreg-s4a-1p8 { 227 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 228 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 229 regulator-name = "vreg_s4a_1p8";
266 230
267 regulator-min-microvolt = <180 231 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 232 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 233 regulator-always-on;
270 }; 234 };
271 235
272 vph_pwr: vph-pwr-regulator { 236 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 237 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 238 regulator-name = "vph_pwr";
275 239
276 vin-supply = <&vbat_som>; 240 vin-supply = <&vbat_som>;
277 }; 241 };
278 }; 242 };
279 243
280 &adsp_pas { 244 &adsp_pas {
281 status = "okay"; 245 status = "okay";
282 246
283 firmware-name = "qcom/sdm845/adsp.mbn" 247 firmware-name = "qcom/sdm845/adsp.mbn";
284 }; 248 };
285 249
286 &apps_rsc { 250 &apps_rsc {
287 regulators-0 { !! 251 pm8998-rpmh-regulators {
288 compatible = "qcom,pm8998-rpmh 252 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 253 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 254 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 255 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 256 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 257 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 258 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 259 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 260 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 261 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 262 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 263 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 264 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 265 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 266 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 267 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 268 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 269 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 270 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 271 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 272 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 273 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 274 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 275 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 276 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 277 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 278 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 279 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 280 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 281
318 vreg_s3a_1p35: smps3 { 282 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 283 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 284 regulator-max-microvolt = <1352000>;
321 }; 285 };
322 286
323 vreg_s5a_2p04: smps5 { 287 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 288 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 289 regulator-max-microvolt = <2040000>;
326 }; 290 };
327 291
328 vreg_s7a_1p025: smps7 { 292 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 293 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 294 regulator-max-microvolt = <1028000>;
331 }; 295 };
332 296
333 vreg_l1a_0p875: ldo1 { 297 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 298 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 299 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 300 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 301 };
338 302
339 vreg_l5a_0p8: ldo5 { 303 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 304 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 305 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 306 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 307 };
344 308
345 vreg_l12a_1p8: ldo12 { 309 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 310 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 311 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 312 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 313 };
350 314
351 vreg_l7a_1p8: ldo7 { 315 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 316 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 317 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 318 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 319 };
356 320
357 vreg_l13a_2p95: ldo13 { 321 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 322 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 323 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 324 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 325 };
362 326
363 vreg_l17a_1p3: ldo17 { 327 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 328 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 329 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 331 };
368 332
369 vreg_l20a_2p95: ldo20 { 333 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 334 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 335 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 336 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 337 };
374 338
375 vreg_l21a_2p95: ldo21 { 339 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 340 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 341 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 343 };
380 344
381 vreg_l24a_3p075: ldo24 { 345 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 346 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 347 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 349 };
386 350
387 vreg_l25a_3p3: ldo25 { 351 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 352 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 353 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 355 };
392 356
393 vreg_l26a_1p2: ldo26 { 357 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 358 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 359 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 361 };
398 362
399 vreg_lvs1a_1p8: lvs1 { 363 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 364 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 365 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 366 regulator-always-on;
403 }; 367 };
404 368
405 vreg_lvs2a_1p8: lvs2 { 369 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 370 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 371 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 372 regulator-always-on;
409 }; 373 };
410 }; 374 };
411 375
412 regulators-1 { !! 376 pmi8998-rpmh-regulators {
413 compatible = "qcom,pmi8998-rpm 377 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 378 qcom,pmic-id = "b";
415 379
416 vdd-bob-supply = <&vph_pwr>; 380 vdd-bob-supply = <&vph_pwr>;
417 381
418 vreg_bob: bob { 382 vreg_bob: bob {
419 regulator-min-microvol 383 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 384 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 385 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 386 regulator-allow-bypass;
423 }; 387 };
424 }; 388 };
425 }; 389 };
426 390
427 &camss { !! 391 &cdsp_pas {
428 status = "okay"; 392 status = "okay";
>> 393 firmware-name = "qcom/sdm845/cdsp.mbn";
>> 394 };
429 395
430 vdda-phy-supply = <&vreg_l1a_0p875>; !! 396 &dsi0 {
431 vdda-pll-supply = <&vreg_l26a_1p2>; !! 397 status = "okay";
>> 398 vdda-supply = <&vreg_l26a_1p2>;
>> 399
>> 400 ports {
>> 401 port@1 {
>> 402 endpoint {
>> 403 remote-endpoint = <<9611_a>;
>> 404 data-lanes = <0 1 2 3>;
>> 405 };
>> 406 };
>> 407 };
432 }; 408 };
433 409
434 &cdsp_pas { !! 410 &dsi0_phy {
435 status = "okay"; 411 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" !! 412 vdds-supply = <&vreg_l1a_0p875>;
437 }; 413 };
438 414
439 &gcc { 415 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 416 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 417 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI 418 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
443 <GCC_LPASS_Q6_AXI_C 419 <GCC_LPASS_Q6_AXI_CLK>,
444 <GCC_LPASS_SWAY_CLK 420 <GCC_LPASS_SWAY_CLK>;
445 }; 421 };
446 422
447 &gmu { <<
448 status = "okay"; <<
449 }; <<
450 <<
451 &gpi_dma0 { <<
452 status = "okay"; <<
453 }; <<
454 <<
455 &gpi_dma1 { <<
456 status = "okay"; <<
457 }; <<
458 <<
459 &gpu { 423 &gpu {
460 status = "okay"; <<
461 zap-shader { 424 zap-shader {
462 memory-region = <&gpu_mem>; 425 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 426 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 427 };
465 }; 428 };
466 429
467 &i2c10 { 430 &i2c10 {
468 status = "okay"; 431 status = "okay";
469 clock-frequency = <400000>; 432 clock-frequency = <400000>;
470 433
471 lt9611_codec: hdmi-bridge@3b { 434 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 435 compatible = "lontium,lt9611";
473 reg = <0x3b>; 436 reg = <0x3b>;
474 #sound-dai-cells = <1>; 437 #sound-dai-cells = <1>;
475 438
476 interrupts-extended = <&tlmm 8 439 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 440
478 reset-gpios = <&tlmm 128 GPIO_ 441 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 442
480 vdd-supply = <<9611_1v8>; 443 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 444 vcc-supply = <<9611_3v3>;
482 445
483 pinctrl-names = "default"; 446 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 447 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 448
486 ports { 449 ports {
487 #address-cells = <1>; 450 #address-cells = <1>;
488 #size-cells = <0>; 451 #size-cells = <0>;
489 452
490 port@0 { 453 port@0 {
491 reg = <0>; 454 reg = <0>;
492 455
493 lt9611_a: endp 456 lt9611_a: endpoint {
494 remote !! 457 remote-endpoint = <&dsi0_out>;
495 }; <<
496 }; <<
497 <<
498 port@1 { <<
499 reg = <1>; <<
500 <<
501 lt9611_b: endp <<
502 remote <<
503 }; 458 };
504 }; 459 };
505 460
506 port@2 { 461 port@2 {
507 reg = <2>; 462 reg = <2>;
508 463
509 lt9611_out: en 464 lt9611_out: endpoint {
510 remote 465 remote-endpoint = <&hdmi_con>;
511 }; 466 };
512 }; 467 };
513 }; 468 };
514 }; 469 };
515 }; 470 };
516 471
517 &i2c11 { 472 &i2c11 {
518 /* On Low speed expansion */ 473 /* On Low speed expansion */
519 clock-frequency = <100000>; !! 474 label = "LS-I2C1";
520 status = "okay"; 475 status = "okay";
521 }; 476 };
522 477
523 &i2c14 { 478 &i2c14 {
524 /* On Low speed expansion */ 479 /* On Low speed expansion */
525 clock-frequency = <100000>; !! 480 label = "LS-I2C0";
526 status = "okay"; 481 status = "okay";
527 }; 482 };
528 483
529 &mdss { 484 &mdss {
530 memory-region = <&cont_splash_mem>; <<
531 status = "okay"; <<
532 }; <<
533 <<
534 &mdss_dsi0 { <<
535 status = "okay"; <<
536 vdda-supply = <&vreg_l26a_1p2>; <<
537 <<
538 qcom,dual-dsi-mode; <<
539 qcom,master-dsi; <<
540 <<
541 ports { <<
542 port@1 { <<
543 endpoint { <<
544 remote-endpoin <<
545 data-lanes = < <<
546 }; <<
547 }; <<
548 }; <<
549 }; <<
550 <<
551 &mdss_dsi0_phy { <<
552 status = "okay"; <<
553 vdds-supply = <&vreg_l1a_0p875>; <<
554 }; <<
555 <<
556 &mdss_dsi1 { <<
557 vdda-supply = <&vreg_l26a_1p2>; <<
558 <<
559 qcom,dual-dsi-mode; <<
560 <<
561 /* DSI1 is slave, so use DSI0 clocks * <<
562 assigned-clock-parents = <&mdss_dsi0_p <<
563 <<
564 status = "okay"; 485 status = "okay";
565 <<
566 ports { <<
567 port@1 { <<
568 endpoint { <<
569 remote-endpoin <<
570 data-lanes = < <<
571 }; <<
572 }; <<
573 }; <<
574 }; 486 };
575 487
576 &mdss_dsi1_phy { !! 488 &mdss_mdp {
577 vdds-supply = <&vreg_l1a_0p875>; <<
578 status = "okay"; 489 status = "okay";
579 }; 490 };
580 491
581 &mss_pil { 492 &mss_pil {
582 status = "okay"; 493 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 494 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 495 };
585 496
586 &pcie0 { 497 &pcie0 {
587 status = "okay"; 498 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO !! 499 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI !! 500 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 501
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 502 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 503
593 pinctrl-names = "default"; 504 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 505 pinctrl-0 = <&pcie0_default_state>;
595 }; 506 };
596 507
597 &pcie0_phy { 508 &pcie0_phy {
598 status = "okay"; 509 status = "okay";
599 510
600 vdda-phy-supply = <&vreg_l1a_0p875>; 511 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 512 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 513 };
603 514
604 &pcie1 { 515 &pcie1 {
605 status = "okay"; 516 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L !! 517 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 518
608 pinctrl-names = "default"; 519 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 520 pinctrl-0 = <&pcie1_default_state>;
610 }; 521 };
611 522
612 &pcie1_phy { 523 &pcie1_phy {
613 status = "okay"; 524 status = "okay";
614 525
615 vdda-phy-supply = <&vreg_l1a_0p875>; 526 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 527 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 528 };
618 529
619 &pm8998_gpios { !! 530 &pm8998_gpio {
620 gpio-line-names = 531 gpio-line-names =
621 "NC", 532 "NC",
622 "NC", 533 "NC",
623 "WLAN_SW_CTRL", 534 "WLAN_SW_CTRL",
624 "NC", 535 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 536 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 537 "VOL_UP_N",
627 "NC", 538 "NC",
628 "ADC_IN1", 539 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 540 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 541 "CAM0_AVDD_EN",
631 "NC", 542 "NC",
632 "CAM0_DVDD_EN", 543 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 544 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 545 "DIV_CLK2",
635 "NC", 546 "NC",
636 "NC", 547 "NC",
637 "NC", 548 "NC",
638 "SMB_STAT", 549 "SMB_STAT",
639 "NC", 550 "NC",
640 "NC", 551 "NC",
641 "ADC_IN2", 552 "ADC_IN2",
642 "OPTION1", 553 "OPTION1",
643 "WCSS_PWR_REQ", 554 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 555 "PM845_GPIO24",
645 "OPTION2", 556 "OPTION2",
646 "PM845_SLB"; 557 "PM845_SLB";
647 558
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v !! 559 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
649 pins = "gpio12"; 560 pins = "gpio12";
650 function = "normal"; 561 function = "normal";
651 562
652 bias-pull-up; 563 bias-pull-up;
653 drive-push-pull; 564 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 565 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 566 };
656 567
657 cam0_avdd_2v8_en_default: cam0-avdd-2v !! 568 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
658 pins = "gpio10"; 569 pins = "gpio10";
659 function = "normal"; 570 function = "normal";
660 571
661 bias-pull-up; 572 bias-pull-up;
662 drive-push-pull; 573 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 574 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 575 };
665 576
666 vol_up_pin_a: vol-up-active-state { !! 577 vol_up_pin_a: vol-up-active {
667 pins = "gpio6"; 578 pins = "gpio6";
668 function = "normal"; 579 function = "normal";
669 input-enable; 580 input-enable;
670 bias-pull-up; 581 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 582 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 583 };
673 }; 584 };
674 585
675 &pm8998_resin { !! 586 &pm8998_pon {
676 linux,code = <KEY_VOLUMEDOWN>; !! 587 resin {
677 status = "okay"; !! 588 compatible = "qcom,pm8941-resin";
678 }; !! 589 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
679 !! 590 debounce = <15625>;
680 &pmi8998_lpg { !! 591 bias-pull-up;
681 status = "okay"; !! 592 linux,code = <KEY_VOLUMEDOWN>;
682 <<
683 qcom,power-source = <1>; <<
684 <<
685 led@3 { <<
686 reg = <3>; <<
687 color = <LED_COLOR_ID_GREEN>; <<
688 function = LED_FUNCTION_HEARTB <<
689 function-enumerator = <3>; <<
690 <<
691 linux,default-trigger = "heart <<
692 default-state = "on"; <<
693 }; <<
694 <<
695 led@4 { <<
696 reg = <4>; <<
697 color = <LED_COLOR_ID_GREEN>; <<
698 function = LED_FUNCTION_INDICA <<
699 function-enumerator = <2>; <<
700 }; <<
701 <<
702 led@5 { <<
703 reg = <5>; <<
704 color = <LED_COLOR_ID_GREEN>; <<
705 function = LED_FUNCTION_INDICA <<
706 function-enumerator = <1>; <<
707 }; 593 };
708 }; 594 };
709 595
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 596 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 597 &q6afedai {
712 dai@22 { !! 598 qi2s@22 {
713 reg = <QUATERNARY_MI2S_RX>; !! 599 reg = <22>;
714 qcom,sd-lines = <0 1 2 3>; 600 qcom,sd-lines = <0 1 2 3>;
715 }; 601 };
716 }; 602 };
717 603
718 &q6asmdai { 604 &q6asmdai {
719 dai@0 { 605 dai@0 {
720 reg = <0>; 606 reg = <0>;
721 }; 607 };
722 608
723 dai@1 { 609 dai@1 {
724 reg = <1>; 610 reg = <1>;
725 }; 611 };
726 612
727 dai@2 { 613 dai@2 {
728 reg = <2>; 614 reg = <2>;
729 }; 615 };
730 616
731 dai@3 { 617 dai@3 {
732 reg = <3>; 618 reg = <3>;
733 direction = <2>; 619 direction = <2>;
734 is-compress-dai; 620 is-compress-dai;
735 }; 621 };
736 }; 622 };
737 623
738 &qupv3_id_0 { 624 &qupv3_id_0 {
739 status = "okay"; 625 status = "okay";
740 }; 626 };
741 627
742 &qupv3_id_1 { 628 &qupv3_id_1 {
743 status = "okay"; 629 status = "okay";
744 }; 630 };
745 631
746 &sdhc_2 { 632 &sdhc_2 {
747 status = "okay"; 633 status = "okay";
748 634
749 pinctrl-names = "default"; 635 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 636 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 637
752 vmmc-supply = <&vreg_l21a_2p95>; 638 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 639 vqmmc-supply = <&vreg_l13a_2p95>;
754 640
755 bus-width = <4>; 641 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 642 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 643 };
758 644
759 &sound { 645 &sound {
760 compatible = "qcom,db845c-sndcard", "q !! 646 compatible = "qcom,db845c-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 647 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 648 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 649 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 650 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 651 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 652 pinctrl-names = "default";
767 model = "DB845c"; 653 model = "DB845c";
768 audio-routing = 654 audio-routing =
769 "RX_BIAS", "MCLK", 655 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 656 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 657 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 658 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 659 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 660 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 661 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 662 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 663 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 664 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 665 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 666 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 667 "MultiMedia3 Capture", "MM_UL3";
782 668
783 mm1-dai-link { 669 mm1-dai-link {
784 link-name = "MultiMedia1"; 670 link-name = "MultiMedia1";
785 cpu { 671 cpu {
786 sound-dai = <&q6asmdai 672 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 673 };
788 }; 674 };
789 675
790 mm2-dai-link { 676 mm2-dai-link {
791 link-name = "MultiMedia2"; 677 link-name = "MultiMedia2";
792 cpu { 678 cpu {
793 sound-dai = <&q6asmdai 679 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 680 };
795 }; 681 };
796 682
797 mm3-dai-link { 683 mm3-dai-link {
798 link-name = "MultiMedia3"; 684 link-name = "MultiMedia3";
799 cpu { 685 cpu {
800 sound-dai = <&q6asmdai 686 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 687 };
802 }; 688 };
803 689
804 mm4-dai-link { 690 mm4-dai-link {
805 link-name = "MultiMedia4"; 691 link-name = "MultiMedia4";
806 cpu { 692 cpu {
807 sound-dai = <&q6asmdai 693 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 694 };
809 }; 695 };
810 696
811 hdmi-dai-link { 697 hdmi-dai-link {
812 link-name = "HDMI Playback"; 698 link-name = "HDMI Playback";
813 cpu { 699 cpu {
814 sound-dai = <&q6afedai 700 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 701 };
816 702
817 platform { 703 platform {
818 sound-dai = <&q6routin 704 sound-dai = <&q6routing>;
819 }; 705 };
820 706
821 codec { 707 codec {
822 sound-dai = <<9611_c !! 708 sound-dai = <<9611_codec 0>;
823 }; 709 };
824 }; 710 };
825 711
826 slim-dai-link { 712 slim-dai-link {
827 link-name = "SLIM Playback"; 713 link-name = "SLIM Playback";
828 cpu { 714 cpu {
829 sound-dai = <&q6afedai 715 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 716 };
831 717
832 platform { 718 platform {
833 sound-dai = <&q6routin 719 sound-dai = <&q6routing>;
834 }; 720 };
835 721
836 codec { 722 codec {
837 sound-dai = <&left_spk !! 723 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 724 };
839 }; 725 };
840 726
841 slimcap-dai-link { 727 slimcap-dai-link {
842 link-name = "SLIM Capture"; 728 link-name = "SLIM Capture";
843 cpu { 729 cpu {
844 sound-dai = <&q6afedai 730 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 731 };
846 732
847 platform { 733 platform {
848 sound-dai = <&q6routin 734 sound-dai = <&q6routing>;
849 }; 735 };
850 736
851 codec { 737 codec {
852 sound-dai = <&wcd9340 738 sound-dai = <&wcd9340 1>;
853 }; 739 };
854 }; 740 };
855 }; 741 };
856 742
857 &spi0 { <<
858 status = "okay"; <<
859 pinctrl-names = "default"; <<
860 pinctrl-0 = <&qup_spi0_default>; <<
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; <<
862 <<
863 can@0 { <<
864 compatible = "microchip,mcp251 <<
865 reg = <0>; <<
866 clocks = <&clk40M>; <<
867 interrupts-extended = <&tlmm 1 <<
868 spi-max-frequency = <10000000> <<
869 vdd-supply = <&vdc_5v>; <<
870 xceiver-supply = <&vdc_5v>; <<
871 }; <<
872 }; <<
873 <<
874 &spi2 { 743 &spi2 {
875 /* On Low speed expansion */ 744 /* On Low speed expansion */
>> 745 label = "LS-SPI0";
876 status = "okay"; 746 status = "okay";
877 }; 747 };
878 748
879 &tlmm { 749 &tlmm {
880 cam0_default: cam0-default-state { !! 750 cam0_default: cam0_default {
881 rst-pins { !! 751 rst {
882 pins = "gpio9"; 752 pins = "gpio9";
883 function = "gpio"; 753 function = "gpio";
884 754
885 drive-strength = <16>; 755 drive-strength = <16>;
886 bias-disable; 756 bias-disable;
887 }; 757 };
888 758
889 mclk0-pins { !! 759 mclk0 {
890 pins = "gpio13"; 760 pins = "gpio13";
891 function = "cam_mclk"; 761 function = "cam_mclk";
892 762
893 drive-strength = <16>; 763 drive-strength = <16>;
894 bias-disable; 764 bias-disable;
895 }; 765 };
896 }; 766 };
897 767
898 cam3_default: cam3-default-state { !! 768 cam3_default: cam3_default {
899 rst-pins { !! 769 rst {
900 function = "gpio"; 770 function = "gpio";
901 pins = "gpio21"; 771 pins = "gpio21";
902 772
903 drive-strength = <16>; 773 drive-strength = <16>;
904 bias-disable; 774 bias-disable;
905 }; 775 };
906 776
907 mclk3-pins { !! 777 mclk3 {
908 function = "cam_mclk"; 778 function = "cam_mclk";
909 pins = "gpio16"; 779 pins = "gpio16";
910 780
911 drive-strength = <16>; 781 drive-strength = <16>;
912 bias-disable; 782 bias-disable;
913 }; 783 };
914 }; 784 };
915 785
916 dsi_sw_sel: dsi-sw-sel-state { !! 786 dsi_sw_sel: dsi-sw-sel {
917 pins = "gpio120"; 787 pins = "gpio120";
918 function = "gpio"; 788 function = "gpio";
919 789
920 drive-strength = <2>; 790 drive-strength = <2>;
921 bias-disable; 791 bias-disable;
922 output-high; 792 output-high;
923 }; 793 };
924 794
925 lt9611_irq_pin: lt9611-irq-state { !! 795 lt9611_irq_pin: lt9611-irq {
926 pins = "gpio84"; 796 pins = "gpio84";
927 function = "gpio"; 797 function = "gpio";
928 bias-disable; 798 bias-disable;
929 }; 799 };
930 800
931 pcie0_default_state: pcie0-default-sta !! 801 pcie0_default_state: pcie0-default {
932 clkreq-pins { !! 802 clkreq {
933 pins = "gpio36"; 803 pins = "gpio36";
934 function = "pci_e0"; 804 function = "pci_e0";
935 bias-pull-up; 805 bias-pull-up;
936 }; 806 };
937 807
938 reset-n-pins { !! 808 reset-n {
939 pins = "gpio35"; 809 pins = "gpio35";
940 function = "gpio"; 810 function = "gpio";
941 811
942 drive-strength = <2>; 812 drive-strength = <2>;
943 output-low; 813 output-low;
944 bias-pull-down; 814 bias-pull-down;
945 }; 815 };
946 816
947 wake-n-pins { !! 817 wake-n {
948 pins = "gpio37"; 818 pins = "gpio37";
949 function = "gpio"; 819 function = "gpio";
950 820
951 drive-strength = <2>; 821 drive-strength = <2>;
952 bias-pull-up; 822 bias-pull-up;
953 }; 823 };
954 }; 824 };
955 825
956 pcie0_pwren_state: pcie0-pwren-state { !! 826 pcie0_pwren_state: pcie0-pwren {
957 pins = "gpio90"; 827 pins = "gpio90";
958 function = "gpio"; 828 function = "gpio";
959 829
960 drive-strength = <2>; 830 drive-strength = <2>;
961 bias-disable; 831 bias-disable;
962 }; 832 };
963 833
964 pcie1_default_state: pcie1-default-sta !! 834 pcie1_default_state: pcie1-default {
965 perst-n-pins { !! 835 perst-n {
966 pins = "gpio102"; 836 pins = "gpio102";
967 function = "gpio"; 837 function = "gpio";
968 838
969 drive-strength = <16>; 839 drive-strength = <16>;
970 bias-disable; 840 bias-disable;
971 }; 841 };
972 842
973 clkreq-pins { !! 843 clkreq {
974 pins = "gpio103"; 844 pins = "gpio103";
975 function = "pci_e1"; 845 function = "pci_e1";
976 bias-pull-up; 846 bias-pull-up;
977 }; 847 };
978 848
979 wake-n-pins { !! 849 wake-n {
980 pins = "gpio11"; 850 pins = "gpio11";
981 function = "gpio"; 851 function = "gpio";
982 852
983 drive-strength = <2>; 853 drive-strength = <2>;
984 bias-pull-up; 854 bias-pull-up;
985 }; 855 };
986 856
987 reset-n-pins { !! 857 reset-n {
988 pins = "gpio75"; 858 pins = "gpio75";
989 function = "gpio"; 859 function = "gpio";
990 860
991 drive-strength = <16>; 861 drive-strength = <16>;
992 bias-pull-up; 862 bias-pull-up;
993 output-high; 863 output-high;
994 }; 864 };
995 }; 865 };
996 866
997 sdc2_default_state: sdc2-default-state !! 867 sdc2_default_state: sdc2-default {
998 clk-pins { !! 868 clk {
999 pins = "sdc2_clk"; 869 pins = "sdc2_clk";
1000 bias-disable; 870 bias-disable;
1001 871
1002 /* 872 /*
1003 * It seems that mmc_ 873 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 874 * strength is not 16 on clk, cmd, and data pins.
1005 */ 875 */
1006 drive-strength = <16> 876 drive-strength = <16>;
1007 }; 877 };
1008 878
1009 cmd-pins { !! 879 cmd {
1010 pins = "sdc2_cmd"; 880 pins = "sdc2_cmd";
1011 bias-pull-up; 881 bias-pull-up;
1012 drive-strength = <10> 882 drive-strength = <10>;
1013 }; 883 };
1014 884
1015 data-pins { !! 885 data {
1016 pins = "sdc2_data"; 886 pins = "sdc2_data";
1017 bias-pull-up; 887 bias-pull-up;
1018 drive-strength = <10> 888 drive-strength = <10>;
1019 }; 889 };
1020 }; 890 };
1021 891
1022 sdc2_card_det_n: sd-card-det-n-state !! 892 sdc2_card_det_n: sd-card-det-n {
1023 pins = "gpio126"; 893 pins = "gpio126";
1024 function = "gpio"; 894 function = "gpio";
1025 bias-pull-up; 895 bias-pull-up;
1026 }; 896 };
>> 897
>> 898 wcd_intr_default: wcd_intr_default {
>> 899 pins = <54>;
>> 900 function = "gpio";
>> 901
>> 902 input-enable;
>> 903 bias-pull-down;
>> 904 drive-strength = <2>;
>> 905 };
1027 }; 906 };
1028 907
1029 &uart3 { 908 &uart3 {
1030 label = "LS-UART0"; 909 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; <<
1032 <<
1033 status = "disabled"; 910 status = "disabled";
1034 }; 911 };
1035 912
1036 &uart6 { 913 &uart6 {
1037 status = "okay"; 914 status = "okay";
1038 915
1039 pinctrl-0 = <&qup_uart6_4pin>; <<
1040 <<
1041 bluetooth { 916 bluetooth {
1042 compatible = "qcom,wcn3990-bt 917 compatible = "qcom,wcn3990-bt";
1043 918
1044 vddio-supply = <&vreg_s4a_1p8 919 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 920 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 921 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 922 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 923 max-speed = <3200000>;
1049 }; 924 };
1050 }; 925 };
1051 926
1052 &uart9 { 927 &uart9 {
1053 label = "LS-UART1"; 928 label = "LS-UART1";
1054 status = "okay"; 929 status = "okay";
1055 }; 930 };
1056 931
1057 &usb_1 { 932 &usb_1 {
1058 status = "okay"; 933 status = "okay";
1059 }; 934 };
1060 935
1061 &usb_1_dwc3 { 936 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 937 dr_mode = "peripheral";
1063 }; 938 };
1064 939
1065 &usb_1_hsphy { 940 &usb_1_hsphy {
1066 status = "okay"; 941 status = "okay";
1067 942
1068 vdd-supply = <&vreg_l1a_0p875>; 943 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 944 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 945 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 946
1072 qcom,imp-res-offset-value = <8>; 947 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 948 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 949 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 950 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 951 };
1077 952
1078 &usb_1_qmpphy { 953 &usb_1_qmpphy {
1079 status = "okay"; 954 status = "okay";
1080 955
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 956 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 957 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 958 };
1084 959
1085 &usb_2 { 960 &usb_2 {
1086 status = "okay"; 961 status = "okay";
1087 }; 962 };
1088 963
1089 &usb_2_dwc3 { 964 &usb_2_dwc3 {
1090 dr_mode = "host"; 965 dr_mode = "host";
1091 }; 966 };
1092 967
1093 &usb_2_hsphy { 968 &usb_2_hsphy {
1094 status = "okay"; 969 status = "okay";
1095 970
1096 vdd-supply = <&vreg_l1a_0p875>; 971 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 972 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 973 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 974
1100 qcom,imp-res-offset-value = <8>; 975 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 976 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 977 };
1103 978
1104 &usb_2_qmpphy { 979 &usb_2_qmpphy {
1105 status = "okay"; 980 status = "okay";
1106 981
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 982 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 983 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 984 };
1110 985
1111 &ufs_mem_hc { 986 &ufs_mem_hc {
1112 status = "okay"; 987 status = "okay";
1113 988
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 989 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 990
1116 vcc-supply = <&vreg_l20a_2p95>; 991 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 992 vcc-max-microamp = <800000>;
1118 }; 993 };
1119 994
1120 &ufs_mem_phy { 995 &ufs_mem_phy {
1121 status = "okay"; 996 status = "okay";
1122 997
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 998 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 999 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 1000 };
1126 1001
1127 &venus { !! 1002 &wcd9340{
1128 status = "okay"; !! 1003 pinctrl-0 = <&wcd_intr_default>;
1129 }; !! 1004 pinctrl-names = "default";
1130 !! 1005 clock-names = "extclk";
1131 &wcd9340 { !! 1006 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H !! 1007 reset-gpios = <&tlmm 64 0>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1008 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1009 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1010 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1011 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1012 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1013
1139 swm: soundwire@c85 { !! 1014 swm: swm@c85 {
1140 left_spkr: speaker@0,1 { !! 1015 left_spkr: wsa8810-left{
1141 compatible = "sdw1021 1016 compatible = "sdw10217201000";
1142 reg = <0 1>; 1017 reg = <0 1>;
1143 powerdown-gpios = <&w 1018 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1019 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1020 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1021 #sound-dai-cells = <0>;
1147 }; 1022 };
1148 1023
1149 right_spkr: speaker@0,2 { !! 1024 right_spkr: wsa8810-right{
1150 compatible = "sdw1021 1025 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w 1026 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1027 reg = <0 2>;
1153 #thermal-sensor-cells 1028 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1029 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1030 #sound-dai-cells = <0>;
1156 }; 1031 };
1157 }; 1032 };
1158 }; 1033 };
1159 1034
1160 &wifi { 1035 &wifi {
1161 status = "okay"; 1036 status = "okay";
1162 1037
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1038 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1039 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1040 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1041 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1042
1168 qcom,snoc-host-cap-8bit-quirk; 1043 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th <<
1170 }; 1044 };
1171 1045
1172 /* PINCTRL - additions to nodes defined in sd 1046 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1047 &qup_spi2_default {
1174 drive-strength = <16>; 1048 drive-strength = <16>;
1175 }; 1049 };
1176 1050
>> 1051 &qup_uart3_default{
>> 1052 pinmux {
>> 1053 pins = "gpio41", "gpio42", "gpio43", "gpio44";
>> 1054 function = "qup3";
>> 1055 };
>> 1056 };
>> 1057
1177 &qup_i2c10_default { 1058 &qup_i2c10_default {
1178 drive-strength = <2>; !! 1059 pinconf {
1179 bias-disable; !! 1060 pins = "gpio55", "gpio56";
>> 1061 drive-strength = <2>;
>> 1062 bias-disable;
>> 1063 };
>> 1064 };
>> 1065
>> 1066 &qup_uart6_default {
>> 1067 pinmux {
>> 1068 pins = "gpio45", "gpio46", "gpio47", "gpio48";
>> 1069 function = "qup6";
>> 1070 };
>> 1071
>> 1072 cts {
>> 1073 pins = "gpio45";
>> 1074 bias-disable;
>> 1075 };
>> 1076
>> 1077 rts-tx {
>> 1078 pins = "gpio46", "gpio47";
>> 1079 drive-strength = <2>;
>> 1080 bias-disable;
>> 1081 };
>> 1082
>> 1083 rx {
>> 1084 pins = "gpio48";
>> 1085 bias-pull-up;
>> 1086 };
>> 1087 };
>> 1088
>> 1089 &qup_uart9_default {
>> 1090 pinconf-tx {
>> 1091 pins = "gpio4";
>> 1092 drive-strength = <2>;
>> 1093 bias-disable;
>> 1094 };
>> 1095
>> 1096 pinconf-rx {
>> 1097 pins = "gpio5";
>> 1098 drive-strength = <2>;
>> 1099 bias-pull-up;
>> 1100 };
1180 }; 1101 };
1181 1102
1182 &qup_uart9_rx { !! 1103 &pm8998_gpio {
1183 drive-strength = <2>; !! 1104
1184 bias-pull-up; <<
1185 }; 1105 };
1186 1106
1187 &qup_uart9_tx { !! 1107 &cci {
1188 drive-strength = <2>; !! 1108 status = "okay";
1189 bias-disable; <<
1190 }; 1109 };
1191 1110
1192 /* PINCTRL - additions to nodes defined in sd !! 1111 &camss {
1193 &qup_spi0_default { !! 1112 vdda-supply = <&vreg_l1a_0p875>;
1194 drive-strength = <6>; !! 1113
1195 bias-disable; !! 1114 status = "ok";
>> 1115
>> 1116 ports {
>> 1117 #address-cells = <1>;
>> 1118 #size-cells = <0>;
>> 1119 port@0 {
>> 1120 reg = <0>;
>> 1121 csiphy0_ep: endpoint {
>> 1122 clock-lanes = <7>;
>> 1123 data-lanes = <0 1 2 3>;
>> 1124 remote-endpoint = <&ov8856_ep>;
>> 1125 };
>> 1126 };
>> 1127 };
>> 1128 };
>> 1129
>> 1130 &cci_i2c0 {
>> 1131 camera@10 {
>> 1132 compatible = "ovti,ov8856";
>> 1133 reg = <0x10>;
>> 1134
>> 1135 // CAM0_RST_N
>> 1136 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1137 pinctrl-names = "default";
>> 1138 pinctrl-0 = <&cam0_default>;
>> 1139 gpios = <&tlmm 13 0>,
>> 1140 <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1141
>> 1142 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
>> 1143 clock-names = "xvclk";
>> 1144 clock-frequency = <19200000>;
>> 1145
>> 1146 /* The &vreg_s4a_1p8 trace is powered on as a,
>> 1147 * so it is represented by a fixed regulator.
>> 1148 *
>> 1149 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
>> 1150 * both have to be enabled through the power management
>> 1151 * gpios.
>> 1152 */
>> 1153 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1154
>> 1155 dovdd-supply = <&vreg_lvs1a_1p8>;
>> 1156 avdd-supply = <&cam0_avdd_2v8>;
>> 1157 dvdd-supply = <&cam0_dvdd_1v2>;
>> 1158
>> 1159 status = "ok";
>> 1160
>> 1161 port {
>> 1162 ov8856_ep: endpoint {
>> 1163 clock-lanes = <1>;
>> 1164 link-frequencies = /bits/ 64
>> 1165 <360000000 180000000>;
>> 1166 data-lanes = <1 2 3 4>;
>> 1167 remote-endpoint = <&csiphy0_ep>;
>> 1168 };
>> 1169 };
>> 1170 };
>> 1171 };
>> 1172
>> 1173 &cci_i2c1 {
>> 1174 camera@60 {
>> 1175 compatible = "ovti,ov7251";
>> 1176
>> 1177 // I2C address as per ov7251.txt linux documentation
>> 1178 reg = <0x60>;
>> 1179
>> 1180 // CAM3_RST_N
>> 1181 enable-gpios = <&tlmm 21 0>;
>> 1182 pinctrl-names = "default";
>> 1183 pinctrl-0 = <&cam3_default>;
>> 1184 gpios = <&tlmm 16 0>,
>> 1185 <&tlmm 21 0>;
>> 1186
>> 1187 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
>> 1188 clock-names = "xclk";
>> 1189 clock-frequency = <24000000>;
>> 1190
>> 1191 /* The &vreg_s4a_1p8 trace always powered on.
>> 1192 *
>> 1193 * The 2.8V vdda-supply regulator is enabled when the
>> 1194 * vreg_s4a_1p8 trace is pulled high.
>> 1195 * It too is represented by a fixed regulator.
>> 1196 *
>> 1197 * No 1.2V vddd-supply regulator is used.
>> 1198 */
>> 1199 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1200
>> 1201 vdddo-supply = <&vreg_lvs1a_1p8>;
>> 1202 vdda-supply = <&cam3_avdd_2v8>;
>> 1203
>> 1204 status = "disable";
>> 1205
>> 1206 port {
>> 1207 ov7251_ep: endpoint {
>> 1208 clock-lanes = <1>;
>> 1209 data-lanes = <0 1>;
>> 1210 // remote-endpoint = <&csiphy3_ep>;
>> 1211 };
>> 1212 };
>> 1213 };
1196 }; 1214 };
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