1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> <<
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 8 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 10 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 11 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 12 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" <<
15 #include "pm8998.dtsi" 13 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 14 #include "pmi8998.dtsi"
17 15
18 / { 16 / {
19 model = "Thundercomm Dragonboard 845c" 17 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 18 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; 19 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>; 20 qcom,board-id = <8 0>;
23 21
24 aliases { 22 aliases {
25 serial0 = &uart9; 23 serial0 = &uart9;
26 serial1 = &uart6; !! 24 hsuart0 = &uart6;
27 }; 25 };
28 26
29 chosen { 27 chosen {
30 stdout-path = "serial0:115200n 28 stdout-path = "serial0:115200n8";
31 }; 29 };
32 30
33 /* Fixed crystal oscillator dedicated <<
34 clk40M: can-clock { <<
35 compatible = "fixed-clock"; <<
36 #clock-cells = <0>; <<
37 clock-frequency = <40000000>; <<
38 }; <<
39 <<
40 dc12v: dc12v-regulator { 31 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 32 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 33 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 34 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 35 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 36 regulator-always-on;
46 }; 37 };
47 38
48 gpio-keys { !! 39 gpio_keys {
49 compatible = "gpio-keys"; 40 compatible = "gpio-keys";
50 autorepeat; 41 autorepeat;
51 42
52 pinctrl-names = "default"; 43 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 44 pinctrl-0 = <&vol_up_pin_a>;
54 45
55 key-vol-up { !! 46 vol-up {
56 label = "Volume Up"; 47 label = "Volume Up";
57 linux,code = <KEY_VOLU 48 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios !! 49 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
59 }; 50 };
60 }; 51 };
61 52
62 leds { 53 leds {
63 compatible = "gpio-leds"; 54 compatible = "gpio-leds";
64 55
65 led-0 { !! 56 user4 {
66 label = "green:user4"; 57 label = "green:user4";
67 function = LED_FUNCTIO !! 58 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
68 color = <LED_COLOR_ID_ !! 59 linux,default-trigger = "panic-indicator";
69 gpios = <&pm8998_gpios <<
70 default-state = "off"; 60 default-state = "off";
71 panic-indicator; <<
72 }; 61 };
73 62
74 led-1 { !! 63 wlan {
75 label = "yellow:wlan"; 64 label = "yellow:wlan";
76 function = LED_FUNCTIO !! 65 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
77 color = <LED_COLOR_ID_ <<
78 gpios = <&pm8998_gpios <<
79 linux,default-trigger 66 linux,default-trigger = "phy0tx";
80 default-state = "off"; 67 default-state = "off";
81 }; 68 };
82 69
83 led-2 { !! 70 bt {
84 label = "blue:bt"; 71 label = "blue:bt";
85 function = LED_FUNCTIO !! 72 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
86 color = <LED_COLOR_ID_ <<
87 gpios = <&pm8998_gpios <<
88 linux,default-trigger 73 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 74 default-state = "off";
90 }; 75 };
91 }; 76 };
92 77
93 hdmi-out { 78 hdmi-out {
94 compatible = "hdmi-connector"; 79 compatible = "hdmi-connector";
95 type = "a"; 80 type = "a";
96 81
97 port { 82 port {
98 hdmi_con: endpoint { 83 hdmi_con: endpoint {
99 remote-endpoin 84 remote-endpoint = <<9611_out>;
100 }; 85 };
101 }; 86 };
102 }; 87 };
103 88
104 reserved-memory { <<
105 /* Cont splash region set up b <<
106 cont_splash_mem: framebuffer@9 <<
107 reg = <0x0 0x9d400000 <<
108 no-map; <<
109 }; <<
110 }; <<
111 <<
112 lt9611_1v8: lt9611-vdd18-regulator { 89 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 90 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 91 regulator-name = "LT9611_1V8";
115 92
116 vin-supply = <&vdc_5v>; 93 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 94 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 95 regulator-max-microvolt = <1800000>;
119 96
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 97 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 98 enable-active-high;
122 }; 99 };
123 100
124 lt9611_3v3: lt9611-3v3 { 101 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 102 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 103 regulator-name = "LT9611_3V3";
127 104
128 vin-supply = <&vdc_3v3>; 105 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 106 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 107 regulator-max-microvolt = <3300000>;
131 108
132 /* !! 109 // TODO: make it possible to drive same GPIO from two clients
133 * TODO: make it possible to d !! 110 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
134 * gpio = <&tlmm 89 GPIO_ACTIV !! 111 // enable-active-high;
135 * enable-active-high; <<
136 */ <<
137 }; 112 };
138 113
139 pcie0_1p05v: pcie-0-1p05v-regulator { 114 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 115 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 116 regulator-name = "PCIE0_1.05V";
142 117
143 vin-supply = <&vbat>; 118 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 119 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 120 regulator-max-microvolt = <1050000>;
146 121
147 /* !! 122 // TODO: make it possible to drive same GPIO from two clients
148 * TODO: make it possible to d !! 123 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
149 * gpio = <&tlmm 90 GPIO_ACTIV !! 124 // enable-active-high;
150 * enable-active-high; <<
151 */ <<
152 }; 125 };
153 126
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator !! 127 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
155 compatible = "regulator-fixed" 128 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 129 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 130 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 131 regulator-max-microvolt = <1200000>;
159 enable-active-high; 132 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ !! 133 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 134 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 135 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 136 vin-supply = <&vbat>;
164 }; 137 };
165 138
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator !! 139 cam0_avdd_2v8: reg_cam0_avdd_2v8 {
167 compatible = "regulator-fixed" 140 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 141 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 142 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 143 regulator-max-microvolt = <2800000>;
171 enable-active-high; 144 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ !! 145 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 146 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 147 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 148 vin-supply = <&vbat>;
176 }; 149 };
177 150
178 /* This regulator is enabled when the 151 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator !! 152 cam3_avdd_2v8: reg_cam3_avdd_2v8 {
180 compatible = "regulator-fixed" 153 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 154 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 155 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 156 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 157 regulator-always-on;
185 vin-supply = <&vbat>; 158 vin-supply = <&vbat>;
186 }; 159 };
187 160
188 pcie0_3p3v_dual: vldo-3v3-regulator { 161 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 162 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 163 regulator-name = "VLDO_3V3";
191 164
192 vin-supply = <&vbat>; 165 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 166 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 167 regulator-max-microvolt = <3300000>;
195 168
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 169 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 170 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 171
205 pinctrl-names = "default"; 172 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 173 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 174 };
208 175
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 176 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 177 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 178 regulator-name = "V5P0_HDMIOUT";
212 179
213 vin-supply = <&vdc_5v>; 180 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 181 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 182 regulator-max-microvolt = <500000>;
216 183
217 /* !! 184 // TODO: make it possible to drive same GPIO from two clients
218 * TODO: make it possible to d !! 185 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
219 * gpio = <&tlmm 89 GPIO_ACTIV !! 186 // enable-active-high;
220 * enable-active-high; <<
221 */ <<
222 }; 187 };
223 188
224 vbat: vbat-regulator { 189 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 190 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 191 regulator-name = "VBAT";
227 192
228 vin-supply = <&dc12v>; 193 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 194 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 195 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 196 regulator-always-on;
232 }; 197 };
233 198
234 vbat_som: vbat-som-regulator { 199 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 200 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 201 regulator-name = "VBAT_SOM";
237 202
238 vin-supply = <&dc12v>; 203 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 204 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 205 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 206 regulator-always-on;
242 }; 207 };
243 208
244 vdc_3v3: vdc-3v3-regulator { 209 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 210 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 211 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 212 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 213 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 214 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 215 regulator-always-on;
251 }; 216 };
252 217
253 vdc_5v: vdc-5v-regulator { 218 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 219 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 220 regulator-name = "VDC_5V";
256 221
257 vin-supply = <&dc12v>; 222 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 223 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 224 regulator-max-microvolt = <500000>;
260 regulator-always-on; 225 regulator-always-on;
261 }; 226 };
262 227
263 vreg_s4a_1p8: vreg-s4a-1p8 { 228 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 229 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 230 regulator-name = "vreg_s4a_1p8";
266 231
267 regulator-min-microvolt = <180 232 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 233 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 234 regulator-always-on;
270 }; 235 };
271 236
272 vph_pwr: vph-pwr-regulator { 237 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 238 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 239 regulator-name = "vph_pwr";
275 240
276 vin-supply = <&vbat_som>; 241 vin-supply = <&vbat_som>;
277 }; 242 };
278 }; 243 };
279 244
280 &adsp_pas { 245 &adsp_pas {
281 status = "okay"; 246 status = "okay";
282 247
283 firmware-name = "qcom/sdm845/adsp.mbn" 248 firmware-name = "qcom/sdm845/adsp.mbn";
284 }; 249 };
285 250
286 &apps_rsc { 251 &apps_rsc {
287 regulators-0 { !! 252 pm8998-rpmh-regulators {
288 compatible = "qcom,pm8998-rpmh 253 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 254 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 255 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 256 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 257 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 258 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 259 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 260 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 261 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 262 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 263 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 264 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 265 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 266 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 267 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 268 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 269 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 270 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 271 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 272 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 273 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 274 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 275 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 276 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 277 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 278 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 279 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 280 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 281 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 282
318 vreg_s3a_1p35: smps3 { 283 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 284 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 285 regulator-max-microvolt = <1352000>;
321 }; 286 };
322 287
323 vreg_s5a_2p04: smps5 { 288 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 289 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 290 regulator-max-microvolt = <2040000>;
326 }; 291 };
327 292
328 vreg_s7a_1p025: smps7 { 293 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 294 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 295 regulator-max-microvolt = <1028000>;
331 }; 296 };
332 297
333 vreg_l1a_0p875: ldo1 { 298 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 299 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 300 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 301 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 302 };
338 303
339 vreg_l5a_0p8: ldo5 { 304 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 305 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 306 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 307 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 308 };
344 309
345 vreg_l12a_1p8: ldo12 { 310 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 311 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 312 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 313 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 314 };
350 315
351 vreg_l7a_1p8: ldo7 { 316 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 317 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 318 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 319 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 320 };
356 321
357 vreg_l13a_2p95: ldo13 { 322 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 323 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 324 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 325 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 326 };
362 327
363 vreg_l17a_1p3: ldo17 { 328 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 329 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 330 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 331 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 332 };
368 333
369 vreg_l20a_2p95: ldo20 { 334 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 335 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 336 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 337 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 338 };
374 339
375 vreg_l21a_2p95: ldo21 { 340 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 341 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 342 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 343 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 344 };
380 345
381 vreg_l24a_3p075: ldo24 { 346 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 347 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 348 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 349 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 350 };
386 351
387 vreg_l25a_3p3: ldo25 { 352 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 353 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 354 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 355 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 356 };
392 357
393 vreg_l26a_1p2: ldo26 { 358 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 359 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 360 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 361 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 362 };
398 363
399 vreg_lvs1a_1p8: lvs1 { 364 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 365 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 366 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 367 regulator-always-on;
403 }; 368 };
404 369
405 vreg_lvs2a_1p8: lvs2 { 370 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 371 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 372 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 373 regulator-always-on;
409 }; 374 };
410 }; 375 };
411 376
412 regulators-1 { !! 377 pmi8998-rpmh-regulators {
413 compatible = "qcom,pmi8998-rpm 378 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 379 qcom,pmic-id = "b";
415 380
416 vdd-bob-supply = <&vph_pwr>; 381 vdd-bob-supply = <&vph_pwr>;
417 382
418 vreg_bob: bob { 383 vreg_bob: bob {
419 regulator-min-microvol 384 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 385 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 386 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 387 regulator-allow-bypass;
423 }; 388 };
424 }; 389 };
425 }; 390 };
426 391
427 &camss { !! 392 &cdsp_pas {
428 status = "okay"; 393 status = "okay";
>> 394 firmware-name = "qcom/sdm845/cdsp.mbn";
>> 395 };
429 396
430 vdda-phy-supply = <&vreg_l1a_0p875>; !! 397 &dsi0 {
431 vdda-pll-supply = <&vreg_l26a_1p2>; !! 398 status = "okay";
>> 399 vdda-supply = <&vreg_l26a_1p2>;
>> 400
>> 401 ports {
>> 402 port@1 {
>> 403 endpoint {
>> 404 remote-endpoint = <<9611_a>;
>> 405 data-lanes = <0 1 2 3>;
>> 406 };
>> 407 };
>> 408 };
432 }; 409 };
433 410
434 &cdsp_pas { !! 411 &dsi0_phy {
435 status = "okay"; 412 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" !! 413 vdds-supply = <&vreg_l1a_0p875>;
437 }; 414 };
438 415
439 &gcc { 416 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 417 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 418 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI 419 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
443 <GCC_LPASS_Q6_AXI_C 420 <GCC_LPASS_Q6_AXI_CLK>,
444 <GCC_LPASS_SWAY_CLK 421 <GCC_LPASS_SWAY_CLK>;
445 }; 422 };
446 423
447 &gmu { 424 &gmu {
448 status = "okay"; 425 status = "okay";
449 }; 426 };
450 427
451 &gpi_dma0 { <<
452 status = "okay"; <<
453 }; <<
454 <<
455 &gpi_dma1 { <<
456 status = "okay"; <<
457 }; <<
458 <<
459 &gpu { 428 &gpu {
460 status = "okay"; 429 status = "okay";
461 zap-shader { 430 zap-shader {
462 memory-region = <&gpu_mem>; 431 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 432 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 433 };
465 }; 434 };
466 435
467 &i2c10 { 436 &i2c10 {
468 status = "okay"; 437 status = "okay";
469 clock-frequency = <400000>; 438 clock-frequency = <400000>;
470 439
471 lt9611_codec: hdmi-bridge@3b { 440 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 441 compatible = "lontium,lt9611";
473 reg = <0x3b>; 442 reg = <0x3b>;
474 #sound-dai-cells = <1>; 443 #sound-dai-cells = <1>;
475 444
476 interrupts-extended = <&tlmm 8 445 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 446
478 reset-gpios = <&tlmm 128 GPIO_ 447 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 448
480 vdd-supply = <<9611_1v8>; 449 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 450 vcc-supply = <<9611_3v3>;
482 451
483 pinctrl-names = "default"; 452 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 453 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 454
486 ports { 455 ports {
487 #address-cells = <1>; 456 #address-cells = <1>;
488 #size-cells = <0>; 457 #size-cells = <0>;
489 458
490 port@0 { 459 port@0 {
491 reg = <0>; 460 reg = <0>;
492 461
493 lt9611_a: endp 462 lt9611_a: endpoint {
494 remote !! 463 remote-endpoint = <&dsi0_out>;
495 }; <<
496 }; <<
497 <<
498 port@1 { <<
499 reg = <1>; <<
500 <<
501 lt9611_b: endp <<
502 remote <<
503 }; 464 };
504 }; 465 };
505 466
506 port@2 { 467 port@2 {
507 reg = <2>; 468 reg = <2>;
508 469
509 lt9611_out: en 470 lt9611_out: endpoint {
510 remote 471 remote-endpoint = <&hdmi_con>;
511 }; 472 };
512 }; 473 };
513 }; 474 };
514 }; 475 };
515 }; 476 };
516 477
517 &i2c11 { 478 &i2c11 {
518 /* On Low speed expansion */ 479 /* On Low speed expansion */
519 clock-frequency = <100000>; !! 480 label = "LS-I2C1";
520 status = "okay"; 481 status = "okay";
521 }; 482 };
522 483
523 &i2c14 { 484 &i2c14 {
524 /* On Low speed expansion */ 485 /* On Low speed expansion */
525 clock-frequency = <100000>; !! 486 label = "LS-I2C0";
526 status = "okay"; 487 status = "okay";
527 }; 488 };
528 489
529 &mdss { 490 &mdss {
530 memory-region = <&cont_splash_mem>; <<
531 status = "okay"; <<
532 }; <<
533 <<
534 &mdss_dsi0 { <<
535 status = "okay"; <<
536 vdda-supply = <&vreg_l26a_1p2>; <<
537 <<
538 qcom,dual-dsi-mode; <<
539 qcom,master-dsi; <<
540 <<
541 ports { <<
542 port@1 { <<
543 endpoint { <<
544 remote-endpoin <<
545 data-lanes = < <<
546 }; <<
547 }; <<
548 }; <<
549 }; <<
550 <<
551 &mdss_dsi0_phy { <<
552 status = "okay"; <<
553 vdds-supply = <&vreg_l1a_0p875>; <<
554 }; <<
555 <<
556 &mdss_dsi1 { <<
557 vdda-supply = <&vreg_l26a_1p2>; <<
558 <<
559 qcom,dual-dsi-mode; <<
560 <<
561 /* DSI1 is slave, so use DSI0 clocks * <<
562 assigned-clock-parents = <&mdss_dsi0_p <<
563 <<
564 status = "okay"; <<
565 <<
566 ports { <<
567 port@1 { <<
568 endpoint { <<
569 remote-endpoin <<
570 data-lanes = < <<
571 }; <<
572 }; <<
573 }; <<
574 }; <<
575 <<
576 &mdss_dsi1_phy { <<
577 vdds-supply = <&vreg_l1a_0p875>; <<
578 status = "okay"; 491 status = "okay";
579 }; 492 };
580 493
581 &mss_pil { 494 &mss_pil {
582 status = "okay"; 495 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 496 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 497 };
585 498
586 &pcie0 { 499 &pcie0 {
587 status = "okay"; 500 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO !! 501 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI !! 502 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 503
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 504 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 505
593 pinctrl-names = "default"; 506 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 507 pinctrl-0 = <&pcie0_default_state>;
595 }; 508 };
596 509
597 &pcie0_phy { 510 &pcie0_phy {
598 status = "okay"; 511 status = "okay";
599 512
600 vdda-phy-supply = <&vreg_l1a_0p875>; 513 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 514 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 515 };
603 516
604 &pcie1 { 517 &pcie1 {
605 status = "okay"; 518 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L !! 519 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 520
608 pinctrl-names = "default"; 521 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 522 pinctrl-0 = <&pcie1_default_state>;
610 }; 523 };
611 524
612 &pcie1_phy { 525 &pcie1_phy {
613 status = "okay"; 526 status = "okay";
614 527
615 vdda-phy-supply = <&vreg_l1a_0p875>; 528 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 529 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 530 };
618 531
619 &pm8998_gpios { !! 532 &pm8998_gpio {
620 gpio-line-names = 533 gpio-line-names =
621 "NC", 534 "NC",
622 "NC", 535 "NC",
623 "WLAN_SW_CTRL", 536 "WLAN_SW_CTRL",
624 "NC", 537 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 538 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 539 "VOL_UP_N",
627 "NC", 540 "NC",
628 "ADC_IN1", 541 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 542 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 543 "CAM0_AVDD_EN",
631 "NC", 544 "NC",
632 "CAM0_DVDD_EN", 545 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 546 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 547 "DIV_CLK2",
635 "NC", 548 "NC",
636 "NC", 549 "NC",
637 "NC", 550 "NC",
638 "SMB_STAT", 551 "SMB_STAT",
639 "NC", 552 "NC",
640 "NC", 553 "NC",
641 "ADC_IN2", 554 "ADC_IN2",
642 "OPTION1", 555 "OPTION1",
643 "WCSS_PWR_REQ", 556 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 557 "PM845_GPIO24",
645 "OPTION2", 558 "OPTION2",
646 "PM845_SLB"; 559 "PM845_SLB";
647 560
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v !! 561 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
649 pins = "gpio12"; 562 pins = "gpio12";
650 function = "normal"; 563 function = "normal";
651 564
652 bias-pull-up; 565 bias-pull-up;
653 drive-push-pull; 566 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 567 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 568 };
656 569
657 cam0_avdd_2v8_en_default: cam0-avdd-2v !! 570 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
658 pins = "gpio10"; 571 pins = "gpio10";
659 function = "normal"; 572 function = "normal";
660 573
661 bias-pull-up; 574 bias-pull-up;
662 drive-push-pull; 575 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 576 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 577 };
665 578
666 vol_up_pin_a: vol-up-active-state { !! 579 vol_up_pin_a: vol-up-active {
667 pins = "gpio6"; 580 pins = "gpio6";
668 function = "normal"; 581 function = "normal";
669 input-enable; 582 input-enable;
670 bias-pull-up; 583 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 584 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 585 };
673 }; 586 };
674 587
675 &pm8998_resin { !! 588 &pm8998_pon {
676 linux,code = <KEY_VOLUMEDOWN>; !! 589 resin {
677 status = "okay"; !! 590 compatible = "qcom,pm8941-resin";
678 }; !! 591 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
679 !! 592 debounce = <15625>;
680 &pmi8998_lpg { !! 593 bias-pull-up;
681 status = "okay"; !! 594 linux,code = <KEY_VOLUMEDOWN>;
682 <<
683 qcom,power-source = <1>; <<
684 <<
685 led@3 { <<
686 reg = <3>; <<
687 color = <LED_COLOR_ID_GREEN>; <<
688 function = LED_FUNCTION_HEARTB <<
689 function-enumerator = <3>; <<
690 <<
691 linux,default-trigger = "heart <<
692 default-state = "on"; <<
693 }; <<
694 <<
695 led@4 { <<
696 reg = <4>; <<
697 color = <LED_COLOR_ID_GREEN>; <<
698 function = LED_FUNCTION_INDICA <<
699 function-enumerator = <2>; <<
700 }; <<
701 <<
702 led@5 { <<
703 reg = <5>; <<
704 color = <LED_COLOR_ID_GREEN>; <<
705 function = LED_FUNCTION_INDICA <<
706 function-enumerator = <1>; <<
707 }; 595 };
708 }; 596 };
709 597
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 598 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 599 &q6afedai {
712 dai@22 { !! 600 qi2s@22 {
713 reg = <QUATERNARY_MI2S_RX>; !! 601 reg = <22>;
714 qcom,sd-lines = <0 1 2 3>; 602 qcom,sd-lines = <0 1 2 3>;
715 }; 603 };
716 }; 604 };
717 605
718 &q6asmdai { 606 &q6asmdai {
719 dai@0 { 607 dai@0 {
720 reg = <0>; 608 reg = <0>;
721 }; 609 };
722 610
723 dai@1 { 611 dai@1 {
724 reg = <1>; 612 reg = <1>;
725 }; 613 };
726 614
727 dai@2 { 615 dai@2 {
728 reg = <2>; 616 reg = <2>;
729 }; 617 };
730 618
731 dai@3 { 619 dai@3 {
732 reg = <3>; 620 reg = <3>;
733 direction = <2>; 621 direction = <2>;
734 is-compress-dai; 622 is-compress-dai;
735 }; 623 };
736 }; 624 };
737 625
738 &qupv3_id_0 { 626 &qupv3_id_0 {
739 status = "okay"; 627 status = "okay";
740 }; 628 };
741 629
742 &qupv3_id_1 { 630 &qupv3_id_1 {
743 status = "okay"; 631 status = "okay";
744 }; 632 };
745 633
746 &sdhc_2 { 634 &sdhc_2 {
747 status = "okay"; 635 status = "okay";
748 636
749 pinctrl-names = "default"; 637 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 638 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 639
752 vmmc-supply = <&vreg_l21a_2p95>; 640 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 641 vqmmc-supply = <&vreg_l13a_2p95>;
754 642
755 bus-width = <4>; 643 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 644 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 645 };
758 646
759 &sound { 647 &sound {
760 compatible = "qcom,db845c-sndcard", "q !! 648 compatible = "qcom,db845c-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 649 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 650 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 651 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 652 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 653 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 654 pinctrl-names = "default";
767 model = "DB845c"; 655 model = "DB845c";
768 audio-routing = 656 audio-routing =
769 "RX_BIAS", "MCLK", 657 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 658 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 659 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 660 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 661 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 662 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 663 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 664 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 665 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 666 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 667 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 668 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 669 "MultiMedia3 Capture", "MM_UL3";
782 670
783 mm1-dai-link { 671 mm1-dai-link {
784 link-name = "MultiMedia1"; 672 link-name = "MultiMedia1";
785 cpu { 673 cpu {
786 sound-dai = <&q6asmdai 674 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 675 };
788 }; 676 };
789 677
790 mm2-dai-link { 678 mm2-dai-link {
791 link-name = "MultiMedia2"; 679 link-name = "MultiMedia2";
792 cpu { 680 cpu {
793 sound-dai = <&q6asmdai 681 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 682 };
795 }; 683 };
796 684
797 mm3-dai-link { 685 mm3-dai-link {
798 link-name = "MultiMedia3"; 686 link-name = "MultiMedia3";
799 cpu { 687 cpu {
800 sound-dai = <&q6asmdai 688 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 689 };
802 }; 690 };
803 691
804 mm4-dai-link { 692 mm4-dai-link {
805 link-name = "MultiMedia4"; 693 link-name = "MultiMedia4";
806 cpu { 694 cpu {
807 sound-dai = <&q6asmdai 695 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 696 };
809 }; 697 };
810 698
811 hdmi-dai-link { 699 hdmi-dai-link {
812 link-name = "HDMI Playback"; 700 link-name = "HDMI Playback";
813 cpu { 701 cpu {
814 sound-dai = <&q6afedai 702 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 703 };
816 704
817 platform { 705 platform {
818 sound-dai = <&q6routin 706 sound-dai = <&q6routing>;
819 }; 707 };
820 708
821 codec { 709 codec {
822 sound-dai = <<9611_c !! 710 sound-dai = <<9611_codec 0>;
823 }; 711 };
824 }; 712 };
825 713
826 slim-dai-link { 714 slim-dai-link {
827 link-name = "SLIM Playback"; 715 link-name = "SLIM Playback";
828 cpu { 716 cpu {
829 sound-dai = <&q6afedai 717 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 718 };
831 719
832 platform { 720 platform {
833 sound-dai = <&q6routin 721 sound-dai = <&q6routing>;
834 }; 722 };
835 723
836 codec { 724 codec {
837 sound-dai = <&left_spk !! 725 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 726 };
839 }; 727 };
840 728
841 slimcap-dai-link { 729 slimcap-dai-link {
842 link-name = "SLIM Capture"; 730 link-name = "SLIM Capture";
843 cpu { 731 cpu {
844 sound-dai = <&q6afedai 732 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 733 };
846 734
847 platform { 735 platform {
848 sound-dai = <&q6routin 736 sound-dai = <&q6routing>;
849 }; 737 };
850 738
851 codec { 739 codec {
852 sound-dai = <&wcd9340 740 sound-dai = <&wcd9340 1>;
853 }; 741 };
854 }; 742 };
855 }; 743 };
856 744
857 &spi0 { <<
858 status = "okay"; <<
859 pinctrl-names = "default"; <<
860 pinctrl-0 = <&qup_spi0_default>; <<
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; <<
862 <<
863 can@0 { <<
864 compatible = "microchip,mcp251 <<
865 reg = <0>; <<
866 clocks = <&clk40M>; <<
867 interrupts-extended = <&tlmm 1 <<
868 spi-max-frequency = <10000000> <<
869 vdd-supply = <&vdc_5v>; <<
870 xceiver-supply = <&vdc_5v>; <<
871 }; <<
872 }; <<
873 <<
874 &spi2 { 745 &spi2 {
875 /* On Low speed expansion */ 746 /* On Low speed expansion */
>> 747 label = "LS-SPI0";
876 status = "okay"; 748 status = "okay";
877 }; 749 };
878 750
879 &tlmm { 751 &tlmm {
880 cam0_default: cam0-default-state { !! 752 cam0_default: cam0_default {
881 rst-pins { !! 753 rst {
882 pins = "gpio9"; 754 pins = "gpio9";
883 function = "gpio"; 755 function = "gpio";
884 756
885 drive-strength = <16>; 757 drive-strength = <16>;
886 bias-disable; 758 bias-disable;
887 }; 759 };
888 760
889 mclk0-pins { !! 761 mclk0 {
890 pins = "gpio13"; 762 pins = "gpio13";
891 function = "cam_mclk"; 763 function = "cam_mclk";
892 764
893 drive-strength = <16>; 765 drive-strength = <16>;
894 bias-disable; 766 bias-disable;
895 }; 767 };
896 }; 768 };
897 769
898 cam3_default: cam3-default-state { !! 770 cam3_default: cam3_default {
899 rst-pins { !! 771 rst {
900 function = "gpio"; 772 function = "gpio";
901 pins = "gpio21"; 773 pins = "gpio21";
902 774
903 drive-strength = <16>; 775 drive-strength = <16>;
904 bias-disable; 776 bias-disable;
905 }; 777 };
906 778
907 mclk3-pins { !! 779 mclk3 {
908 function = "cam_mclk"; 780 function = "cam_mclk";
909 pins = "gpio16"; 781 pins = "gpio16";
910 782
911 drive-strength = <16>; 783 drive-strength = <16>;
912 bias-disable; 784 bias-disable;
913 }; 785 };
914 }; 786 };
915 787
916 dsi_sw_sel: dsi-sw-sel-state { !! 788 dsi_sw_sel: dsi-sw-sel {
917 pins = "gpio120"; 789 pins = "gpio120";
918 function = "gpio"; 790 function = "gpio";
919 791
920 drive-strength = <2>; 792 drive-strength = <2>;
921 bias-disable; 793 bias-disable;
922 output-high; 794 output-high;
923 }; 795 };
924 796
925 lt9611_irq_pin: lt9611-irq-state { !! 797 lt9611_irq_pin: lt9611-irq {
926 pins = "gpio84"; 798 pins = "gpio84";
927 function = "gpio"; 799 function = "gpio";
928 bias-disable; 800 bias-disable;
929 }; 801 };
930 802
931 pcie0_default_state: pcie0-default-sta !! 803 pcie0_default_state: pcie0-default {
932 clkreq-pins { !! 804 clkreq {
933 pins = "gpio36"; 805 pins = "gpio36";
934 function = "pci_e0"; 806 function = "pci_e0";
935 bias-pull-up; 807 bias-pull-up;
936 }; 808 };
937 809
938 reset-n-pins { !! 810 reset-n {
939 pins = "gpio35"; 811 pins = "gpio35";
940 function = "gpio"; 812 function = "gpio";
941 813
942 drive-strength = <2>; 814 drive-strength = <2>;
943 output-low; 815 output-low;
944 bias-pull-down; 816 bias-pull-down;
945 }; 817 };
946 818
947 wake-n-pins { !! 819 wake-n {
948 pins = "gpio37"; 820 pins = "gpio37";
949 function = "gpio"; 821 function = "gpio";
950 822
951 drive-strength = <2>; 823 drive-strength = <2>;
952 bias-pull-up; 824 bias-pull-up;
953 }; 825 };
954 }; 826 };
955 827
956 pcie0_pwren_state: pcie0-pwren-state { !! 828 pcie0_pwren_state: pcie0-pwren {
957 pins = "gpio90"; 829 pins = "gpio90";
958 function = "gpio"; 830 function = "gpio";
959 831
960 drive-strength = <2>; 832 drive-strength = <2>;
961 bias-disable; 833 bias-disable;
962 }; 834 };
963 835
964 pcie1_default_state: pcie1-default-sta !! 836 pcie1_default_state: pcie1-default {
965 perst-n-pins { !! 837 perst-n {
966 pins = "gpio102"; 838 pins = "gpio102";
967 function = "gpio"; 839 function = "gpio";
968 840
969 drive-strength = <16>; 841 drive-strength = <16>;
970 bias-disable; 842 bias-disable;
971 }; 843 };
972 844
973 clkreq-pins { !! 845 clkreq {
974 pins = "gpio103"; 846 pins = "gpio103";
975 function = "pci_e1"; 847 function = "pci_e1";
976 bias-pull-up; 848 bias-pull-up;
977 }; 849 };
978 850
979 wake-n-pins { !! 851 wake-n {
980 pins = "gpio11"; 852 pins = "gpio11";
981 function = "gpio"; 853 function = "gpio";
982 854
983 drive-strength = <2>; 855 drive-strength = <2>;
984 bias-pull-up; 856 bias-pull-up;
985 }; 857 };
986 858
987 reset-n-pins { !! 859 reset-n {
988 pins = "gpio75"; 860 pins = "gpio75";
989 function = "gpio"; 861 function = "gpio";
990 862
991 drive-strength = <16>; 863 drive-strength = <16>;
992 bias-pull-up; 864 bias-pull-up;
993 output-high; 865 output-high;
994 }; 866 };
995 }; 867 };
996 868
997 sdc2_default_state: sdc2-default-state !! 869 sdc2_default_state: sdc2-default {
998 clk-pins { !! 870 clk {
999 pins = "sdc2_clk"; 871 pins = "sdc2_clk";
1000 bias-disable; 872 bias-disable;
1001 873
1002 /* 874 /*
1003 * It seems that mmc_ 875 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 876 * strength is not 16 on clk, cmd, and data pins.
1005 */ 877 */
1006 drive-strength = <16> 878 drive-strength = <16>;
1007 }; 879 };
1008 880
1009 cmd-pins { !! 881 cmd {
1010 pins = "sdc2_cmd"; 882 pins = "sdc2_cmd";
1011 bias-pull-up; 883 bias-pull-up;
1012 drive-strength = <10> 884 drive-strength = <10>;
1013 }; 885 };
1014 886
1015 data-pins { !! 887 data {
1016 pins = "sdc2_data"; 888 pins = "sdc2_data";
1017 bias-pull-up; 889 bias-pull-up;
1018 drive-strength = <10> 890 drive-strength = <10>;
1019 }; 891 };
1020 }; 892 };
1021 893
1022 sdc2_card_det_n: sd-card-det-n-state !! 894 sdc2_card_det_n: sd-card-det-n {
1023 pins = "gpio126"; 895 pins = "gpio126";
1024 function = "gpio"; 896 function = "gpio";
1025 bias-pull-up; 897 bias-pull-up;
1026 }; 898 };
>> 899
>> 900 wcd_intr_default: wcd_intr_default {
>> 901 pins = <54>;
>> 902 function = "gpio";
>> 903
>> 904 input-enable;
>> 905 bias-pull-down;
>> 906 drive-strength = <2>;
>> 907 };
1027 }; 908 };
1028 909
1029 &uart3 { 910 &uart3 {
1030 label = "LS-UART0"; 911 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; <<
1032 <<
1033 status = "disabled"; 912 status = "disabled";
1034 }; 913 };
1035 914
1036 &uart6 { 915 &uart6 {
1037 status = "okay"; 916 status = "okay";
1038 917
1039 pinctrl-0 = <&qup_uart6_4pin>; <<
1040 <<
1041 bluetooth { 918 bluetooth {
1042 compatible = "qcom,wcn3990-bt 919 compatible = "qcom,wcn3990-bt";
1043 920
1044 vddio-supply = <&vreg_s4a_1p8 921 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 922 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 923 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 924 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 925 max-speed = <3200000>;
1049 }; 926 };
1050 }; 927 };
1051 928
1052 &uart9 { 929 &uart9 {
1053 label = "LS-UART1"; 930 label = "LS-UART1";
1054 status = "okay"; 931 status = "okay";
1055 }; 932 };
1056 933
1057 &usb_1 { 934 &usb_1 {
1058 status = "okay"; 935 status = "okay";
1059 }; 936 };
1060 937
1061 &usb_1_dwc3 { 938 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 939 dr_mode = "peripheral";
1063 }; 940 };
1064 941
1065 &usb_1_hsphy { 942 &usb_1_hsphy {
1066 status = "okay"; 943 status = "okay";
1067 944
1068 vdd-supply = <&vreg_l1a_0p875>; 945 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 946 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 947 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 948
1072 qcom,imp-res-offset-value = <8>; 949 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 950 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 951 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 952 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 953 };
1077 954
1078 &usb_1_qmpphy { 955 &usb_1_qmpphy {
1079 status = "okay"; 956 status = "okay";
1080 957
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 958 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 959 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 960 };
1084 961
1085 &usb_2 { 962 &usb_2 {
1086 status = "okay"; 963 status = "okay";
1087 }; 964 };
1088 965
1089 &usb_2_dwc3 { 966 &usb_2_dwc3 {
1090 dr_mode = "host"; 967 dr_mode = "host";
1091 }; 968 };
1092 969
1093 &usb_2_hsphy { 970 &usb_2_hsphy {
1094 status = "okay"; 971 status = "okay";
1095 972
1096 vdd-supply = <&vreg_l1a_0p875>; 973 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 974 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 975 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 976
1100 qcom,imp-res-offset-value = <8>; 977 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 978 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 979 };
1103 980
1104 &usb_2_qmpphy { 981 &usb_2_qmpphy {
1105 status = "okay"; 982 status = "okay";
1106 983
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 984 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 985 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 986 };
1110 987
1111 &ufs_mem_hc { 988 &ufs_mem_hc {
1112 status = "okay"; 989 status = "okay";
1113 990
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 991 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 992
1116 vcc-supply = <&vreg_l20a_2p95>; 993 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 994 vcc-max-microamp = <800000>;
1118 }; 995 };
1119 996
1120 &ufs_mem_phy { 997 &ufs_mem_phy {
1121 status = "okay"; 998 status = "okay";
1122 999
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 1000 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 1001 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 1002 };
1126 1003
1127 &venus { 1004 &venus {
1128 status = "okay"; 1005 status = "okay";
1129 }; 1006 };
1130 1007
1131 &wcd9340 { !! 1008 &wcd9340{
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H !! 1009 pinctrl-0 = <&wcd_intr_default>;
>> 1010 pinctrl-names = "default";
>> 1011 clock-names = "extclk";
>> 1012 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
>> 1013 reset-gpios = <&tlmm 64 0>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1014 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1015 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1016 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1017 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1018 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1019
1139 swm: soundwire@c85 { !! 1020 swm: swm@c85 {
1140 left_spkr: speaker@0,1 { !! 1021 left_spkr: wsa8810-left{
1141 compatible = "sdw1021 1022 compatible = "sdw10217201000";
1142 reg = <0 1>; 1023 reg = <0 1>;
1143 powerdown-gpios = <&w 1024 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1025 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1026 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1027 #sound-dai-cells = <0>;
1147 }; 1028 };
1148 1029
1149 right_spkr: speaker@0,2 { !! 1030 right_spkr: wsa8810-right{
1150 compatible = "sdw1021 1031 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w 1032 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1033 reg = <0 2>;
1153 #thermal-sensor-cells 1034 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1035 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1036 #sound-dai-cells = <0>;
1156 }; 1037 };
1157 }; 1038 };
1158 }; 1039 };
1159 1040
1160 &wifi { 1041 &wifi {
1161 status = "okay"; 1042 status = "okay";
1162 1043
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1044 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1045 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1046 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1047 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1048
1168 qcom,snoc-host-cap-8bit-quirk; 1049 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th <<
1170 }; 1050 };
1171 1051
1172 /* PINCTRL - additions to nodes defined in sd 1052 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1053 &qup_spi2_default {
1174 drive-strength = <16>; 1054 drive-strength = <16>;
1175 }; 1055 };
1176 1056
>> 1057 &qup_uart3_default{
>> 1058 pinmux {
>> 1059 pins = "gpio41", "gpio42", "gpio43", "gpio44";
>> 1060 function = "qup3";
>> 1061 };
>> 1062 };
>> 1063
1177 &qup_i2c10_default { 1064 &qup_i2c10_default {
1178 drive-strength = <2>; !! 1065 pinconf {
1179 bias-disable; !! 1066 pins = "gpio55", "gpio56";
>> 1067 drive-strength = <2>;
>> 1068 bias-disable;
>> 1069 };
>> 1070 };
>> 1071
>> 1072 &qup_uart6_default {
>> 1073 pinmux {
>> 1074 pins = "gpio45", "gpio46", "gpio47", "gpio48";
>> 1075 function = "qup6";
>> 1076 };
>> 1077
>> 1078 cts {
>> 1079 pins = "gpio45";
>> 1080 bias-disable;
>> 1081 };
>> 1082
>> 1083 rts-tx {
>> 1084 pins = "gpio46", "gpio47";
>> 1085 drive-strength = <2>;
>> 1086 bias-disable;
>> 1087 };
>> 1088
>> 1089 rx {
>> 1090 pins = "gpio48";
>> 1091 bias-pull-up;
>> 1092 };
>> 1093 };
>> 1094
>> 1095 &qup_uart9_default {
>> 1096 pinconf-tx {
>> 1097 pins = "gpio4";
>> 1098 drive-strength = <2>;
>> 1099 bias-disable;
>> 1100 };
>> 1101
>> 1102 pinconf-rx {
>> 1103 pins = "gpio5";
>> 1104 drive-strength = <2>;
>> 1105 bias-pull-up;
>> 1106 };
1180 }; 1107 };
1181 1108
1182 &qup_uart9_rx { !! 1109 &pm8998_gpio {
1183 drive-strength = <2>; !! 1110
1184 bias-pull-up; <<
1185 }; 1111 };
1186 1112
1187 &qup_uart9_tx { !! 1113 &cci {
1188 drive-strength = <2>; !! 1114 status = "okay";
1189 bias-disable; <<
1190 }; 1115 };
1191 1116
1192 /* PINCTRL - additions to nodes defined in sd !! 1117 &camss {
1193 &qup_spi0_default { !! 1118 vdda-supply = <&vreg_l1a_0p875>;
1194 drive-strength = <6>; !! 1119
1195 bias-disable; !! 1120 status = "ok";
>> 1121
>> 1122 ports {
>> 1123 #address-cells = <1>;
>> 1124 #size-cells = <0>;
>> 1125 port@0 {
>> 1126 reg = <0>;
>> 1127 csiphy0_ep: endpoint {
>> 1128 clock-lanes = <7>;
>> 1129 data-lanes = <0 1 2 3>;
>> 1130 remote-endpoint = <&ov8856_ep>;
>> 1131 };
>> 1132 };
>> 1133 };
>> 1134 };
>> 1135
>> 1136 &cci_i2c0 {
>> 1137 camera@10 {
>> 1138 compatible = "ovti,ov8856";
>> 1139 reg = <0x10>;
>> 1140
>> 1141 // CAM0_RST_N
>> 1142 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1143 pinctrl-names = "default";
>> 1144 pinctrl-0 = <&cam0_default>;
>> 1145 gpios = <&tlmm 13 0>,
>> 1146 <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1147
>> 1148 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
>> 1149 clock-names = "xvclk";
>> 1150 clock-frequency = <19200000>;
>> 1151
>> 1152 /* The &vreg_s4a_1p8 trace is powered on as a,
>> 1153 * so it is represented by a fixed regulator.
>> 1154 *
>> 1155 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
>> 1156 * both have to be enabled through the power management
>> 1157 * gpios.
>> 1158 */
>> 1159 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1160
>> 1161 dovdd-supply = <&vreg_lvs1a_1p8>;
>> 1162 avdd-supply = <&cam0_avdd_2v8>;
>> 1163 dvdd-supply = <&cam0_dvdd_1v2>;
>> 1164
>> 1165 status = "ok";
>> 1166
>> 1167 port {
>> 1168 ov8856_ep: endpoint {
>> 1169 clock-lanes = <1>;
>> 1170 link-frequencies = /bits/ 64
>> 1171 <360000000 180000000>;
>> 1172 data-lanes = <1 2 3 4>;
>> 1173 remote-endpoint = <&csiphy0_ep>;
>> 1174 };
>> 1175 };
>> 1176 };
>> 1177 };
>> 1178
>> 1179 &cci_i2c1 {
>> 1180 camera@60 {
>> 1181 compatible = "ovti,ov7251";
>> 1182
>> 1183 // I2C address as per ov7251.txt linux documentation
>> 1184 reg = <0x60>;
>> 1185
>> 1186 // CAM3_RST_N
>> 1187 enable-gpios = <&tlmm 21 0>;
>> 1188 pinctrl-names = "default";
>> 1189 pinctrl-0 = <&cam3_default>;
>> 1190 gpios = <&tlmm 16 0>,
>> 1191 <&tlmm 21 0>;
>> 1192
>> 1193 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
>> 1194 clock-names = "xclk";
>> 1195 clock-frequency = <24000000>;
>> 1196
>> 1197 /* The &vreg_s4a_1p8 trace always powered on.
>> 1198 *
>> 1199 * The 2.8V vdda-supply regulator is enabled when the
>> 1200 * vreg_s4a_1p8 trace is pulled high.
>> 1201 * It too is represented by a fixed regulator.
>> 1202 *
>> 1203 * No 1.2V vddd-supply regulator is used.
>> 1204 */
>> 1205 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1206
>> 1207 vdddo-supply = <&vreg_lvs1a_1p8>;
>> 1208 vdda-supply = <&cam3_avdd_2v8>;
>> 1209
>> 1210 status = "disable";
>> 1211
>> 1212 port {
>> 1213 ov7251_ep: endpoint {
>> 1214 clock-lanes = <1>;
>> 1215 data-lanes = <0 1>;
>> 1216 // remote-endpoint = <&csiphy3_ep>;
>> 1217 };
>> 1218 };
>> 1219 };
1196 }; 1220 };
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