1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> <<
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 8 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 10 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 11 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 12 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" <<
15 #include "pm8998.dtsi" 13 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 14 #include "pmi8998.dtsi"
17 15
18 / { 16 / {
19 model = "Thundercomm Dragonboard 845c" 17 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 18 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; 19 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>; 20 qcom,board-id = <8 0>;
23 21
24 aliases { 22 aliases {
25 serial0 = &uart9; 23 serial0 = &uart9;
26 serial1 = &uart6; !! 24 hsuart0 = &uart6;
27 }; 25 };
28 26
29 chosen { 27 chosen {
30 stdout-path = "serial0:115200n 28 stdout-path = "serial0:115200n8";
31 }; 29 };
32 30
33 /* Fixed crystal oscillator dedicated <<
34 clk40M: can-clock { <<
35 compatible = "fixed-clock"; <<
36 #clock-cells = <0>; <<
37 clock-frequency = <40000000>; <<
38 }; <<
39 <<
40 dc12v: dc12v-regulator { 31 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 32 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 33 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 34 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 35 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 36 regulator-always-on;
46 }; 37 };
47 38
48 gpio-keys { !! 39 gpio_keys {
49 compatible = "gpio-keys"; 40 compatible = "gpio-keys";
50 autorepeat; 41 autorepeat;
51 42
52 pinctrl-names = "default"; 43 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 44 pinctrl-0 = <&vol_up_pin_a>;
54 45
55 key-vol-up { !! 46 vol-up {
56 label = "Volume Up"; 47 label = "Volume Up";
57 linux,code = <KEY_VOLU 48 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios !! 49 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
59 }; 50 };
60 }; 51 };
61 52
62 leds { 53 leds {
63 compatible = "gpio-leds"; 54 compatible = "gpio-leds";
64 55
65 led-0 { !! 56 user4 {
66 label = "green:user4"; 57 label = "green:user4";
67 function = LED_FUNCTIO !! 58 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
68 color = <LED_COLOR_ID_ !! 59 linux,default-trigger = "panic-indicator";
69 gpios = <&pm8998_gpios <<
70 default-state = "off"; 60 default-state = "off";
71 panic-indicator; <<
72 }; 61 };
73 62
74 led-1 { !! 63 wlan {
75 label = "yellow:wlan"; 64 label = "yellow:wlan";
76 function = LED_FUNCTIO !! 65 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
77 color = <LED_COLOR_ID_ <<
78 gpios = <&pm8998_gpios <<
79 linux,default-trigger 66 linux,default-trigger = "phy0tx";
80 default-state = "off"; 67 default-state = "off";
81 }; 68 };
82 69
83 led-2 { !! 70 bt {
84 label = "blue:bt"; 71 label = "blue:bt";
85 function = LED_FUNCTIO !! 72 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
86 color = <LED_COLOR_ID_ <<
87 gpios = <&pm8998_gpios <<
88 linux,default-trigger 73 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 74 default-state = "off";
90 }; 75 };
91 }; 76 };
92 77
93 hdmi-out { 78 hdmi-out {
94 compatible = "hdmi-connector"; 79 compatible = "hdmi-connector";
95 type = "a"; 80 type = "a";
96 81
97 port { 82 port {
98 hdmi_con: endpoint { 83 hdmi_con: endpoint {
99 remote-endpoin 84 remote-endpoint = <<9611_out>;
100 }; 85 };
101 }; 86 };
102 }; 87 };
103 88
104 reserved-memory { <<
105 /* Cont splash region set up b <<
106 cont_splash_mem: framebuffer@9 <<
107 reg = <0x0 0x9d400000 <<
108 no-map; <<
109 }; <<
110 }; <<
111 <<
112 lt9611_1v8: lt9611-vdd18-regulator { 89 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 90 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 91 regulator-name = "LT9611_1V8";
115 92
116 vin-supply = <&vdc_5v>; 93 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 94 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 95 regulator-max-microvolt = <1800000>;
119 96
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 97 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 98 enable-active-high;
122 }; 99 };
123 100
124 lt9611_3v3: lt9611-3v3 { 101 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 102 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 103 regulator-name = "LT9611_3V3";
127 104
128 vin-supply = <&vdc_3v3>; 105 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 106 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 107 regulator-max-microvolt = <3300000>;
131 108
132 /* !! 109 // TODO: make it possible to drive same GPIO from two clients
133 * TODO: make it possible to d !! 110 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
134 * gpio = <&tlmm 89 GPIO_ACTIV !! 111 // enable-active-high;
135 * enable-active-high; <<
136 */ <<
137 }; 112 };
138 113
139 pcie0_1p05v: pcie-0-1p05v-regulator { 114 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 115 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 116 regulator-name = "PCIE0_1.05V";
142 117
143 vin-supply = <&vbat>; 118 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 119 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 120 regulator-max-microvolt = <1050000>;
146 121
147 /* !! 122 // TODO: make it possible to drive same GPIO from two clients
148 * TODO: make it possible to d !! 123 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
149 * gpio = <&tlmm 90 GPIO_ACTIV !! 124 // enable-active-high;
150 * enable-active-high; <<
151 */ <<
152 }; 125 };
153 126
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator !! 127 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
155 compatible = "regulator-fixed" 128 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 129 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 130 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 131 regulator-max-microvolt = <1200000>;
159 enable-active-high; 132 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ !! 133 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 134 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 135 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 136 vin-supply = <&vbat>;
164 }; 137 };
165 138
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator !! 139 cam0_avdd_2v8: reg_cam0_avdd_2v8 {
167 compatible = "regulator-fixed" 140 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 141 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 142 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 143 regulator-max-microvolt = <2800000>;
171 enable-active-high; 144 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ !! 145 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 146 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 147 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 148 vin-supply = <&vbat>;
176 }; 149 };
177 150
178 /* This regulator is enabled when the 151 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator !! 152 cam3_avdd_2v8: reg_cam3_avdd_2v8 {
180 compatible = "regulator-fixed" 153 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 154 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 155 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 156 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 157 regulator-always-on;
185 vin-supply = <&vbat>; 158 vin-supply = <&vbat>;
186 }; 159 };
187 160
188 pcie0_3p3v_dual: vldo-3v3-regulator { 161 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 162 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 163 regulator-name = "VLDO_3V3";
191 164
192 vin-supply = <&vbat>; 165 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 166 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 167 regulator-max-microvolt = <3300000>;
195 168
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 169 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 170 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 171
205 pinctrl-names = "default"; 172 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 173 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 174 };
208 175
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 176 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 177 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 178 regulator-name = "V5P0_HDMIOUT";
212 179
213 vin-supply = <&vdc_5v>; 180 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 181 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 182 regulator-max-microvolt = <500000>;
216 183
217 /* !! 184 // TODO: make it possible to drive same GPIO from two clients
218 * TODO: make it possible to d !! 185 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
219 * gpio = <&tlmm 89 GPIO_ACTIV !! 186 // enable-active-high;
220 * enable-active-high; <<
221 */ <<
222 }; 187 };
223 188
224 vbat: vbat-regulator { 189 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 190 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 191 regulator-name = "VBAT";
227 192
228 vin-supply = <&dc12v>; 193 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 194 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 195 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 196 regulator-always-on;
232 }; 197 };
233 198
234 vbat_som: vbat-som-regulator { 199 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 200 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 201 regulator-name = "VBAT_SOM";
237 202
238 vin-supply = <&dc12v>; 203 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 204 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 205 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 206 regulator-always-on;
242 }; 207 };
243 208
244 vdc_3v3: vdc-3v3-regulator { 209 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 210 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 211 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 212 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 213 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 214 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 215 regulator-always-on;
251 }; 216 };
252 217
253 vdc_5v: vdc-5v-regulator { 218 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 219 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 220 regulator-name = "VDC_5V";
256 221
257 vin-supply = <&dc12v>; 222 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 223 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 224 regulator-max-microvolt = <500000>;
260 regulator-always-on; 225 regulator-always-on;
261 }; 226 };
262 227
263 vreg_s4a_1p8: vreg-s4a-1p8 { 228 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 229 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 230 regulator-name = "vreg_s4a_1p8";
266 231
267 regulator-min-microvolt = <180 232 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 233 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 234 regulator-always-on;
270 }; 235 };
271 236
272 vph_pwr: vph-pwr-regulator { 237 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 238 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 239 regulator-name = "vph_pwr";
275 240
276 vin-supply = <&vbat_som>; 241 vin-supply = <&vbat_som>;
277 }; 242 };
278 }; 243 };
279 244
280 &adsp_pas { 245 &adsp_pas {
281 status = "okay"; 246 status = "okay";
282 247
283 firmware-name = "qcom/sdm845/adsp.mbn" 248 firmware-name = "qcom/sdm845/adsp.mbn";
284 }; 249 };
285 250
286 &apps_rsc { 251 &apps_rsc {
287 regulators-0 { !! 252 pm8998-rpmh-regulators {
288 compatible = "qcom,pm8998-rpmh 253 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 254 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 255 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 256 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 257 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 258 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 259 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 260 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 261 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 262 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 263 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 264 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 265 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 266 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 267 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 268 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 269 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 270 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 271 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 272 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 273 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 274 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 275 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 276 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 277 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 278 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 279 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 280 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 281 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 282
318 vreg_s3a_1p35: smps3 { 283 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 284 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 285 regulator-max-microvolt = <1352000>;
321 }; 286 };
322 287
323 vreg_s5a_2p04: smps5 { 288 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 289 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 290 regulator-max-microvolt = <2040000>;
326 }; 291 };
327 292
328 vreg_s7a_1p025: smps7 { 293 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 294 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 295 regulator-max-microvolt = <1028000>;
331 }; 296 };
332 297
333 vreg_l1a_0p875: ldo1 { 298 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 299 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 300 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 301 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 302 };
338 303
339 vreg_l5a_0p8: ldo5 { 304 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 305 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 306 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 307 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 308 };
344 309
345 vreg_l12a_1p8: ldo12 { 310 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 311 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 312 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 313 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 314 };
350 315
351 vreg_l7a_1p8: ldo7 { 316 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 317 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 318 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 319 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 320 };
356 321
357 vreg_l13a_2p95: ldo13 { 322 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 323 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 324 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 325 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 326 };
362 327
363 vreg_l17a_1p3: ldo17 { 328 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 329 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 330 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 331 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 332 };
368 333
369 vreg_l20a_2p95: ldo20 { 334 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 335 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 336 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 337 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 338 };
374 339
375 vreg_l21a_2p95: ldo21 { 340 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 341 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 342 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 343 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 344 };
380 345
381 vreg_l24a_3p075: ldo24 { 346 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 347 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 348 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 349 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 350 };
386 351
387 vreg_l25a_3p3: ldo25 { 352 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 353 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 354 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 355 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 356 };
392 357
393 vreg_l26a_1p2: ldo26 { 358 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 359 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 360 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 361 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 362 };
398 363
399 vreg_lvs1a_1p8: lvs1 { 364 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 365 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 366 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 367 regulator-always-on;
403 }; 368 };
404 369
405 vreg_lvs2a_1p8: lvs2 { 370 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 371 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 372 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 373 regulator-always-on;
409 }; 374 };
410 }; 375 };
411 376
412 regulators-1 { !! 377 pmi8998-rpmh-regulators {
413 compatible = "qcom,pmi8998-rpm 378 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 379 qcom,pmic-id = "b";
415 380
416 vdd-bob-supply = <&vph_pwr>; 381 vdd-bob-supply = <&vph_pwr>;
417 382
418 vreg_bob: bob { 383 vreg_bob: bob {
419 regulator-min-microvol 384 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 385 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 386 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 387 regulator-allow-bypass;
423 }; 388 };
424 }; 389 };
425 }; 390 };
426 391
427 &camss { !! 392 &cdsp_pas {
428 status = "okay"; 393 status = "okay";
>> 394 firmware-name = "qcom/sdm845/cdsp.mbn";
>> 395 };
429 396
430 vdda-phy-supply = <&vreg_l1a_0p875>; !! 397 &dsi0 {
431 vdda-pll-supply = <&vreg_l26a_1p2>; !! 398 status = "okay";
>> 399 vdda-supply = <&vreg_l26a_1p2>;
>> 400
>> 401 ports {
>> 402 port@1 {
>> 403 endpoint {
>> 404 remote-endpoint = <<9611_a>;
>> 405 data-lanes = <0 1 2 3>;
>> 406 };
>> 407 };
>> 408 };
432 }; 409 };
433 410
434 &cdsp_pas { !! 411 &dsi0_phy {
435 status = "okay"; 412 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" !! 413 vdds-supply = <&vreg_l1a_0p875>;
437 }; 414 };
438 415
439 &gcc { 416 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 417 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 418 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI 419 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
443 <GCC_LPASS_Q6_AXI_C 420 <GCC_LPASS_Q6_AXI_CLK>,
444 <GCC_LPASS_SWAY_CLK 421 <GCC_LPASS_SWAY_CLK>;
445 }; 422 };
446 423
447 &gmu { 424 &gmu {
448 status = "okay"; 425 status = "okay";
449 }; 426 };
450 427
451 &gpi_dma0 { 428 &gpi_dma0 {
452 status = "okay"; 429 status = "okay";
453 }; 430 };
454 431
455 &gpi_dma1 { <<
456 status = "okay"; <<
457 }; <<
458 <<
459 &gpu { 432 &gpu {
460 status = "okay"; 433 status = "okay";
461 zap-shader { 434 zap-shader {
462 memory-region = <&gpu_mem>; 435 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 436 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 437 };
465 }; 438 };
466 439
467 &i2c10 { 440 &i2c10 {
468 status = "okay"; 441 status = "okay";
469 clock-frequency = <400000>; 442 clock-frequency = <400000>;
470 443
471 lt9611_codec: hdmi-bridge@3b { 444 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 445 compatible = "lontium,lt9611";
473 reg = <0x3b>; 446 reg = <0x3b>;
474 #sound-dai-cells = <1>; 447 #sound-dai-cells = <1>;
475 448
476 interrupts-extended = <&tlmm 8 449 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 450
478 reset-gpios = <&tlmm 128 GPIO_ 451 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 452
480 vdd-supply = <<9611_1v8>; 453 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 454 vcc-supply = <<9611_3v3>;
482 455
483 pinctrl-names = "default"; 456 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 457 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 458
486 ports { 459 ports {
487 #address-cells = <1>; 460 #address-cells = <1>;
488 #size-cells = <0>; 461 #size-cells = <0>;
489 462
490 port@0 { 463 port@0 {
491 reg = <0>; 464 reg = <0>;
492 465
493 lt9611_a: endp 466 lt9611_a: endpoint {
494 remote !! 467 remote-endpoint = <&dsi0_out>;
495 }; <<
496 }; <<
497 <<
498 port@1 { <<
499 reg = <1>; <<
500 <<
501 lt9611_b: endp <<
502 remote <<
503 }; 468 };
504 }; 469 };
505 470
506 port@2 { 471 port@2 {
507 reg = <2>; 472 reg = <2>;
508 473
509 lt9611_out: en 474 lt9611_out: endpoint {
510 remote 475 remote-endpoint = <&hdmi_con>;
511 }; 476 };
512 }; 477 };
513 }; 478 };
514 }; 479 };
515 }; 480 };
516 481
517 &i2c11 { 482 &i2c11 {
518 /* On Low speed expansion */ 483 /* On Low speed expansion */
519 clock-frequency = <100000>; !! 484 label = "LS-I2C1";
520 status = "okay"; 485 status = "okay";
521 }; 486 };
522 487
523 &i2c14 { 488 &i2c14 {
524 /* On Low speed expansion */ 489 /* On Low speed expansion */
525 clock-frequency = <100000>; !! 490 label = "LS-I2C0";
526 status = "okay"; 491 status = "okay";
527 }; 492 };
528 493
529 &mdss { 494 &mdss {
530 memory-region = <&cont_splash_mem>; <<
531 status = "okay"; <<
532 }; <<
533 <<
534 &mdss_dsi0 { <<
535 status = "okay"; <<
536 vdda-supply = <&vreg_l26a_1p2>; <<
537 <<
538 qcom,dual-dsi-mode; <<
539 qcom,master-dsi; <<
540 <<
541 ports { <<
542 port@1 { <<
543 endpoint { <<
544 remote-endpoin <<
545 data-lanes = < <<
546 }; <<
547 }; <<
548 }; <<
549 }; <<
550 <<
551 &mdss_dsi0_phy { <<
552 status = "okay"; <<
553 vdds-supply = <&vreg_l1a_0p875>; <<
554 }; <<
555 <<
556 &mdss_dsi1 { <<
557 vdda-supply = <&vreg_l26a_1p2>; <<
558 <<
559 qcom,dual-dsi-mode; <<
560 <<
561 /* DSI1 is slave, so use DSI0 clocks * <<
562 assigned-clock-parents = <&mdss_dsi0_p <<
563 <<
564 status = "okay"; <<
565 <<
566 ports { <<
567 port@1 { <<
568 endpoint { <<
569 remote-endpoin <<
570 data-lanes = < <<
571 }; <<
572 }; <<
573 }; <<
574 }; <<
575 <<
576 &mdss_dsi1_phy { <<
577 vdds-supply = <&vreg_l1a_0p875>; <<
578 status = "okay"; 495 status = "okay";
579 }; 496 };
580 497
581 &mss_pil { 498 &mss_pil {
582 status = "okay"; 499 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 500 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 501 };
585 502
586 &pcie0 { 503 &pcie0 {
587 status = "okay"; 504 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO !! 505 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI !! 506 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 507
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 508 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 509
593 pinctrl-names = "default"; 510 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 511 pinctrl-0 = <&pcie0_default_state>;
595 }; 512 };
596 513
597 &pcie0_phy { 514 &pcie0_phy {
598 status = "okay"; 515 status = "okay";
599 516
600 vdda-phy-supply = <&vreg_l1a_0p875>; 517 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 518 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 519 };
603 520
604 &pcie1 { 521 &pcie1 {
605 status = "okay"; 522 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L !! 523 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 524
608 pinctrl-names = "default"; 525 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 526 pinctrl-0 = <&pcie1_default_state>;
610 }; 527 };
611 528
612 &pcie1_phy { 529 &pcie1_phy {
613 status = "okay"; 530 status = "okay";
614 531
615 vdda-phy-supply = <&vreg_l1a_0p875>; 532 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 533 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 534 };
618 535
619 &pm8998_gpios { !! 536 &pm8998_gpio {
620 gpio-line-names = 537 gpio-line-names =
621 "NC", 538 "NC",
622 "NC", 539 "NC",
623 "WLAN_SW_CTRL", 540 "WLAN_SW_CTRL",
624 "NC", 541 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 542 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 543 "VOL_UP_N",
627 "NC", 544 "NC",
628 "ADC_IN1", 545 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 546 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 547 "CAM0_AVDD_EN",
631 "NC", 548 "NC",
632 "CAM0_DVDD_EN", 549 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 550 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 551 "DIV_CLK2",
635 "NC", 552 "NC",
636 "NC", 553 "NC",
637 "NC", 554 "NC",
638 "SMB_STAT", 555 "SMB_STAT",
639 "NC", 556 "NC",
640 "NC", 557 "NC",
641 "ADC_IN2", 558 "ADC_IN2",
642 "OPTION1", 559 "OPTION1",
643 "WCSS_PWR_REQ", 560 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 561 "PM845_GPIO24",
645 "OPTION2", 562 "OPTION2",
646 "PM845_SLB"; 563 "PM845_SLB";
647 564
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v !! 565 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
649 pins = "gpio12"; 566 pins = "gpio12";
650 function = "normal"; 567 function = "normal";
651 568
652 bias-pull-up; 569 bias-pull-up;
653 drive-push-pull; 570 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 571 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 572 };
656 573
657 cam0_avdd_2v8_en_default: cam0-avdd-2v !! 574 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
658 pins = "gpio10"; 575 pins = "gpio10";
659 function = "normal"; 576 function = "normal";
660 577
661 bias-pull-up; 578 bias-pull-up;
662 drive-push-pull; 579 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 580 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 581 };
665 582
666 vol_up_pin_a: vol-up-active-state { !! 583 vol_up_pin_a: vol-up-active {
667 pins = "gpio6"; 584 pins = "gpio6";
668 function = "normal"; 585 function = "normal";
669 input-enable; 586 input-enable;
670 bias-pull-up; 587 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 588 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 589 };
673 }; 590 };
674 591
675 &pm8998_resin { !! 592 &pm8998_pon {
676 linux,code = <KEY_VOLUMEDOWN>; !! 593 resin {
677 status = "okay"; !! 594 compatible = "qcom,pm8941-resin";
678 }; !! 595 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
679 !! 596 debounce = <15625>;
680 &pmi8998_lpg { !! 597 bias-pull-up;
681 status = "okay"; !! 598 linux,code = <KEY_VOLUMEDOWN>;
682 <<
683 qcom,power-source = <1>; <<
684 <<
685 led@3 { <<
686 reg = <3>; <<
687 color = <LED_COLOR_ID_GREEN>; <<
688 function = LED_FUNCTION_HEARTB <<
689 function-enumerator = <3>; <<
690 <<
691 linux,default-trigger = "heart <<
692 default-state = "on"; <<
693 }; <<
694 <<
695 led@4 { <<
696 reg = <4>; <<
697 color = <LED_COLOR_ID_GREEN>; <<
698 function = LED_FUNCTION_INDICA <<
699 function-enumerator = <2>; <<
700 }; <<
701 <<
702 led@5 { <<
703 reg = <5>; <<
704 color = <LED_COLOR_ID_GREEN>; <<
705 function = LED_FUNCTION_INDICA <<
706 function-enumerator = <1>; <<
707 }; 599 };
708 }; 600 };
709 601
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 602 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 603 &q6afedai {
712 dai@22 { !! 604 qi2s@22 {
713 reg = <QUATERNARY_MI2S_RX>; !! 605 reg = <22>;
714 qcom,sd-lines = <0 1 2 3>; 606 qcom,sd-lines = <0 1 2 3>;
715 }; 607 };
716 }; 608 };
717 609
718 &q6asmdai { 610 &q6asmdai {
719 dai@0 { 611 dai@0 {
720 reg = <0>; 612 reg = <0>;
721 }; 613 };
722 614
723 dai@1 { 615 dai@1 {
724 reg = <1>; 616 reg = <1>;
725 }; 617 };
726 618
727 dai@2 { 619 dai@2 {
728 reg = <2>; 620 reg = <2>;
729 }; 621 };
730 622
731 dai@3 { 623 dai@3 {
732 reg = <3>; 624 reg = <3>;
733 direction = <2>; 625 direction = <2>;
734 is-compress-dai; 626 is-compress-dai;
735 }; 627 };
736 }; 628 };
737 629
738 &qupv3_id_0 { 630 &qupv3_id_0 {
739 status = "okay"; 631 status = "okay";
740 }; 632 };
741 633
742 &qupv3_id_1 { 634 &qupv3_id_1 {
743 status = "okay"; 635 status = "okay";
744 }; 636 };
745 637
746 &sdhc_2 { 638 &sdhc_2 {
747 status = "okay"; 639 status = "okay";
748 640
749 pinctrl-names = "default"; 641 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 642 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 643
752 vmmc-supply = <&vreg_l21a_2p95>; 644 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 645 vqmmc-supply = <&vreg_l13a_2p95>;
754 646
755 bus-width = <4>; 647 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 648 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 649 };
758 650
759 &sound { 651 &sound {
760 compatible = "qcom,db845c-sndcard", "q !! 652 compatible = "qcom,db845c-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 653 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 654 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 655 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 656 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 657 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 658 pinctrl-names = "default";
767 model = "DB845c"; 659 model = "DB845c";
768 audio-routing = 660 audio-routing =
769 "RX_BIAS", "MCLK", 661 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 662 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 663 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 664 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 665 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 666 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 667 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 668 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 669 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 670 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 671 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 672 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 673 "MultiMedia3 Capture", "MM_UL3";
782 674
783 mm1-dai-link { 675 mm1-dai-link {
784 link-name = "MultiMedia1"; 676 link-name = "MultiMedia1";
785 cpu { 677 cpu {
786 sound-dai = <&q6asmdai 678 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 679 };
788 }; 680 };
789 681
790 mm2-dai-link { 682 mm2-dai-link {
791 link-name = "MultiMedia2"; 683 link-name = "MultiMedia2";
792 cpu { 684 cpu {
793 sound-dai = <&q6asmdai 685 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 686 };
795 }; 687 };
796 688
797 mm3-dai-link { 689 mm3-dai-link {
798 link-name = "MultiMedia3"; 690 link-name = "MultiMedia3";
799 cpu { 691 cpu {
800 sound-dai = <&q6asmdai 692 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 693 };
802 }; 694 };
803 695
804 mm4-dai-link { 696 mm4-dai-link {
805 link-name = "MultiMedia4"; 697 link-name = "MultiMedia4";
806 cpu { 698 cpu {
807 sound-dai = <&q6asmdai 699 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 700 };
809 }; 701 };
810 702
811 hdmi-dai-link { 703 hdmi-dai-link {
812 link-name = "HDMI Playback"; 704 link-name = "HDMI Playback";
813 cpu { 705 cpu {
814 sound-dai = <&q6afedai 706 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 707 };
816 708
817 platform { 709 platform {
818 sound-dai = <&q6routin 710 sound-dai = <&q6routing>;
819 }; 711 };
820 712
821 codec { 713 codec {
822 sound-dai = <<9611_c !! 714 sound-dai = <<9611_codec 0>;
823 }; 715 };
824 }; 716 };
825 717
826 slim-dai-link { 718 slim-dai-link {
827 link-name = "SLIM Playback"; 719 link-name = "SLIM Playback";
828 cpu { 720 cpu {
829 sound-dai = <&q6afedai 721 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 722 };
831 723
832 platform { 724 platform {
833 sound-dai = <&q6routin 725 sound-dai = <&q6routing>;
834 }; 726 };
835 727
836 codec { 728 codec {
837 sound-dai = <&left_spk !! 729 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 730 };
839 }; 731 };
840 732
841 slimcap-dai-link { 733 slimcap-dai-link {
842 link-name = "SLIM Capture"; 734 link-name = "SLIM Capture";
843 cpu { 735 cpu {
844 sound-dai = <&q6afedai 736 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 737 };
846 738
847 platform { 739 platform {
848 sound-dai = <&q6routin 740 sound-dai = <&q6routing>;
849 }; 741 };
850 742
851 codec { 743 codec {
852 sound-dai = <&wcd9340 744 sound-dai = <&wcd9340 1>;
853 }; 745 };
854 }; 746 };
855 }; 747 };
856 748
857 &spi0 { <<
858 status = "okay"; <<
859 pinctrl-names = "default"; <<
860 pinctrl-0 = <&qup_spi0_default>; <<
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; <<
862 <<
863 can@0 { <<
864 compatible = "microchip,mcp251 <<
865 reg = <0>; <<
866 clocks = <&clk40M>; <<
867 interrupts-extended = <&tlmm 1 <<
868 spi-max-frequency = <10000000> <<
869 vdd-supply = <&vdc_5v>; <<
870 xceiver-supply = <&vdc_5v>; <<
871 }; <<
872 }; <<
873 <<
874 &spi2 { 749 &spi2 {
875 /* On Low speed expansion */ 750 /* On Low speed expansion */
>> 751 label = "LS-SPI0";
876 status = "okay"; 752 status = "okay";
877 }; 753 };
878 754
879 &tlmm { 755 &tlmm {
880 cam0_default: cam0-default-state { !! 756 cam0_default: cam0_default {
881 rst-pins { !! 757 rst {
882 pins = "gpio9"; 758 pins = "gpio9";
883 function = "gpio"; 759 function = "gpio";
884 760
885 drive-strength = <16>; 761 drive-strength = <16>;
886 bias-disable; 762 bias-disable;
887 }; 763 };
888 764
889 mclk0-pins { !! 765 mclk0 {
890 pins = "gpio13"; 766 pins = "gpio13";
891 function = "cam_mclk"; 767 function = "cam_mclk";
892 768
893 drive-strength = <16>; 769 drive-strength = <16>;
894 bias-disable; 770 bias-disable;
895 }; 771 };
896 }; 772 };
897 773
898 cam3_default: cam3-default-state { !! 774 cam3_default: cam3_default {
899 rst-pins { !! 775 rst {
900 function = "gpio"; 776 function = "gpio";
901 pins = "gpio21"; 777 pins = "gpio21";
902 778
903 drive-strength = <16>; 779 drive-strength = <16>;
904 bias-disable; 780 bias-disable;
905 }; 781 };
906 782
907 mclk3-pins { !! 783 mclk3 {
908 function = "cam_mclk"; 784 function = "cam_mclk";
909 pins = "gpio16"; 785 pins = "gpio16";
910 786
911 drive-strength = <16>; 787 drive-strength = <16>;
912 bias-disable; 788 bias-disable;
913 }; 789 };
914 }; 790 };
915 791
916 dsi_sw_sel: dsi-sw-sel-state { !! 792 dsi_sw_sel: dsi-sw-sel {
917 pins = "gpio120"; 793 pins = "gpio120";
918 function = "gpio"; 794 function = "gpio";
919 795
920 drive-strength = <2>; 796 drive-strength = <2>;
921 bias-disable; 797 bias-disable;
922 output-high; 798 output-high;
923 }; 799 };
924 800
925 lt9611_irq_pin: lt9611-irq-state { !! 801 lt9611_irq_pin: lt9611-irq {
926 pins = "gpio84"; 802 pins = "gpio84";
927 function = "gpio"; 803 function = "gpio";
928 bias-disable; 804 bias-disable;
929 }; 805 };
930 806
931 pcie0_default_state: pcie0-default-sta !! 807 pcie0_default_state: pcie0-default {
932 clkreq-pins { !! 808 clkreq {
933 pins = "gpio36"; 809 pins = "gpio36";
934 function = "pci_e0"; 810 function = "pci_e0";
935 bias-pull-up; 811 bias-pull-up;
936 }; 812 };
937 813
938 reset-n-pins { !! 814 reset-n {
939 pins = "gpio35"; 815 pins = "gpio35";
940 function = "gpio"; 816 function = "gpio";
941 817
942 drive-strength = <2>; 818 drive-strength = <2>;
943 output-low; 819 output-low;
944 bias-pull-down; 820 bias-pull-down;
945 }; 821 };
946 822
947 wake-n-pins { !! 823 wake-n {
948 pins = "gpio37"; 824 pins = "gpio37";
949 function = "gpio"; 825 function = "gpio";
950 826
951 drive-strength = <2>; 827 drive-strength = <2>;
952 bias-pull-up; 828 bias-pull-up;
953 }; 829 };
954 }; 830 };
955 831
956 pcie0_pwren_state: pcie0-pwren-state { !! 832 pcie0_pwren_state: pcie0-pwren {
957 pins = "gpio90"; 833 pins = "gpio90";
958 function = "gpio"; 834 function = "gpio";
959 835
960 drive-strength = <2>; 836 drive-strength = <2>;
961 bias-disable; 837 bias-disable;
962 }; 838 };
963 839
964 pcie1_default_state: pcie1-default-sta !! 840 pcie1_default_state: pcie1-default {
965 perst-n-pins { !! 841 perst-n {
966 pins = "gpio102"; 842 pins = "gpio102";
967 function = "gpio"; 843 function = "gpio";
968 844
969 drive-strength = <16>; 845 drive-strength = <16>;
970 bias-disable; 846 bias-disable;
971 }; 847 };
972 848
973 clkreq-pins { !! 849 clkreq {
974 pins = "gpio103"; 850 pins = "gpio103";
975 function = "pci_e1"; 851 function = "pci_e1";
976 bias-pull-up; 852 bias-pull-up;
977 }; 853 };
978 854
979 wake-n-pins { !! 855 wake-n {
980 pins = "gpio11"; 856 pins = "gpio11";
981 function = "gpio"; 857 function = "gpio";
982 858
983 drive-strength = <2>; 859 drive-strength = <2>;
984 bias-pull-up; 860 bias-pull-up;
985 }; 861 };
986 862
987 reset-n-pins { !! 863 reset-n {
988 pins = "gpio75"; 864 pins = "gpio75";
989 function = "gpio"; 865 function = "gpio";
990 866
991 drive-strength = <16>; 867 drive-strength = <16>;
992 bias-pull-up; 868 bias-pull-up;
993 output-high; 869 output-high;
994 }; 870 };
995 }; 871 };
996 872
997 sdc2_default_state: sdc2-default-state !! 873 sdc2_default_state: sdc2-default {
998 clk-pins { !! 874 clk {
999 pins = "sdc2_clk"; 875 pins = "sdc2_clk";
1000 bias-disable; 876 bias-disable;
1001 877
1002 /* 878 /*
1003 * It seems that mmc_ 879 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 880 * strength is not 16 on clk, cmd, and data pins.
1005 */ 881 */
1006 drive-strength = <16> 882 drive-strength = <16>;
1007 }; 883 };
1008 884
1009 cmd-pins { !! 885 cmd {
1010 pins = "sdc2_cmd"; 886 pins = "sdc2_cmd";
1011 bias-pull-up; 887 bias-pull-up;
1012 drive-strength = <10> 888 drive-strength = <10>;
1013 }; 889 };
1014 890
1015 data-pins { !! 891 data {
1016 pins = "sdc2_data"; 892 pins = "sdc2_data";
1017 bias-pull-up; 893 bias-pull-up;
1018 drive-strength = <10> 894 drive-strength = <10>;
1019 }; 895 };
1020 }; 896 };
1021 897
1022 sdc2_card_det_n: sd-card-det-n-state !! 898 sdc2_card_det_n: sd-card-det-n {
1023 pins = "gpio126"; 899 pins = "gpio126";
1024 function = "gpio"; 900 function = "gpio";
1025 bias-pull-up; 901 bias-pull-up;
1026 }; 902 };
>> 903
>> 904 wcd_intr_default: wcd_intr_default {
>> 905 pins = <54>;
>> 906 function = "gpio";
>> 907
>> 908 input-enable;
>> 909 bias-pull-down;
>> 910 drive-strength = <2>;
>> 911 };
1027 }; 912 };
1028 913
1029 &uart3 { 914 &uart3 {
1030 label = "LS-UART0"; 915 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; <<
1032 <<
1033 status = "disabled"; 916 status = "disabled";
1034 }; 917 };
1035 918
1036 &uart6 { 919 &uart6 {
1037 status = "okay"; 920 status = "okay";
1038 921
1039 pinctrl-0 = <&qup_uart6_4pin>; <<
1040 <<
1041 bluetooth { 922 bluetooth {
1042 compatible = "qcom,wcn3990-bt 923 compatible = "qcom,wcn3990-bt";
1043 924
1044 vddio-supply = <&vreg_s4a_1p8 925 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 926 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 927 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 928 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 929 max-speed = <3200000>;
1049 }; 930 };
1050 }; 931 };
1051 932
1052 &uart9 { 933 &uart9 {
1053 label = "LS-UART1"; 934 label = "LS-UART1";
1054 status = "okay"; 935 status = "okay";
1055 }; 936 };
1056 937
1057 &usb_1 { 938 &usb_1 {
1058 status = "okay"; 939 status = "okay";
1059 }; 940 };
1060 941
1061 &usb_1_dwc3 { 942 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 943 dr_mode = "peripheral";
1063 }; 944 };
1064 945
1065 &usb_1_hsphy { 946 &usb_1_hsphy {
1066 status = "okay"; 947 status = "okay";
1067 948
1068 vdd-supply = <&vreg_l1a_0p875>; 949 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 950 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 951 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 952
1072 qcom,imp-res-offset-value = <8>; 953 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 954 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 955 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 956 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 957 };
1077 958
1078 &usb_1_qmpphy { 959 &usb_1_qmpphy {
1079 status = "okay"; 960 status = "okay";
1080 961
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 962 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 963 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 964 };
1084 965
1085 &usb_2 { 966 &usb_2 {
1086 status = "okay"; 967 status = "okay";
1087 }; 968 };
1088 969
1089 &usb_2_dwc3 { 970 &usb_2_dwc3 {
1090 dr_mode = "host"; 971 dr_mode = "host";
1091 }; 972 };
1092 973
1093 &usb_2_hsphy { 974 &usb_2_hsphy {
1094 status = "okay"; 975 status = "okay";
1095 976
1096 vdd-supply = <&vreg_l1a_0p875>; 977 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 978 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 979 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 980
1100 qcom,imp-res-offset-value = <8>; 981 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 982 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 983 };
1103 984
1104 &usb_2_qmpphy { 985 &usb_2_qmpphy {
1105 status = "okay"; 986 status = "okay";
1106 987
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 988 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 989 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 990 };
1110 991
1111 &ufs_mem_hc { 992 &ufs_mem_hc {
1112 status = "okay"; 993 status = "okay";
1113 994
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 995 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 996
1116 vcc-supply = <&vreg_l20a_2p95>; 997 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 998 vcc-max-microamp = <800000>;
1118 }; 999 };
1119 1000
1120 &ufs_mem_phy { 1001 &ufs_mem_phy {
1121 status = "okay"; 1002 status = "okay";
1122 1003
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 1004 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 1005 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 1006 };
1126 1007
1127 &venus { 1008 &venus {
1128 status = "okay"; 1009 status = "okay";
1129 }; 1010 };
1130 1011
1131 &wcd9340 { !! 1012 &wcd9340{
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H !! 1013 pinctrl-0 = <&wcd_intr_default>;
>> 1014 pinctrl-names = "default";
>> 1015 clock-names = "extclk";
>> 1016 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
>> 1017 reset-gpios = <&tlmm 64 0>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1018 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1019 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1020 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1021 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1022 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1023
1139 swm: soundwire@c85 { !! 1024 swm: swm@c85 {
1140 left_spkr: speaker@0,1 { !! 1025 left_spkr: wsa8810-left{
1141 compatible = "sdw1021 1026 compatible = "sdw10217201000";
1142 reg = <0 1>; 1027 reg = <0 1>;
1143 powerdown-gpios = <&w 1028 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1029 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1030 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1031 #sound-dai-cells = <0>;
1147 }; 1032 };
1148 1033
1149 right_spkr: speaker@0,2 { !! 1034 right_spkr: wsa8810-right{
1150 compatible = "sdw1021 1035 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w 1036 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1037 reg = <0 2>;
1153 #thermal-sensor-cells 1038 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1039 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1040 #sound-dai-cells = <0>;
1156 }; 1041 };
1157 }; 1042 };
1158 }; 1043 };
1159 1044
1160 &wifi { 1045 &wifi {
1161 status = "okay"; 1046 status = "okay";
1162 1047
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1048 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1049 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1050 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1051 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1052
1168 qcom,snoc-host-cap-8bit-quirk; 1053 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th <<
1170 }; 1054 };
1171 1055
1172 /* PINCTRL - additions to nodes defined in sd 1056 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1057 &qup_spi2_default {
1174 drive-strength = <16>; 1058 drive-strength = <16>;
1175 }; 1059 };
1176 1060
>> 1061 &qup_uart3_default{
>> 1062 pinmux {
>> 1063 pins = "gpio41", "gpio42", "gpio43", "gpio44";
>> 1064 function = "qup3";
>> 1065 };
>> 1066 };
>> 1067
1177 &qup_i2c10_default { 1068 &qup_i2c10_default {
1178 drive-strength = <2>; !! 1069 pinconf {
1179 bias-disable; !! 1070 pins = "gpio55", "gpio56";
>> 1071 drive-strength = <2>;
>> 1072 bias-disable;
>> 1073 };
1180 }; 1074 };
1181 1075
1182 &qup_uart9_rx { !! 1076 &qup_uart6_default {
1183 drive-strength = <2>; !! 1077 pinmux {
1184 bias-pull-up; !! 1078 pins = "gpio45", "gpio46", "gpio47", "gpio48";
>> 1079 function = "qup6";
>> 1080 };
>> 1081
>> 1082 cts {
>> 1083 pins = "gpio45";
>> 1084 bias-disable;
>> 1085 };
>> 1086
>> 1087 rts-tx {
>> 1088 pins = "gpio46", "gpio47";
>> 1089 drive-strength = <2>;
>> 1090 bias-disable;
>> 1091 };
>> 1092
>> 1093 rx {
>> 1094 pins = "gpio48";
>> 1095 bias-pull-up;
>> 1096 };
1185 }; 1097 };
1186 1098
1187 &qup_uart9_tx { !! 1099 &qup_uart9_default {
1188 drive-strength = <2>; !! 1100 pinconf-tx {
1189 bias-disable; !! 1101 pins = "gpio4";
>> 1102 drive-strength = <2>;
>> 1103 bias-disable;
>> 1104 };
>> 1105
>> 1106 pinconf-rx {
>> 1107 pins = "gpio5";
>> 1108 drive-strength = <2>;
>> 1109 bias-pull-up;
>> 1110 };
1190 }; 1111 };
1191 1112
1192 /* PINCTRL - additions to nodes defined in sd !! 1113 &pm8998_gpio {
1193 &qup_spi0_default { !! 1114
1194 drive-strength = <6>; !! 1115 };
1195 bias-disable; !! 1116
>> 1117 &cci {
>> 1118 status = "okay";
>> 1119 };
>> 1120
>> 1121 &camss {
>> 1122 vdda-supply = <&vreg_l1a_0p875>;
>> 1123
>> 1124 status = "ok";
>> 1125
>> 1126 ports {
>> 1127 #address-cells = <1>;
>> 1128 #size-cells = <0>;
>> 1129 port@0 {
>> 1130 reg = <0>;
>> 1131 csiphy0_ep: endpoint {
>> 1132 data-lanes = <0 1 2 3>;
>> 1133 remote-endpoint = <&ov8856_ep>;
>> 1134 };
>> 1135 };
>> 1136 };
>> 1137 };
>> 1138
>> 1139 &cci_i2c0 {
>> 1140 camera@10 {
>> 1141 compatible = "ovti,ov8856";
>> 1142 reg = <0x10>;
>> 1143
>> 1144 // CAM0_RST_N
>> 1145 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1146 pinctrl-names = "default";
>> 1147 pinctrl-0 = <&cam0_default>;
>> 1148 gpios = <&tlmm 13 0>,
>> 1149 <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1150
>> 1151 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
>> 1152 clock-names = "xvclk";
>> 1153 clock-frequency = <19200000>;
>> 1154
>> 1155 /* The &vreg_s4a_1p8 trace is powered on as a,
>> 1156 * so it is represented by a fixed regulator.
>> 1157 *
>> 1158 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
>> 1159 * both have to be enabled through the power management
>> 1160 * gpios.
>> 1161 */
>> 1162 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1163
>> 1164 dovdd-supply = <&vreg_lvs1a_1p8>;
>> 1165 avdd-supply = <&cam0_avdd_2v8>;
>> 1166 dvdd-supply = <&cam0_dvdd_1v2>;
>> 1167
>> 1168 status = "ok";
>> 1169
>> 1170 port {
>> 1171 ov8856_ep: endpoint {
>> 1172 link-frequencies = /bits/ 64
>> 1173 <360000000 180000000>;
>> 1174 data-lanes = <1 2 3 4>;
>> 1175 remote-endpoint = <&csiphy0_ep>;
>> 1176 };
>> 1177 };
>> 1178 };
>> 1179 };
>> 1180
>> 1181 &cci_i2c1 {
>> 1182 camera@60 {
>> 1183 compatible = "ovti,ov7251";
>> 1184
>> 1185 // I2C address as per ov7251.txt linux documentation
>> 1186 reg = <0x60>;
>> 1187
>> 1188 // CAM3_RST_N
>> 1189 enable-gpios = <&tlmm 21 0>;
>> 1190 pinctrl-names = "default";
>> 1191 pinctrl-0 = <&cam3_default>;
>> 1192 gpios = <&tlmm 16 0>,
>> 1193 <&tlmm 21 0>;
>> 1194
>> 1195 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
>> 1196 clock-names = "xclk";
>> 1197 clock-frequency = <24000000>;
>> 1198
>> 1199 /* The &vreg_s4a_1p8 trace always powered on.
>> 1200 *
>> 1201 * The 2.8V vdda-supply regulator is enabled when the
>> 1202 * vreg_s4a_1p8 trace is pulled high.
>> 1203 * It too is represented by a fixed regulator.
>> 1204 *
>> 1205 * No 1.2V vddd-supply regulator is used.
>> 1206 */
>> 1207 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1208
>> 1209 vdddo-supply = <&vreg_lvs1a_1p8>;
>> 1210 vdda-supply = <&cam3_avdd_2v8>;
>> 1211
>> 1212 status = "disable";
>> 1213
>> 1214 port {
>> 1215 ov7251_ep: endpoint {
>> 1216 data-lanes = <0 1>;
>> 1217 // remote-endpoint = <&csiphy3_ep>;
>> 1218 };
>> 1219 };
>> 1220 };
1196 }; 1221 };
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