1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> <<
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 8 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 10 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 11 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 12 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" <<
15 #include "pm8998.dtsi" 13 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 14 #include "pmi8998.dtsi"
17 15
18 / { 16 / {
19 model = "Thundercomm Dragonboard 845c" 17 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 18 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; 19 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>; 20 qcom,board-id = <8 0>;
23 21
24 aliases { 22 aliases {
25 serial0 = &uart9; 23 serial0 = &uart9;
26 serial1 = &uart6; !! 24 hsuart0 = &uart6;
27 }; 25 };
28 26
29 chosen { 27 chosen {
30 stdout-path = "serial0:115200n 28 stdout-path = "serial0:115200n8";
31 }; 29 };
32 30
33 /* Fixed crystal oscillator dedicated 31 /* Fixed crystal oscillator dedicated to MCP2517FD */
34 clk40M: can-clock { 32 clk40M: can-clock {
35 compatible = "fixed-clock"; 33 compatible = "fixed-clock";
36 #clock-cells = <0>; 34 #clock-cells = <0>;
37 clock-frequency = <40000000>; 35 clock-frequency = <40000000>;
38 }; 36 };
39 37
40 dc12v: dc12v-regulator { 38 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 39 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 40 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 41 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 42 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 43 regulator-always-on;
46 }; 44 };
47 45
48 gpio-keys { !! 46 gpio_keys {
49 compatible = "gpio-keys"; 47 compatible = "gpio-keys";
50 autorepeat; 48 autorepeat;
51 49
52 pinctrl-names = "default"; 50 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 51 pinctrl-0 = <&vol_up_pin_a>;
54 52
55 key-vol-up { !! 53 vol-up {
56 label = "Volume Up"; 54 label = "Volume Up";
57 linux,code = <KEY_VOLU 55 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios !! 56 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
59 }; 57 };
60 }; 58 };
61 59
62 leds { 60 leds {
63 compatible = "gpio-leds"; 61 compatible = "gpio-leds";
64 62
65 led-0 { !! 63 user4 {
66 label = "green:user4"; 64 label = "green:user4";
67 function = LED_FUNCTIO !! 65 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
68 color = <LED_COLOR_ID_ !! 66 linux,default-trigger = "panic-indicator";
69 gpios = <&pm8998_gpios <<
70 default-state = "off"; 67 default-state = "off";
71 panic-indicator; <<
72 }; 68 };
73 69
74 led-1 { !! 70 wlan {
75 label = "yellow:wlan"; 71 label = "yellow:wlan";
76 function = LED_FUNCTIO !! 72 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
77 color = <LED_COLOR_ID_ <<
78 gpios = <&pm8998_gpios <<
79 linux,default-trigger 73 linux,default-trigger = "phy0tx";
80 default-state = "off"; 74 default-state = "off";
81 }; 75 };
82 76
83 led-2 { !! 77 bt {
84 label = "blue:bt"; 78 label = "blue:bt";
85 function = LED_FUNCTIO !! 79 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
86 color = <LED_COLOR_ID_ <<
87 gpios = <&pm8998_gpios <<
88 linux,default-trigger 80 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 81 default-state = "off";
90 }; 82 };
91 }; 83 };
92 84
93 hdmi-out { 85 hdmi-out {
94 compatible = "hdmi-connector"; 86 compatible = "hdmi-connector";
95 type = "a"; 87 type = "a";
96 88
97 port { 89 port {
98 hdmi_con: endpoint { 90 hdmi_con: endpoint {
99 remote-endpoin 91 remote-endpoint = <<9611_out>;
100 }; 92 };
101 }; 93 };
102 }; 94 };
103 95
104 reserved-memory { <<
105 /* Cont splash region set up b <<
106 cont_splash_mem: framebuffer@9 <<
107 reg = <0x0 0x9d400000 <<
108 no-map; <<
109 }; <<
110 }; <<
111 <<
112 lt9611_1v8: lt9611-vdd18-regulator { 96 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 97 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 98 regulator-name = "LT9611_1V8";
115 99
116 vin-supply = <&vdc_5v>; 100 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 101 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 102 regulator-max-microvolt = <1800000>;
119 103
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 104 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 105 enable-active-high;
122 }; 106 };
123 107
124 lt9611_3v3: lt9611-3v3 { 108 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 109 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 110 regulator-name = "LT9611_3V3";
127 111
128 vin-supply = <&vdc_3v3>; 112 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 113 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 114 regulator-max-microvolt = <3300000>;
131 115
132 /* !! 116 // TODO: make it possible to drive same GPIO from two clients
133 * TODO: make it possible to d !! 117 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
134 * gpio = <&tlmm 89 GPIO_ACTIV !! 118 // enable-active-high;
135 * enable-active-high; <<
136 */ <<
137 }; 119 };
138 120
139 pcie0_1p05v: pcie-0-1p05v-regulator { 121 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 122 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 123 regulator-name = "PCIE0_1.05V";
142 124
143 vin-supply = <&vbat>; 125 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 126 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 127 regulator-max-microvolt = <1050000>;
146 128
147 /* !! 129 // TODO: make it possible to drive same GPIO from two clients
148 * TODO: make it possible to d !! 130 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
149 * gpio = <&tlmm 90 GPIO_ACTIV !! 131 // enable-active-high;
150 * enable-active-high; <<
151 */ <<
152 }; 132 };
153 133
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator !! 134 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
155 compatible = "regulator-fixed" 135 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 136 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 137 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 138 regulator-max-microvolt = <1200000>;
159 enable-active-high; 139 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ !! 140 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 141 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 142 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 143 vin-supply = <&vbat>;
164 }; 144 };
165 145
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator !! 146 cam0_avdd_2v8: reg_cam0_avdd_2v8 {
167 compatible = "regulator-fixed" 147 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 148 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 149 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 150 regulator-max-microvolt = <2800000>;
171 enable-active-high; 151 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ !! 152 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 153 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 154 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 155 vin-supply = <&vbat>;
176 }; 156 };
177 157
178 /* This regulator is enabled when the 158 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator !! 159 cam3_avdd_2v8: reg_cam3_avdd_2v8 {
180 compatible = "regulator-fixed" 160 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 161 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 162 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 163 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 164 regulator-always-on;
185 vin-supply = <&vbat>; 165 vin-supply = <&vbat>;
186 }; 166 };
187 167
188 pcie0_3p3v_dual: vldo-3v3-regulator { 168 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 169 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 170 regulator-name = "VLDO_3V3";
191 171
192 vin-supply = <&vbat>; 172 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 173 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 174 regulator-max-microvolt = <3300000>;
195 175
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 176 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 177 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 178
205 pinctrl-names = "default"; 179 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 180 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 181 };
208 182
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 183 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 184 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 185 regulator-name = "V5P0_HDMIOUT";
212 186
213 vin-supply = <&vdc_5v>; 187 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 188 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 189 regulator-max-microvolt = <500000>;
216 190
217 /* !! 191 // TODO: make it possible to drive same GPIO from two clients
218 * TODO: make it possible to d !! 192 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
219 * gpio = <&tlmm 89 GPIO_ACTIV !! 193 // enable-active-high;
220 * enable-active-high; <<
221 */ <<
222 }; 194 };
223 195
224 vbat: vbat-regulator { 196 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 197 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 198 regulator-name = "VBAT";
227 199
228 vin-supply = <&dc12v>; 200 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 201 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 202 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 203 regulator-always-on;
232 }; 204 };
233 205
234 vbat_som: vbat-som-regulator { 206 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 207 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 208 regulator-name = "VBAT_SOM";
237 209
238 vin-supply = <&dc12v>; 210 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 211 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 212 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 213 regulator-always-on;
242 }; 214 };
243 215
244 vdc_3v3: vdc-3v3-regulator { 216 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 217 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 218 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 219 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 220 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 221 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 222 regulator-always-on;
251 }; 223 };
252 224
253 vdc_5v: vdc-5v-regulator { 225 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 226 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 227 regulator-name = "VDC_5V";
256 228
257 vin-supply = <&dc12v>; 229 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 230 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 231 regulator-max-microvolt = <500000>;
260 regulator-always-on; 232 regulator-always-on;
261 }; 233 };
262 234
263 vreg_s4a_1p8: vreg-s4a-1p8 { 235 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 236 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 237 regulator-name = "vreg_s4a_1p8";
266 238
267 regulator-min-microvolt = <180 239 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 240 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 241 regulator-always-on;
270 }; 242 };
271 243
272 vph_pwr: vph-pwr-regulator { 244 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 245 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 246 regulator-name = "vph_pwr";
275 247
276 vin-supply = <&vbat_som>; 248 vin-supply = <&vbat_som>;
277 }; 249 };
278 }; 250 };
279 251
280 &adsp_pas { 252 &adsp_pas {
281 status = "okay"; 253 status = "okay";
282 254
283 firmware-name = "qcom/sdm845/adsp.mbn" 255 firmware-name = "qcom/sdm845/adsp.mbn";
284 }; 256 };
285 257
286 &apps_rsc { 258 &apps_rsc {
287 regulators-0 { !! 259 pm8998-rpmh-regulators {
288 compatible = "qcom,pm8998-rpmh 260 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 261 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 262 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 263 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 264 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 265 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 266 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 267 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 268 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 269 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 270 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 271 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 272 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 273 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 274 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 275 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 276 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 277 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 278 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 279 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 280 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 281 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 282 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 283 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 284 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 285 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 286 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 287 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 288 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 289
318 vreg_s3a_1p35: smps3 { 290 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 291 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 292 regulator-max-microvolt = <1352000>;
321 }; 293 };
322 294
323 vreg_s5a_2p04: smps5 { 295 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 296 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 297 regulator-max-microvolt = <2040000>;
326 }; 298 };
327 299
328 vreg_s7a_1p025: smps7 { 300 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 301 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 302 regulator-max-microvolt = <1028000>;
331 }; 303 };
332 304
333 vreg_l1a_0p875: ldo1 { 305 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 306 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 307 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 308 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 309 };
338 310
339 vreg_l5a_0p8: ldo5 { 311 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 312 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 313 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 314 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 315 };
344 316
345 vreg_l12a_1p8: ldo12 { 317 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 318 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 319 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 320 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 321 };
350 322
351 vreg_l7a_1p8: ldo7 { 323 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 324 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 325 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 326 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 327 };
356 328
357 vreg_l13a_2p95: ldo13 { 329 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 330 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 331 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 332 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 333 };
362 334
363 vreg_l17a_1p3: ldo17 { 335 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 336 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 337 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 338 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 339 };
368 340
369 vreg_l20a_2p95: ldo20 { 341 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 342 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 343 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 344 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 345 };
374 346
375 vreg_l21a_2p95: ldo21 { 347 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 348 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 349 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 350 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 351 };
380 352
381 vreg_l24a_3p075: ldo24 { 353 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 354 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 355 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 356 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 357 };
386 358
387 vreg_l25a_3p3: ldo25 { 359 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 360 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 361 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 362 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 363 };
392 364
393 vreg_l26a_1p2: ldo26 { 365 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 366 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 367 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 368 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 369 };
398 370
399 vreg_lvs1a_1p8: lvs1 { 371 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 372 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 373 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 374 regulator-always-on;
403 }; 375 };
404 376
405 vreg_lvs2a_1p8: lvs2 { 377 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 378 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 379 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 380 regulator-always-on;
409 }; 381 };
410 }; 382 };
411 383
412 regulators-1 { !! 384 pmi8998-rpmh-regulators {
413 compatible = "qcom,pmi8998-rpm 385 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 386 qcom,pmic-id = "b";
415 387
416 vdd-bob-supply = <&vph_pwr>; 388 vdd-bob-supply = <&vph_pwr>;
417 389
418 vreg_bob: bob { 390 vreg_bob: bob {
419 regulator-min-microvol 391 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 392 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 393 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 394 regulator-allow-bypass;
423 }; 395 };
424 }; 396 };
425 }; 397 };
426 398
427 &camss { !! 399 &cdsp_pas {
428 status = "okay"; 400 status = "okay";
>> 401 firmware-name = "qcom/sdm845/cdsp.mbn";
>> 402 };
429 403
430 vdda-phy-supply = <&vreg_l1a_0p875>; !! 404 &dsi0 {
431 vdda-pll-supply = <&vreg_l26a_1p2>; !! 405 status = "okay";
>> 406 vdda-supply = <&vreg_l26a_1p2>;
>> 407
>> 408 ports {
>> 409 port@1 {
>> 410 endpoint {
>> 411 remote-endpoint = <<9611_a>;
>> 412 data-lanes = <0 1 2 3>;
>> 413 };
>> 414 };
>> 415 };
432 }; 416 };
433 417
434 &cdsp_pas { !! 418 &dsi0_phy {
435 status = "okay"; 419 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" !! 420 vdds-supply = <&vreg_l1a_0p875>;
437 }; 421 };
438 422
439 &gcc { 423 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 424 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 425 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI 426 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
443 <GCC_LPASS_Q6_AXI_C 427 <GCC_LPASS_Q6_AXI_CLK>,
444 <GCC_LPASS_SWAY_CLK 428 <GCC_LPASS_SWAY_CLK>;
445 }; 429 };
446 430
447 &gmu { 431 &gmu {
448 status = "okay"; 432 status = "okay";
449 }; 433 };
450 434
451 &gpi_dma0 { 435 &gpi_dma0 {
452 status = "okay"; 436 status = "okay";
453 }; 437 };
454 438
455 &gpi_dma1 { <<
456 status = "okay"; <<
457 }; <<
458 <<
459 &gpu { 439 &gpu {
460 status = "okay"; 440 status = "okay";
461 zap-shader { 441 zap-shader {
462 memory-region = <&gpu_mem>; 442 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 443 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 444 };
465 }; 445 };
466 446
467 &i2c10 { 447 &i2c10 {
468 status = "okay"; 448 status = "okay";
469 clock-frequency = <400000>; 449 clock-frequency = <400000>;
470 450
471 lt9611_codec: hdmi-bridge@3b { 451 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 452 compatible = "lontium,lt9611";
473 reg = <0x3b>; 453 reg = <0x3b>;
474 #sound-dai-cells = <1>; 454 #sound-dai-cells = <1>;
475 455
476 interrupts-extended = <&tlmm 8 456 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 457
478 reset-gpios = <&tlmm 128 GPIO_ 458 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 459
480 vdd-supply = <<9611_1v8>; 460 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 461 vcc-supply = <<9611_3v3>;
482 462
483 pinctrl-names = "default"; 463 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 464 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 465
486 ports { 466 ports {
487 #address-cells = <1>; 467 #address-cells = <1>;
488 #size-cells = <0>; 468 #size-cells = <0>;
489 469
490 port@0 { 470 port@0 {
491 reg = <0>; 471 reg = <0>;
492 472
493 lt9611_a: endp 473 lt9611_a: endpoint {
494 remote !! 474 remote-endpoint = <&dsi0_out>;
495 }; <<
496 }; <<
497 <<
498 port@1 { <<
499 reg = <1>; <<
500 <<
501 lt9611_b: endp <<
502 remote <<
503 }; 475 };
504 }; 476 };
505 477
506 port@2 { 478 port@2 {
507 reg = <2>; 479 reg = <2>;
508 480
509 lt9611_out: en 481 lt9611_out: endpoint {
510 remote 482 remote-endpoint = <&hdmi_con>;
511 }; 483 };
512 }; 484 };
513 }; 485 };
514 }; 486 };
515 }; 487 };
516 488
517 &i2c11 { 489 &i2c11 {
518 /* On Low speed expansion */ 490 /* On Low speed expansion */
519 clock-frequency = <100000>; !! 491 label = "LS-I2C1";
520 status = "okay"; 492 status = "okay";
521 }; 493 };
522 494
523 &i2c14 { 495 &i2c14 {
524 /* On Low speed expansion */ 496 /* On Low speed expansion */
525 clock-frequency = <100000>; !! 497 label = "LS-I2C0";
526 status = "okay"; 498 status = "okay";
527 }; 499 };
528 500
529 &mdss { 501 &mdss {
530 memory-region = <&cont_splash_mem>; <<
531 status = "okay"; <<
532 }; <<
533 <<
534 &mdss_dsi0 { <<
535 status = "okay"; <<
536 vdda-supply = <&vreg_l26a_1p2>; <<
537 <<
538 qcom,dual-dsi-mode; <<
539 qcom,master-dsi; <<
540 <<
541 ports { <<
542 port@1 { <<
543 endpoint { <<
544 remote-endpoin <<
545 data-lanes = < <<
546 }; <<
547 }; <<
548 }; <<
549 }; <<
550 <<
551 &mdss_dsi0_phy { <<
552 status = "okay"; <<
553 vdds-supply = <&vreg_l1a_0p875>; <<
554 }; <<
555 <<
556 &mdss_dsi1 { <<
557 vdda-supply = <&vreg_l26a_1p2>; <<
558 <<
559 qcom,dual-dsi-mode; <<
560 <<
561 /* DSI1 is slave, so use DSI0 clocks * <<
562 assigned-clock-parents = <&mdss_dsi0_p <<
563 <<
564 status = "okay"; <<
565 <<
566 ports { <<
567 port@1 { <<
568 endpoint { <<
569 remote-endpoin <<
570 data-lanes = < <<
571 }; <<
572 }; <<
573 }; <<
574 }; <<
575 <<
576 &mdss_dsi1_phy { <<
577 vdds-supply = <&vreg_l1a_0p875>; <<
578 status = "okay"; 502 status = "okay";
579 }; 503 };
580 504
581 &mss_pil { 505 &mss_pil {
582 status = "okay"; 506 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 507 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 508 };
585 509
586 &pcie0 { 510 &pcie0 {
587 status = "okay"; 511 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO !! 512 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI !! 513 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 514
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 515 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 516
593 pinctrl-names = "default"; 517 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 518 pinctrl-0 = <&pcie0_default_state>;
595 }; 519 };
596 520
597 &pcie0_phy { 521 &pcie0_phy {
598 status = "okay"; 522 status = "okay";
599 523
600 vdda-phy-supply = <&vreg_l1a_0p875>; 524 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 525 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 526 };
603 527
604 &pcie1 { 528 &pcie1 {
605 status = "okay"; 529 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L !! 530 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 531
608 pinctrl-names = "default"; 532 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 533 pinctrl-0 = <&pcie1_default_state>;
610 }; 534 };
611 535
612 &pcie1_phy { 536 &pcie1_phy {
613 status = "okay"; 537 status = "okay";
614 538
615 vdda-phy-supply = <&vreg_l1a_0p875>; 539 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 540 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 541 };
618 542
619 &pm8998_gpios { !! 543 &pm8998_gpio {
620 gpio-line-names = 544 gpio-line-names =
621 "NC", 545 "NC",
622 "NC", 546 "NC",
623 "WLAN_SW_CTRL", 547 "WLAN_SW_CTRL",
624 "NC", 548 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 549 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 550 "VOL_UP_N",
627 "NC", 551 "NC",
628 "ADC_IN1", 552 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 553 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 554 "CAM0_AVDD_EN",
631 "NC", 555 "NC",
632 "CAM0_DVDD_EN", 556 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 557 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 558 "DIV_CLK2",
635 "NC", 559 "NC",
636 "NC", 560 "NC",
637 "NC", 561 "NC",
638 "SMB_STAT", 562 "SMB_STAT",
639 "NC", 563 "NC",
640 "NC", 564 "NC",
641 "ADC_IN2", 565 "ADC_IN2",
642 "OPTION1", 566 "OPTION1",
643 "WCSS_PWR_REQ", 567 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 568 "PM845_GPIO24",
645 "OPTION2", 569 "OPTION2",
646 "PM845_SLB"; 570 "PM845_SLB";
647 571
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v !! 572 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
649 pins = "gpio12"; 573 pins = "gpio12";
650 function = "normal"; 574 function = "normal";
651 575
652 bias-pull-up; 576 bias-pull-up;
653 drive-push-pull; 577 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 578 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 579 };
656 580
657 cam0_avdd_2v8_en_default: cam0-avdd-2v !! 581 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
658 pins = "gpio10"; 582 pins = "gpio10";
659 function = "normal"; 583 function = "normal";
660 584
661 bias-pull-up; 585 bias-pull-up;
662 drive-push-pull; 586 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 587 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 588 };
665 589
666 vol_up_pin_a: vol-up-active-state { !! 590 vol_up_pin_a: vol-up-active {
667 pins = "gpio6"; 591 pins = "gpio6";
668 function = "normal"; 592 function = "normal";
669 input-enable; 593 input-enable;
670 bias-pull-up; 594 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 595 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 596 };
673 }; 597 };
674 598
675 &pm8998_resin { !! 599 &pm8998_pon {
676 linux,code = <KEY_VOLUMEDOWN>; !! 600 resin {
677 status = "okay"; !! 601 compatible = "qcom,pm8941-resin";
678 }; !! 602 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
679 !! 603 debounce = <15625>;
680 &pmi8998_lpg { !! 604 bias-pull-up;
681 status = "okay"; !! 605 linux,code = <KEY_VOLUMEDOWN>;
682 <<
683 qcom,power-source = <1>; <<
684 <<
685 led@3 { <<
686 reg = <3>; <<
687 color = <LED_COLOR_ID_GREEN>; <<
688 function = LED_FUNCTION_HEARTB <<
689 function-enumerator = <3>; <<
690 <<
691 linux,default-trigger = "heart <<
692 default-state = "on"; <<
693 }; <<
694 <<
695 led@4 { <<
696 reg = <4>; <<
697 color = <LED_COLOR_ID_GREEN>; <<
698 function = LED_FUNCTION_INDICA <<
699 function-enumerator = <2>; <<
700 }; <<
701 <<
702 led@5 { <<
703 reg = <5>; <<
704 color = <LED_COLOR_ID_GREEN>; <<
705 function = LED_FUNCTION_INDICA <<
706 function-enumerator = <1>; <<
707 }; 606 };
708 }; 607 };
709 608
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 609 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 610 &q6afedai {
712 dai@22 { !! 611 qi2s@22 {
713 reg = <QUATERNARY_MI2S_RX>; !! 612 reg = <22>;
714 qcom,sd-lines = <0 1 2 3>; 613 qcom,sd-lines = <0 1 2 3>;
715 }; 614 };
716 }; 615 };
717 616
718 &q6asmdai { 617 &q6asmdai {
719 dai@0 { 618 dai@0 {
720 reg = <0>; 619 reg = <0>;
721 }; 620 };
722 621
723 dai@1 { 622 dai@1 {
724 reg = <1>; 623 reg = <1>;
725 }; 624 };
726 625
727 dai@2 { 626 dai@2 {
728 reg = <2>; 627 reg = <2>;
729 }; 628 };
730 629
731 dai@3 { 630 dai@3 {
732 reg = <3>; 631 reg = <3>;
733 direction = <2>; 632 direction = <2>;
734 is-compress-dai; 633 is-compress-dai;
735 }; 634 };
736 }; 635 };
737 636
738 &qupv3_id_0 { 637 &qupv3_id_0 {
739 status = "okay"; 638 status = "okay";
740 }; 639 };
741 640
742 &qupv3_id_1 { 641 &qupv3_id_1 {
743 status = "okay"; 642 status = "okay";
744 }; 643 };
745 644
746 &sdhc_2 { 645 &sdhc_2 {
747 status = "okay"; 646 status = "okay";
748 647
749 pinctrl-names = "default"; 648 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 649 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 650
752 vmmc-supply = <&vreg_l21a_2p95>; 651 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 652 vqmmc-supply = <&vreg_l13a_2p95>;
754 653
755 bus-width = <4>; 654 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 655 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 656 };
758 657
759 &sound { 658 &sound {
760 compatible = "qcom,db845c-sndcard", "q !! 659 compatible = "qcom,db845c-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 660 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 661 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 662 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 663 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 664 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 665 pinctrl-names = "default";
767 model = "DB845c"; 666 model = "DB845c";
768 audio-routing = 667 audio-routing =
769 "RX_BIAS", "MCLK", 668 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 669 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 670 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 671 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 672 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 673 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 674 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 675 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 676 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 677 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 678 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 679 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 680 "MultiMedia3 Capture", "MM_UL3";
782 681
783 mm1-dai-link { 682 mm1-dai-link {
784 link-name = "MultiMedia1"; 683 link-name = "MultiMedia1";
785 cpu { 684 cpu {
786 sound-dai = <&q6asmdai 685 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 686 };
788 }; 687 };
789 688
790 mm2-dai-link { 689 mm2-dai-link {
791 link-name = "MultiMedia2"; 690 link-name = "MultiMedia2";
792 cpu { 691 cpu {
793 sound-dai = <&q6asmdai 692 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 693 };
795 }; 694 };
796 695
797 mm3-dai-link { 696 mm3-dai-link {
798 link-name = "MultiMedia3"; 697 link-name = "MultiMedia3";
799 cpu { 698 cpu {
800 sound-dai = <&q6asmdai 699 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 700 };
802 }; 701 };
803 702
804 mm4-dai-link { 703 mm4-dai-link {
805 link-name = "MultiMedia4"; 704 link-name = "MultiMedia4";
806 cpu { 705 cpu {
807 sound-dai = <&q6asmdai 706 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 707 };
809 }; 708 };
810 709
811 hdmi-dai-link { 710 hdmi-dai-link {
812 link-name = "HDMI Playback"; 711 link-name = "HDMI Playback";
813 cpu { 712 cpu {
814 sound-dai = <&q6afedai 713 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 714 };
816 715
817 platform { 716 platform {
818 sound-dai = <&q6routin 717 sound-dai = <&q6routing>;
819 }; 718 };
820 719
821 codec { 720 codec {
822 sound-dai = <<9611_c !! 721 sound-dai = <<9611_codec 0>;
823 }; 722 };
824 }; 723 };
825 724
826 slim-dai-link { 725 slim-dai-link {
827 link-name = "SLIM Playback"; 726 link-name = "SLIM Playback";
828 cpu { 727 cpu {
829 sound-dai = <&q6afedai 728 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 729 };
831 730
832 platform { 731 platform {
833 sound-dai = <&q6routin 732 sound-dai = <&q6routing>;
834 }; 733 };
835 734
836 codec { 735 codec {
837 sound-dai = <&left_spk !! 736 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 737 };
839 }; 738 };
840 739
841 slimcap-dai-link { 740 slimcap-dai-link {
842 link-name = "SLIM Capture"; 741 link-name = "SLIM Capture";
843 cpu { 742 cpu {
844 sound-dai = <&q6afedai 743 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 744 };
846 745
847 platform { 746 platform {
848 sound-dai = <&q6routin 747 sound-dai = <&q6routing>;
849 }; 748 };
850 749
851 codec { 750 codec {
852 sound-dai = <&wcd9340 751 sound-dai = <&wcd9340 1>;
853 }; 752 };
854 }; 753 };
855 }; 754 };
856 755
857 &spi0 { 756 &spi0 {
858 status = "okay"; 757 status = "okay";
859 pinctrl-names = "default"; 758 pinctrl-names = "default";
860 pinctrl-0 = <&qup_spi0_default>; 759 pinctrl-0 = <&qup_spi0_default>;
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; 760 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
862 761
863 can@0 { 762 can@0 {
864 compatible = "microchip,mcp251 763 compatible = "microchip,mcp2517fd";
865 reg = <0>; 764 reg = <0>;
866 clocks = <&clk40M>; 765 clocks = <&clk40M>;
867 interrupts-extended = <&tlmm 1 766 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
868 spi-max-frequency = <10000000> 767 spi-max-frequency = <10000000>;
869 vdd-supply = <&vdc_5v>; 768 vdd-supply = <&vdc_5v>;
870 xceiver-supply = <&vdc_5v>; 769 xceiver-supply = <&vdc_5v>;
871 }; 770 };
872 }; 771 };
873 772
874 &spi2 { 773 &spi2 {
875 /* On Low speed expansion */ 774 /* On Low speed expansion */
>> 775 label = "LS-SPI0";
876 status = "okay"; 776 status = "okay";
877 }; 777 };
878 778
879 &tlmm { 779 &tlmm {
880 cam0_default: cam0-default-state { !! 780 cam0_default: cam0_default {
881 rst-pins { !! 781 rst {
882 pins = "gpio9"; 782 pins = "gpio9";
883 function = "gpio"; 783 function = "gpio";
884 784
885 drive-strength = <16>; 785 drive-strength = <16>;
886 bias-disable; 786 bias-disable;
887 }; 787 };
888 788
889 mclk0-pins { !! 789 mclk0 {
890 pins = "gpio13"; 790 pins = "gpio13";
891 function = "cam_mclk"; 791 function = "cam_mclk";
892 792
893 drive-strength = <16>; 793 drive-strength = <16>;
894 bias-disable; 794 bias-disable;
895 }; 795 };
896 }; 796 };
897 797
898 cam3_default: cam3-default-state { !! 798 cam3_default: cam3_default {
899 rst-pins { !! 799 rst {
900 function = "gpio"; 800 function = "gpio";
901 pins = "gpio21"; 801 pins = "gpio21";
902 802
903 drive-strength = <16>; 803 drive-strength = <16>;
904 bias-disable; 804 bias-disable;
905 }; 805 };
906 806
907 mclk3-pins { !! 807 mclk3 {
908 function = "cam_mclk"; 808 function = "cam_mclk";
909 pins = "gpio16"; 809 pins = "gpio16";
910 810
911 drive-strength = <16>; 811 drive-strength = <16>;
912 bias-disable; 812 bias-disable;
913 }; 813 };
914 }; 814 };
915 815
916 dsi_sw_sel: dsi-sw-sel-state { !! 816 dsi_sw_sel: dsi-sw-sel {
917 pins = "gpio120"; 817 pins = "gpio120";
918 function = "gpio"; 818 function = "gpio";
919 819
920 drive-strength = <2>; 820 drive-strength = <2>;
921 bias-disable; 821 bias-disable;
922 output-high; 822 output-high;
923 }; 823 };
924 824
925 lt9611_irq_pin: lt9611-irq-state { !! 825 lt9611_irq_pin: lt9611-irq {
926 pins = "gpio84"; 826 pins = "gpio84";
927 function = "gpio"; 827 function = "gpio";
928 bias-disable; 828 bias-disable;
929 }; 829 };
930 830
931 pcie0_default_state: pcie0-default-sta !! 831 pcie0_default_state: pcie0-default {
932 clkreq-pins { !! 832 clkreq {
933 pins = "gpio36"; 833 pins = "gpio36";
934 function = "pci_e0"; 834 function = "pci_e0";
935 bias-pull-up; 835 bias-pull-up;
936 }; 836 };
937 837
938 reset-n-pins { !! 838 reset-n {
939 pins = "gpio35"; 839 pins = "gpio35";
940 function = "gpio"; 840 function = "gpio";
941 841
942 drive-strength = <2>; 842 drive-strength = <2>;
943 output-low; 843 output-low;
944 bias-pull-down; 844 bias-pull-down;
945 }; 845 };
946 846
947 wake-n-pins { !! 847 wake-n {
948 pins = "gpio37"; 848 pins = "gpio37";
949 function = "gpio"; 849 function = "gpio";
950 850
951 drive-strength = <2>; 851 drive-strength = <2>;
952 bias-pull-up; 852 bias-pull-up;
953 }; 853 };
954 }; 854 };
955 855
956 pcie0_pwren_state: pcie0-pwren-state { !! 856 pcie0_pwren_state: pcie0-pwren {
957 pins = "gpio90"; 857 pins = "gpio90";
958 function = "gpio"; 858 function = "gpio";
959 859
960 drive-strength = <2>; 860 drive-strength = <2>;
961 bias-disable; 861 bias-disable;
962 }; 862 };
963 863
964 pcie1_default_state: pcie1-default-sta !! 864 pcie1_default_state: pcie1-default {
965 perst-n-pins { !! 865 perst-n {
966 pins = "gpio102"; 866 pins = "gpio102";
967 function = "gpio"; 867 function = "gpio";
968 868
969 drive-strength = <16>; 869 drive-strength = <16>;
970 bias-disable; 870 bias-disable;
971 }; 871 };
972 872
973 clkreq-pins { !! 873 clkreq {
974 pins = "gpio103"; 874 pins = "gpio103";
975 function = "pci_e1"; 875 function = "pci_e1";
976 bias-pull-up; 876 bias-pull-up;
977 }; 877 };
978 878
979 wake-n-pins { !! 879 wake-n {
980 pins = "gpio11"; 880 pins = "gpio11";
981 function = "gpio"; 881 function = "gpio";
982 882
983 drive-strength = <2>; 883 drive-strength = <2>;
984 bias-pull-up; 884 bias-pull-up;
985 }; 885 };
986 886
987 reset-n-pins { !! 887 reset-n {
988 pins = "gpio75"; 888 pins = "gpio75";
989 function = "gpio"; 889 function = "gpio";
990 890
991 drive-strength = <16>; 891 drive-strength = <16>;
992 bias-pull-up; 892 bias-pull-up;
993 output-high; 893 output-high;
994 }; 894 };
995 }; 895 };
996 896
997 sdc2_default_state: sdc2-default-state !! 897 sdc2_default_state: sdc2-default {
998 clk-pins { !! 898 clk {
999 pins = "sdc2_clk"; 899 pins = "sdc2_clk";
1000 bias-disable; 900 bias-disable;
1001 901
1002 /* 902 /*
1003 * It seems that mmc_ 903 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 904 * strength is not 16 on clk, cmd, and data pins.
1005 */ 905 */
1006 drive-strength = <16> 906 drive-strength = <16>;
1007 }; 907 };
1008 908
1009 cmd-pins { !! 909 cmd {
1010 pins = "sdc2_cmd"; 910 pins = "sdc2_cmd";
1011 bias-pull-up; 911 bias-pull-up;
1012 drive-strength = <10> 912 drive-strength = <10>;
1013 }; 913 };
1014 914
1015 data-pins { !! 915 data {
1016 pins = "sdc2_data"; 916 pins = "sdc2_data";
1017 bias-pull-up; 917 bias-pull-up;
1018 drive-strength = <10> 918 drive-strength = <10>;
1019 }; 919 };
1020 }; 920 };
1021 921
1022 sdc2_card_det_n: sd-card-det-n-state !! 922 sdc2_card_det_n: sd-card-det-n {
1023 pins = "gpio126"; 923 pins = "gpio126";
1024 function = "gpio"; 924 function = "gpio";
1025 bias-pull-up; 925 bias-pull-up;
1026 }; 926 };
>> 927
>> 928 wcd_intr_default: wcd_intr_default {
>> 929 pins = <54>;
>> 930 function = "gpio";
>> 931
>> 932 input-enable;
>> 933 bias-pull-down;
>> 934 drive-strength = <2>;
>> 935 };
1027 }; 936 };
1028 937
1029 &uart3 { 938 &uart3 {
1030 label = "LS-UART0"; 939 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; <<
1032 <<
1033 status = "disabled"; 940 status = "disabled";
1034 }; 941 };
1035 942
1036 &uart6 { 943 &uart6 {
1037 status = "okay"; 944 status = "okay";
1038 945
1039 pinctrl-0 = <&qup_uart6_4pin>; <<
1040 <<
1041 bluetooth { 946 bluetooth {
1042 compatible = "qcom,wcn3990-bt 947 compatible = "qcom,wcn3990-bt";
1043 948
1044 vddio-supply = <&vreg_s4a_1p8 949 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 950 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 951 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 952 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 953 max-speed = <3200000>;
1049 }; 954 };
1050 }; 955 };
1051 956
1052 &uart9 { 957 &uart9 {
1053 label = "LS-UART1"; 958 label = "LS-UART1";
1054 status = "okay"; 959 status = "okay";
1055 }; 960 };
1056 961
1057 &usb_1 { 962 &usb_1 {
1058 status = "okay"; 963 status = "okay";
1059 }; 964 };
1060 965
1061 &usb_1_dwc3 { 966 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 967 dr_mode = "peripheral";
1063 }; 968 };
1064 969
1065 &usb_1_hsphy { 970 &usb_1_hsphy {
1066 status = "okay"; 971 status = "okay";
1067 972
1068 vdd-supply = <&vreg_l1a_0p875>; 973 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 974 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 975 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 976
1072 qcom,imp-res-offset-value = <8>; 977 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 978 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 979 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 980 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 981 };
1077 982
1078 &usb_1_qmpphy { 983 &usb_1_qmpphy {
1079 status = "okay"; 984 status = "okay";
1080 985
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 986 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 987 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 988 };
1084 989
1085 &usb_2 { 990 &usb_2 {
1086 status = "okay"; 991 status = "okay";
1087 }; 992 };
1088 993
1089 &usb_2_dwc3 { 994 &usb_2_dwc3 {
1090 dr_mode = "host"; 995 dr_mode = "host";
1091 }; 996 };
1092 997
1093 &usb_2_hsphy { 998 &usb_2_hsphy {
1094 status = "okay"; 999 status = "okay";
1095 1000
1096 vdd-supply = <&vreg_l1a_0p875>; 1001 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 1002 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1003 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 1004
1100 qcom,imp-res-offset-value = <8>; 1005 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1006 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 1007 };
1103 1008
1104 &usb_2_qmpphy { 1009 &usb_2_qmpphy {
1105 status = "okay"; 1010 status = "okay";
1106 1011
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 1012 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 1013 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 1014 };
1110 1015
1111 &ufs_mem_hc { 1016 &ufs_mem_hc {
1112 status = "okay"; 1017 status = "okay";
1113 1018
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 1019 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 1020
1116 vcc-supply = <&vreg_l20a_2p95>; 1021 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 1022 vcc-max-microamp = <800000>;
1118 }; 1023 };
1119 1024
1120 &ufs_mem_phy { 1025 &ufs_mem_phy {
1121 status = "okay"; 1026 status = "okay";
1122 1027
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 1028 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 1029 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 1030 };
1126 1031
1127 &venus { 1032 &venus {
1128 status = "okay"; 1033 status = "okay";
1129 }; 1034 };
1130 1035
1131 &wcd9340 { !! 1036 &wcd9340{
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H !! 1037 pinctrl-0 = <&wcd_intr_default>;
>> 1038 pinctrl-names = "default";
>> 1039 clock-names = "extclk";
>> 1040 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
>> 1041 reset-gpios = <&tlmm 64 0>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1042 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1043 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1044 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1045 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1046 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1047
1139 swm: soundwire@c85 { !! 1048 swm: swm@c85 {
1140 left_spkr: speaker@0,1 { !! 1049 left_spkr: wsa8810-left{
1141 compatible = "sdw1021 1050 compatible = "sdw10217201000";
1142 reg = <0 1>; 1051 reg = <0 1>;
1143 powerdown-gpios = <&w 1052 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1053 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1054 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1055 #sound-dai-cells = <0>;
1147 }; 1056 };
1148 1057
1149 right_spkr: speaker@0,2 { !! 1058 right_spkr: wsa8810-right{
1150 compatible = "sdw1021 1059 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w 1060 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1061 reg = <0 2>;
1153 #thermal-sensor-cells 1062 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1063 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1064 #sound-dai-cells = <0>;
1156 }; 1065 };
1157 }; 1066 };
1158 }; 1067 };
1159 1068
1160 &wifi { 1069 &wifi {
1161 status = "okay"; 1070 status = "okay";
1162 1071
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1072 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1073 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1074 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1075 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1076
1168 qcom,snoc-host-cap-8bit-quirk; 1077 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th 1078 qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
1170 }; 1079 };
1171 1080
1172 /* PINCTRL - additions to nodes defined in sd 1081 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1082 &qup_spi2_default {
1174 drive-strength = <16>; 1083 drive-strength = <16>;
1175 }; 1084 };
1176 1085
>> 1086 &qup_uart3_default{
>> 1087 pinmux {
>> 1088 pins = "gpio41", "gpio42", "gpio43", "gpio44";
>> 1089 function = "qup3";
>> 1090 };
>> 1091 };
>> 1092
1177 &qup_i2c10_default { 1093 &qup_i2c10_default {
1178 drive-strength = <2>; !! 1094 pinconf {
1179 bias-disable; !! 1095 pins = "gpio55", "gpio56";
>> 1096 drive-strength = <2>;
>> 1097 bias-disable;
>> 1098 };
>> 1099 };
>> 1100
>> 1101 &qup_uart6_default {
>> 1102 pinmux {
>> 1103 pins = "gpio45", "gpio46", "gpio47", "gpio48";
>> 1104 function = "qup6";
>> 1105 };
>> 1106
>> 1107 cts {
>> 1108 pins = "gpio45";
>> 1109 bias-disable;
>> 1110 };
>> 1111
>> 1112 rts-tx {
>> 1113 pins = "gpio46", "gpio47";
>> 1114 drive-strength = <2>;
>> 1115 bias-disable;
>> 1116 };
>> 1117
>> 1118 rx {
>> 1119 pins = "gpio48";
>> 1120 bias-pull-up;
>> 1121 };
>> 1122 };
>> 1123
>> 1124 &qup_uart9_default {
>> 1125 pinconf-tx {
>> 1126 pins = "gpio4";
>> 1127 drive-strength = <2>;
>> 1128 bias-disable;
>> 1129 };
>> 1130
>> 1131 pinconf-rx {
>> 1132 pins = "gpio5";
>> 1133 drive-strength = <2>;
>> 1134 bias-pull-up;
>> 1135 };
1180 }; 1136 };
1181 1137
1182 &qup_uart9_rx { !! 1138 &pm8998_gpio {
1183 drive-strength = <2>; !! 1139
1184 bias-pull-up; <<
1185 }; 1140 };
1186 1141
1187 &qup_uart9_tx { !! 1142 &cci {
1188 drive-strength = <2>; !! 1143 status = "okay";
1189 bias-disable; !! 1144 };
>> 1145
>> 1146 &camss {
>> 1147 vdda-supply = <&vreg_l1a_0p875>;
>> 1148
>> 1149 status = "ok";
>> 1150
>> 1151 ports {
>> 1152 #address-cells = <1>;
>> 1153 #size-cells = <0>;
>> 1154 port@0 {
>> 1155 reg = <0>;
>> 1156 csiphy0_ep: endpoint {
>> 1157 data-lanes = <0 1 2 3>;
>> 1158 remote-endpoint = <&ov8856_ep>;
>> 1159 };
>> 1160 };
>> 1161 };
>> 1162 };
>> 1163
>> 1164 &cci_i2c0 {
>> 1165 camera@10 {
>> 1166 compatible = "ovti,ov8856";
>> 1167 reg = <0x10>;
>> 1168
>> 1169 // CAM0_RST_N
>> 1170 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1171 pinctrl-names = "default";
>> 1172 pinctrl-0 = <&cam0_default>;
>> 1173 gpios = <&tlmm 13 0>,
>> 1174 <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1175
>> 1176 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
>> 1177 clock-names = "xvclk";
>> 1178 clock-frequency = <19200000>;
>> 1179
>> 1180 /* The &vreg_s4a_1p8 trace is powered on as a,
>> 1181 * so it is represented by a fixed regulator.
>> 1182 *
>> 1183 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
>> 1184 * both have to be enabled through the power management
>> 1185 * gpios.
>> 1186 */
>> 1187 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1188
>> 1189 dovdd-supply = <&vreg_lvs1a_1p8>;
>> 1190 avdd-supply = <&cam0_avdd_2v8>;
>> 1191 dvdd-supply = <&cam0_dvdd_1v2>;
>> 1192
>> 1193 status = "ok";
>> 1194
>> 1195 port {
>> 1196 ov8856_ep: endpoint {
>> 1197 link-frequencies = /bits/ 64
>> 1198 <360000000 180000000>;
>> 1199 data-lanes = <1 2 3 4>;
>> 1200 remote-endpoint = <&csiphy0_ep>;
>> 1201 };
>> 1202 };
>> 1203 };
>> 1204 };
>> 1205
>> 1206 &cci_i2c1 {
>> 1207 camera@60 {
>> 1208 compatible = "ovti,ov7251";
>> 1209
>> 1210 // I2C address as per ov7251.txt linux documentation
>> 1211 reg = <0x60>;
>> 1212
>> 1213 // CAM3_RST_N
>> 1214 enable-gpios = <&tlmm 21 0>;
>> 1215 pinctrl-names = "default";
>> 1216 pinctrl-0 = <&cam3_default>;
>> 1217 gpios = <&tlmm 16 0>,
>> 1218 <&tlmm 21 0>;
>> 1219
>> 1220 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
>> 1221 clock-names = "xclk";
>> 1222 clock-frequency = <24000000>;
>> 1223
>> 1224 /* The &vreg_s4a_1p8 trace always powered on.
>> 1225 *
>> 1226 * The 2.8V vdda-supply regulator is enabled when the
>> 1227 * vreg_s4a_1p8 trace is pulled high.
>> 1228 * It too is represented by a fixed regulator.
>> 1229 *
>> 1230 * No 1.2V vddd-supply regulator is used.
>> 1231 */
>> 1232 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1233
>> 1234 vdddo-supply = <&vreg_lvs1a_1p8>;
>> 1235 vdda-supply = <&cam3_avdd_2v8>;
>> 1236
>> 1237 status = "disable";
>> 1238
>> 1239 port {
>> 1240 ov7251_ep: endpoint {
>> 1241 data-lanes = <0 1>;
>> 1242 // remote-endpoint = <&csiphy3_ep>;
>> 1243 };
>> 1244 };
>> 1245 };
1190 }; 1246 };
1191 1247
1192 /* PINCTRL - additions to nodes defined in sd 1248 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1193 &qup_spi0_default { 1249 &qup_spi0_default {
1194 drive-strength = <6>; !! 1250 config {
1195 bias-disable; !! 1251 drive-strength = <6>;
>> 1252 bias-disable;
>> 1253 };
1196 }; 1254 };
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