1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> !! 8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> <<
12 #include <dt-bindings/sound/qcom,q6asm.h> <<
13 #include "sdm845.dtsi" 11 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" <<
15 #include "pm8998.dtsi" 12 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 13 #include "pmi8998.dtsi"
17 14
18 / { 15 / {
19 model = "Thundercomm Dragonboard 845c" 16 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 17 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; <<
22 qcom,board-id = <8 0>; <<
23 18
24 aliases { 19 aliases {
25 serial0 = &uart9; 20 serial0 = &uart9;
26 serial1 = &uart6; !! 21 hsuart0 = &uart6;
27 }; 22 };
28 23
29 chosen { 24 chosen {
30 stdout-path = "serial0:115200n 25 stdout-path = "serial0:115200n8";
31 }; 26 };
32 27
33 /* Fixed crystal oscillator dedicated <<
34 clk40M: can-clock { <<
35 compatible = "fixed-clock"; <<
36 #clock-cells = <0>; <<
37 clock-frequency = <40000000>; <<
38 }; <<
39 <<
40 dc12v: dc12v-regulator { 28 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 29 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 30 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 31 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 32 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 33 regulator-always-on;
46 }; 34 };
47 35
48 gpio-keys { !! 36 gpio_keys {
49 compatible = "gpio-keys"; 37 compatible = "gpio-keys";
50 autorepeat; 38 autorepeat;
51 39
52 pinctrl-names = "default"; 40 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 41 pinctrl-0 = <&vol_up_pin_a>;
54 42
55 key-vol-up { !! 43 vol-up {
56 label = "Volume Up"; 44 label = "Volume Up";
57 linux,code = <KEY_VOLU 45 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios !! 46 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
59 }; 47 };
60 }; 48 };
61 49
62 leds { 50 leds {
63 compatible = "gpio-leds"; 51 compatible = "gpio-leds";
64 52
65 led-0 { !! 53 user4 {
66 label = "green:user4"; 54 label = "green:user4";
67 function = LED_FUNCTIO !! 55 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
68 color = <LED_COLOR_ID_ !! 56 linux,default-trigger = "panic-indicator";
69 gpios = <&pm8998_gpios <<
70 default-state = "off"; 57 default-state = "off";
71 panic-indicator; <<
72 }; 58 };
73 59
74 led-1 { !! 60 wlan {
75 label = "yellow:wlan"; 61 label = "yellow:wlan";
76 function = LED_FUNCTIO !! 62 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
77 color = <LED_COLOR_ID_ <<
78 gpios = <&pm8998_gpios <<
79 linux,default-trigger 63 linux,default-trigger = "phy0tx";
80 default-state = "off"; 64 default-state = "off";
81 }; 65 };
82 66
83 led-2 { !! 67 bt {
84 label = "blue:bt"; 68 label = "blue:bt";
85 function = LED_FUNCTIO !! 69 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
86 color = <LED_COLOR_ID_ <<
87 gpios = <&pm8998_gpios <<
88 linux,default-trigger 70 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 71 default-state = "off";
90 }; 72 };
91 }; 73 };
92 74
93 hdmi-out { <<
94 compatible = "hdmi-connector"; <<
95 type = "a"; <<
96 <<
97 port { <<
98 hdmi_con: endpoint { <<
99 remote-endpoin <<
100 }; <<
101 }; <<
102 }; <<
103 <<
104 reserved-memory { <<
105 /* Cont splash region set up b <<
106 cont_splash_mem: framebuffer@9 <<
107 reg = <0x0 0x9d400000 <<
108 no-map; <<
109 }; <<
110 }; <<
111 <<
112 lt9611_1v8: lt9611-vdd18-regulator { 75 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 76 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 77 regulator-name = "LT9611_1V8";
115 78
116 vin-supply = <&vdc_5v>; 79 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 80 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 81 regulator-max-microvolt = <1800000>;
119 82
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 83 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 84 enable-active-high;
122 }; 85 };
123 86
124 lt9611_3v3: lt9611-3v3 { 87 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 88 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 89 regulator-name = "LT9611_3V3";
127 90
128 vin-supply = <&vdc_3v3>; 91 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 92 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 93 regulator-max-microvolt = <3300000>;
131 94
132 /* !! 95 // TODO: make it possible to drive same GPIO from two clients
133 * TODO: make it possible to d !! 96 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
134 * gpio = <&tlmm 89 GPIO_ACTIV !! 97 // enable-active-high;
135 * enable-active-high; <<
136 */ <<
137 }; 98 };
138 99
139 pcie0_1p05v: pcie-0-1p05v-regulator { 100 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 101 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 102 regulator-name = "PCIE0_1.05V";
142 103
143 vin-supply = <&vbat>; 104 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 105 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 106 regulator-max-microvolt = <1050000>;
146 107
147 /* !! 108 // TODO: make it possible to drive same GPIO from two clients
148 * TODO: make it possible to d !! 109 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
149 * gpio = <&tlmm 90 GPIO_ACTIV !! 110 // enable-active-high;
150 * enable-active-high; <<
151 */ <<
152 }; <<
153 <<
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator <<
155 compatible = "regulator-fixed" <<
156 regulator-name = "CAM0_DVDD_1V <<
157 regulator-min-microvolt = <120 <<
158 regulator-max-microvolt = <120 <<
159 enable-active-high; <<
160 gpio = <&pm8998_gpios 12 GPIO_ <<
161 pinctrl-names = "default"; <<
162 pinctrl-0 = <&cam0_dvdd_1v2_en <<
163 vin-supply = <&vbat>; <<
164 }; <<
165 <<
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator <<
167 compatible = "regulator-fixed" <<
168 regulator-name = "CAM0_AVDD_2V <<
169 regulator-min-microvolt = <280 <<
170 regulator-max-microvolt = <280 <<
171 enable-active-high; <<
172 gpio = <&pm8998_gpios 10 GPIO_ <<
173 pinctrl-names = "default"; <<
174 pinctrl-0 = <&cam0_avdd_2v8_en <<
175 vin-supply = <&vbat>; <<
176 }; <<
177 <<
178 /* This regulator is enabled when the <<
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator <<
180 compatible = "regulator-fixed" <<
181 regulator-name = "CAM3_AVDD_2V <<
182 regulator-min-microvolt = <280 <<
183 regulator-max-microvolt = <280 <<
184 regulator-always-on; <<
185 vin-supply = <&vbat>; <<
186 }; 111 };
187 112
188 pcie0_3p3v_dual: vldo-3v3-regulator { 113 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 114 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 115 regulator-name = "VLDO_3V3";
191 116
192 vin-supply = <&vbat>; 117 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 118 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 119 regulator-max-microvolt = <3300000>;
195 120
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 121 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 122 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 123
205 pinctrl-names = "default"; 124 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 125 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 126 };
208 127
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 128 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 129 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 130 regulator-name = "V5P0_HDMIOUT";
212 131
213 vin-supply = <&vdc_5v>; 132 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 133 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 134 regulator-max-microvolt = <500000>;
216 135
217 /* !! 136 // TODO: make it possible to drive same GPIO from two clients
218 * TODO: make it possible to d !! 137 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
219 * gpio = <&tlmm 89 GPIO_ACTIV !! 138 // enable-active-high;
220 * enable-active-high; <<
221 */ <<
222 }; 139 };
223 140
224 vbat: vbat-regulator { 141 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 142 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 143 regulator-name = "VBAT";
227 144
228 vin-supply = <&dc12v>; 145 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 146 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 147 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 148 regulator-always-on;
232 }; 149 };
233 150
234 vbat_som: vbat-som-regulator { 151 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 152 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 153 regulator-name = "VBAT_SOM";
237 154
238 vin-supply = <&dc12v>; 155 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 156 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 157 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 158 regulator-always-on;
242 }; 159 };
243 160
244 vdc_3v3: vdc-3v3-regulator { 161 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 162 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 163 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 164 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 165 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 166 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 167 regulator-always-on;
251 }; 168 };
252 169
253 vdc_5v: vdc-5v-regulator { 170 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 171 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 172 regulator-name = "VDC_5V";
256 173
257 vin-supply = <&dc12v>; 174 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 175 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 176 regulator-max-microvolt = <500000>;
260 regulator-always-on; 177 regulator-always-on;
261 }; 178 };
262 179
263 vreg_s4a_1p8: vreg-s4a-1p8 { 180 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 181 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 182 regulator-name = "vreg_s4a_1p8";
266 183
267 regulator-min-microvolt = <180 184 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 185 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 186 regulator-always-on;
270 }; 187 };
271 188
272 vph_pwr: vph-pwr-regulator { 189 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 190 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 191 regulator-name = "vph_pwr";
275 192
276 vin-supply = <&vbat_som>; 193 vin-supply = <&vbat_som>;
277 }; 194 };
278 }; 195 };
279 196
280 &adsp_pas { 197 &adsp_pas {
281 status = "okay"; 198 status = "okay";
282 199
283 firmware-name = "qcom/sdm845/adsp.mbn" !! 200 firmware-name = "qcom/sdm845/adsp.mdt";
284 }; 201 };
285 202
286 &apps_rsc { 203 &apps_rsc {
287 regulators-0 { !! 204 pm8998-rpmh-regulators {
288 compatible = "qcom,pm8998-rpmh 205 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 206 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 207 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 208 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 209 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 210 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 211 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 212 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 213 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 214 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 215 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 216 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 217 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 218 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 219 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 220 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 221 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 222 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 223 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 224 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 225 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 226 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 227 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 228 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 229 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 230 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 231 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 232 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 233 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 234
318 vreg_s3a_1p35: smps3 { 235 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 236 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 237 regulator-max-microvolt = <1352000>;
321 }; 238 };
322 239
323 vreg_s5a_2p04: smps5 { 240 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 241 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 242 regulator-max-microvolt = <2040000>;
326 }; 243 };
327 244
328 vreg_s7a_1p025: smps7 { 245 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 246 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 247 regulator-max-microvolt = <1028000>;
331 }; 248 };
332 249
333 vreg_l1a_0p875: ldo1 { 250 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 251 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 252 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 253 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 254 };
338 255
339 vreg_l5a_0p8: ldo5 { 256 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 257 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 258 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 259 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 260 };
344 261
345 vreg_l12a_1p8: ldo12 { 262 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 263 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 264 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 266 };
350 267
351 vreg_l7a_1p8: ldo7 { 268 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 269 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 270 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 271 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 272 };
356 273
357 vreg_l13a_2p95: ldo13 { 274 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 275 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 276 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 277 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 278 };
362 279
363 vreg_l17a_1p3: ldo17 { 280 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 281 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 282 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 283 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 284 };
368 285
369 vreg_l20a_2p95: ldo20 { 286 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 287 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 288 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 289 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 290 };
374 291
375 vreg_l21a_2p95: ldo21 { 292 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 293 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 294 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 295 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 296 };
380 297
381 vreg_l24a_3p075: ldo24 { 298 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 299 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 300 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 301 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 302 };
386 303
387 vreg_l25a_3p3: ldo25 { 304 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 305 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 306 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 307 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 308 };
392 309
393 vreg_l26a_1p2: ldo26 { 310 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 311 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 312 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 313 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 314 };
398 315
399 vreg_lvs1a_1p8: lvs1 { 316 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 317 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 318 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 319 regulator-always-on;
403 }; 320 };
404 321
405 vreg_lvs2a_1p8: lvs2 { 322 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 323 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 324 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 325 regulator-always-on;
409 }; 326 };
410 }; 327 };
411 328
412 regulators-1 { !! 329 pmi8998-rpmh-regulators {
413 compatible = "qcom,pmi8998-rpm 330 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 331 qcom,pmic-id = "b";
415 332
416 vdd-bob-supply = <&vph_pwr>; 333 vdd-bob-supply = <&vph_pwr>;
417 334
418 vreg_bob: bob { 335 vreg_bob: bob {
419 regulator-min-microvol 336 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 337 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 338 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 339 regulator-allow-bypass;
423 }; 340 };
424 }; 341 };
425 }; 342 };
426 343
427 &camss { <<
428 status = "okay"; <<
429 <<
430 vdda-phy-supply = <&vreg_l1a_0p875>; <<
431 vdda-pll-supply = <&vreg_l26a_1p2>; <<
432 }; <<
433 <<
434 &cdsp_pas { 344 &cdsp_pas {
435 status = "okay"; 345 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" !! 346 firmware-name = "qcom/sdm845/cdsp.mdt";
437 }; 347 };
438 348
439 &gcc { 349 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 350 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 351 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI !! 352 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
443 <GCC_LPASS_Q6_AXI_C <<
444 <GCC_LPASS_SWAY_CLK <<
445 }; <<
446 <<
447 &gmu { <<
448 status = "okay"; <<
449 }; <<
450 <<
451 &gpi_dma0 { <<
452 status = "okay"; <<
453 }; <<
454 <<
455 &gpi_dma1 { <<
456 status = "okay"; <<
457 }; 353 };
458 354
459 &gpu { 355 &gpu {
460 status = "okay"; <<
461 zap-shader { 356 zap-shader {
462 memory-region = <&gpu_mem>; 357 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 358 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 359 };
465 }; 360 };
466 361
467 &i2c10 { <<
468 status = "okay"; <<
469 clock-frequency = <400000>; <<
470 <<
471 lt9611_codec: hdmi-bridge@3b { <<
472 compatible = "lontium,lt9611"; <<
473 reg = <0x3b>; <<
474 #sound-dai-cells = <1>; <<
475 <<
476 interrupts-extended = <&tlmm 8 <<
477 <<
478 reset-gpios = <&tlmm 128 GPIO_ <<
479 <<
480 vdd-supply = <<9611_1v8>; <<
481 vcc-supply = <<9611_3v3>; <<
482 <<
483 pinctrl-names = "default"; <<
484 pinctrl-0 = <<9611_irq_pin>, <<
485 <<
486 ports { <<
487 #address-cells = <1>; <<
488 #size-cells = <0>; <<
489 <<
490 port@0 { <<
491 reg = <0>; <<
492 <<
493 lt9611_a: endp <<
494 remote <<
495 }; <<
496 }; <<
497 <<
498 port@1 { <<
499 reg = <1>; <<
500 <<
501 lt9611_b: endp <<
502 remote <<
503 }; <<
504 }; <<
505 <<
506 port@2 { <<
507 reg = <2>; <<
508 <<
509 lt9611_out: en <<
510 remote <<
511 }; <<
512 }; <<
513 }; <<
514 }; <<
515 }; <<
516 <<
517 &i2c11 { <<
518 /* On Low speed expansion */ <<
519 clock-frequency = <100000>; <<
520 status = "okay"; <<
521 }; <<
522 <<
523 &i2c14 { <<
524 /* On Low speed expansion */ <<
525 clock-frequency = <100000>; <<
526 status = "okay"; <<
527 }; <<
528 <<
529 &mdss { <<
530 memory-region = <&cont_splash_mem>; <<
531 status = "okay"; <<
532 }; <<
533 <<
534 &mdss_dsi0 { <<
535 status = "okay"; <<
536 vdda-supply = <&vreg_l26a_1p2>; <<
537 <<
538 qcom,dual-dsi-mode; <<
539 qcom,master-dsi; <<
540 <<
541 ports { <<
542 port@1 { <<
543 endpoint { <<
544 remote-endpoin <<
545 data-lanes = < <<
546 }; <<
547 }; <<
548 }; <<
549 }; <<
550 <<
551 &mdss_dsi0_phy { <<
552 status = "okay"; <<
553 vdds-supply = <&vreg_l1a_0p875>; <<
554 }; <<
555 <<
556 &mdss_dsi1 { <<
557 vdda-supply = <&vreg_l26a_1p2>; <<
558 <<
559 qcom,dual-dsi-mode; <<
560 <<
561 /* DSI1 is slave, so use DSI0 clocks * <<
562 assigned-clock-parents = <&mdss_dsi0_p <<
563 <<
564 status = "okay"; <<
565 <<
566 ports { <<
567 port@1 { <<
568 endpoint { <<
569 remote-endpoin <<
570 data-lanes = < <<
571 }; <<
572 }; <<
573 }; <<
574 }; <<
575 <<
576 &mdss_dsi1_phy { <<
577 vdds-supply = <&vreg_l1a_0p875>; <<
578 status = "okay"; <<
579 }; <<
580 <<
581 &mss_pil { 362 &mss_pil {
582 status = "okay"; 363 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 364 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 365 };
585 366
586 &pcie0 { !! 367 &pm8998_gpio {
587 status = "okay"; !! 368 vol_up_pin_a: vol-up-active {
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO <<
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI <<
590 <<
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; <<
592 <<
593 pinctrl-names = "default"; <<
594 pinctrl-0 = <&pcie0_default_state>; <<
595 }; <<
596 <<
597 &pcie0_phy { <<
598 status = "okay"; <<
599 <<
600 vdda-phy-supply = <&vreg_l1a_0p875>; <<
601 vdda-pll-supply = <&vreg_l26a_1p2>; <<
602 }; <<
603 <<
604 &pcie1 { <<
605 status = "okay"; <<
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L <<
607 <<
608 pinctrl-names = "default"; <<
609 pinctrl-0 = <&pcie1_default_state>; <<
610 }; <<
611 <<
612 &pcie1_phy { <<
613 status = "okay"; <<
614 <<
615 vdda-phy-supply = <&vreg_l1a_0p875>; <<
616 vdda-pll-supply = <&vreg_l26a_1p2>; <<
617 }; <<
618 <<
619 &pm8998_gpios { <<
620 gpio-line-names = <<
621 "NC", <<
622 "NC", <<
623 "WLAN_SW_CTRL", <<
624 "NC", <<
625 "PM_GPIO5_BLUE_BT_LED", <<
626 "VOL_UP_N", <<
627 "NC", <<
628 "ADC_IN1", <<
629 "PM_GPIO9_YEL_WIFI_LED", <<
630 "CAM0_AVDD_EN", <<
631 "NC", <<
632 "CAM0_DVDD_EN", <<
633 "PM_GPIO13_GREEN_U4_LED", <<
634 "DIV_CLK2", <<
635 "NC", <<
636 "NC", <<
637 "NC", <<
638 "SMB_STAT", <<
639 "NC", <<
640 "NC", <<
641 "ADC_IN2", <<
642 "OPTION1", <<
643 "WCSS_PWR_REQ", <<
644 "PM845_GPIO24", <<
645 "OPTION2", <<
646 "PM845_SLB"; <<
647 <<
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v <<
649 pins = "gpio12"; <<
650 function = "normal"; <<
651 <<
652 bias-pull-up; <<
653 drive-push-pull; <<
654 qcom,drive-strength = <PMIC_GP <<
655 }; <<
656 <<
657 cam0_avdd_2v8_en_default: cam0-avdd-2v <<
658 pins = "gpio10"; <<
659 function = "normal"; <<
660 <<
661 bias-pull-up; <<
662 drive-push-pull; <<
663 qcom,drive-strength = <PMIC_GP <<
664 }; <<
665 <<
666 vol_up_pin_a: vol-up-active-state { <<
667 pins = "gpio6"; 369 pins = "gpio6";
668 function = "normal"; 370 function = "normal";
669 input-enable; 371 input-enable;
670 bias-pull-up; 372 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 373 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 374 };
673 }; 375 };
674 376
675 &pm8998_resin { !! 377 &pm8998_pon {
676 linux,code = <KEY_VOLUMEDOWN>; !! 378 resin {
677 status = "okay"; !! 379 compatible = "qcom,pm8941-resin";
678 }; !! 380 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
679 !! 381 debounce = <15625>;
680 &pmi8998_lpg { !! 382 bias-pull-up;
681 status = "okay"; !! 383 linux,code = <KEY_VOLUMEDOWN>;
682 <<
683 qcom,power-source = <1>; <<
684 <<
685 led@3 { <<
686 reg = <3>; <<
687 color = <LED_COLOR_ID_GREEN>; <<
688 function = LED_FUNCTION_HEARTB <<
689 function-enumerator = <3>; <<
690 <<
691 linux,default-trigger = "heart <<
692 default-state = "on"; <<
693 }; <<
694 <<
695 led@4 { <<
696 reg = <4>; <<
697 color = <LED_COLOR_ID_GREEN>; <<
698 function = LED_FUNCTION_INDICA <<
699 function-enumerator = <2>; <<
700 }; <<
701 <<
702 led@5 { <<
703 reg = <5>; <<
704 color = <LED_COLOR_ID_GREEN>; <<
705 function = LED_FUNCTION_INDICA <<
706 function-enumerator = <1>; <<
707 }; <<
708 }; <<
709 <<
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L <<
711 &q6afedai { <<
712 dai@22 { <<
713 reg = <QUATERNARY_MI2S_RX>; <<
714 qcom,sd-lines = <0 1 2 3>; <<
715 }; <<
716 }; <<
717 <<
718 &q6asmdai { <<
719 dai@0 { <<
720 reg = <0>; <<
721 }; <<
722 <<
723 dai@1 { <<
724 reg = <1>; <<
725 }; <<
726 <<
727 dai@2 { <<
728 reg = <2>; <<
729 }; <<
730 <<
731 dai@3 { <<
732 reg = <3>; <<
733 direction = <2>; <<
734 is-compress-dai; <<
735 }; 384 };
736 }; 385 };
737 386
738 &qupv3_id_0 { 387 &qupv3_id_0 {
739 status = "okay"; 388 status = "okay";
740 }; 389 };
741 390
742 &qupv3_id_1 { 391 &qupv3_id_1 {
743 status = "okay"; 392 status = "okay";
744 }; 393 };
745 394
746 &sdhc_2 { 395 &sdhc_2 {
747 status = "okay"; 396 status = "okay";
748 397
749 pinctrl-names = "default"; 398 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 399 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 400
752 vmmc-supply = <&vreg_l21a_2p95>; 401 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 402 vqmmc-supply = <&vreg_l13a_2p95>;
754 403
755 bus-width = <4>; 404 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 405 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 406 };
758 407
759 &sound { <<
760 compatible = "qcom,db845c-sndcard", "q <<
761 pinctrl-0 = <&quat_mi2s_active <<
762 &quat_mi2s_sd0_active <<
763 &quat_mi2s_sd1_active <<
764 &quat_mi2s_sd2_active <<
765 &quat_mi2s_sd3_active <<
766 pinctrl-names = "default"; <<
767 model = "DB845c"; <<
768 audio-routing = <<
769 "RX_BIAS", "MCLK", <<
770 "AMIC1", "MIC BIAS1", <<
771 "AMIC2", "MIC BIAS2", <<
772 "DMIC0", "MIC BIAS1", <<
773 "DMIC1", "MIC BIAS1", <<
774 "DMIC2", "MIC BIAS3", <<
775 "DMIC3", "MIC BIAS3", <<
776 "SpkrLeft IN", "SPK1 OUT", <<
777 "SpkrRight IN", "SPK2 OUT", <<
778 "MM_DL1", "MultiMedia1 Playba <<
779 "MM_DL2", "MultiMedia2 Playba <<
780 "MM_DL4", "MultiMedia4 Playba <<
781 "MultiMedia3 Capture", "MM_UL3 <<
782 <<
783 mm1-dai-link { <<
784 link-name = "MultiMedia1"; <<
785 cpu { <<
786 sound-dai = <&q6asmdai <<
787 }; <<
788 }; <<
789 <<
790 mm2-dai-link { <<
791 link-name = "MultiMedia2"; <<
792 cpu { <<
793 sound-dai = <&q6asmdai <<
794 }; <<
795 }; <<
796 <<
797 mm3-dai-link { <<
798 link-name = "MultiMedia3"; <<
799 cpu { <<
800 sound-dai = <&q6asmdai <<
801 }; <<
802 }; <<
803 <<
804 mm4-dai-link { <<
805 link-name = "MultiMedia4"; <<
806 cpu { <<
807 sound-dai = <&q6asmdai <<
808 }; <<
809 }; <<
810 <<
811 hdmi-dai-link { <<
812 link-name = "HDMI Playback"; <<
813 cpu { <<
814 sound-dai = <&q6afedai <<
815 }; <<
816 <<
817 platform { <<
818 sound-dai = <&q6routin <<
819 }; <<
820 <<
821 codec { <<
822 sound-dai = <<9611_c <<
823 }; <<
824 }; <<
825 <<
826 slim-dai-link { <<
827 link-name = "SLIM Playback"; <<
828 cpu { <<
829 sound-dai = <&q6afedai <<
830 }; <<
831 <<
832 platform { <<
833 sound-dai = <&q6routin <<
834 }; <<
835 <<
836 codec { <<
837 sound-dai = <&left_spk <<
838 }; <<
839 }; <<
840 <<
841 slimcap-dai-link { <<
842 link-name = "SLIM Capture"; <<
843 cpu { <<
844 sound-dai = <&q6afedai <<
845 }; <<
846 <<
847 platform { <<
848 sound-dai = <&q6routin <<
849 }; <<
850 <<
851 codec { <<
852 sound-dai = <&wcd9340 <<
853 }; <<
854 }; <<
855 }; <<
856 <<
857 &spi0 { <<
858 status = "okay"; <<
859 pinctrl-names = "default"; <<
860 pinctrl-0 = <&qup_spi0_default>; <<
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; <<
862 <<
863 can@0 { <<
864 compatible = "microchip,mcp251 <<
865 reg = <0>; <<
866 clocks = <&clk40M>; <<
867 interrupts-extended = <&tlmm 1 <<
868 spi-max-frequency = <10000000> <<
869 vdd-supply = <&vdc_5v>; <<
870 xceiver-supply = <&vdc_5v>; <<
871 }; <<
872 }; <<
873 <<
874 &spi2 { <<
875 /* On Low speed expansion */ <<
876 status = "okay"; <<
877 }; <<
878 <<
879 &tlmm { 408 &tlmm {
880 cam0_default: cam0-default-state { !! 409 pcie0_pwren_state: pcie0-pwren {
881 rst-pins { <<
882 pins = "gpio9"; <<
883 function = "gpio"; <<
884 <<
885 drive-strength = <16>; <<
886 bias-disable; <<
887 }; <<
888 <<
889 mclk0-pins { <<
890 pins = "gpio13"; <<
891 function = "cam_mclk"; <<
892 <<
893 drive-strength = <16>; <<
894 bias-disable; <<
895 }; <<
896 }; <<
897 <<
898 cam3_default: cam3-default-state { <<
899 rst-pins { <<
900 function = "gpio"; <<
901 pins = "gpio21"; <<
902 <<
903 drive-strength = <16>; <<
904 bias-disable; <<
905 }; <<
906 <<
907 mclk3-pins { <<
908 function = "cam_mclk"; <<
909 pins = "gpio16"; <<
910 <<
911 drive-strength = <16>; <<
912 bias-disable; <<
913 }; <<
914 }; <<
915 <<
916 dsi_sw_sel: dsi-sw-sel-state { <<
917 pins = "gpio120"; <<
918 function = "gpio"; <<
919 <<
920 drive-strength = <2>; <<
921 bias-disable; <<
922 output-high; <<
923 }; <<
924 <<
925 lt9611_irq_pin: lt9611-irq-state { <<
926 pins = "gpio84"; <<
927 function = "gpio"; <<
928 bias-disable; <<
929 }; <<
930 <<
931 pcie0_default_state: pcie0-default-sta <<
932 clkreq-pins { <<
933 pins = "gpio36"; <<
934 function = "pci_e0"; <<
935 bias-pull-up; <<
936 }; <<
937 <<
938 reset-n-pins { <<
939 pins = "gpio35"; <<
940 function = "gpio"; <<
941 <<
942 drive-strength = <2>; <<
943 output-low; <<
944 bias-pull-down; <<
945 }; <<
946 <<
947 wake-n-pins { <<
948 pins = "gpio37"; <<
949 function = "gpio"; <<
950 <<
951 drive-strength = <2>; <<
952 bias-pull-up; <<
953 }; <<
954 }; <<
955 <<
956 pcie0_pwren_state: pcie0-pwren-state { <<
957 pins = "gpio90"; 410 pins = "gpio90";
958 function = "gpio"; 411 function = "gpio";
959 412
960 drive-strength = <2>; 413 drive-strength = <2>;
961 bias-disable; 414 bias-disable;
962 }; 415 };
963 416
964 pcie1_default_state: pcie1-default-sta !! 417 sdc2_default_state: sdc2-default {
965 perst-n-pins { !! 418 clk {
966 pins = "gpio102"; <<
967 function = "gpio"; <<
968 <<
969 drive-strength = <16>; <<
970 bias-disable; <<
971 }; <<
972 <<
973 clkreq-pins { <<
974 pins = "gpio103"; <<
975 function = "pci_e1"; <<
976 bias-pull-up; <<
977 }; <<
978 <<
979 wake-n-pins { <<
980 pins = "gpio11"; <<
981 function = "gpio"; <<
982 <<
983 drive-strength = <2>; <<
984 bias-pull-up; <<
985 }; <<
986 <<
987 reset-n-pins { <<
988 pins = "gpio75"; <<
989 function = "gpio"; <<
990 <<
991 drive-strength = <16>; <<
992 bias-pull-up; <<
993 output-high; <<
994 }; <<
995 }; <<
996 <<
997 sdc2_default_state: sdc2-default-state <<
998 clk-pins { <<
999 pins = "sdc2_clk"; 419 pins = "sdc2_clk";
1000 bias-disable; 420 bias-disable;
1001 421
1002 /* 422 /*
1003 * It seems that mmc_ 423 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 424 * strength is not 16 on clk, cmd, and data pins.
1005 */ 425 */
1006 drive-strength = <16> 426 drive-strength = <16>;
1007 }; 427 };
1008 428
1009 cmd-pins { !! 429 cmd {
1010 pins = "sdc2_cmd"; 430 pins = "sdc2_cmd";
1011 bias-pull-up; 431 bias-pull-up;
1012 drive-strength = <10> 432 drive-strength = <10>;
1013 }; 433 };
1014 434
1015 data-pins { !! 435 data {
1016 pins = "sdc2_data"; 436 pins = "sdc2_data";
1017 bias-pull-up; 437 bias-pull-up;
1018 drive-strength = <10> 438 drive-strength = <10>;
1019 }; 439 };
1020 }; 440 };
1021 441
1022 sdc2_card_det_n: sd-card-det-n-state !! 442 sdc2_card_det_n: sd-card-det-n {
1023 pins = "gpio126"; 443 pins = "gpio126";
1024 function = "gpio"; 444 function = "gpio";
1025 bias-pull-up; 445 bias-pull-up;
1026 }; 446 };
1027 }; 447 };
1028 448
1029 &uart3 { <<
1030 label = "LS-UART0"; <<
1031 pinctrl-0 = <&qup_uart3_4pin>; <<
1032 <<
1033 status = "disabled"; <<
1034 }; <<
1035 <<
1036 &uart6 { 449 &uart6 {
1037 status = "okay"; 450 status = "okay";
1038 451
1039 pinctrl-0 = <&qup_uart6_4pin>; <<
1040 <<
1041 bluetooth { 452 bluetooth {
1042 compatible = "qcom,wcn3990-bt 453 compatible = "qcom,wcn3990-bt";
1043 454
1044 vddio-supply = <&vreg_s4a_1p8 455 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 456 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 457 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 458 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 459 max-speed = <3200000>;
1049 }; 460 };
1050 }; 461 };
1051 462
1052 &uart9 { 463 &uart9 {
1053 label = "LS-UART1"; <<
1054 status = "okay"; 464 status = "okay";
1055 }; 465 };
1056 466
1057 &usb_1 { 467 &usb_1 {
1058 status = "okay"; 468 status = "okay";
1059 }; 469 };
1060 470
1061 &usb_1_dwc3 { 471 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 472 dr_mode = "peripheral";
1063 }; 473 };
1064 474
1065 &usb_1_hsphy { 475 &usb_1_hsphy {
1066 status = "okay"; 476 status = "okay";
1067 477
1068 vdd-supply = <&vreg_l1a_0p875>; 478 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 479 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 480 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 481
1072 qcom,imp-res-offset-value = <8>; 482 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 483 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 484 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 485 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 486 };
1077 487
1078 &usb_1_qmpphy { 488 &usb_1_qmpphy {
1079 status = "okay"; 489 status = "okay";
1080 490
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 491 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 492 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 493 };
1084 494
1085 &usb_2 { 495 &usb_2 {
1086 status = "okay"; 496 status = "okay";
1087 }; 497 };
1088 498
1089 &usb_2_dwc3 { 499 &usb_2_dwc3 {
1090 dr_mode = "host"; 500 dr_mode = "host";
1091 }; 501 };
1092 502
1093 &usb_2_hsphy { 503 &usb_2_hsphy {
1094 status = "okay"; 504 status = "okay";
1095 505
1096 vdd-supply = <&vreg_l1a_0p875>; 506 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 507 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 508 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 509
1100 qcom,imp-res-offset-value = <8>; 510 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 511 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 512 };
1103 513
1104 &usb_2_qmpphy { 514 &usb_2_qmpphy {
1105 status = "okay"; 515 status = "okay";
1106 516
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 517 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 518 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 519 };
1110 520
1111 &ufs_mem_hc { 521 &ufs_mem_hc {
1112 status = "okay"; 522 status = "okay";
1113 523
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 524 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 525
1116 vcc-supply = <&vreg_l20a_2p95>; 526 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 527 vcc-max-microamp = <800000>;
1118 }; 528 };
1119 529
1120 &ufs_mem_phy { 530 &ufs_mem_phy {
1121 status = "okay"; 531 status = "okay";
1122 532
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 533 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 534 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 535 };
1126 536
1127 &venus { <<
1128 status = "okay"; <<
1129 }; <<
1130 <<
1131 &wcd9340 { <<
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H <<
1133 vdd-buck-supply = <&vreg_s4a_1p8>; <<
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 <<
1135 vdd-tx-supply = <&vreg_s4a_1p8>; <<
1136 vdd-rx-supply = <&vreg_s4a_1p8>; <<
1137 vdd-io-supply = <&vreg_s4a_1p8>; <<
1138 <<
1139 swm: soundwire@c85 { <<
1140 left_spkr: speaker@0,1 { <<
1141 compatible = "sdw1021 <<
1142 reg = <0 1>; <<
1143 powerdown-gpios = <&w <<
1144 #thermal-sensor-cells <<
1145 sound-name-prefix = " <<
1146 #sound-dai-cells = <0 <<
1147 }; <<
1148 <<
1149 right_spkr: speaker@0,2 { <<
1150 compatible = "sdw1021 <<
1151 powerdown-gpios = <&w <<
1152 reg = <0 2>; <<
1153 #thermal-sensor-cells <<
1154 sound-name-prefix = " <<
1155 #sound-dai-cells = <0 <<
1156 }; <<
1157 }; <<
1158 }; <<
1159 <<
1160 &wifi { 537 &wifi {
1161 status = "okay"; 538 status = "okay";
1162 539
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 540 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 541 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 542 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 543 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 544
1168 qcom,snoc-host-cap-8bit-quirk; 545 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th <<
1170 }; 546 };
1171 547
1172 /* PINCTRL - additions to nodes defined in sd 548 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { <<
1174 drive-strength = <16>; <<
1175 }; <<
1176 549
1177 &qup_i2c10_default { !! 550 &qup_uart6_default {
1178 drive-strength = <2>; !! 551 pinmux {
1179 bias-disable; !! 552 pins = "gpio45", "gpio46", "gpio47", "gpio48";
1180 }; !! 553 function = "qup6";
>> 554 };
1181 555
1182 &qup_uart9_rx { !! 556 cts {
1183 drive-strength = <2>; !! 557 pins = "gpio45";
1184 bias-pull-up; !! 558 bias-disable;
1185 }; !! 559 };
1186 560
1187 &qup_uart9_tx { !! 561 rts-tx {
1188 drive-strength = <2>; !! 562 pins = "gpio46", "gpio47";
1189 bias-disable; !! 563 drive-strength = <2>;
>> 564 bias-disable;
>> 565 };
>> 566
>> 567 rx {
>> 568 pins = "gpio48";
>> 569 bias-pull-up;
>> 570 };
1190 }; 571 };
1191 572
1192 /* PINCTRL - additions to nodes defined in sd !! 573 &qup_uart9_default {
1193 &qup_spi0_default { !! 574 pinconf-tx {
1194 drive-strength = <6>; !! 575 pins = "gpio4";
1195 bias-disable; !! 576 drive-strength = <2>;
>> 577 bias-disable;
>> 578 };
>> 579
>> 580 pinconf-rx {
>> 581 pins = "gpio5";
>> 582 drive-strength = <2>;
>> 583 bias-pull-up;
>> 584 };
1196 }; 585 };
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