1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> !! 8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 13 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" <<
15 #include "pm8998.dtsi" 14 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 15 #include "pmi8998.dtsi"
17 16
18 / { 17 / {
19 model = "Thundercomm Dragonboard 845c" 18 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 19 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; <<
22 qcom,board-id = <8 0>; <<
23 20
24 aliases { 21 aliases {
25 serial0 = &uart9; 22 serial0 = &uart9;
26 serial1 = &uart6; !! 23 hsuart0 = &uart6;
27 }; 24 };
28 25
29 chosen { 26 chosen {
30 stdout-path = "serial0:115200n 27 stdout-path = "serial0:115200n8";
31 }; 28 };
32 29
33 /* Fixed crystal oscillator dedicated <<
34 clk40M: can-clock { <<
35 compatible = "fixed-clock"; <<
36 #clock-cells = <0>; <<
37 clock-frequency = <40000000>; <<
38 }; <<
39 <<
40 dc12v: dc12v-regulator { 30 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 31 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 32 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 33 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 34 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 35 regulator-always-on;
46 }; 36 };
47 37
48 gpio-keys { !! 38 gpio_keys {
49 compatible = "gpio-keys"; 39 compatible = "gpio-keys";
50 autorepeat; 40 autorepeat;
51 41
52 pinctrl-names = "default"; 42 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 43 pinctrl-0 = <&vol_up_pin_a>;
54 44
55 key-vol-up { !! 45 vol-up {
56 label = "Volume Up"; 46 label = "Volume Up";
57 linux,code = <KEY_VOLU 47 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios !! 48 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
59 }; 49 };
60 }; 50 };
61 51
62 leds { 52 leds {
63 compatible = "gpio-leds"; 53 compatible = "gpio-leds";
64 54
65 led-0 { !! 55 user4 {
66 label = "green:user4"; 56 label = "green:user4";
67 function = LED_FUNCTIO !! 57 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
68 color = <LED_COLOR_ID_ !! 58 linux,default-trigger = "panic-indicator";
69 gpios = <&pm8998_gpios <<
70 default-state = "off"; 59 default-state = "off";
71 panic-indicator; <<
72 }; 60 };
73 61
74 led-1 { !! 62 wlan {
75 label = "yellow:wlan"; 63 label = "yellow:wlan";
76 function = LED_FUNCTIO !! 64 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
77 color = <LED_COLOR_ID_ <<
78 gpios = <&pm8998_gpios <<
79 linux,default-trigger 65 linux,default-trigger = "phy0tx";
80 default-state = "off"; 66 default-state = "off";
81 }; 67 };
82 68
83 led-2 { !! 69 bt {
84 label = "blue:bt"; 70 label = "blue:bt";
85 function = LED_FUNCTIO !! 71 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
86 color = <LED_COLOR_ID_ <<
87 gpios = <&pm8998_gpios <<
88 linux,default-trigger 72 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 73 default-state = "off";
90 }; 74 };
91 }; 75 };
92 76
93 hdmi-out { <<
94 compatible = "hdmi-connector"; <<
95 type = "a"; <<
96 <<
97 port { <<
98 hdmi_con: endpoint { <<
99 remote-endpoin <<
100 }; <<
101 }; <<
102 }; <<
103 <<
104 reserved-memory { <<
105 /* Cont splash region set up b <<
106 cont_splash_mem: framebuffer@9 <<
107 reg = <0x0 0x9d400000 <<
108 no-map; <<
109 }; <<
110 }; <<
111 <<
112 lt9611_1v8: lt9611-vdd18-regulator { 77 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 78 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 79 regulator-name = "LT9611_1V8";
115 80
116 vin-supply = <&vdc_5v>; 81 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 82 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 83 regulator-max-microvolt = <1800000>;
119 84
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 85 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 86 enable-active-high;
122 }; 87 };
123 88
124 lt9611_3v3: lt9611-3v3 { 89 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 90 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 91 regulator-name = "LT9611_3V3";
127 92
128 vin-supply = <&vdc_3v3>; 93 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 94 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 95 regulator-max-microvolt = <3300000>;
131 96
132 /* !! 97 // TODO: make it possible to drive same GPIO from two clients
133 * TODO: make it possible to d !! 98 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
134 * gpio = <&tlmm 89 GPIO_ACTIV !! 99 // enable-active-high;
135 * enable-active-high; <<
136 */ <<
137 }; 100 };
138 101
139 pcie0_1p05v: pcie-0-1p05v-regulator { 102 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 103 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 104 regulator-name = "PCIE0_1.05V";
142 105
143 vin-supply = <&vbat>; 106 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 107 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 108 regulator-max-microvolt = <1050000>;
146 109
147 /* !! 110 // TODO: make it possible to drive same GPIO from two clients
148 * TODO: make it possible to d !! 111 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
149 * gpio = <&tlmm 90 GPIO_ACTIV !! 112 // enable-active-high;
150 * enable-active-high; <<
151 */ <<
152 }; 113 };
153 114
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator !! 115 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
155 compatible = "regulator-fixed" 116 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 117 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 118 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 119 regulator-max-microvolt = <1200000>;
159 enable-active-high; 120 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ !! 121 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 122 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 123 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 124 vin-supply = <&vbat>;
164 }; 125 };
165 126
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator !! 127 cam0_avdd_2v8: reg_cam0_avdd_2v8 {
167 compatible = "regulator-fixed" 128 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 129 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 130 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 131 regulator-max-microvolt = <2800000>;
171 enable-active-high; 132 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ !! 133 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 134 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 135 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 136 vin-supply = <&vbat>;
176 }; 137 };
177 138
178 /* This regulator is enabled when the 139 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator !! 140 cam3_avdd_2v8: reg_cam3_avdd_2v8 {
180 compatible = "regulator-fixed" 141 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 142 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 143 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 144 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 145 regulator-always-on;
185 vin-supply = <&vbat>; 146 vin-supply = <&vbat>;
186 }; 147 };
187 148
188 pcie0_3p3v_dual: vldo-3v3-regulator { 149 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 150 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 151 regulator-name = "VLDO_3V3";
191 152
192 vin-supply = <&vbat>; 153 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 154 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 155 regulator-max-microvolt = <3300000>;
195 156
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 157 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 158 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 159
205 pinctrl-names = "default"; 160 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 161 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 162 };
208 163
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 164 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 165 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 166 regulator-name = "V5P0_HDMIOUT";
212 167
213 vin-supply = <&vdc_5v>; 168 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 169 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 170 regulator-max-microvolt = <500000>;
216 171
217 /* !! 172 // TODO: make it possible to drive same GPIO from two clients
218 * TODO: make it possible to d !! 173 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
219 * gpio = <&tlmm 89 GPIO_ACTIV !! 174 // enable-active-high;
220 * enable-active-high; <<
221 */ <<
222 }; 175 };
223 176
224 vbat: vbat-regulator { 177 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 178 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 179 regulator-name = "VBAT";
227 180
228 vin-supply = <&dc12v>; 181 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 182 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 183 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 184 regulator-always-on;
232 }; 185 };
233 186
234 vbat_som: vbat-som-regulator { 187 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 188 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 189 regulator-name = "VBAT_SOM";
237 190
238 vin-supply = <&dc12v>; 191 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 192 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 193 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 194 regulator-always-on;
242 }; 195 };
243 196
244 vdc_3v3: vdc-3v3-regulator { 197 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 198 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 199 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 200 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 201 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 202 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 203 regulator-always-on;
251 }; 204 };
252 205
253 vdc_5v: vdc-5v-regulator { 206 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 207 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 208 regulator-name = "VDC_5V";
256 209
257 vin-supply = <&dc12v>; 210 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 211 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 212 regulator-max-microvolt = <500000>;
260 regulator-always-on; 213 regulator-always-on;
261 }; 214 };
262 215
263 vreg_s4a_1p8: vreg-s4a-1p8 { 216 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 217 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 218 regulator-name = "vreg_s4a_1p8";
266 219
267 regulator-min-microvolt = <180 220 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 221 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 222 regulator-always-on;
270 }; 223 };
271 224
272 vph_pwr: vph-pwr-regulator { 225 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 226 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 227 regulator-name = "vph_pwr";
275 228
276 vin-supply = <&vbat_som>; 229 vin-supply = <&vbat_som>;
277 }; 230 };
278 }; 231 };
279 232
280 &adsp_pas { 233 &adsp_pas {
281 status = "okay"; 234 status = "okay";
282 235
283 firmware-name = "qcom/sdm845/adsp.mbn" !! 236 firmware-name = "qcom/sdm845/adsp.mdt";
284 }; 237 };
285 238
286 &apps_rsc { 239 &apps_rsc {
287 regulators-0 { !! 240 pm8998-rpmh-regulators {
288 compatible = "qcom,pm8998-rpmh 241 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 242 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 243 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 244 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 245 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 246 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 247 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 248 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 249 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 250 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 251 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 252 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 253 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 254 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 255 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 256 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 257 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 258 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 259 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 260 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 261 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 262 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 263 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 264 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 265 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 266 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 267 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 268 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 269 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 270
318 vreg_s3a_1p35: smps3 { 271 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 272 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 273 regulator-max-microvolt = <1352000>;
321 }; 274 };
322 275
323 vreg_s5a_2p04: smps5 { 276 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 277 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 278 regulator-max-microvolt = <2040000>;
326 }; 279 };
327 280
328 vreg_s7a_1p025: smps7 { 281 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 282 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 283 regulator-max-microvolt = <1028000>;
331 }; 284 };
332 285
333 vreg_l1a_0p875: ldo1 { 286 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 287 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 288 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 289 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 290 };
338 291
339 vreg_l5a_0p8: ldo5 { 292 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 293 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 294 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 295 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 296 };
344 297
345 vreg_l12a_1p8: ldo12 { 298 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 299 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 300 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 301 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 302 };
350 303
351 vreg_l7a_1p8: ldo7 { 304 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 305 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 306 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 307 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 308 };
356 309
357 vreg_l13a_2p95: ldo13 { 310 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 311 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 312 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 313 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 314 };
362 315
363 vreg_l17a_1p3: ldo17 { 316 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 317 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 318 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 319 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 320 };
368 321
369 vreg_l20a_2p95: ldo20 { 322 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 323 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 324 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 325 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 326 };
374 327
375 vreg_l21a_2p95: ldo21 { 328 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 329 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 330 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 331 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 332 };
380 333
381 vreg_l24a_3p075: ldo24 { 334 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 335 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 336 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 337 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 338 };
386 339
387 vreg_l25a_3p3: ldo25 { 340 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 341 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 342 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 343 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 344 };
392 345
393 vreg_l26a_1p2: ldo26 { 346 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 347 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 348 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 349 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 350 };
398 351
399 vreg_lvs1a_1p8: lvs1 { 352 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 353 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 354 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 355 regulator-always-on;
403 }; 356 };
404 357
405 vreg_lvs2a_1p8: lvs2 { 358 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 359 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 360 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 361 regulator-always-on;
409 }; 362 };
410 }; 363 };
411 364
412 regulators-1 { !! 365 pmi8998-rpmh-regulators {
413 compatible = "qcom,pmi8998-rpm 366 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 367 qcom,pmic-id = "b";
415 368
416 vdd-bob-supply = <&vph_pwr>; 369 vdd-bob-supply = <&vph_pwr>;
417 370
418 vreg_bob: bob { 371 vreg_bob: bob {
419 regulator-min-microvol 372 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 373 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 374 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 375 regulator-allow-bypass;
423 }; 376 };
424 }; 377 };
425 }; 378 };
426 379
427 &camss { <<
428 status = "okay"; <<
429 <<
430 vdda-phy-supply = <&vreg_l1a_0p875>; <<
431 vdda-pll-supply = <&vreg_l26a_1p2>; <<
432 }; <<
433 <<
434 &cdsp_pas { 380 &cdsp_pas {
435 status = "okay"; 381 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" !! 382 firmware-name = "qcom/sdm845/cdsp.mdt";
437 }; 383 };
438 384
439 &gcc { 385 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 386 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 387 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI !! 388 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
443 <GCC_LPASS_Q6_AXI_C <<
444 <GCC_LPASS_SWAY_CLK <<
445 }; <<
446 <<
447 &gmu { <<
448 status = "okay"; <<
449 }; <<
450 <<
451 &gpi_dma0 { <<
452 status = "okay"; <<
453 }; <<
454 <<
455 &gpi_dma1 { <<
456 status = "okay"; <<
457 }; 389 };
458 390
459 &gpu { 391 &gpu {
460 status = "okay"; <<
461 zap-shader { 392 zap-shader {
462 memory-region = <&gpu_mem>; 393 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 394 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 395 };
465 }; 396 };
466 397
467 &i2c10 { <<
468 status = "okay"; <<
469 clock-frequency = <400000>; <<
470 <<
471 lt9611_codec: hdmi-bridge@3b { <<
472 compatible = "lontium,lt9611"; <<
473 reg = <0x3b>; <<
474 #sound-dai-cells = <1>; <<
475 <<
476 interrupts-extended = <&tlmm 8 <<
477 <<
478 reset-gpios = <&tlmm 128 GPIO_ <<
479 <<
480 vdd-supply = <<9611_1v8>; <<
481 vcc-supply = <<9611_3v3>; <<
482 <<
483 pinctrl-names = "default"; <<
484 pinctrl-0 = <<9611_irq_pin>, <<
485 <<
486 ports { <<
487 #address-cells = <1>; <<
488 #size-cells = <0>; <<
489 <<
490 port@0 { <<
491 reg = <0>; <<
492 <<
493 lt9611_a: endp <<
494 remote <<
495 }; <<
496 }; <<
497 <<
498 port@1 { <<
499 reg = <1>; <<
500 <<
501 lt9611_b: endp <<
502 remote <<
503 }; <<
504 }; <<
505 <<
506 port@2 { <<
507 reg = <2>; <<
508 <<
509 lt9611_out: en <<
510 remote <<
511 }; <<
512 }; <<
513 }; <<
514 }; <<
515 }; <<
516 <<
517 &i2c11 { 398 &i2c11 {
518 /* On Low speed expansion */ 399 /* On Low speed expansion */
519 clock-frequency = <100000>; !! 400 label = "LS-I2C1";
520 status = "okay"; 401 status = "okay";
521 }; 402 };
522 403
523 &i2c14 { 404 &i2c14 {
524 /* On Low speed expansion */ 405 /* On Low speed expansion */
525 clock-frequency = <100000>; !! 406 label = "LS-I2C0";
526 status = "okay"; <<
527 }; <<
528 <<
529 &mdss { <<
530 memory-region = <&cont_splash_mem>; <<
531 status = "okay"; <<
532 }; <<
533 <<
534 &mdss_dsi0 { <<
535 status = "okay"; <<
536 vdda-supply = <&vreg_l26a_1p2>; <<
537 <<
538 qcom,dual-dsi-mode; <<
539 qcom,master-dsi; <<
540 <<
541 ports { <<
542 port@1 { <<
543 endpoint { <<
544 remote-endpoin <<
545 data-lanes = < <<
546 }; <<
547 }; <<
548 }; <<
549 }; <<
550 <<
551 &mdss_dsi0_phy { <<
552 status = "okay"; <<
553 vdds-supply = <&vreg_l1a_0p875>; <<
554 }; <<
555 <<
556 &mdss_dsi1 { <<
557 vdda-supply = <&vreg_l26a_1p2>; <<
558 <<
559 qcom,dual-dsi-mode; <<
560 <<
561 /* DSI1 is slave, so use DSI0 clocks * <<
562 assigned-clock-parents = <&mdss_dsi0_p <<
563 <<
564 status = "okay"; <<
565 <<
566 ports { <<
567 port@1 { <<
568 endpoint { <<
569 remote-endpoin <<
570 data-lanes = < <<
571 }; <<
572 }; <<
573 }; <<
574 }; <<
575 <<
576 &mdss_dsi1_phy { <<
577 vdds-supply = <&vreg_l1a_0p875>; <<
578 status = "okay"; 407 status = "okay";
579 }; 408 };
580 409
581 &mss_pil { 410 &mss_pil {
582 status = "okay"; 411 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 412 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 413 };
585 414
586 &pcie0 { 415 &pcie0 {
587 status = "okay"; 416 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO !! 417 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI !! 418 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 419
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 420 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 421
593 pinctrl-names = "default"; 422 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 423 pinctrl-0 = <&pcie0_default_state>;
595 }; 424 };
596 425
597 &pcie0_phy { 426 &pcie0_phy {
598 status = "okay"; 427 status = "okay";
599 428
600 vdda-phy-supply = <&vreg_l1a_0p875>; 429 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 430 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 431 };
603 432
604 &pcie1 { 433 &pcie1 {
605 status = "okay"; 434 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L !! 435 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 436
608 pinctrl-names = "default"; 437 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 438 pinctrl-0 = <&pcie1_default_state>;
610 }; 439 };
611 440
612 &pcie1_phy { 441 &pcie1_phy {
613 status = "okay"; 442 status = "okay";
614 443
615 vdda-phy-supply = <&vreg_l1a_0p875>; 444 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 445 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 446 };
618 447
619 &pm8998_gpios { !! 448 &pm8998_gpio {
620 gpio-line-names = 449 gpio-line-names =
621 "NC", 450 "NC",
622 "NC", 451 "NC",
623 "WLAN_SW_CTRL", 452 "WLAN_SW_CTRL",
624 "NC", 453 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 454 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 455 "VOL_UP_N",
627 "NC", 456 "NC",
628 "ADC_IN1", 457 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 458 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 459 "CAM0_AVDD_EN",
631 "NC", 460 "NC",
632 "CAM0_DVDD_EN", 461 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 462 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 463 "DIV_CLK2",
635 "NC", 464 "NC",
636 "NC", 465 "NC",
637 "NC", 466 "NC",
638 "SMB_STAT", 467 "SMB_STAT",
639 "NC", 468 "NC",
640 "NC", 469 "NC",
641 "ADC_IN2", 470 "ADC_IN2",
642 "OPTION1", 471 "OPTION1",
643 "WCSS_PWR_REQ", 472 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 473 "PM845_GPIO24",
645 "OPTION2", 474 "OPTION2",
646 "PM845_SLB"; 475 "PM845_SLB";
647 476
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v !! 477 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
649 pins = "gpio12"; 478 pins = "gpio12";
650 function = "normal"; 479 function = "normal";
651 480
652 bias-pull-up; 481 bias-pull-up;
653 drive-push-pull; 482 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 483 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 484 };
656 485
657 cam0_avdd_2v8_en_default: cam0-avdd-2v !! 486 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
658 pins = "gpio10"; 487 pins = "gpio10";
659 function = "normal"; 488 function = "normal";
660 489
661 bias-pull-up; 490 bias-pull-up;
662 drive-push-pull; 491 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 492 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 493 };
665 494
666 vol_up_pin_a: vol-up-active-state { !! 495 vol_up_pin_a: vol-up-active {
667 pins = "gpio6"; 496 pins = "gpio6";
668 function = "normal"; 497 function = "normal";
669 input-enable; 498 input-enable;
670 bias-pull-up; 499 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 500 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 501 };
673 }; 502 };
674 503
675 &pm8998_resin { !! 504 &pm8998_pon {
676 linux,code = <KEY_VOLUMEDOWN>; !! 505 resin {
677 status = "okay"; !! 506 compatible = "qcom,pm8941-resin";
678 }; !! 507 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
679 !! 508 debounce = <15625>;
680 &pmi8998_lpg { !! 509 bias-pull-up;
681 status = "okay"; !! 510 linux,code = <KEY_VOLUMEDOWN>;
682 <<
683 qcom,power-source = <1>; <<
684 <<
685 led@3 { <<
686 reg = <3>; <<
687 color = <LED_COLOR_ID_GREEN>; <<
688 function = LED_FUNCTION_HEARTB <<
689 function-enumerator = <3>; <<
690 <<
691 linux,default-trigger = "heart <<
692 default-state = "on"; <<
693 }; <<
694 <<
695 led@4 { <<
696 reg = <4>; <<
697 color = <LED_COLOR_ID_GREEN>; <<
698 function = LED_FUNCTION_INDICA <<
699 function-enumerator = <2>; <<
700 }; <<
701 <<
702 led@5 { <<
703 reg = <5>; <<
704 color = <LED_COLOR_ID_GREEN>; <<
705 function = LED_FUNCTION_INDICA <<
706 function-enumerator = <1>; <<
707 }; 511 };
708 }; 512 };
709 513
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 514 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 515 &q6afedai {
712 dai@22 { !! 516 qi2s@22 {
713 reg = <QUATERNARY_MI2S_RX>; !! 517 reg = <22>;
714 qcom,sd-lines = <0 1 2 3>; 518 qcom,sd-lines = <0 1 2 3>;
715 }; 519 };
716 }; 520 };
717 521
718 &q6asmdai { 522 &q6asmdai {
719 dai@0 { 523 dai@0 {
720 reg = <0>; 524 reg = <0>;
721 }; 525 };
722 526
723 dai@1 { 527 dai@1 {
724 reg = <1>; 528 reg = <1>;
725 }; 529 };
726 530
727 dai@2 { 531 dai@2 {
728 reg = <2>; 532 reg = <2>;
729 }; 533 };
730 534
731 dai@3 { 535 dai@3 {
732 reg = <3>; 536 reg = <3>;
733 direction = <2>; 537 direction = <2>;
734 is-compress-dai; 538 is-compress-dai;
735 }; 539 };
736 }; 540 };
737 541
738 &qupv3_id_0 { 542 &qupv3_id_0 {
739 status = "okay"; 543 status = "okay";
740 }; 544 };
741 545
742 &qupv3_id_1 { 546 &qupv3_id_1 {
743 status = "okay"; 547 status = "okay";
744 }; 548 };
745 549
746 &sdhc_2 { 550 &sdhc_2 {
747 status = "okay"; 551 status = "okay";
748 552
749 pinctrl-names = "default"; 553 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 554 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 555
752 vmmc-supply = <&vreg_l21a_2p95>; 556 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 557 vqmmc-supply = <&vreg_l13a_2p95>;
754 558
755 bus-width = <4>; 559 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 560 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 561 };
758 562
759 &sound { 563 &sound {
760 compatible = "qcom,db845c-sndcard", "q !! 564 compatible = "qcom,db845c-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 565 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 566 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 567 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 568 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 569 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 570 pinctrl-names = "default";
767 model = "DB845c"; 571 model = "DB845c";
768 audio-routing = 572 audio-routing =
769 "RX_BIAS", "MCLK", 573 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 574 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 575 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 576 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 577 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 578 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 579 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 580 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 581 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 582 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 583 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 584 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 585 "MultiMedia3 Capture", "MM_UL3";
782 586
783 mm1-dai-link { 587 mm1-dai-link {
784 link-name = "MultiMedia1"; 588 link-name = "MultiMedia1";
785 cpu { 589 cpu {
786 sound-dai = <&q6asmdai 590 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 591 };
788 }; 592 };
789 593
790 mm2-dai-link { 594 mm2-dai-link {
791 link-name = "MultiMedia2"; 595 link-name = "MultiMedia2";
792 cpu { 596 cpu {
793 sound-dai = <&q6asmdai 597 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 598 };
795 }; 599 };
796 600
797 mm3-dai-link { 601 mm3-dai-link {
798 link-name = "MultiMedia3"; 602 link-name = "MultiMedia3";
799 cpu { 603 cpu {
800 sound-dai = <&q6asmdai 604 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 605 };
802 }; 606 };
803 607
804 mm4-dai-link { 608 mm4-dai-link {
805 link-name = "MultiMedia4"; 609 link-name = "MultiMedia4";
806 cpu { 610 cpu {
807 sound-dai = <&q6asmdai 611 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 612 };
809 }; 613 };
810 614
811 hdmi-dai-link { <<
812 link-name = "HDMI Playback"; <<
813 cpu { <<
814 sound-dai = <&q6afedai <<
815 }; <<
816 <<
817 platform { <<
818 sound-dai = <&q6routin <<
819 }; <<
820 <<
821 codec { <<
822 sound-dai = <<9611_c <<
823 }; <<
824 }; <<
825 <<
826 slim-dai-link { 615 slim-dai-link {
827 link-name = "SLIM Playback"; 616 link-name = "SLIM Playback";
828 cpu { 617 cpu {
829 sound-dai = <&q6afedai 618 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 619 };
831 620
832 platform { 621 platform {
833 sound-dai = <&q6routin 622 sound-dai = <&q6routing>;
834 }; 623 };
835 624
836 codec { 625 codec {
837 sound-dai = <&left_spk !! 626 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 627 };
839 }; 628 };
840 629
841 slimcap-dai-link { 630 slimcap-dai-link {
842 link-name = "SLIM Capture"; 631 link-name = "SLIM Capture";
843 cpu { 632 cpu {
844 sound-dai = <&q6afedai 633 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 634 };
846 635
847 platform { 636 platform {
848 sound-dai = <&q6routin 637 sound-dai = <&q6routing>;
849 }; 638 };
850 639
851 codec { 640 codec {
852 sound-dai = <&wcd9340 641 sound-dai = <&wcd9340 1>;
853 }; 642 };
854 }; 643 };
855 }; 644 };
856 645
857 &spi0 { <<
858 status = "okay"; <<
859 pinctrl-names = "default"; <<
860 pinctrl-0 = <&qup_spi0_default>; <<
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; <<
862 <<
863 can@0 { <<
864 compatible = "microchip,mcp251 <<
865 reg = <0>; <<
866 clocks = <&clk40M>; <<
867 interrupts-extended = <&tlmm 1 <<
868 spi-max-frequency = <10000000> <<
869 vdd-supply = <&vdc_5v>; <<
870 xceiver-supply = <&vdc_5v>; <<
871 }; <<
872 }; <<
873 <<
874 &spi2 { 646 &spi2 {
875 /* On Low speed expansion */ 647 /* On Low speed expansion */
>> 648 label = "LS-SPI0";
876 status = "okay"; 649 status = "okay";
877 }; 650 };
878 651
879 &tlmm { 652 &tlmm {
880 cam0_default: cam0-default-state { !! 653 cam0_default: cam0_default {
881 rst-pins { !! 654 rst {
882 pins = "gpio9"; 655 pins = "gpio9";
883 function = "gpio"; 656 function = "gpio";
884 657
885 drive-strength = <16>; 658 drive-strength = <16>;
886 bias-disable; 659 bias-disable;
887 }; 660 };
888 661
889 mclk0-pins { !! 662 mclk0 {
890 pins = "gpio13"; 663 pins = "gpio13";
891 function = "cam_mclk"; 664 function = "cam_mclk";
892 665
893 drive-strength = <16>; 666 drive-strength = <16>;
894 bias-disable; 667 bias-disable;
895 }; 668 };
896 }; 669 };
897 670
898 cam3_default: cam3-default-state { !! 671 cam3_default: cam3_default {
899 rst-pins { !! 672 rst {
900 function = "gpio"; 673 function = "gpio";
901 pins = "gpio21"; 674 pins = "gpio21";
902 675
903 drive-strength = <16>; 676 drive-strength = <16>;
904 bias-disable; 677 bias-disable;
905 }; 678 };
906 679
907 mclk3-pins { !! 680 mclk3 {
908 function = "cam_mclk"; 681 function = "cam_mclk";
909 pins = "gpio16"; 682 pins = "gpio16";
910 683
911 drive-strength = <16>; 684 drive-strength = <16>;
912 bias-disable; 685 bias-disable;
913 }; 686 };
914 }; 687 };
915 688
916 dsi_sw_sel: dsi-sw-sel-state { !! 689 pcie0_default_state: pcie0-default {
917 pins = "gpio120"; !! 690 clkreq {
918 function = "gpio"; <<
919 <<
920 drive-strength = <2>; <<
921 bias-disable; <<
922 output-high; <<
923 }; <<
924 <<
925 lt9611_irq_pin: lt9611-irq-state { <<
926 pins = "gpio84"; <<
927 function = "gpio"; <<
928 bias-disable; <<
929 }; <<
930 <<
931 pcie0_default_state: pcie0-default-sta <<
932 clkreq-pins { <<
933 pins = "gpio36"; 691 pins = "gpio36";
934 function = "pci_e0"; 692 function = "pci_e0";
935 bias-pull-up; 693 bias-pull-up;
936 }; 694 };
937 695
938 reset-n-pins { !! 696 reset-n {
939 pins = "gpio35"; 697 pins = "gpio35";
940 function = "gpio"; 698 function = "gpio";
941 699
942 drive-strength = <2>; 700 drive-strength = <2>;
943 output-low; 701 output-low;
944 bias-pull-down; 702 bias-pull-down;
945 }; 703 };
946 704
947 wake-n-pins { !! 705 wake-n {
948 pins = "gpio37"; 706 pins = "gpio37";
949 function = "gpio"; 707 function = "gpio";
950 708
951 drive-strength = <2>; 709 drive-strength = <2>;
952 bias-pull-up; 710 bias-pull-up;
953 }; 711 };
954 }; 712 };
955 713
956 pcie0_pwren_state: pcie0-pwren-state { !! 714 pcie0_pwren_state: pcie0-pwren {
957 pins = "gpio90"; 715 pins = "gpio90";
958 function = "gpio"; 716 function = "gpio";
959 717
960 drive-strength = <2>; 718 drive-strength = <2>;
961 bias-disable; 719 bias-disable;
962 }; 720 };
963 721
964 pcie1_default_state: pcie1-default-sta !! 722 pcie1_default_state: pcie1-default {
965 perst-n-pins { !! 723 perst-n {
966 pins = "gpio102"; 724 pins = "gpio102";
967 function = "gpio"; 725 function = "gpio";
968 726
969 drive-strength = <16>; 727 drive-strength = <16>;
970 bias-disable; 728 bias-disable;
971 }; 729 };
972 730
973 clkreq-pins { !! 731 clkreq {
974 pins = "gpio103"; 732 pins = "gpio103";
975 function = "pci_e1"; 733 function = "pci_e1";
976 bias-pull-up; 734 bias-pull-up;
977 }; 735 };
978 736
979 wake-n-pins { !! 737 wake-n {
980 pins = "gpio11"; 738 pins = "gpio11";
981 function = "gpio"; 739 function = "gpio";
982 740
983 drive-strength = <2>; 741 drive-strength = <2>;
984 bias-pull-up; 742 bias-pull-up;
985 }; 743 };
986 744
987 reset-n-pins { !! 745 reset-n {
988 pins = "gpio75"; 746 pins = "gpio75";
989 function = "gpio"; 747 function = "gpio";
990 748
991 drive-strength = <16>; 749 drive-strength = <16>;
992 bias-pull-up; 750 bias-pull-up;
993 output-high; 751 output-high;
994 }; 752 };
995 }; 753 };
996 754
997 sdc2_default_state: sdc2-default-state !! 755 sdc2_default_state: sdc2-default {
998 clk-pins { !! 756 clk {
999 pins = "sdc2_clk"; 757 pins = "sdc2_clk";
1000 bias-disable; 758 bias-disable;
1001 759
1002 /* 760 /*
1003 * It seems that mmc_ 761 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 762 * strength is not 16 on clk, cmd, and data pins.
1005 */ 763 */
1006 drive-strength = <16> 764 drive-strength = <16>;
1007 }; 765 };
1008 766
1009 cmd-pins { !! 767 cmd {
1010 pins = "sdc2_cmd"; 768 pins = "sdc2_cmd";
1011 bias-pull-up; 769 bias-pull-up;
1012 drive-strength = <10> 770 drive-strength = <10>;
1013 }; 771 };
1014 772
1015 data-pins { !! 773 data {
1016 pins = "sdc2_data"; 774 pins = "sdc2_data";
1017 bias-pull-up; 775 bias-pull-up;
1018 drive-strength = <10> 776 drive-strength = <10>;
1019 }; 777 };
1020 }; 778 };
1021 779
1022 sdc2_card_det_n: sd-card-det-n-state !! 780 sdc2_card_det_n: sd-card-det-n {
1023 pins = "gpio126"; 781 pins = "gpio126";
1024 function = "gpio"; 782 function = "gpio";
1025 bias-pull-up; 783 bias-pull-up;
1026 }; 784 };
>> 785
>> 786 wcd_intr_default: wcd_intr_default {
>> 787 pins = <54>;
>> 788 function = "gpio";
>> 789
>> 790 input-enable;
>> 791 bias-pull-down;
>> 792 drive-strength = <2>;
>> 793 };
1027 }; 794 };
1028 795
1029 &uart3 { 796 &uart3 {
1030 label = "LS-UART0"; 797 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; <<
1032 <<
1033 status = "disabled"; 798 status = "disabled";
1034 }; 799 };
1035 800
1036 &uart6 { 801 &uart6 {
1037 status = "okay"; 802 status = "okay";
1038 803
1039 pinctrl-0 = <&qup_uart6_4pin>; <<
1040 <<
1041 bluetooth { 804 bluetooth {
1042 compatible = "qcom,wcn3990-bt 805 compatible = "qcom,wcn3990-bt";
1043 806
1044 vddio-supply = <&vreg_s4a_1p8 807 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 808 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 809 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 810 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 811 max-speed = <3200000>;
1049 }; 812 };
1050 }; 813 };
1051 814
1052 &uart9 { 815 &uart9 {
1053 label = "LS-UART1"; 816 label = "LS-UART1";
1054 status = "okay"; 817 status = "okay";
1055 }; 818 };
1056 819
1057 &usb_1 { 820 &usb_1 {
1058 status = "okay"; 821 status = "okay";
1059 }; 822 };
1060 823
1061 &usb_1_dwc3 { 824 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 825 dr_mode = "peripheral";
1063 }; 826 };
1064 827
1065 &usb_1_hsphy { 828 &usb_1_hsphy {
1066 status = "okay"; 829 status = "okay";
1067 830
1068 vdd-supply = <&vreg_l1a_0p875>; 831 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 832 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 833 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 834
1072 qcom,imp-res-offset-value = <8>; 835 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 836 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 837 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 838 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 839 };
1077 840
1078 &usb_1_qmpphy { 841 &usb_1_qmpphy {
1079 status = "okay"; 842 status = "okay";
1080 843
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 844 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 845 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 846 };
1084 847
1085 &usb_2 { 848 &usb_2 {
1086 status = "okay"; 849 status = "okay";
1087 }; 850 };
1088 851
1089 &usb_2_dwc3 { 852 &usb_2_dwc3 {
1090 dr_mode = "host"; 853 dr_mode = "host";
1091 }; 854 };
1092 855
1093 &usb_2_hsphy { 856 &usb_2_hsphy {
1094 status = "okay"; 857 status = "okay";
1095 858
1096 vdd-supply = <&vreg_l1a_0p875>; 859 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 860 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 861 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 862
1100 qcom,imp-res-offset-value = <8>; 863 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 864 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 865 };
1103 866
1104 &usb_2_qmpphy { 867 &usb_2_qmpphy {
1105 status = "okay"; 868 status = "okay";
1106 869
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 870 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 871 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 872 };
1110 873
1111 &ufs_mem_hc { 874 &ufs_mem_hc {
1112 status = "okay"; 875 status = "okay";
1113 876
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 877 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 878
1116 vcc-supply = <&vreg_l20a_2p95>; 879 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 880 vcc-max-microamp = <800000>;
1118 }; 881 };
1119 882
1120 &ufs_mem_phy { 883 &ufs_mem_phy {
1121 status = "okay"; 884 status = "okay";
1122 885
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 886 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 887 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 888 };
1126 889
1127 &venus { !! 890 &wcd9340{
1128 status = "okay"; !! 891 pinctrl-0 = <&wcd_intr_default>;
1129 }; !! 892 pinctrl-names = "default";
1130 !! 893 clock-names = "extclk";
1131 &wcd9340 { !! 894 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H !! 895 reset-gpios = <&tlmm 64 0>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 896 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 897 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 898 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 899 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 900 vdd-io-supply = <&vreg_s4a_1p8>;
1138 901
1139 swm: soundwire@c85 { !! 902 swm: swm@c85 {
1140 left_spkr: speaker@0,1 { !! 903 left_spkr: wsa8810-left{
1141 compatible = "sdw1021 904 compatible = "sdw10217201000";
1142 reg = <0 1>; 905 reg = <0 1>;
1143 powerdown-gpios = <&w !! 906 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 907 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 908 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 909 #sound-dai-cells = <0>;
1147 }; 910 };
1148 911
1149 right_spkr: speaker@0,2 { !! 912 right_spkr: wsa8810-right{
1150 compatible = "sdw1021 913 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w !! 914 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 915 reg = <0 2>;
1153 #thermal-sensor-cells 916 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 917 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 918 #sound-dai-cells = <0>;
1156 }; 919 };
1157 }; 920 };
1158 }; 921 };
1159 922
1160 &wifi { 923 &wifi {
1161 status = "okay"; 924 status = "okay";
1162 925
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 926 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 927 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 928 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 929 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 930
1168 qcom,snoc-host-cap-8bit-quirk; 931 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th <<
1170 }; 932 };
1171 933
1172 /* PINCTRL - additions to nodes defined in sd 934 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 935 &qup_spi2_default {
1174 drive-strength = <16>; 936 drive-strength = <16>;
1175 }; 937 };
1176 938
1177 &qup_i2c10_default { !! 939 &qup_uart3_default{
1178 drive-strength = <2>; !! 940 pinmux {
1179 bias-disable; !! 941 pins = "gpio41", "gpio42", "gpio43", "gpio44";
>> 942 function = "qup3";
>> 943 };
1180 }; 944 };
1181 945
1182 &qup_uart9_rx { !! 946 &qup_uart6_default {
1183 drive-strength = <2>; !! 947 pinmux {
1184 bias-pull-up; !! 948 pins = "gpio45", "gpio46", "gpio47", "gpio48";
>> 949 function = "qup6";
>> 950 };
>> 951
>> 952 cts {
>> 953 pins = "gpio45";
>> 954 bias-disable;
>> 955 };
>> 956
>> 957 rts-tx {
>> 958 pins = "gpio46", "gpio47";
>> 959 drive-strength = <2>;
>> 960 bias-disable;
>> 961 };
>> 962
>> 963 rx {
>> 964 pins = "gpio48";
>> 965 bias-pull-up;
>> 966 };
>> 967 };
>> 968
>> 969 &qup_uart9_default {
>> 970 pinconf-tx {
>> 971 pins = "gpio4";
>> 972 drive-strength = <2>;
>> 973 bias-disable;
>> 974 };
>> 975
>> 976 pinconf-rx {
>> 977 pins = "gpio5";
>> 978 drive-strength = <2>;
>> 979 bias-pull-up;
>> 980 };
1185 }; 981 };
1186 982
1187 &qup_uart9_tx { !! 983 &pm8998_gpio {
1188 drive-strength = <2>; !! 984
1189 bias-disable; <<
1190 }; 985 };
1191 986
1192 /* PINCTRL - additions to nodes defined in sd !! 987 &cci {
1193 &qup_spi0_default { !! 988 status = "ok";
1194 drive-strength = <6>; !! 989 };
1195 bias-disable; !! 990
>> 991 &cci_i2c0 {
>> 992 camera@10 {
>> 993 compatible = "ovti,ov8856";
>> 994 reg = <0x10>;
>> 995
>> 996 // CAM0_RST_N
>> 997 reset-gpios = <&tlmm 9 0>;
>> 998 pinctrl-names = "default";
>> 999 pinctrl-0 = <&cam0_default>;
>> 1000 gpios = <&tlmm 13 0>,
>> 1001 <&tlmm 9 0>;
>> 1002
>> 1003 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
>> 1004 clock-names = "xvclk";
>> 1005 clock-frequency = <19200000>;
>> 1006
>> 1007 /* The &vreg_s4a_1p8 trace is powered on as a,
>> 1008 * so it is represented by a fixed regulator.
>> 1009 *
>> 1010 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
>> 1011 * both have to be enabled through the power management
>> 1012 * gpios.
>> 1013 */
>> 1014 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1015
>> 1016 dovdd-supply = <&vreg_lvs1a_1p8>;
>> 1017 avdd-supply = <&cam0_avdd_2v8>;
>> 1018 dvdd-supply = <&cam0_dvdd_1v2>;
>> 1019
>> 1020 status = "disable";
>> 1021
>> 1022 port {
>> 1023 ov8856_ep: endpoint {
>> 1024 clock-lanes = <1>;
>> 1025 link-frequencies = /bits/ 64
>> 1026 <360000000 180000000>;
>> 1027 data-lanes = <1 2 3 4>;
>> 1028 // remote-endpoint = <&csiphy0_ep>;
>> 1029 };
>> 1030 };
>> 1031 };
>> 1032 };
>> 1033
>> 1034 &cci_i2c1 {
>> 1035 camera@60 {
>> 1036 compatible = "ovti,ov7251";
>> 1037
>> 1038 // I2C address as per ov7251.txt linux documentation
>> 1039 reg = <0x60>;
>> 1040
>> 1041 // CAM3_RST_N
>> 1042 enable-gpios = <&tlmm 21 0>;
>> 1043 pinctrl-names = "default";
>> 1044 pinctrl-0 = <&cam3_default>;
>> 1045 gpios = <&tlmm 16 0>,
>> 1046 <&tlmm 21 0>;
>> 1047
>> 1048 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
>> 1049 clock-names = "xclk";
>> 1050 clock-frequency = <24000000>;
>> 1051
>> 1052 /* The &vreg_s4a_1p8 trace always powered on.
>> 1053 *
>> 1054 * The 2.8V vdda-supply regulator is enabled when the
>> 1055 * vreg_s4a_1p8 trace is pulled high.
>> 1056 * It too is represented by a fixed regulator.
>> 1057 *
>> 1058 * No 1.2V vddd-supply regulator is used.
>> 1059 */
>> 1060 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1061
>> 1062 vdddo-supply = <&vreg_lvs1a_1p8>;
>> 1063 vdda-supply = <&cam3_avdd_2v8>;
>> 1064
>> 1065 status = "disable";
>> 1066
>> 1067 port {
>> 1068 ov7251_ep: endpoint {
>> 1069 clock-lanes = <1>;
>> 1070 data-lanes = <0 1>;
>> 1071 // remote-endpoint = <&csiphy3_ep>;
>> 1072 };
>> 1073 };
>> 1074 };
1196 }; 1075 };
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