1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> !! 8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 13 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" <<
15 #include "pm8998.dtsi" 14 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 15 #include "pmi8998.dtsi"
17 16
18 / { 17 / {
19 model = "Thundercomm Dragonboard 845c" 18 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 19 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; <<
22 qcom,board-id = <8 0>; <<
23 20
24 aliases { 21 aliases {
25 serial0 = &uart9; 22 serial0 = &uart9;
26 serial1 = &uart6; !! 23 hsuart0 = &uart6;
27 }; 24 };
28 25
29 chosen { 26 chosen {
30 stdout-path = "serial0:115200n 27 stdout-path = "serial0:115200n8";
31 }; 28 };
32 29
33 /* Fixed crystal oscillator dedicated <<
34 clk40M: can-clock { <<
35 compatible = "fixed-clock"; <<
36 #clock-cells = <0>; <<
37 clock-frequency = <40000000>; <<
38 }; <<
39 <<
40 dc12v: dc12v-regulator { 30 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 31 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 32 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 33 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 34 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 35 regulator-always-on;
46 }; 36 };
47 37
48 gpio-keys { !! 38 gpio_keys {
49 compatible = "gpio-keys"; 39 compatible = "gpio-keys";
50 autorepeat; 40 autorepeat;
51 41
52 pinctrl-names = "default"; 42 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 43 pinctrl-0 = <&vol_up_pin_a>;
54 44
55 key-vol-up { !! 45 vol-up {
56 label = "Volume Up"; 46 label = "Volume Up";
57 linux,code = <KEY_VOLU 47 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios !! 48 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
59 }; 49 };
60 }; 50 };
61 51
62 leds { 52 leds {
63 compatible = "gpio-leds"; 53 compatible = "gpio-leds";
64 54
65 led-0 { !! 55 user4 {
66 label = "green:user4"; 56 label = "green:user4";
67 function = LED_FUNCTIO !! 57 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
68 color = <LED_COLOR_ID_ !! 58 linux,default-trigger = "panic-indicator";
69 gpios = <&pm8998_gpios <<
70 default-state = "off"; 59 default-state = "off";
71 panic-indicator; <<
72 }; 60 };
73 61
74 led-1 { !! 62 wlan {
75 label = "yellow:wlan"; 63 label = "yellow:wlan";
76 function = LED_FUNCTIO !! 64 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
77 color = <LED_COLOR_ID_ <<
78 gpios = <&pm8998_gpios <<
79 linux,default-trigger 65 linux,default-trigger = "phy0tx";
80 default-state = "off"; 66 default-state = "off";
81 }; 67 };
82 68
83 led-2 { !! 69 bt {
84 label = "blue:bt"; 70 label = "blue:bt";
85 function = LED_FUNCTIO !! 71 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
86 color = <LED_COLOR_ID_ <<
87 gpios = <&pm8998_gpios <<
88 linux,default-trigger 72 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 73 default-state = "off";
90 }; 74 };
91 }; 75 };
92 76
93 hdmi-out { 77 hdmi-out {
94 compatible = "hdmi-connector"; 78 compatible = "hdmi-connector";
95 type = "a"; 79 type = "a";
96 80
97 port { 81 port {
98 hdmi_con: endpoint { 82 hdmi_con: endpoint {
99 remote-endpoin 83 remote-endpoint = <<9611_out>;
100 }; 84 };
101 }; 85 };
102 }; 86 };
103 87
104 reserved-memory { <<
105 /* Cont splash region set up b <<
106 cont_splash_mem: framebuffer@9 <<
107 reg = <0x0 0x9d400000 <<
108 no-map; <<
109 }; <<
110 }; <<
111 <<
112 lt9611_1v8: lt9611-vdd18-regulator { 88 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 89 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 90 regulator-name = "LT9611_1V8";
115 91
116 vin-supply = <&vdc_5v>; 92 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 93 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 94 regulator-max-microvolt = <1800000>;
119 95
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 96 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 97 enable-active-high;
122 }; 98 };
123 99
124 lt9611_3v3: lt9611-3v3 { 100 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 101 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 102 regulator-name = "LT9611_3V3";
127 103
128 vin-supply = <&vdc_3v3>; 104 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 105 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 106 regulator-max-microvolt = <3300000>;
131 107
132 /* !! 108 // TODO: make it possible to drive same GPIO from two clients
133 * TODO: make it possible to d !! 109 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
134 * gpio = <&tlmm 89 GPIO_ACTIV !! 110 // enable-active-high;
135 * enable-active-high; <<
136 */ <<
137 }; 111 };
138 112
139 pcie0_1p05v: pcie-0-1p05v-regulator { 113 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 114 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 115 regulator-name = "PCIE0_1.05V";
142 116
143 vin-supply = <&vbat>; 117 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 118 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 119 regulator-max-microvolt = <1050000>;
146 120
147 /* !! 121 // TODO: make it possible to drive same GPIO from two clients
148 * TODO: make it possible to d !! 122 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
149 * gpio = <&tlmm 90 GPIO_ACTIV !! 123 // enable-active-high;
150 * enable-active-high; <<
151 */ <<
152 }; 124 };
153 125
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator !! 126 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
155 compatible = "regulator-fixed" 127 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 128 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 129 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 130 regulator-max-microvolt = <1200000>;
159 enable-active-high; 131 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ !! 132 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 133 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 134 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 135 vin-supply = <&vbat>;
164 }; 136 };
165 137
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator !! 138 cam0_avdd_2v8: reg_cam0_avdd_2v8 {
167 compatible = "regulator-fixed" 139 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 140 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 141 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 142 regulator-max-microvolt = <2800000>;
171 enable-active-high; 143 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ !! 144 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 145 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 146 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 147 vin-supply = <&vbat>;
176 }; 148 };
177 149
178 /* This regulator is enabled when the 150 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator !! 151 cam3_avdd_2v8: reg_cam3_avdd_2v8 {
180 compatible = "regulator-fixed" 152 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 153 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 154 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 155 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 156 regulator-always-on;
185 vin-supply = <&vbat>; 157 vin-supply = <&vbat>;
186 }; 158 };
187 159
188 pcie0_3p3v_dual: vldo-3v3-regulator { 160 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 161 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 162 regulator-name = "VLDO_3V3";
191 163
192 vin-supply = <&vbat>; 164 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 165 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 166 regulator-max-microvolt = <3300000>;
195 167
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 168 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 169 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 170
205 pinctrl-names = "default"; 171 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 172 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 173 };
208 174
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 175 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 176 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 177 regulator-name = "V5P0_HDMIOUT";
212 178
213 vin-supply = <&vdc_5v>; 179 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 180 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 181 regulator-max-microvolt = <500000>;
216 182
217 /* !! 183 // TODO: make it possible to drive same GPIO from two clients
218 * TODO: make it possible to d !! 184 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
219 * gpio = <&tlmm 89 GPIO_ACTIV !! 185 // enable-active-high;
220 * enable-active-high; <<
221 */ <<
222 }; 186 };
223 187
224 vbat: vbat-regulator { 188 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 189 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 190 regulator-name = "VBAT";
227 191
228 vin-supply = <&dc12v>; 192 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 193 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 194 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 195 regulator-always-on;
232 }; 196 };
233 197
234 vbat_som: vbat-som-regulator { 198 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 199 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 200 regulator-name = "VBAT_SOM";
237 201
238 vin-supply = <&dc12v>; 202 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 203 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 204 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 205 regulator-always-on;
242 }; 206 };
243 207
244 vdc_3v3: vdc-3v3-regulator { 208 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 209 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 210 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 211 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 212 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 213 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 214 regulator-always-on;
251 }; 215 };
252 216
253 vdc_5v: vdc-5v-regulator { 217 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 218 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 219 regulator-name = "VDC_5V";
256 220
257 vin-supply = <&dc12v>; 221 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 222 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 223 regulator-max-microvolt = <500000>;
260 regulator-always-on; 224 regulator-always-on;
261 }; 225 };
262 226
263 vreg_s4a_1p8: vreg-s4a-1p8 { 227 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 228 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 229 regulator-name = "vreg_s4a_1p8";
266 230
267 regulator-min-microvolt = <180 231 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 232 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 233 regulator-always-on;
270 }; 234 };
271 235
272 vph_pwr: vph-pwr-regulator { 236 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 237 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 238 regulator-name = "vph_pwr";
275 239
276 vin-supply = <&vbat_som>; 240 vin-supply = <&vbat_som>;
277 }; 241 };
278 }; 242 };
279 243
280 &adsp_pas { 244 &adsp_pas {
281 status = "okay"; 245 status = "okay";
282 246
283 firmware-name = "qcom/sdm845/adsp.mbn" !! 247 firmware-name = "qcom/sdm845/adsp.mdt";
284 }; 248 };
285 249
286 &apps_rsc { 250 &apps_rsc {
287 regulators-0 { !! 251 pm8998-rpmh-regulators {
288 compatible = "qcom,pm8998-rpmh 252 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 253 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 254 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 255 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 256 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 257 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 258 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 259 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 260 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 261 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 262 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 263 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 264 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 265 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 266 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 267 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 268 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 269 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 270 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 271 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 272 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 273 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 274 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 275 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 276 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 277 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 278 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 279 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 280 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 281
318 vreg_s3a_1p35: smps3 { 282 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 283 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 284 regulator-max-microvolt = <1352000>;
321 }; 285 };
322 286
323 vreg_s5a_2p04: smps5 { 287 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 288 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 289 regulator-max-microvolt = <2040000>;
326 }; 290 };
327 291
328 vreg_s7a_1p025: smps7 { 292 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 293 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 294 regulator-max-microvolt = <1028000>;
331 }; 295 };
332 296
333 vreg_l1a_0p875: ldo1 { 297 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 298 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 299 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 300 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 301 };
338 302
339 vreg_l5a_0p8: ldo5 { 303 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 304 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 305 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 306 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 307 };
344 308
345 vreg_l12a_1p8: ldo12 { 309 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 310 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 311 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 312 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 313 };
350 314
351 vreg_l7a_1p8: ldo7 { 315 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 316 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 317 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 318 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 319 };
356 320
357 vreg_l13a_2p95: ldo13 { 321 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 322 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 323 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 324 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 325 };
362 326
363 vreg_l17a_1p3: ldo17 { 327 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 328 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 329 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 331 };
368 332
369 vreg_l20a_2p95: ldo20 { 333 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 334 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 335 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 336 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 337 };
374 338
375 vreg_l21a_2p95: ldo21 { 339 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 340 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 341 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 343 };
380 344
381 vreg_l24a_3p075: ldo24 { 345 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 346 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 347 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 349 };
386 350
387 vreg_l25a_3p3: ldo25 { 351 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 352 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 353 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 355 };
392 356
393 vreg_l26a_1p2: ldo26 { 357 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 358 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 359 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 361 };
398 362
399 vreg_lvs1a_1p8: lvs1 { 363 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 364 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 365 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 366 regulator-always-on;
403 }; 367 };
404 368
405 vreg_lvs2a_1p8: lvs2 { 369 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 370 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 371 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 372 regulator-always-on;
409 }; 373 };
410 }; 374 };
411 375
412 regulators-1 { !! 376 pmi8998-rpmh-regulators {
413 compatible = "qcom,pmi8998-rpm 377 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 378 qcom,pmic-id = "b";
415 379
416 vdd-bob-supply = <&vph_pwr>; 380 vdd-bob-supply = <&vph_pwr>;
417 381
418 vreg_bob: bob { 382 vreg_bob: bob {
419 regulator-min-microvol 383 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 384 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 385 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 386 regulator-allow-bypass;
423 }; 387 };
424 }; 388 };
425 }; 389 };
426 390
427 &camss { <<
428 status = "okay"; <<
429 <<
430 vdda-phy-supply = <&vreg_l1a_0p875>; <<
431 vdda-pll-supply = <&vreg_l26a_1p2>; <<
432 }; <<
433 <<
434 &cdsp_pas { 391 &cdsp_pas {
435 status = "okay"; 392 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" !! 393 firmware-name = "qcom/sdm845/cdsp.mdt";
437 }; 394 };
438 395
439 &gcc { !! 396 &dsi0 {
440 protected-clocks = <GCC_QSPI_CORE_CLK> <<
441 <GCC_QSPI_CORE_CLK_ <<
442 <GCC_QSPI_CNOC_PERI <<
443 <GCC_LPASS_Q6_AXI_C <<
444 <GCC_LPASS_SWAY_CLK <<
445 }; <<
446 <<
447 &gmu { <<
448 status = "okay"; 397 status = "okay";
>> 398 vdda-supply = <&vreg_l26a_1p2>;
>> 399
>> 400 ports {
>> 401 port@1 {
>> 402 endpoint {
>> 403 remote-endpoint = <<9611_a>;
>> 404 data-lanes = <0 1 2 3>;
>> 405 };
>> 406 };
>> 407 };
449 }; 408 };
450 409
451 &gpi_dma0 { !! 410 &dsi0_phy {
452 status = "okay"; 411 status = "okay";
>> 412 vdds-supply = <&vreg_l1a_0p875>;
453 }; 413 };
454 414
455 &gpi_dma1 { !! 415 &gcc {
456 status = "okay"; !! 416 protected-clocks = <GCC_QSPI_CORE_CLK>,
>> 417 <GCC_QSPI_CORE_CLK_SRC>,
>> 418 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
457 }; 419 };
458 420
459 &gpu { 421 &gpu {
460 status = "okay"; <<
461 zap-shader { 422 zap-shader {
462 memory-region = <&gpu_mem>; 423 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 424 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 425 };
465 }; 426 };
466 427
467 &i2c10 { 428 &i2c10 {
468 status = "okay"; 429 status = "okay";
469 clock-frequency = <400000>; 430 clock-frequency = <400000>;
470 431
471 lt9611_codec: hdmi-bridge@3b { 432 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 433 compatible = "lontium,lt9611";
473 reg = <0x3b>; 434 reg = <0x3b>;
474 #sound-dai-cells = <1>; 435 #sound-dai-cells = <1>;
475 436
476 interrupts-extended = <&tlmm 8 437 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 438
478 reset-gpios = <&tlmm 128 GPIO_ 439 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 440
480 vdd-supply = <<9611_1v8>; 441 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 442 vcc-supply = <<9611_3v3>;
482 443
483 pinctrl-names = "default"; 444 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 445 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 446
486 ports { 447 ports {
487 #address-cells = <1>; 448 #address-cells = <1>;
488 #size-cells = <0>; 449 #size-cells = <0>;
489 450
490 port@0 { 451 port@0 {
491 reg = <0>; 452 reg = <0>;
492 453
493 lt9611_a: endp 454 lt9611_a: endpoint {
494 remote !! 455 remote-endpoint = <&dsi0_out>;
495 }; <<
496 }; <<
497 <<
498 port@1 { <<
499 reg = <1>; <<
500 <<
501 lt9611_b: endp <<
502 remote <<
503 }; 456 };
504 }; 457 };
505 458
506 port@2 { 459 port@2 {
507 reg = <2>; 460 reg = <2>;
508 461
509 lt9611_out: en 462 lt9611_out: endpoint {
510 remote 463 remote-endpoint = <&hdmi_con>;
511 }; 464 };
512 }; 465 };
513 }; 466 };
514 }; 467 };
515 }; 468 };
516 469
517 &i2c11 { 470 &i2c11 {
518 /* On Low speed expansion */ 471 /* On Low speed expansion */
519 clock-frequency = <100000>; !! 472 label = "LS-I2C1";
520 status = "okay"; 473 status = "okay";
521 }; 474 };
522 475
523 &i2c14 { 476 &i2c14 {
524 /* On Low speed expansion */ 477 /* On Low speed expansion */
525 clock-frequency = <100000>; !! 478 label = "LS-I2C0";
526 status = "okay"; 479 status = "okay";
527 }; 480 };
528 481
529 &mdss { 482 &mdss {
530 memory-region = <&cont_splash_mem>; <<
531 status = "okay"; <<
532 }; <<
533 <<
534 &mdss_dsi0 { <<
535 status = "okay"; 483 status = "okay";
536 vdda-supply = <&vreg_l26a_1p2>; <<
537 <<
538 qcom,dual-dsi-mode; <<
539 qcom,master-dsi; <<
540 <<
541 ports { <<
542 port@1 { <<
543 endpoint { <<
544 remote-endpoin <<
545 data-lanes = < <<
546 }; <<
547 }; <<
548 }; <<
549 }; 484 };
550 485
551 &mdss_dsi0_phy { !! 486 &mdss_mdp {
552 status = "okay"; <<
553 vdds-supply = <&vreg_l1a_0p875>; <<
554 }; <<
555 <<
556 &mdss_dsi1 { <<
557 vdda-supply = <&vreg_l26a_1p2>; <<
558 <<
559 qcom,dual-dsi-mode; <<
560 <<
561 /* DSI1 is slave, so use DSI0 clocks * <<
562 assigned-clock-parents = <&mdss_dsi0_p <<
563 <<
564 status = "okay"; <<
565 <<
566 ports { <<
567 port@1 { <<
568 endpoint { <<
569 remote-endpoin <<
570 data-lanes = < <<
571 }; <<
572 }; <<
573 }; <<
574 }; <<
575 <<
576 &mdss_dsi1_phy { <<
577 vdds-supply = <&vreg_l1a_0p875>; <<
578 status = "okay"; 487 status = "okay";
579 }; 488 };
580 489
581 &mss_pil { 490 &mss_pil {
582 status = "okay"; 491 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 492 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 493 };
585 494
586 &pcie0 { 495 &pcie0 {
587 status = "okay"; 496 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO !! 497 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI !! 498 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 499
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 500 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 501
593 pinctrl-names = "default"; 502 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 503 pinctrl-0 = <&pcie0_default_state>;
595 }; 504 };
596 505
597 &pcie0_phy { 506 &pcie0_phy {
598 status = "okay"; 507 status = "okay";
599 508
600 vdda-phy-supply = <&vreg_l1a_0p875>; 509 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 510 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 511 };
603 512
604 &pcie1 { 513 &pcie1 {
605 status = "okay"; 514 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L !! 515 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 516
608 pinctrl-names = "default"; 517 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 518 pinctrl-0 = <&pcie1_default_state>;
610 }; 519 };
611 520
612 &pcie1_phy { 521 &pcie1_phy {
613 status = "okay"; 522 status = "okay";
614 523
615 vdda-phy-supply = <&vreg_l1a_0p875>; 524 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 525 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 526 };
618 527
619 &pm8998_gpios { !! 528 &pm8998_gpio {
620 gpio-line-names = 529 gpio-line-names =
621 "NC", 530 "NC",
622 "NC", 531 "NC",
623 "WLAN_SW_CTRL", 532 "WLAN_SW_CTRL",
624 "NC", 533 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 534 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 535 "VOL_UP_N",
627 "NC", 536 "NC",
628 "ADC_IN1", 537 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 538 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 539 "CAM0_AVDD_EN",
631 "NC", 540 "NC",
632 "CAM0_DVDD_EN", 541 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 542 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 543 "DIV_CLK2",
635 "NC", 544 "NC",
636 "NC", 545 "NC",
637 "NC", 546 "NC",
638 "SMB_STAT", 547 "SMB_STAT",
639 "NC", 548 "NC",
640 "NC", 549 "NC",
641 "ADC_IN2", 550 "ADC_IN2",
642 "OPTION1", 551 "OPTION1",
643 "WCSS_PWR_REQ", 552 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 553 "PM845_GPIO24",
645 "OPTION2", 554 "OPTION2",
646 "PM845_SLB"; 555 "PM845_SLB";
647 556
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v !! 557 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
649 pins = "gpio12"; 558 pins = "gpio12";
650 function = "normal"; 559 function = "normal";
651 560
652 bias-pull-up; 561 bias-pull-up;
653 drive-push-pull; 562 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 563 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 564 };
656 565
657 cam0_avdd_2v8_en_default: cam0-avdd-2v !! 566 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
658 pins = "gpio10"; 567 pins = "gpio10";
659 function = "normal"; 568 function = "normal";
660 569
661 bias-pull-up; 570 bias-pull-up;
662 drive-push-pull; 571 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 572 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 573 };
665 574
666 vol_up_pin_a: vol-up-active-state { !! 575 vol_up_pin_a: vol-up-active {
667 pins = "gpio6"; 576 pins = "gpio6";
668 function = "normal"; 577 function = "normal";
669 input-enable; 578 input-enable;
670 bias-pull-up; 579 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 580 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 581 };
673 }; 582 };
674 583
675 &pm8998_resin { !! 584 &pm8998_pon {
676 linux,code = <KEY_VOLUMEDOWN>; !! 585 resin {
677 status = "okay"; !! 586 compatible = "qcom,pm8941-resin";
678 }; !! 587 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
679 !! 588 debounce = <15625>;
680 &pmi8998_lpg { !! 589 bias-pull-up;
681 status = "okay"; !! 590 linux,code = <KEY_VOLUMEDOWN>;
682 <<
683 qcom,power-source = <1>; <<
684 <<
685 led@3 { <<
686 reg = <3>; <<
687 color = <LED_COLOR_ID_GREEN>; <<
688 function = LED_FUNCTION_HEARTB <<
689 function-enumerator = <3>; <<
690 <<
691 linux,default-trigger = "heart <<
692 default-state = "on"; <<
693 }; <<
694 <<
695 led@4 { <<
696 reg = <4>; <<
697 color = <LED_COLOR_ID_GREEN>; <<
698 function = LED_FUNCTION_INDICA <<
699 function-enumerator = <2>; <<
700 }; <<
701 <<
702 led@5 { <<
703 reg = <5>; <<
704 color = <LED_COLOR_ID_GREEN>; <<
705 function = LED_FUNCTION_INDICA <<
706 function-enumerator = <1>; <<
707 }; 591 };
708 }; 592 };
709 593
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 594 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 595 &q6afedai {
712 dai@22 { !! 596 qi2s@22 {
713 reg = <QUATERNARY_MI2S_RX>; !! 597 reg = <22>;
714 qcom,sd-lines = <0 1 2 3>; 598 qcom,sd-lines = <0 1 2 3>;
715 }; 599 };
716 }; 600 };
717 601
718 &q6asmdai { 602 &q6asmdai {
719 dai@0 { 603 dai@0 {
720 reg = <0>; 604 reg = <0>;
721 }; 605 };
722 606
723 dai@1 { 607 dai@1 {
724 reg = <1>; 608 reg = <1>;
725 }; 609 };
726 610
727 dai@2 { 611 dai@2 {
728 reg = <2>; 612 reg = <2>;
729 }; 613 };
730 614
731 dai@3 { 615 dai@3 {
732 reg = <3>; 616 reg = <3>;
733 direction = <2>; 617 direction = <2>;
734 is-compress-dai; 618 is-compress-dai;
735 }; 619 };
736 }; 620 };
737 621
738 &qupv3_id_0 { 622 &qupv3_id_0 {
739 status = "okay"; 623 status = "okay";
740 }; 624 };
741 625
742 &qupv3_id_1 { 626 &qupv3_id_1 {
743 status = "okay"; 627 status = "okay";
744 }; 628 };
745 629
746 &sdhc_2 { 630 &sdhc_2 {
747 status = "okay"; 631 status = "okay";
748 632
749 pinctrl-names = "default"; 633 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 634 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 635
752 vmmc-supply = <&vreg_l21a_2p95>; 636 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 637 vqmmc-supply = <&vreg_l13a_2p95>;
754 638
755 bus-width = <4>; 639 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 640 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 641 };
758 642
759 &sound { 643 &sound {
760 compatible = "qcom,db845c-sndcard", "q !! 644 compatible = "qcom,db845c-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 645 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 646 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 647 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 648 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 649 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 650 pinctrl-names = "default";
767 model = "DB845c"; 651 model = "DB845c";
768 audio-routing = 652 audio-routing =
769 "RX_BIAS", "MCLK", 653 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 654 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 655 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 656 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 657 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 658 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 659 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 660 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 661 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 662 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 663 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 664 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 665 "MultiMedia3 Capture", "MM_UL3";
782 666
783 mm1-dai-link { 667 mm1-dai-link {
784 link-name = "MultiMedia1"; 668 link-name = "MultiMedia1";
785 cpu { 669 cpu {
786 sound-dai = <&q6asmdai 670 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 671 };
788 }; 672 };
789 673
790 mm2-dai-link { 674 mm2-dai-link {
791 link-name = "MultiMedia2"; 675 link-name = "MultiMedia2";
792 cpu { 676 cpu {
793 sound-dai = <&q6asmdai 677 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 678 };
795 }; 679 };
796 680
797 mm3-dai-link { 681 mm3-dai-link {
798 link-name = "MultiMedia3"; 682 link-name = "MultiMedia3";
799 cpu { 683 cpu {
800 sound-dai = <&q6asmdai 684 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 685 };
802 }; 686 };
803 687
804 mm4-dai-link { 688 mm4-dai-link {
805 link-name = "MultiMedia4"; 689 link-name = "MultiMedia4";
806 cpu { 690 cpu {
807 sound-dai = <&q6asmdai 691 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 692 };
809 }; 693 };
810 694
811 hdmi-dai-link { 695 hdmi-dai-link {
812 link-name = "HDMI Playback"; 696 link-name = "HDMI Playback";
813 cpu { 697 cpu {
814 sound-dai = <&q6afedai 698 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 699 };
816 700
817 platform { 701 platform {
818 sound-dai = <&q6routin 702 sound-dai = <&q6routing>;
819 }; 703 };
820 704
821 codec { 705 codec {
822 sound-dai = <<9611_c !! 706 sound-dai = <<9611_codec 0>;
823 }; 707 };
824 }; 708 };
825 709
826 slim-dai-link { 710 slim-dai-link {
827 link-name = "SLIM Playback"; 711 link-name = "SLIM Playback";
828 cpu { 712 cpu {
829 sound-dai = <&q6afedai 713 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 714 };
831 715
832 platform { 716 platform {
833 sound-dai = <&q6routin 717 sound-dai = <&q6routing>;
834 }; 718 };
835 719
836 codec { 720 codec {
837 sound-dai = <&left_spk !! 721 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 722 };
839 }; 723 };
840 724
841 slimcap-dai-link { 725 slimcap-dai-link {
842 link-name = "SLIM Capture"; 726 link-name = "SLIM Capture";
843 cpu { 727 cpu {
844 sound-dai = <&q6afedai 728 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 729 };
846 730
847 platform { 731 platform {
848 sound-dai = <&q6routin 732 sound-dai = <&q6routing>;
849 }; 733 };
850 734
851 codec { 735 codec {
852 sound-dai = <&wcd9340 736 sound-dai = <&wcd9340 1>;
853 }; 737 };
854 }; 738 };
855 }; 739 };
856 740
857 &spi0 { <<
858 status = "okay"; <<
859 pinctrl-names = "default"; <<
860 pinctrl-0 = <&qup_spi0_default>; <<
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; <<
862 <<
863 can@0 { <<
864 compatible = "microchip,mcp251 <<
865 reg = <0>; <<
866 clocks = <&clk40M>; <<
867 interrupts-extended = <&tlmm 1 <<
868 spi-max-frequency = <10000000> <<
869 vdd-supply = <&vdc_5v>; <<
870 xceiver-supply = <&vdc_5v>; <<
871 }; <<
872 }; <<
873 <<
874 &spi2 { 741 &spi2 {
875 /* On Low speed expansion */ 742 /* On Low speed expansion */
>> 743 label = "LS-SPI0";
876 status = "okay"; 744 status = "okay";
877 }; 745 };
878 746
879 &tlmm { 747 &tlmm {
880 cam0_default: cam0-default-state { !! 748 cam0_default: cam0_default {
881 rst-pins { !! 749 rst {
882 pins = "gpio9"; 750 pins = "gpio9";
883 function = "gpio"; 751 function = "gpio";
884 752
885 drive-strength = <16>; 753 drive-strength = <16>;
886 bias-disable; 754 bias-disable;
887 }; 755 };
888 756
889 mclk0-pins { !! 757 mclk0 {
890 pins = "gpio13"; 758 pins = "gpio13";
891 function = "cam_mclk"; 759 function = "cam_mclk";
892 760
893 drive-strength = <16>; 761 drive-strength = <16>;
894 bias-disable; 762 bias-disable;
895 }; 763 };
896 }; 764 };
897 765
898 cam3_default: cam3-default-state { !! 766 cam3_default: cam3_default {
899 rst-pins { !! 767 rst {
900 function = "gpio"; 768 function = "gpio";
901 pins = "gpio21"; 769 pins = "gpio21";
902 770
903 drive-strength = <16>; 771 drive-strength = <16>;
904 bias-disable; 772 bias-disable;
905 }; 773 };
906 774
907 mclk3-pins { !! 775 mclk3 {
908 function = "cam_mclk"; 776 function = "cam_mclk";
909 pins = "gpio16"; 777 pins = "gpio16";
910 778
911 drive-strength = <16>; 779 drive-strength = <16>;
912 bias-disable; 780 bias-disable;
913 }; 781 };
914 }; 782 };
915 783
916 dsi_sw_sel: dsi-sw-sel-state { !! 784 dsi_sw_sel: dsi-sw-sel {
917 pins = "gpio120"; 785 pins = "gpio120";
918 function = "gpio"; 786 function = "gpio";
919 787
920 drive-strength = <2>; 788 drive-strength = <2>;
921 bias-disable; 789 bias-disable;
922 output-high; 790 output-high;
923 }; 791 };
924 792
925 lt9611_irq_pin: lt9611-irq-state { !! 793 lt9611_irq_pin: lt9611-irq {
926 pins = "gpio84"; 794 pins = "gpio84";
927 function = "gpio"; 795 function = "gpio";
928 bias-disable; 796 bias-disable;
929 }; 797 };
930 798
931 pcie0_default_state: pcie0-default-sta !! 799 pcie0_default_state: pcie0-default {
932 clkreq-pins { !! 800 clkreq {
933 pins = "gpio36"; 801 pins = "gpio36";
934 function = "pci_e0"; 802 function = "pci_e0";
935 bias-pull-up; 803 bias-pull-up;
936 }; 804 };
937 805
938 reset-n-pins { !! 806 reset-n {
939 pins = "gpio35"; 807 pins = "gpio35";
940 function = "gpio"; 808 function = "gpio";
941 809
942 drive-strength = <2>; 810 drive-strength = <2>;
943 output-low; 811 output-low;
944 bias-pull-down; 812 bias-pull-down;
945 }; 813 };
946 814
947 wake-n-pins { !! 815 wake-n {
948 pins = "gpio37"; 816 pins = "gpio37";
949 function = "gpio"; 817 function = "gpio";
950 818
951 drive-strength = <2>; 819 drive-strength = <2>;
952 bias-pull-up; 820 bias-pull-up;
953 }; 821 };
954 }; 822 };
955 823
956 pcie0_pwren_state: pcie0-pwren-state { !! 824 pcie0_pwren_state: pcie0-pwren {
957 pins = "gpio90"; 825 pins = "gpio90";
958 function = "gpio"; 826 function = "gpio";
959 827
960 drive-strength = <2>; 828 drive-strength = <2>;
961 bias-disable; 829 bias-disable;
962 }; 830 };
963 831
964 pcie1_default_state: pcie1-default-sta !! 832 pcie1_default_state: pcie1-default {
965 perst-n-pins { !! 833 perst-n {
966 pins = "gpio102"; 834 pins = "gpio102";
967 function = "gpio"; 835 function = "gpio";
968 836
969 drive-strength = <16>; 837 drive-strength = <16>;
970 bias-disable; 838 bias-disable;
971 }; 839 };
972 840
973 clkreq-pins { !! 841 clkreq {
974 pins = "gpio103"; 842 pins = "gpio103";
975 function = "pci_e1"; 843 function = "pci_e1";
976 bias-pull-up; 844 bias-pull-up;
977 }; 845 };
978 846
979 wake-n-pins { !! 847 wake-n {
980 pins = "gpio11"; 848 pins = "gpio11";
981 function = "gpio"; 849 function = "gpio";
982 850
983 drive-strength = <2>; 851 drive-strength = <2>;
984 bias-pull-up; 852 bias-pull-up;
985 }; 853 };
986 854
987 reset-n-pins { !! 855 reset-n {
988 pins = "gpio75"; 856 pins = "gpio75";
989 function = "gpio"; 857 function = "gpio";
990 858
991 drive-strength = <16>; 859 drive-strength = <16>;
992 bias-pull-up; 860 bias-pull-up;
993 output-high; 861 output-high;
994 }; 862 };
995 }; 863 };
996 864
997 sdc2_default_state: sdc2-default-state !! 865 sdc2_default_state: sdc2-default {
998 clk-pins { !! 866 clk {
999 pins = "sdc2_clk"; 867 pins = "sdc2_clk";
1000 bias-disable; 868 bias-disable;
1001 869
1002 /* 870 /*
1003 * It seems that mmc_ 871 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 872 * strength is not 16 on clk, cmd, and data pins.
1005 */ 873 */
1006 drive-strength = <16> 874 drive-strength = <16>;
1007 }; 875 };
1008 876
1009 cmd-pins { !! 877 cmd {
1010 pins = "sdc2_cmd"; 878 pins = "sdc2_cmd";
1011 bias-pull-up; 879 bias-pull-up;
1012 drive-strength = <10> 880 drive-strength = <10>;
1013 }; 881 };
1014 882
1015 data-pins { !! 883 data {
1016 pins = "sdc2_data"; 884 pins = "sdc2_data";
1017 bias-pull-up; 885 bias-pull-up;
1018 drive-strength = <10> 886 drive-strength = <10>;
1019 }; 887 };
1020 }; 888 };
1021 889
1022 sdc2_card_det_n: sd-card-det-n-state !! 890 sdc2_card_det_n: sd-card-det-n {
1023 pins = "gpio126"; 891 pins = "gpio126";
1024 function = "gpio"; 892 function = "gpio";
1025 bias-pull-up; 893 bias-pull-up;
1026 }; 894 };
>> 895
>> 896 wcd_intr_default: wcd_intr_default {
>> 897 pins = <54>;
>> 898 function = "gpio";
>> 899
>> 900 input-enable;
>> 901 bias-pull-down;
>> 902 drive-strength = <2>;
>> 903 };
1027 }; 904 };
1028 905
1029 &uart3 { 906 &uart3 {
1030 label = "LS-UART0"; 907 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; <<
1032 <<
1033 status = "disabled"; 908 status = "disabled";
1034 }; 909 };
1035 910
1036 &uart6 { 911 &uart6 {
1037 status = "okay"; 912 status = "okay";
1038 913
1039 pinctrl-0 = <&qup_uart6_4pin>; <<
1040 <<
1041 bluetooth { 914 bluetooth {
1042 compatible = "qcom,wcn3990-bt 915 compatible = "qcom,wcn3990-bt";
1043 916
1044 vddio-supply = <&vreg_s4a_1p8 917 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 918 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 919 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 920 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 921 max-speed = <3200000>;
1049 }; 922 };
1050 }; 923 };
1051 924
1052 &uart9 { 925 &uart9 {
1053 label = "LS-UART1"; 926 label = "LS-UART1";
1054 status = "okay"; 927 status = "okay";
1055 }; 928 };
1056 929
1057 &usb_1 { 930 &usb_1 {
1058 status = "okay"; 931 status = "okay";
1059 }; 932 };
1060 933
1061 &usb_1_dwc3 { 934 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 935 dr_mode = "peripheral";
1063 }; 936 };
1064 937
1065 &usb_1_hsphy { 938 &usb_1_hsphy {
1066 status = "okay"; 939 status = "okay";
1067 940
1068 vdd-supply = <&vreg_l1a_0p875>; 941 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 942 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 943 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 944
1072 qcom,imp-res-offset-value = <8>; 945 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 946 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 947 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 948 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 949 };
1077 950
1078 &usb_1_qmpphy { 951 &usb_1_qmpphy {
1079 status = "okay"; 952 status = "okay";
1080 953
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 954 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 955 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 956 };
1084 957
1085 &usb_2 { 958 &usb_2 {
1086 status = "okay"; 959 status = "okay";
1087 }; 960 };
1088 961
1089 &usb_2_dwc3 { 962 &usb_2_dwc3 {
1090 dr_mode = "host"; 963 dr_mode = "host";
1091 }; 964 };
1092 965
1093 &usb_2_hsphy { 966 &usb_2_hsphy {
1094 status = "okay"; 967 status = "okay";
1095 968
1096 vdd-supply = <&vreg_l1a_0p875>; 969 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 970 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 971 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 972
1100 qcom,imp-res-offset-value = <8>; 973 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 974 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 975 };
1103 976
1104 &usb_2_qmpphy { 977 &usb_2_qmpphy {
1105 status = "okay"; 978 status = "okay";
1106 979
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 980 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 981 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 982 };
1110 983
1111 &ufs_mem_hc { 984 &ufs_mem_hc {
1112 status = "okay"; 985 status = "okay";
1113 986
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 987 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 988
1116 vcc-supply = <&vreg_l20a_2p95>; 989 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 990 vcc-max-microamp = <800000>;
1118 }; 991 };
1119 992
1120 &ufs_mem_phy { 993 &ufs_mem_phy {
1121 status = "okay"; 994 status = "okay";
1122 995
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 996 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 997 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 998 };
1126 999
1127 &venus { !! 1000 &wcd9340{
1128 status = "okay"; !! 1001 pinctrl-0 = <&wcd_intr_default>;
1129 }; !! 1002 pinctrl-names = "default";
1130 !! 1003 clock-names = "extclk";
1131 &wcd9340 { !! 1004 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H !! 1005 reset-gpios = <&tlmm 64 0>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1006 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1007 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1008 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1009 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1010 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1011
1139 swm: soundwire@c85 { !! 1012 swm: swm@c85 {
1140 left_spkr: speaker@0,1 { !! 1013 left_spkr: wsa8810-left{
1141 compatible = "sdw1021 1014 compatible = "sdw10217201000";
1142 reg = <0 1>; 1015 reg = <0 1>;
1143 powerdown-gpios = <&w !! 1016 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1017 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1018 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1019 #sound-dai-cells = <0>;
1147 }; 1020 };
1148 1021
1149 right_spkr: speaker@0,2 { !! 1022 right_spkr: wsa8810-right{
1150 compatible = "sdw1021 1023 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w !! 1024 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1025 reg = <0 2>;
1153 #thermal-sensor-cells 1026 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1027 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1028 #sound-dai-cells = <0>;
1156 }; 1029 };
1157 }; 1030 };
1158 }; 1031 };
1159 1032
1160 &wifi { 1033 &wifi {
1161 status = "okay"; 1034 status = "okay";
1162 1035
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1036 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1037 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1038 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1039 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1040
1168 qcom,snoc-host-cap-8bit-quirk; 1041 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th <<
1170 }; 1042 };
1171 1043
1172 /* PINCTRL - additions to nodes defined in sd 1044 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1045 &qup_spi2_default {
1174 drive-strength = <16>; 1046 drive-strength = <16>;
1175 }; 1047 };
1176 1048
>> 1049 &qup_uart3_default{
>> 1050 pinmux {
>> 1051 pins = "gpio41", "gpio42", "gpio43", "gpio44";
>> 1052 function = "qup3";
>> 1053 };
>> 1054 };
>> 1055
1177 &qup_i2c10_default { 1056 &qup_i2c10_default {
1178 drive-strength = <2>; !! 1057 pinconf {
1179 bias-disable; !! 1058 pins = "gpio55", "gpio56";
>> 1059 drive-strength = <2>;
>> 1060 bias-disable;
>> 1061 };
1180 }; 1062 };
1181 1063
1182 &qup_uart9_rx { !! 1064 &qup_uart6_default {
1183 drive-strength = <2>; !! 1065 pinmux {
1184 bias-pull-up; !! 1066 pins = "gpio45", "gpio46", "gpio47", "gpio48";
>> 1067 function = "qup6";
>> 1068 };
>> 1069
>> 1070 cts {
>> 1071 pins = "gpio45";
>> 1072 bias-disable;
>> 1073 };
>> 1074
>> 1075 rts-tx {
>> 1076 pins = "gpio46", "gpio47";
>> 1077 drive-strength = <2>;
>> 1078 bias-disable;
>> 1079 };
>> 1080
>> 1081 rx {
>> 1082 pins = "gpio48";
>> 1083 bias-pull-up;
>> 1084 };
1185 }; 1085 };
1186 1086
1187 &qup_uart9_tx { !! 1087 &qup_uart9_default {
1188 drive-strength = <2>; !! 1088 pinconf-tx {
1189 bias-disable; !! 1089 pins = "gpio4";
>> 1090 drive-strength = <2>;
>> 1091 bias-disable;
>> 1092 };
>> 1093
>> 1094 pinconf-rx {
>> 1095 pins = "gpio5";
>> 1096 drive-strength = <2>;
>> 1097 bias-pull-up;
>> 1098 };
1190 }; 1099 };
1191 1100
1192 /* PINCTRL - additions to nodes defined in sd !! 1101 &pm8998_gpio {
1193 &qup_spi0_default { !! 1102
1194 drive-strength = <6>; !! 1103 };
1195 bias-disable; !! 1104
>> 1105 &cci {
>> 1106 status = "ok";
>> 1107 };
>> 1108
>> 1109 &cci_i2c0 {
>> 1110 camera@10 {
>> 1111 compatible = "ovti,ov8856";
>> 1112 reg = <0x10>;
>> 1113
>> 1114 // CAM0_RST_N
>> 1115 reset-gpios = <&tlmm 9 0>;
>> 1116 pinctrl-names = "default";
>> 1117 pinctrl-0 = <&cam0_default>;
>> 1118 gpios = <&tlmm 13 0>,
>> 1119 <&tlmm 9 0>;
>> 1120
>> 1121 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
>> 1122 clock-names = "xvclk";
>> 1123 clock-frequency = <19200000>;
>> 1124
>> 1125 /* The &vreg_s4a_1p8 trace is powered on as a,
>> 1126 * so it is represented by a fixed regulator.
>> 1127 *
>> 1128 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
>> 1129 * both have to be enabled through the power management
>> 1130 * gpios.
>> 1131 */
>> 1132 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1133
>> 1134 dovdd-supply = <&vreg_lvs1a_1p8>;
>> 1135 avdd-supply = <&cam0_avdd_2v8>;
>> 1136 dvdd-supply = <&cam0_dvdd_1v2>;
>> 1137
>> 1138 status = "disable";
>> 1139
>> 1140 port {
>> 1141 ov8856_ep: endpoint {
>> 1142 clock-lanes = <1>;
>> 1143 link-frequencies = /bits/ 64
>> 1144 <360000000 180000000>;
>> 1145 data-lanes = <1 2 3 4>;
>> 1146 // remote-endpoint = <&csiphy0_ep>;
>> 1147 };
>> 1148 };
>> 1149 };
>> 1150 };
>> 1151
>> 1152 &cci_i2c1 {
>> 1153 camera@60 {
>> 1154 compatible = "ovti,ov7251";
>> 1155
>> 1156 // I2C address as per ov7251.txt linux documentation
>> 1157 reg = <0x60>;
>> 1158
>> 1159 // CAM3_RST_N
>> 1160 enable-gpios = <&tlmm 21 0>;
>> 1161 pinctrl-names = "default";
>> 1162 pinctrl-0 = <&cam3_default>;
>> 1163 gpios = <&tlmm 16 0>,
>> 1164 <&tlmm 21 0>;
>> 1165
>> 1166 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
>> 1167 clock-names = "xclk";
>> 1168 clock-frequency = <24000000>;
>> 1169
>> 1170 /* The &vreg_s4a_1p8 trace always powered on.
>> 1171 *
>> 1172 * The 2.8V vdda-supply regulator is enabled when the
>> 1173 * vreg_s4a_1p8 trace is pulled high.
>> 1174 * It too is represented by a fixed regulator.
>> 1175 *
>> 1176 * No 1.2V vddd-supply regulator is used.
>> 1177 */
>> 1178 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1179
>> 1180 vdddo-supply = <&vreg_lvs1a_1p8>;
>> 1181 vdda-supply = <&cam3_avdd_2v8>;
>> 1182
>> 1183 status = "disable";
>> 1184
>> 1185 port {
>> 1186 ov7251_ep: endpoint {
>> 1187 clock-lanes = <1>;
>> 1188 data-lanes = <0 1>;
>> 1189 // remote-endpoint = <&csiphy3_ep>;
>> 1190 };
>> 1191 };
>> 1192 };
1196 }; 1193 };
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