1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 13 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" <<
15 #include "pm8998.dtsi" 14 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 15 #include "pmi8998.dtsi"
17 16
18 / { 17 / {
19 model = "Thundercomm Dragonboard 845c" 18 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 19 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; 20 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>; 21 qcom,board-id = <8 0>;
23 22
24 aliases { 23 aliases {
25 serial0 = &uart9; 24 serial0 = &uart9;
26 serial1 = &uart6; !! 25 hsuart0 = &uart6;
27 }; 26 };
28 27
29 chosen { 28 chosen {
30 stdout-path = "serial0:115200n 29 stdout-path = "serial0:115200n8";
31 }; 30 };
32 31
33 /* Fixed crystal oscillator dedicated 32 /* Fixed crystal oscillator dedicated to MCP2517FD */
34 clk40M: can-clock { 33 clk40M: can-clock {
35 compatible = "fixed-clock"; 34 compatible = "fixed-clock";
36 #clock-cells = <0>; 35 #clock-cells = <0>;
37 clock-frequency = <40000000>; 36 clock-frequency = <40000000>;
38 }; 37 };
39 38
40 dc12v: dc12v-regulator { 39 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 40 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 41 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 42 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 43 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 44 regulator-always-on;
46 }; 45 };
47 46
48 gpio-keys { 47 gpio-keys {
49 compatible = "gpio-keys"; 48 compatible = "gpio-keys";
50 autorepeat; 49 autorepeat;
51 50
52 pinctrl-names = "default"; 51 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 52 pinctrl-0 = <&vol_up_pin_a>;
54 53
55 key-vol-up { 54 key-vol-up {
56 label = "Volume Up"; 55 label = "Volume Up";
57 linux,code = <KEY_VOLU 56 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios !! 57 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
59 }; 58 };
60 }; 59 };
61 60
62 leds { 61 leds {
63 compatible = "gpio-leds"; 62 compatible = "gpio-leds";
64 63
65 led-0 { 64 led-0 {
66 label = "green:user4"; 65 label = "green:user4";
67 function = LED_FUNCTIO 66 function = LED_FUNCTION_INDICATOR;
68 color = <LED_COLOR_ID_ 67 color = <LED_COLOR_ID_GREEN>;
69 gpios = <&pm8998_gpios !! 68 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
>> 69 linux,default-trigger = "panic-indicator";
70 default-state = "off"; 70 default-state = "off";
71 panic-indicator; <<
72 }; 71 };
73 72
74 led-1 { 73 led-1 {
75 label = "yellow:wlan"; 74 label = "yellow:wlan";
76 function = LED_FUNCTIO 75 function = LED_FUNCTION_WLAN;
77 color = <LED_COLOR_ID_ 76 color = <LED_COLOR_ID_YELLOW>;
78 gpios = <&pm8998_gpios !! 77 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
79 linux,default-trigger 78 linux,default-trigger = "phy0tx";
80 default-state = "off"; 79 default-state = "off";
81 }; 80 };
82 81
83 led-2 { 82 led-2 {
84 label = "blue:bt"; 83 label = "blue:bt";
85 function = LED_FUNCTIO 84 function = LED_FUNCTION_BLUETOOTH;
86 color = <LED_COLOR_ID_ 85 color = <LED_COLOR_ID_BLUE>;
87 gpios = <&pm8998_gpios !! 86 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger 87 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 88 default-state = "off";
90 }; 89 };
91 }; 90 };
92 91
93 hdmi-out { 92 hdmi-out {
94 compatible = "hdmi-connector"; 93 compatible = "hdmi-connector";
95 type = "a"; 94 type = "a";
96 95
97 port { 96 port {
98 hdmi_con: endpoint { 97 hdmi_con: endpoint {
99 remote-endpoin 98 remote-endpoint = <<9611_out>;
100 }; 99 };
101 }; 100 };
102 }; 101 };
103 102
104 reserved-memory { <<
105 /* Cont splash region set up b <<
106 cont_splash_mem: framebuffer@9 <<
107 reg = <0x0 0x9d400000 <<
108 no-map; <<
109 }; <<
110 }; <<
111 <<
112 lt9611_1v8: lt9611-vdd18-regulator { 103 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 104 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 105 regulator-name = "LT9611_1V8";
115 106
116 vin-supply = <&vdc_5v>; 107 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 108 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 109 regulator-max-microvolt = <1800000>;
119 110
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 111 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 112 enable-active-high;
122 }; 113 };
123 114
124 lt9611_3v3: lt9611-3v3 { 115 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 116 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 117 regulator-name = "LT9611_3V3";
127 118
128 vin-supply = <&vdc_3v3>; 119 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 120 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 121 regulator-max-microvolt = <3300000>;
131 122
132 /* !! 123 // TODO: make it possible to drive same GPIO from two clients
133 * TODO: make it possible to d !! 124 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
134 * gpio = <&tlmm 89 GPIO_ACTIV !! 125 // enable-active-high;
135 * enable-active-high; <<
136 */ <<
137 }; 126 };
138 127
139 pcie0_1p05v: pcie-0-1p05v-regulator { 128 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 129 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 130 regulator-name = "PCIE0_1.05V";
142 131
143 vin-supply = <&vbat>; 132 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 133 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 134 regulator-max-microvolt = <1050000>;
146 135
147 /* !! 136 // TODO: make it possible to drive same GPIO from two clients
148 * TODO: make it possible to d !! 137 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
149 * gpio = <&tlmm 90 GPIO_ACTIV !! 138 // enable-active-high;
150 * enable-active-high; <<
151 */ <<
152 }; 139 };
153 140
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator !! 141 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
155 compatible = "regulator-fixed" 142 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 143 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 144 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 145 regulator-max-microvolt = <1200000>;
159 enable-active-high; 146 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ !! 147 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 148 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 149 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 150 vin-supply = <&vbat>;
164 }; 151 };
165 152
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator !! 153 cam0_avdd_2v8: reg_cam0_avdd_2v8 {
167 compatible = "regulator-fixed" 154 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 155 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 156 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 157 regulator-max-microvolt = <2800000>;
171 enable-active-high; 158 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ !! 159 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 160 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 161 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 162 vin-supply = <&vbat>;
176 }; 163 };
177 164
178 /* This regulator is enabled when the 165 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator !! 166 cam3_avdd_2v8: reg_cam3_avdd_2v8 {
180 compatible = "regulator-fixed" 167 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 168 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 169 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 170 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 171 regulator-always-on;
185 vin-supply = <&vbat>; 172 vin-supply = <&vbat>;
186 }; 173 };
187 174
188 pcie0_3p3v_dual: vldo-3v3-regulator { 175 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 176 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 177 regulator-name = "VLDO_3V3";
191 178
192 vin-supply = <&vbat>; 179 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 180 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 181 regulator-max-microvolt = <3300000>;
195 182
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 183 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 184 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 185
205 pinctrl-names = "default"; 186 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 187 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 188 };
208 189
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 190 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 191 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 192 regulator-name = "V5P0_HDMIOUT";
212 193
213 vin-supply = <&vdc_5v>; 194 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 195 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 196 regulator-max-microvolt = <500000>;
216 197
217 /* !! 198 // TODO: make it possible to drive same GPIO from two clients
218 * TODO: make it possible to d !! 199 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
219 * gpio = <&tlmm 89 GPIO_ACTIV !! 200 // enable-active-high;
220 * enable-active-high; <<
221 */ <<
222 }; 201 };
223 202
224 vbat: vbat-regulator { 203 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 204 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 205 regulator-name = "VBAT";
227 206
228 vin-supply = <&dc12v>; 207 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 208 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 209 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 210 regulator-always-on;
232 }; 211 };
233 212
234 vbat_som: vbat-som-regulator { 213 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 214 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 215 regulator-name = "VBAT_SOM";
237 216
238 vin-supply = <&dc12v>; 217 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 218 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 219 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 220 regulator-always-on;
242 }; 221 };
243 222
244 vdc_3v3: vdc-3v3-regulator { 223 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 224 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 225 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 226 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 227 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 228 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 229 regulator-always-on;
251 }; 230 };
252 231
253 vdc_5v: vdc-5v-regulator { 232 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 233 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 234 regulator-name = "VDC_5V";
256 235
257 vin-supply = <&dc12v>; 236 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 237 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 238 regulator-max-microvolt = <500000>;
260 regulator-always-on; 239 regulator-always-on;
261 }; 240 };
262 241
263 vreg_s4a_1p8: vreg-s4a-1p8 { 242 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 243 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 244 regulator-name = "vreg_s4a_1p8";
266 245
267 regulator-min-microvolt = <180 246 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 247 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 248 regulator-always-on;
270 }; 249 };
271 250
272 vph_pwr: vph-pwr-regulator { 251 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 252 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 253 regulator-name = "vph_pwr";
275 254
276 vin-supply = <&vbat_som>; 255 vin-supply = <&vbat_som>;
277 }; 256 };
278 }; 257 };
279 258
280 &adsp_pas { 259 &adsp_pas {
281 status = "okay"; 260 status = "okay";
282 261
283 firmware-name = "qcom/sdm845/adsp.mbn" 262 firmware-name = "qcom/sdm845/adsp.mbn";
284 }; 263 };
285 264
286 &apps_rsc { 265 &apps_rsc {
287 regulators-0 { !! 266 pm8998-rpmh-regulators {
288 compatible = "qcom,pm8998-rpmh 267 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 268 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 269 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 270 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 271 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 272 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 273 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 274 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 275 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 276 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 277 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 278 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 279 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 280 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 281 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 282 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 283 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 284 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 285 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 286 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 287 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 288 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 289 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 290 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 291 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 292 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 293 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 294 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 295 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 296
318 vreg_s3a_1p35: smps3 { 297 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 298 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 299 regulator-max-microvolt = <1352000>;
321 }; 300 };
322 301
323 vreg_s5a_2p04: smps5 { 302 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 303 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 304 regulator-max-microvolt = <2040000>;
326 }; 305 };
327 306
328 vreg_s7a_1p025: smps7 { 307 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 308 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 309 regulator-max-microvolt = <1028000>;
331 }; 310 };
332 311
333 vreg_l1a_0p875: ldo1 { 312 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 313 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 314 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 315 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 316 };
338 317
339 vreg_l5a_0p8: ldo5 { 318 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 319 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 320 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 321 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 322 };
344 323
345 vreg_l12a_1p8: ldo12 { 324 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 325 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 326 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 327 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 328 };
350 329
351 vreg_l7a_1p8: ldo7 { 330 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 331 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 332 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 333 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 334 };
356 335
357 vreg_l13a_2p95: ldo13 { 336 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 337 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 338 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 339 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 340 };
362 341
363 vreg_l17a_1p3: ldo17 { 342 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 343 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 344 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 345 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 346 };
368 347
369 vreg_l20a_2p95: ldo20 { 348 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 349 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 350 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 351 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 352 };
374 353
375 vreg_l21a_2p95: ldo21 { 354 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 355 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 356 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 357 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 358 };
380 359
381 vreg_l24a_3p075: ldo24 { 360 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 361 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 362 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 363 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 364 };
386 365
387 vreg_l25a_3p3: ldo25 { 366 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 367 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 368 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 369 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 370 };
392 371
393 vreg_l26a_1p2: ldo26 { 372 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 373 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 374 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 375 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 376 };
398 377
399 vreg_lvs1a_1p8: lvs1 { 378 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 379 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 380 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 381 regulator-always-on;
403 }; 382 };
404 383
405 vreg_lvs2a_1p8: lvs2 { 384 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 385 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 386 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 387 regulator-always-on;
409 }; 388 };
410 }; 389 };
411 390
412 regulators-1 { !! 391 pmi8998-rpmh-regulators {
413 compatible = "qcom,pmi8998-rpm 392 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 393 qcom,pmic-id = "b";
415 394
416 vdd-bob-supply = <&vph_pwr>; 395 vdd-bob-supply = <&vph_pwr>;
417 396
418 vreg_bob: bob { 397 vreg_bob: bob {
419 regulator-min-microvol 398 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 399 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 400 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 401 regulator-allow-bypass;
423 }; 402 };
424 }; 403 };
425 }; 404 };
426 405
427 &camss { !! 406 &cdsp_pas {
428 status = "okay"; 407 status = "okay";
>> 408 firmware-name = "qcom/sdm845/cdsp.mbn";
>> 409 };
429 410
430 vdda-phy-supply = <&vreg_l1a_0p875>; !! 411 &dsi0 {
431 vdda-pll-supply = <&vreg_l26a_1p2>; !! 412 status = "okay";
>> 413 vdda-supply = <&vreg_l26a_1p2>;
>> 414
>> 415 ports {
>> 416 port@1 {
>> 417 endpoint {
>> 418 remote-endpoint = <<9611_a>;
>> 419 data-lanes = <0 1 2 3>;
>> 420 };
>> 421 };
>> 422 };
432 }; 423 };
433 424
434 &cdsp_pas { !! 425 &dsi0_phy {
435 status = "okay"; 426 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" !! 427 vdds-supply = <&vreg_l1a_0p875>;
437 }; 428 };
438 429
439 &gcc { 430 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 431 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 432 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI 433 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
443 <GCC_LPASS_Q6_AXI_C 434 <GCC_LPASS_Q6_AXI_CLK>,
444 <GCC_LPASS_SWAY_CLK 435 <GCC_LPASS_SWAY_CLK>;
445 }; 436 };
446 437
447 &gmu { 438 &gmu {
448 status = "okay"; 439 status = "okay";
449 }; 440 };
450 441
451 &gpi_dma0 { 442 &gpi_dma0 {
452 status = "okay"; 443 status = "okay";
453 }; 444 };
454 445
455 &gpi_dma1 { 446 &gpi_dma1 {
456 status = "okay"; 447 status = "okay";
457 }; 448 };
458 449
459 &gpu { 450 &gpu {
460 status = "okay"; 451 status = "okay";
461 zap-shader { 452 zap-shader {
462 memory-region = <&gpu_mem>; 453 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 454 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 455 };
465 }; 456 };
466 457
467 &i2c10 { 458 &i2c10 {
468 status = "okay"; 459 status = "okay";
469 clock-frequency = <400000>; 460 clock-frequency = <400000>;
470 461
471 lt9611_codec: hdmi-bridge@3b { 462 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 463 compatible = "lontium,lt9611";
473 reg = <0x3b>; 464 reg = <0x3b>;
474 #sound-dai-cells = <1>; 465 #sound-dai-cells = <1>;
475 466
476 interrupts-extended = <&tlmm 8 467 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 468
478 reset-gpios = <&tlmm 128 GPIO_ 469 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 470
480 vdd-supply = <<9611_1v8>; 471 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 472 vcc-supply = <<9611_3v3>;
482 473
483 pinctrl-names = "default"; 474 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 475 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 476
486 ports { 477 ports {
487 #address-cells = <1>; 478 #address-cells = <1>;
488 #size-cells = <0>; 479 #size-cells = <0>;
489 480
490 port@0 { 481 port@0 {
491 reg = <0>; 482 reg = <0>;
492 483
493 lt9611_a: endp 484 lt9611_a: endpoint {
494 remote !! 485 remote-endpoint = <&dsi0_out>;
495 }; <<
496 }; <<
497 <<
498 port@1 { <<
499 reg = <1>; <<
500 <<
501 lt9611_b: endp <<
502 remote <<
503 }; 486 };
504 }; 487 };
505 488
506 port@2 { 489 port@2 {
507 reg = <2>; 490 reg = <2>;
508 491
509 lt9611_out: en 492 lt9611_out: endpoint {
510 remote 493 remote-endpoint = <&hdmi_con>;
511 }; 494 };
512 }; 495 };
513 }; 496 };
514 }; 497 };
515 }; 498 };
516 499
517 &i2c11 { 500 &i2c11 {
518 /* On Low speed expansion */ 501 /* On Low speed expansion */
519 clock-frequency = <100000>; 502 clock-frequency = <100000>;
>> 503 label = "LS-I2C1";
520 status = "okay"; 504 status = "okay";
521 }; 505 };
522 506
523 &i2c14 { 507 &i2c14 {
524 /* On Low speed expansion */ 508 /* On Low speed expansion */
525 clock-frequency = <100000>; 509 clock-frequency = <100000>;
>> 510 label = "LS-I2C0";
526 status = "okay"; 511 status = "okay";
527 }; 512 };
528 513
529 &mdss { 514 &mdss {
530 memory-region = <&cont_splash_mem>; <<
531 status = "okay"; <<
532 }; <<
533 <<
534 &mdss_dsi0 { <<
535 status = "okay"; <<
536 vdda-supply = <&vreg_l26a_1p2>; <<
537 <<
538 qcom,dual-dsi-mode; <<
539 qcom,master-dsi; <<
540 <<
541 ports { <<
542 port@1 { <<
543 endpoint { <<
544 remote-endpoin <<
545 data-lanes = < <<
546 }; <<
547 }; <<
548 }; <<
549 }; <<
550 <<
551 &mdss_dsi0_phy { <<
552 status = "okay"; <<
553 vdds-supply = <&vreg_l1a_0p875>; <<
554 }; <<
555 <<
556 &mdss_dsi1 { <<
557 vdda-supply = <&vreg_l26a_1p2>; <<
558 <<
559 qcom,dual-dsi-mode; <<
560 <<
561 /* DSI1 is slave, so use DSI0 clocks * <<
562 assigned-clock-parents = <&mdss_dsi0_p <<
563 <<
564 status = "okay"; <<
565 <<
566 ports { <<
567 port@1 { <<
568 endpoint { <<
569 remote-endpoin <<
570 data-lanes = < <<
571 }; <<
572 }; <<
573 }; <<
574 }; <<
575 <<
576 &mdss_dsi1_phy { <<
577 vdds-supply = <&vreg_l1a_0p875>; <<
578 status = "okay"; 515 status = "okay";
579 }; 516 };
580 517
581 &mss_pil { 518 &mss_pil {
582 status = "okay"; 519 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 520 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 521 };
585 522
586 &pcie0 { 523 &pcie0 {
587 status = "okay"; 524 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO !! 525 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI !! 526 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 527
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 528 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 529
593 pinctrl-names = "default"; 530 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 531 pinctrl-0 = <&pcie0_default_state>;
595 }; 532 };
596 533
597 &pcie0_phy { 534 &pcie0_phy {
598 status = "okay"; 535 status = "okay";
599 536
600 vdda-phy-supply = <&vreg_l1a_0p875>; 537 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 538 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 539 };
603 540
604 &pcie1 { 541 &pcie1 {
605 status = "okay"; 542 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L !! 543 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 544
608 pinctrl-names = "default"; 545 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 546 pinctrl-0 = <&pcie1_default_state>;
610 }; 547 };
611 548
612 &pcie1_phy { 549 &pcie1_phy {
613 status = "okay"; 550 status = "okay";
614 551
615 vdda-phy-supply = <&vreg_l1a_0p875>; 552 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 553 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 554 };
618 555
619 &pm8998_gpios { !! 556 &pm8998_gpio {
620 gpio-line-names = 557 gpio-line-names =
621 "NC", 558 "NC",
622 "NC", 559 "NC",
623 "WLAN_SW_CTRL", 560 "WLAN_SW_CTRL",
624 "NC", 561 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 562 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 563 "VOL_UP_N",
627 "NC", 564 "NC",
628 "ADC_IN1", 565 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 566 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 567 "CAM0_AVDD_EN",
631 "NC", 568 "NC",
632 "CAM0_DVDD_EN", 569 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 570 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 571 "DIV_CLK2",
635 "NC", 572 "NC",
636 "NC", 573 "NC",
637 "NC", 574 "NC",
638 "SMB_STAT", 575 "SMB_STAT",
639 "NC", 576 "NC",
640 "NC", 577 "NC",
641 "ADC_IN2", 578 "ADC_IN2",
642 "OPTION1", 579 "OPTION1",
643 "WCSS_PWR_REQ", 580 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 581 "PM845_GPIO24",
645 "OPTION2", 582 "OPTION2",
646 "PM845_SLB"; 583 "PM845_SLB";
647 584
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v 585 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
649 pins = "gpio12"; 586 pins = "gpio12";
650 function = "normal"; 587 function = "normal";
651 588
652 bias-pull-up; 589 bias-pull-up;
653 drive-push-pull; 590 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 591 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 592 };
656 593
657 cam0_avdd_2v8_en_default: cam0-avdd-2v 594 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
658 pins = "gpio10"; 595 pins = "gpio10";
659 function = "normal"; 596 function = "normal";
660 597
661 bias-pull-up; 598 bias-pull-up;
662 drive-push-pull; 599 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 600 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 601 };
665 602
666 vol_up_pin_a: vol-up-active-state { 603 vol_up_pin_a: vol-up-active-state {
667 pins = "gpio6"; 604 pins = "gpio6";
668 function = "normal"; 605 function = "normal";
669 input-enable; 606 input-enable;
670 bias-pull-up; 607 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 608 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 609 };
673 }; 610 };
674 611
675 &pm8998_resin { !! 612 &pm8998_pon {
676 linux,code = <KEY_VOLUMEDOWN>; !! 613 resin {
677 status = "okay"; !! 614 compatible = "qcom,pm8941-resin";
>> 615 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
>> 616 debounce = <15625>;
>> 617 bias-pull-up;
>> 618 linux,code = <KEY_VOLUMEDOWN>;
>> 619 };
678 }; 620 };
679 621
680 &pmi8998_lpg { 622 &pmi8998_lpg {
681 status = "okay"; 623 status = "okay";
682 624
683 qcom,power-source = <1>; 625 qcom,power-source = <1>;
684 626
685 led@3 { 627 led@3 {
686 reg = <3>; 628 reg = <3>;
687 color = <LED_COLOR_ID_GREEN>; 629 color = <LED_COLOR_ID_GREEN>;
688 function = LED_FUNCTION_HEARTB 630 function = LED_FUNCTION_HEARTBEAT;
689 function-enumerator = <3>; 631 function-enumerator = <3>;
690 632
691 linux,default-trigger = "heart 633 linux,default-trigger = "heartbeat";
692 default-state = "on"; 634 default-state = "on";
693 }; 635 };
694 636
695 led@4 { 637 led@4 {
696 reg = <4>; 638 reg = <4>;
697 color = <LED_COLOR_ID_GREEN>; 639 color = <LED_COLOR_ID_GREEN>;
698 function = LED_FUNCTION_INDICA 640 function = LED_FUNCTION_INDICATOR;
699 function-enumerator = <2>; 641 function-enumerator = <2>;
700 }; 642 };
701 643
702 led@5 { 644 led@5 {
703 reg = <5>; 645 reg = <5>;
704 color = <LED_COLOR_ID_GREEN>; 646 color = <LED_COLOR_ID_GREEN>;
705 function = LED_FUNCTION_INDICA 647 function = LED_FUNCTION_INDICATOR;
706 function-enumerator = <1>; 648 function-enumerator = <1>;
707 }; 649 };
708 }; 650 };
709 651
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 652 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 653 &q6afedai {
712 dai@22 { !! 654 qi2s@22 {
713 reg = <QUATERNARY_MI2S_RX>; 655 reg = <QUATERNARY_MI2S_RX>;
714 qcom,sd-lines = <0 1 2 3>; 656 qcom,sd-lines = <0 1 2 3>;
715 }; 657 };
716 }; 658 };
717 659
718 &q6asmdai { 660 &q6asmdai {
719 dai@0 { 661 dai@0 {
720 reg = <0>; 662 reg = <0>;
721 }; 663 };
722 664
723 dai@1 { 665 dai@1 {
724 reg = <1>; 666 reg = <1>;
725 }; 667 };
726 668
727 dai@2 { 669 dai@2 {
728 reg = <2>; 670 reg = <2>;
729 }; 671 };
730 672
731 dai@3 { 673 dai@3 {
732 reg = <3>; 674 reg = <3>;
733 direction = <2>; 675 direction = <2>;
734 is-compress-dai; 676 is-compress-dai;
735 }; 677 };
736 }; 678 };
737 679
738 &qupv3_id_0 { 680 &qupv3_id_0 {
739 status = "okay"; 681 status = "okay";
740 }; 682 };
741 683
742 &qupv3_id_1 { 684 &qupv3_id_1 {
743 status = "okay"; 685 status = "okay";
744 }; 686 };
745 687
746 &sdhc_2 { 688 &sdhc_2 {
747 status = "okay"; 689 status = "okay";
748 690
749 pinctrl-names = "default"; 691 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 692 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 693
752 vmmc-supply = <&vreg_l21a_2p95>; 694 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 695 vqmmc-supply = <&vreg_l13a_2p95>;
754 696
755 bus-width = <4>; 697 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 698 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 699 };
758 700
759 &sound { 701 &sound {
760 compatible = "qcom,db845c-sndcard", "q !! 702 compatible = "qcom,db845c-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 703 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 704 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 705 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 706 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 707 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 708 pinctrl-names = "default";
767 model = "DB845c"; 709 model = "DB845c";
768 audio-routing = 710 audio-routing =
769 "RX_BIAS", "MCLK", 711 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 712 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 713 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 714 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 715 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 716 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 717 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 718 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 719 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 720 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 721 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 722 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 723 "MultiMedia3 Capture", "MM_UL3";
782 724
783 mm1-dai-link { 725 mm1-dai-link {
784 link-name = "MultiMedia1"; 726 link-name = "MultiMedia1";
785 cpu { 727 cpu {
786 sound-dai = <&q6asmdai 728 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 729 };
788 }; 730 };
789 731
790 mm2-dai-link { 732 mm2-dai-link {
791 link-name = "MultiMedia2"; 733 link-name = "MultiMedia2";
792 cpu { 734 cpu {
793 sound-dai = <&q6asmdai 735 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 736 };
795 }; 737 };
796 738
797 mm3-dai-link { 739 mm3-dai-link {
798 link-name = "MultiMedia3"; 740 link-name = "MultiMedia3";
799 cpu { 741 cpu {
800 sound-dai = <&q6asmdai 742 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 743 };
802 }; 744 };
803 745
804 mm4-dai-link { 746 mm4-dai-link {
805 link-name = "MultiMedia4"; 747 link-name = "MultiMedia4";
806 cpu { 748 cpu {
807 sound-dai = <&q6asmdai 749 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 750 };
809 }; 751 };
810 752
811 hdmi-dai-link { 753 hdmi-dai-link {
812 link-name = "HDMI Playback"; 754 link-name = "HDMI Playback";
813 cpu { 755 cpu {
814 sound-dai = <&q6afedai 756 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 757 };
816 758
817 platform { 759 platform {
818 sound-dai = <&q6routin 760 sound-dai = <&q6routing>;
819 }; 761 };
820 762
821 codec { 763 codec {
822 sound-dai = <<9611_c 764 sound-dai = <<9611_codec 0>;
823 }; 765 };
824 }; 766 };
825 767
826 slim-dai-link { 768 slim-dai-link {
827 link-name = "SLIM Playback"; 769 link-name = "SLIM Playback";
828 cpu { 770 cpu {
829 sound-dai = <&q6afedai 771 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 772 };
831 773
832 platform { 774 platform {
833 sound-dai = <&q6routin 775 sound-dai = <&q6routing>;
834 }; 776 };
835 777
836 codec { 778 codec {
837 sound-dai = <&left_spk 779 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 780 };
839 }; 781 };
840 782
841 slimcap-dai-link { 783 slimcap-dai-link {
842 link-name = "SLIM Capture"; 784 link-name = "SLIM Capture";
843 cpu { 785 cpu {
844 sound-dai = <&q6afedai 786 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 787 };
846 788
847 platform { 789 platform {
848 sound-dai = <&q6routin 790 sound-dai = <&q6routing>;
849 }; 791 };
850 792
851 codec { 793 codec {
852 sound-dai = <&wcd9340 794 sound-dai = <&wcd9340 1>;
853 }; 795 };
854 }; 796 };
855 }; 797 };
856 798
857 &spi0 { 799 &spi0 {
858 status = "okay"; 800 status = "okay";
859 pinctrl-names = "default"; 801 pinctrl-names = "default";
860 pinctrl-0 = <&qup_spi0_default>; 802 pinctrl-0 = <&qup_spi0_default>;
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; 803 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
862 804
863 can@0 { 805 can@0 {
864 compatible = "microchip,mcp251 806 compatible = "microchip,mcp2517fd";
865 reg = <0>; 807 reg = <0>;
866 clocks = <&clk40M>; 808 clocks = <&clk40M>;
867 interrupts-extended = <&tlmm 1 809 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
868 spi-max-frequency = <10000000> 810 spi-max-frequency = <10000000>;
869 vdd-supply = <&vdc_5v>; 811 vdd-supply = <&vdc_5v>;
870 xceiver-supply = <&vdc_5v>; 812 xceiver-supply = <&vdc_5v>;
871 }; 813 };
872 }; 814 };
873 815
874 &spi2 { 816 &spi2 {
875 /* On Low speed expansion */ 817 /* On Low speed expansion */
>> 818 label = "LS-SPI0";
876 status = "okay"; 819 status = "okay";
877 }; 820 };
878 821
879 &tlmm { 822 &tlmm {
880 cam0_default: cam0-default-state { !! 823 cam0_default: cam0_default {
881 rst-pins { !! 824 rst {
882 pins = "gpio9"; 825 pins = "gpio9";
883 function = "gpio"; 826 function = "gpio";
884 827
885 drive-strength = <16>; 828 drive-strength = <16>;
886 bias-disable; 829 bias-disable;
887 }; 830 };
888 831
889 mclk0-pins { !! 832 mclk0 {
890 pins = "gpio13"; 833 pins = "gpio13";
891 function = "cam_mclk"; 834 function = "cam_mclk";
892 835
893 drive-strength = <16>; 836 drive-strength = <16>;
894 bias-disable; 837 bias-disable;
895 }; 838 };
896 }; 839 };
897 840
898 cam3_default: cam3-default-state { !! 841 cam3_default: cam3_default {
899 rst-pins { !! 842 rst {
900 function = "gpio"; 843 function = "gpio";
901 pins = "gpio21"; 844 pins = "gpio21";
902 845
903 drive-strength = <16>; 846 drive-strength = <16>;
904 bias-disable; 847 bias-disable;
905 }; 848 };
906 849
907 mclk3-pins { !! 850 mclk3 {
908 function = "cam_mclk"; 851 function = "cam_mclk";
909 pins = "gpio16"; 852 pins = "gpio16";
910 853
911 drive-strength = <16>; 854 drive-strength = <16>;
912 bias-disable; 855 bias-disable;
913 }; 856 };
914 }; 857 };
915 858
916 dsi_sw_sel: dsi-sw-sel-state { !! 859 dsi_sw_sel: dsi-sw-sel {
917 pins = "gpio120"; 860 pins = "gpio120";
918 function = "gpio"; 861 function = "gpio";
919 862
920 drive-strength = <2>; 863 drive-strength = <2>;
921 bias-disable; 864 bias-disable;
922 output-high; 865 output-high;
923 }; 866 };
924 867
925 lt9611_irq_pin: lt9611-irq-state { !! 868 lt9611_irq_pin: lt9611-irq {
926 pins = "gpio84"; 869 pins = "gpio84";
927 function = "gpio"; 870 function = "gpio";
928 bias-disable; 871 bias-disable;
929 }; 872 };
930 873
931 pcie0_default_state: pcie0-default-sta !! 874 pcie0_default_state: pcie0-default {
932 clkreq-pins { !! 875 clkreq {
933 pins = "gpio36"; 876 pins = "gpio36";
934 function = "pci_e0"; 877 function = "pci_e0";
935 bias-pull-up; 878 bias-pull-up;
936 }; 879 };
937 880
938 reset-n-pins { !! 881 reset-n {
939 pins = "gpio35"; 882 pins = "gpio35";
940 function = "gpio"; 883 function = "gpio";
941 884
942 drive-strength = <2>; 885 drive-strength = <2>;
943 output-low; 886 output-low;
944 bias-pull-down; 887 bias-pull-down;
945 }; 888 };
946 889
947 wake-n-pins { !! 890 wake-n {
948 pins = "gpio37"; 891 pins = "gpio37";
949 function = "gpio"; 892 function = "gpio";
950 893
951 drive-strength = <2>; 894 drive-strength = <2>;
952 bias-pull-up; 895 bias-pull-up;
953 }; 896 };
954 }; 897 };
955 898
956 pcie0_pwren_state: pcie0-pwren-state { !! 899 pcie0_pwren_state: pcie0-pwren {
957 pins = "gpio90"; 900 pins = "gpio90";
958 function = "gpio"; 901 function = "gpio";
959 902
960 drive-strength = <2>; 903 drive-strength = <2>;
961 bias-disable; 904 bias-disable;
962 }; 905 };
963 906
964 pcie1_default_state: pcie1-default-sta !! 907 pcie1_default_state: pcie1-default {
965 perst-n-pins { !! 908 perst-n {
966 pins = "gpio102"; 909 pins = "gpio102";
967 function = "gpio"; 910 function = "gpio";
968 911
969 drive-strength = <16>; 912 drive-strength = <16>;
970 bias-disable; 913 bias-disable;
971 }; 914 };
972 915
973 clkreq-pins { !! 916 clkreq {
974 pins = "gpio103"; 917 pins = "gpio103";
975 function = "pci_e1"; 918 function = "pci_e1";
976 bias-pull-up; 919 bias-pull-up;
977 }; 920 };
978 921
979 wake-n-pins { !! 922 wake-n {
980 pins = "gpio11"; 923 pins = "gpio11";
981 function = "gpio"; 924 function = "gpio";
982 925
983 drive-strength = <2>; 926 drive-strength = <2>;
984 bias-pull-up; 927 bias-pull-up;
985 }; 928 };
986 929
987 reset-n-pins { !! 930 reset-n {
988 pins = "gpio75"; 931 pins = "gpio75";
989 function = "gpio"; 932 function = "gpio";
990 933
991 drive-strength = <16>; 934 drive-strength = <16>;
992 bias-pull-up; 935 bias-pull-up;
993 output-high; 936 output-high;
994 }; 937 };
995 }; 938 };
996 939
997 sdc2_default_state: sdc2-default-state !! 940 sdc2_default_state: sdc2-default {
998 clk-pins { !! 941 clk {
999 pins = "sdc2_clk"; 942 pins = "sdc2_clk";
1000 bias-disable; 943 bias-disable;
1001 944
1002 /* 945 /*
1003 * It seems that mmc_ 946 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 947 * strength is not 16 on clk, cmd, and data pins.
1005 */ 948 */
1006 drive-strength = <16> 949 drive-strength = <16>;
1007 }; 950 };
1008 951
1009 cmd-pins { !! 952 cmd {
1010 pins = "sdc2_cmd"; 953 pins = "sdc2_cmd";
1011 bias-pull-up; 954 bias-pull-up;
1012 drive-strength = <10> 955 drive-strength = <10>;
1013 }; 956 };
1014 957
1015 data-pins { !! 958 data {
1016 pins = "sdc2_data"; 959 pins = "sdc2_data";
1017 bias-pull-up; 960 bias-pull-up;
1018 drive-strength = <10> 961 drive-strength = <10>;
1019 }; 962 };
1020 }; 963 };
1021 964
1022 sdc2_card_det_n: sd-card-det-n-state !! 965 sdc2_card_det_n: sd-card-det-n {
1023 pins = "gpio126"; 966 pins = "gpio126";
1024 function = "gpio"; 967 function = "gpio";
1025 bias-pull-up; 968 bias-pull-up;
1026 }; 969 };
>> 970
>> 971 wcd_intr_default: wcd_intr_default {
>> 972 pins = <54>;
>> 973 function = "gpio";
>> 974
>> 975 input-enable;
>> 976 bias-pull-down;
>> 977 drive-strength = <2>;
>> 978 };
1027 }; 979 };
1028 980
1029 &uart3 { 981 &uart3 {
1030 label = "LS-UART0"; 982 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; <<
1032 <<
1033 status = "disabled"; 983 status = "disabled";
1034 }; 984 };
1035 985
1036 &uart6 { 986 &uart6 {
1037 status = "okay"; 987 status = "okay";
1038 988
1039 pinctrl-0 = <&qup_uart6_4pin>; <<
1040 <<
1041 bluetooth { 989 bluetooth {
1042 compatible = "qcom,wcn3990-bt 990 compatible = "qcom,wcn3990-bt";
1043 991
1044 vddio-supply = <&vreg_s4a_1p8 992 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 993 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 994 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 995 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 996 max-speed = <3200000>;
1049 }; 997 };
1050 }; 998 };
1051 999
1052 &uart9 { 1000 &uart9 {
1053 label = "LS-UART1"; 1001 label = "LS-UART1";
1054 status = "okay"; 1002 status = "okay";
1055 }; 1003 };
1056 1004
1057 &usb_1 { 1005 &usb_1 {
1058 status = "okay"; 1006 status = "okay";
1059 }; 1007 };
1060 1008
1061 &usb_1_dwc3 { 1009 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 1010 dr_mode = "peripheral";
1063 }; 1011 };
1064 1012
1065 &usb_1_hsphy { 1013 &usb_1_hsphy {
1066 status = "okay"; 1014 status = "okay";
1067 1015
1068 vdd-supply = <&vreg_l1a_0p875>; 1016 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 1017 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1018 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 1019
1072 qcom,imp-res-offset-value = <8>; 1020 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1021 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 1022 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 1023 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 1024 };
1077 1025
1078 &usb_1_qmpphy { 1026 &usb_1_qmpphy {
1079 status = "okay"; 1027 status = "okay";
1080 1028
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 1029 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 1030 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 1031 };
1084 1032
1085 &usb_2 { 1033 &usb_2 {
1086 status = "okay"; 1034 status = "okay";
1087 }; 1035 };
1088 1036
1089 &usb_2_dwc3 { 1037 &usb_2_dwc3 {
1090 dr_mode = "host"; 1038 dr_mode = "host";
1091 }; 1039 };
1092 1040
1093 &usb_2_hsphy { 1041 &usb_2_hsphy {
1094 status = "okay"; 1042 status = "okay";
1095 1043
1096 vdd-supply = <&vreg_l1a_0p875>; 1044 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 1045 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1046 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 1047
1100 qcom,imp-res-offset-value = <8>; 1048 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1049 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 1050 };
1103 1051
1104 &usb_2_qmpphy { 1052 &usb_2_qmpphy {
1105 status = "okay"; 1053 status = "okay";
1106 1054
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 1055 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 1056 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 1057 };
1110 1058
1111 &ufs_mem_hc { 1059 &ufs_mem_hc {
1112 status = "okay"; 1060 status = "okay";
1113 1061
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 1062 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 1063
1116 vcc-supply = <&vreg_l20a_2p95>; 1064 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 1065 vcc-max-microamp = <800000>;
1118 }; 1066 };
1119 1067
1120 &ufs_mem_phy { 1068 &ufs_mem_phy {
1121 status = "okay"; 1069 status = "okay";
1122 1070
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 1071 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 1072 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 1073 };
1126 1074
1127 &venus { 1075 &venus {
1128 status = "okay"; 1076 status = "okay";
1129 }; 1077 };
1130 1078
1131 &wcd9340 { !! 1079 &wcd9340{
>> 1080 pinctrl-0 = <&wcd_intr_default>;
>> 1081 pinctrl-names = "default";
>> 1082 clock-names = "extclk";
>> 1083 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H 1084 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1085 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1086 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1087 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1088 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1089 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1090
1139 swm: soundwire@c85 { !! 1091 swm: swm@c85 {
1140 left_spkr: speaker@0,1 { !! 1092 left_spkr: wsa8810-left{
1141 compatible = "sdw1021 1093 compatible = "sdw10217201000";
1142 reg = <0 1>; 1094 reg = <0 1>;
1143 powerdown-gpios = <&w 1095 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1096 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1097 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1098 #sound-dai-cells = <0>;
1147 }; 1099 };
1148 1100
1149 right_spkr: speaker@0,2 { !! 1101 right_spkr: wsa8810-right{
1150 compatible = "sdw1021 1102 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w 1103 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1104 reg = <0 2>;
1153 #thermal-sensor-cells 1105 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1106 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1107 #sound-dai-cells = <0>;
1156 }; 1108 };
1157 }; 1109 };
1158 }; 1110 };
1159 1111
1160 &wifi { 1112 &wifi {
1161 status = "okay"; 1113 status = "okay";
1162 1114
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1115 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1116 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1117 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1118 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1119
1168 qcom,snoc-host-cap-8bit-quirk; 1120 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th 1121 qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
1170 }; 1122 };
1171 1123
1172 /* PINCTRL - additions to nodes defined in sd 1124 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1125 &qup_spi2_default {
1174 drive-strength = <16>; !! 1126 pinconf {
>> 1127 pins = "gpio27", "gpio28", "gpio29", "gpio30";
>> 1128 drive-strength = <16>;
>> 1129 };
>> 1130 };
>> 1131
>> 1132 &qup_uart3_default{
>> 1133 pinmux {
>> 1134 pins = "gpio41", "gpio42", "gpio43", "gpio44";
>> 1135 function = "qup3";
>> 1136 };
1175 }; 1137 };
1176 1138
1177 &qup_i2c10_default { 1139 &qup_i2c10_default {
1178 drive-strength = <2>; !! 1140 pinconf {
1179 bias-disable; !! 1141 pins = "gpio55", "gpio56";
>> 1142 drive-strength = <2>;
>> 1143 bias-disable;
>> 1144 };
>> 1145 };
>> 1146
>> 1147 &qup_uart6_default {
>> 1148 pinmux {
>> 1149 pins = "gpio45", "gpio46", "gpio47", "gpio48";
>> 1150 function = "qup6";
>> 1151 };
>> 1152
>> 1153 cts {
>> 1154 pins = "gpio45";
>> 1155 bias-disable;
>> 1156 };
>> 1157
>> 1158 rts-tx {
>> 1159 pins = "gpio46", "gpio47";
>> 1160 drive-strength = <2>;
>> 1161 bias-disable;
>> 1162 };
>> 1163
>> 1164 rx {
>> 1165 pins = "gpio48";
>> 1166 bias-pull-up;
>> 1167 };
1180 }; 1168 };
1181 1169
1182 &qup_uart9_rx { !! 1170 &qup_uart9_default {
1183 drive-strength = <2>; !! 1171 pinconf-tx {
1184 bias-pull-up; !! 1172 pins = "gpio4";
>> 1173 drive-strength = <2>;
>> 1174 bias-disable;
>> 1175 };
>> 1176
>> 1177 pinconf-rx {
>> 1178 pins = "gpio5";
>> 1179 drive-strength = <2>;
>> 1180 bias-pull-up;
>> 1181 };
1185 }; 1182 };
1186 1183
1187 &qup_uart9_tx { !! 1184 &pm8998_gpio {
1188 drive-strength = <2>; !! 1185
1189 bias-disable; !! 1186 };
>> 1187
>> 1188 &cci {
>> 1189 status = "okay";
>> 1190 };
>> 1191
>> 1192 &camss {
>> 1193 vdda-phy-supply = <&vreg_l1a_0p875>;
>> 1194 vdda-pll-supply = <&vreg_l26a_1p2>;
>> 1195
>> 1196 status = "ok";
>> 1197
>> 1198 ports {
>> 1199 #address-cells = <1>;
>> 1200 #size-cells = <0>;
>> 1201 port@0 {
>> 1202 reg = <0>;
>> 1203 csiphy0_ep: endpoint {
>> 1204 data-lanes = <0 1 2 3>;
>> 1205 remote-endpoint = <&ov8856_ep>;
>> 1206 };
>> 1207 };
>> 1208 };
>> 1209 };
>> 1210
>> 1211 &cci_i2c0 {
>> 1212 camera@10 {
>> 1213 compatible = "ovti,ov8856";
>> 1214 reg = <0x10>;
>> 1215
>> 1216 // CAM0_RST_N
>> 1217 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1218 pinctrl-names = "default";
>> 1219 pinctrl-0 = <&cam0_default>;
>> 1220 gpios = <&tlmm 13 0>,
>> 1221 <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1222
>> 1223 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
>> 1224 clock-names = "xvclk";
>> 1225 clock-frequency = <19200000>;
>> 1226
>> 1227 /* The &vreg_s4a_1p8 trace is powered on as a,
>> 1228 * so it is represented by a fixed regulator.
>> 1229 *
>> 1230 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
>> 1231 * both have to be enabled through the power management
>> 1232 * gpios.
>> 1233 */
>> 1234 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1235
>> 1236 dovdd-supply = <&vreg_lvs1a_1p8>;
>> 1237 avdd-supply = <&cam0_avdd_2v8>;
>> 1238 dvdd-supply = <&cam0_dvdd_1v2>;
>> 1239
>> 1240 status = "ok";
>> 1241
>> 1242 port {
>> 1243 ov8856_ep: endpoint {
>> 1244 link-frequencies = /bits/ 64
>> 1245 <360000000 180000000>;
>> 1246 data-lanes = <1 2 3 4>;
>> 1247 remote-endpoint = <&csiphy0_ep>;
>> 1248 };
>> 1249 };
>> 1250 };
>> 1251 };
>> 1252
>> 1253 &cci_i2c1 {
>> 1254 camera@60 {
>> 1255 compatible = "ovti,ov7251";
>> 1256
>> 1257 // I2C address as per ov7251.txt linux documentation
>> 1258 reg = <0x60>;
>> 1259
>> 1260 // CAM3_RST_N
>> 1261 enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
>> 1262 pinctrl-names = "default";
>> 1263 pinctrl-0 = <&cam3_default>;
>> 1264 gpios = <&tlmm 16 0>,
>> 1265 <&tlmm 21 0>;
>> 1266
>> 1267 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
>> 1268 clock-names = "xclk";
>> 1269 clock-frequency = <24000000>;
>> 1270
>> 1271 /* The &vreg_s4a_1p8 trace always powered on.
>> 1272 *
>> 1273 * The 2.8V vdda-supply regulator is enabled when the
>> 1274 * vreg_s4a_1p8 trace is pulled high.
>> 1275 * It too is represented by a fixed regulator.
>> 1276 *
>> 1277 * No 1.2V vddd-supply regulator is used.
>> 1278 */
>> 1279 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
>> 1280
>> 1281 vdddo-supply = <&vreg_lvs1a_1p8>;
>> 1282 vdda-supply = <&cam3_avdd_2v8>;
>> 1283
>> 1284 status = "disable";
>> 1285
>> 1286 port {
>> 1287 ov7251_ep: endpoint {
>> 1288 data-lanes = <0 1>;
>> 1289 // remote-endpoint = <&csiphy3_ep>;
>> 1290 };
>> 1291 };
>> 1292 };
1190 }; 1293 };
1191 1294
1192 /* PINCTRL - additions to nodes defined in sd 1295 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1193 &qup_spi0_default { 1296 &qup_spi0_default {
1194 drive-strength = <6>; !! 1297 config {
1195 bias-disable; !! 1298 drive-strength = <6>;
>> 1299 bias-disable;
>> 1300 };
1196 }; 1301 };
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