1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 13 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" <<
15 #include "pm8998.dtsi" 14 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 15 #include "pmi8998.dtsi"
17 16
18 / { 17 / {
19 model = "Thundercomm Dragonboard 845c" 18 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 19 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; 20 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>; 21 qcom,board-id = <8 0>;
23 22
24 aliases { 23 aliases {
25 serial0 = &uart9; 24 serial0 = &uart9;
26 serial1 = &uart6; !! 25 hsuart0 = &uart6;
27 }; 26 };
28 27
29 chosen { 28 chosen {
30 stdout-path = "serial0:115200n 29 stdout-path = "serial0:115200n8";
31 }; 30 };
32 31
33 /* Fixed crystal oscillator dedicated 32 /* Fixed crystal oscillator dedicated to MCP2517FD */
34 clk40M: can-clock { 33 clk40M: can-clock {
35 compatible = "fixed-clock"; 34 compatible = "fixed-clock";
36 #clock-cells = <0>; 35 #clock-cells = <0>;
37 clock-frequency = <40000000>; 36 clock-frequency = <40000000>;
38 }; 37 };
39 38
40 dc12v: dc12v-regulator { 39 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 40 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 41 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 42 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 43 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 44 regulator-always-on;
46 }; 45 };
47 46
48 gpio-keys { 47 gpio-keys {
49 compatible = "gpio-keys"; 48 compatible = "gpio-keys";
50 autorepeat; 49 autorepeat;
51 50
52 pinctrl-names = "default"; 51 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 52 pinctrl-0 = <&vol_up_pin_a>;
54 53
55 key-vol-up { 54 key-vol-up {
56 label = "Volume Up"; 55 label = "Volume Up";
57 linux,code = <KEY_VOLU 56 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios !! 57 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
59 }; 58 };
60 }; 59 };
61 60
62 leds { 61 leds {
63 compatible = "gpio-leds"; 62 compatible = "gpio-leds";
64 63
65 led-0 { 64 led-0 {
66 label = "green:user4"; 65 label = "green:user4";
67 function = LED_FUNCTIO 66 function = LED_FUNCTION_INDICATOR;
68 color = <LED_COLOR_ID_ 67 color = <LED_COLOR_ID_GREEN>;
69 gpios = <&pm8998_gpios !! 68 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
70 default-state = "off"; 69 default-state = "off";
71 panic-indicator; 70 panic-indicator;
72 }; 71 };
73 72
74 led-1 { 73 led-1 {
75 label = "yellow:wlan"; 74 label = "yellow:wlan";
76 function = LED_FUNCTIO 75 function = LED_FUNCTION_WLAN;
77 color = <LED_COLOR_ID_ 76 color = <LED_COLOR_ID_YELLOW>;
78 gpios = <&pm8998_gpios !! 77 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
79 linux,default-trigger 78 linux,default-trigger = "phy0tx";
80 default-state = "off"; 79 default-state = "off";
81 }; 80 };
82 81
83 led-2 { 82 led-2 {
84 label = "blue:bt"; 83 label = "blue:bt";
85 function = LED_FUNCTIO 84 function = LED_FUNCTION_BLUETOOTH;
86 color = <LED_COLOR_ID_ 85 color = <LED_COLOR_ID_BLUE>;
87 gpios = <&pm8998_gpios !! 86 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger 87 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 88 default-state = "off";
90 }; 89 };
91 }; 90 };
92 91
93 hdmi-out { 92 hdmi-out {
94 compatible = "hdmi-connector"; 93 compatible = "hdmi-connector";
95 type = "a"; 94 type = "a";
96 95
97 port { 96 port {
98 hdmi_con: endpoint { 97 hdmi_con: endpoint {
99 remote-endpoin 98 remote-endpoint = <<9611_out>;
100 }; 99 };
101 }; 100 };
102 }; 101 };
103 102
104 reserved-memory { 103 reserved-memory {
105 /* Cont splash region set up b 104 /* Cont splash region set up by the bootloader */
106 cont_splash_mem: framebuffer@9 105 cont_splash_mem: framebuffer@9d400000 {
107 reg = <0x0 0x9d400000 106 reg = <0x0 0x9d400000 0x0 0x2400000>;
108 no-map; 107 no-map;
109 }; 108 };
110 }; 109 };
111 110
112 lt9611_1v8: lt9611-vdd18-regulator { 111 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 112 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 113 regulator-name = "LT9611_1V8";
115 114
116 vin-supply = <&vdc_5v>; 115 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 116 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 117 regulator-max-microvolt = <1800000>;
119 118
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 119 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 120 enable-active-high;
122 }; 121 };
123 122
124 lt9611_3v3: lt9611-3v3 { 123 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 124 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 125 regulator-name = "LT9611_3V3";
127 126
128 vin-supply = <&vdc_3v3>; 127 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 128 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 129 regulator-max-microvolt = <3300000>;
131 130
132 /* !! 131 // TODO: make it possible to drive same GPIO from two clients
133 * TODO: make it possible to d !! 132 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
134 * gpio = <&tlmm 89 GPIO_ACTIV !! 133 // enable-active-high;
135 * enable-active-high; <<
136 */ <<
137 }; 134 };
138 135
139 pcie0_1p05v: pcie-0-1p05v-regulator { 136 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 137 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 138 regulator-name = "PCIE0_1.05V";
142 139
143 vin-supply = <&vbat>; 140 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 141 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 142 regulator-max-microvolt = <1050000>;
146 143
147 /* !! 144 // TODO: make it possible to drive same GPIO from two clients
148 * TODO: make it possible to d !! 145 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
149 * gpio = <&tlmm 90 GPIO_ACTIV !! 146 // enable-active-high;
150 * enable-active-high; <<
151 */ <<
152 }; 147 };
153 148
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator !! 149 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
155 compatible = "regulator-fixed" 150 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 151 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 152 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 153 regulator-max-microvolt = <1200000>;
159 enable-active-high; 154 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ !! 155 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 156 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 157 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 158 vin-supply = <&vbat>;
164 }; 159 };
165 160
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator !! 161 cam0_avdd_2v8: reg_cam0_avdd_2v8 {
167 compatible = "regulator-fixed" 162 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 163 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 164 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 165 regulator-max-microvolt = <2800000>;
171 enable-active-high; 166 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ !! 167 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 168 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 169 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 170 vin-supply = <&vbat>;
176 }; 171 };
177 172
178 /* This regulator is enabled when the 173 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator !! 174 cam3_avdd_2v8: reg_cam3_avdd_2v8 {
180 compatible = "regulator-fixed" 175 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 176 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 177 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 178 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 179 regulator-always-on;
185 vin-supply = <&vbat>; 180 vin-supply = <&vbat>;
186 }; 181 };
187 182
188 pcie0_3p3v_dual: vldo-3v3-regulator { 183 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 184 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 185 regulator-name = "VLDO_3V3";
191 186
192 vin-supply = <&vbat>; 187 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 188 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 189 regulator-max-microvolt = <3300000>;
195 190
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 191 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 192 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 193
205 pinctrl-names = "default"; 194 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 195 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 196 };
208 197
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 198 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 199 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 200 regulator-name = "V5P0_HDMIOUT";
212 201
213 vin-supply = <&vdc_5v>; 202 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 203 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 204 regulator-max-microvolt = <500000>;
216 205
217 /* !! 206 // TODO: make it possible to drive same GPIO from two clients
218 * TODO: make it possible to d !! 207 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
219 * gpio = <&tlmm 89 GPIO_ACTIV !! 208 // enable-active-high;
220 * enable-active-high; <<
221 */ <<
222 }; 209 };
223 210
224 vbat: vbat-regulator { 211 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 212 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 213 regulator-name = "VBAT";
227 214
228 vin-supply = <&dc12v>; 215 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 216 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 217 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 218 regulator-always-on;
232 }; 219 };
233 220
234 vbat_som: vbat-som-regulator { 221 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 222 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 223 regulator-name = "VBAT_SOM";
237 224
238 vin-supply = <&dc12v>; 225 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 226 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 227 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 228 regulator-always-on;
242 }; 229 };
243 230
244 vdc_3v3: vdc-3v3-regulator { 231 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 232 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 233 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 234 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 235 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 236 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 237 regulator-always-on;
251 }; 238 };
252 239
253 vdc_5v: vdc-5v-regulator { 240 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 241 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 242 regulator-name = "VDC_5V";
256 243
257 vin-supply = <&dc12v>; 244 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 245 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 246 regulator-max-microvolt = <500000>;
260 regulator-always-on; 247 regulator-always-on;
261 }; 248 };
262 249
263 vreg_s4a_1p8: vreg-s4a-1p8 { 250 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 251 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 252 regulator-name = "vreg_s4a_1p8";
266 253
267 regulator-min-microvolt = <180 254 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 255 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 256 regulator-always-on;
270 }; 257 };
271 258
272 vph_pwr: vph-pwr-regulator { 259 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 260 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 261 regulator-name = "vph_pwr";
275 262
276 vin-supply = <&vbat_som>; 263 vin-supply = <&vbat_som>;
277 }; 264 };
278 }; 265 };
279 266
280 &adsp_pas { 267 &adsp_pas {
281 status = "okay"; 268 status = "okay";
282 269
283 firmware-name = "qcom/sdm845/adsp.mbn" 270 firmware-name = "qcom/sdm845/adsp.mbn";
284 }; 271 };
285 272
286 &apps_rsc { 273 &apps_rsc {
287 regulators-0 { 274 regulators-0 {
288 compatible = "qcom,pm8998-rpmh 275 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 276 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 277 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 278 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 279 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 280 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 281 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 282 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 283 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 284 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 285 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 286 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 287 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 288 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 289 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 290 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 291 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 292 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 293 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 294 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 295 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 296 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 297 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 298 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 299 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 300 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 301 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 302 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 303 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 304
318 vreg_s3a_1p35: smps3 { 305 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 306 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 307 regulator-max-microvolt = <1352000>;
321 }; 308 };
322 309
323 vreg_s5a_2p04: smps5 { 310 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 311 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 312 regulator-max-microvolt = <2040000>;
326 }; 313 };
327 314
328 vreg_s7a_1p025: smps7 { 315 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 316 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 317 regulator-max-microvolt = <1028000>;
331 }; 318 };
332 319
333 vreg_l1a_0p875: ldo1 { 320 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 321 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 322 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 323 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 324 };
338 325
339 vreg_l5a_0p8: ldo5 { 326 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 327 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 328 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 329 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 330 };
344 331
345 vreg_l12a_1p8: ldo12 { 332 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 333 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 334 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 335 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 336 };
350 337
351 vreg_l7a_1p8: ldo7 { 338 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 339 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 340 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 341 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 342 };
356 343
357 vreg_l13a_2p95: ldo13 { 344 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 345 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 346 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 347 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 348 };
362 349
363 vreg_l17a_1p3: ldo17 { 350 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 351 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 352 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 353 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 354 };
368 355
369 vreg_l20a_2p95: ldo20 { 356 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 357 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 358 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 359 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 360 };
374 361
375 vreg_l21a_2p95: ldo21 { 362 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 363 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 364 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 365 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 366 };
380 367
381 vreg_l24a_3p075: ldo24 { 368 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 369 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 370 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 371 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 372 };
386 373
387 vreg_l25a_3p3: ldo25 { 374 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 375 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 376 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 377 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 378 };
392 379
393 vreg_l26a_1p2: ldo26 { 380 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 381 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 382 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 383 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 384 };
398 385
399 vreg_lvs1a_1p8: lvs1 { 386 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 387 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 388 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 389 regulator-always-on;
403 }; 390 };
404 391
405 vreg_lvs2a_1p8: lvs2 { 392 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 393 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 394 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 395 regulator-always-on;
409 }; 396 };
410 }; 397 };
411 398
412 regulators-1 { 399 regulators-1 {
413 compatible = "qcom,pmi8998-rpm 400 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 401 qcom,pmic-id = "b";
415 402
416 vdd-bob-supply = <&vph_pwr>; 403 vdd-bob-supply = <&vph_pwr>;
417 404
418 vreg_bob: bob { 405 vreg_bob: bob {
419 regulator-min-microvol 406 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 407 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 408 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 409 regulator-allow-bypass;
423 }; 410 };
424 }; 411 };
425 }; 412 };
426 413
427 &camss { !! 414 &cdsp_pas {
428 status = "okay"; 415 status = "okay";
>> 416 firmware-name = "qcom/sdm845/cdsp.mbn";
>> 417 };
429 418
430 vdda-phy-supply = <&vreg_l1a_0p875>; !! 419 &dsi0 {
431 vdda-pll-supply = <&vreg_l26a_1p2>; !! 420 status = "okay";
>> 421 vdda-supply = <&vreg_l26a_1p2>;
>> 422
>> 423 ports {
>> 424 port@1 {
>> 425 endpoint {
>> 426 remote-endpoint = <<9611_a>;
>> 427 data-lanes = <0 1 2 3>;
>> 428 };
>> 429 };
>> 430 };
432 }; 431 };
433 432
434 &cdsp_pas { !! 433 &dsi0_phy {
435 status = "okay"; 434 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" !! 435 vdds-supply = <&vreg_l1a_0p875>;
437 }; 436 };
438 437
439 &gcc { 438 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 439 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 440 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI 441 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
443 <GCC_LPASS_Q6_AXI_C 442 <GCC_LPASS_Q6_AXI_CLK>,
444 <GCC_LPASS_SWAY_CLK 443 <GCC_LPASS_SWAY_CLK>;
445 }; 444 };
446 445
447 &gmu { 446 &gmu {
448 status = "okay"; 447 status = "okay";
449 }; 448 };
450 449
451 &gpi_dma0 { 450 &gpi_dma0 {
452 status = "okay"; 451 status = "okay";
453 }; 452 };
454 453
455 &gpi_dma1 { 454 &gpi_dma1 {
456 status = "okay"; 455 status = "okay";
457 }; 456 };
458 457
459 &gpu { 458 &gpu {
460 status = "okay"; 459 status = "okay";
461 zap-shader { 460 zap-shader {
462 memory-region = <&gpu_mem>; 461 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 462 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 463 };
465 }; 464 };
466 465
467 &i2c10 { 466 &i2c10 {
468 status = "okay"; 467 status = "okay";
469 clock-frequency = <400000>; 468 clock-frequency = <400000>;
470 469
471 lt9611_codec: hdmi-bridge@3b { 470 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 471 compatible = "lontium,lt9611";
473 reg = <0x3b>; 472 reg = <0x3b>;
474 #sound-dai-cells = <1>; 473 #sound-dai-cells = <1>;
475 474
476 interrupts-extended = <&tlmm 8 475 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 476
478 reset-gpios = <&tlmm 128 GPIO_ 477 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 478
480 vdd-supply = <<9611_1v8>; 479 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 480 vcc-supply = <<9611_3v3>;
482 481
483 pinctrl-names = "default"; 482 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 483 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 484
486 ports { 485 ports {
487 #address-cells = <1>; 486 #address-cells = <1>;
488 #size-cells = <0>; 487 #size-cells = <0>;
489 488
490 port@0 { 489 port@0 {
491 reg = <0>; 490 reg = <0>;
492 491
493 lt9611_a: endp 492 lt9611_a: endpoint {
494 remote !! 493 remote-endpoint = <&dsi0_out>;
495 }; <<
496 }; <<
497 <<
498 port@1 { <<
499 reg = <1>; <<
500 <<
501 lt9611_b: endp <<
502 remote <<
503 }; 494 };
504 }; 495 };
505 496
506 port@2 { 497 port@2 {
507 reg = <2>; 498 reg = <2>;
508 499
509 lt9611_out: en 500 lt9611_out: endpoint {
510 remote 501 remote-endpoint = <&hdmi_con>;
511 }; 502 };
512 }; 503 };
513 }; 504 };
514 }; 505 };
515 }; 506 };
516 507
517 &i2c11 { 508 &i2c11 {
518 /* On Low speed expansion */ 509 /* On Low speed expansion */
519 clock-frequency = <100000>; 510 clock-frequency = <100000>;
>> 511 label = "LS-I2C1";
520 status = "okay"; 512 status = "okay";
521 }; 513 };
522 514
523 &i2c14 { 515 &i2c14 {
524 /* On Low speed expansion */ 516 /* On Low speed expansion */
525 clock-frequency = <100000>; 517 clock-frequency = <100000>;
>> 518 label = "LS-I2C0";
526 status = "okay"; 519 status = "okay";
527 }; 520 };
528 521
529 &mdss { 522 &mdss {
530 memory-region = <&cont_splash_mem>; 523 memory-region = <&cont_splash_mem>;
531 status = "okay"; 524 status = "okay";
532 }; 525 };
533 526
534 &mdss_dsi0 { <<
535 status = "okay"; <<
536 vdda-supply = <&vreg_l26a_1p2>; <<
537 <<
538 qcom,dual-dsi-mode; <<
539 qcom,master-dsi; <<
540 <<
541 ports { <<
542 port@1 { <<
543 endpoint { <<
544 remote-endpoin <<
545 data-lanes = < <<
546 }; <<
547 }; <<
548 }; <<
549 }; <<
550 <<
551 &mdss_dsi0_phy { <<
552 status = "okay"; <<
553 vdds-supply = <&vreg_l1a_0p875>; <<
554 }; <<
555 <<
556 &mdss_dsi1 { <<
557 vdda-supply = <&vreg_l26a_1p2>; <<
558 <<
559 qcom,dual-dsi-mode; <<
560 <<
561 /* DSI1 is slave, so use DSI0 clocks * <<
562 assigned-clock-parents = <&mdss_dsi0_p <<
563 <<
564 status = "okay"; <<
565 <<
566 ports { <<
567 port@1 { <<
568 endpoint { <<
569 remote-endpoin <<
570 data-lanes = < <<
571 }; <<
572 }; <<
573 }; <<
574 }; <<
575 <<
576 &mdss_dsi1_phy { <<
577 vdds-supply = <&vreg_l1a_0p875>; <<
578 status = "okay"; <<
579 }; <<
580 <<
581 &mss_pil { 527 &mss_pil {
582 status = "okay"; 528 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 529 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 530 };
585 531
586 &pcie0 { 532 &pcie0 {
587 status = "okay"; 533 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO 534 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI 535 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 536
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 537 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 538
593 pinctrl-names = "default"; 539 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 540 pinctrl-0 = <&pcie0_default_state>;
595 }; 541 };
596 542
597 &pcie0_phy { 543 &pcie0_phy {
598 status = "okay"; 544 status = "okay";
599 545
600 vdda-phy-supply = <&vreg_l1a_0p875>; 546 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 547 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 548 };
603 549
604 &pcie1 { 550 &pcie1 {
605 status = "okay"; 551 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L 552 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 553
608 pinctrl-names = "default"; 554 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 555 pinctrl-0 = <&pcie1_default_state>;
610 }; 556 };
611 557
612 &pcie1_phy { 558 &pcie1_phy {
613 status = "okay"; 559 status = "okay";
614 560
615 vdda-phy-supply = <&vreg_l1a_0p875>; 561 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 562 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 563 };
618 564
619 &pm8998_gpios { !! 565 &pm8998_gpio {
620 gpio-line-names = 566 gpio-line-names =
621 "NC", 567 "NC",
622 "NC", 568 "NC",
623 "WLAN_SW_CTRL", 569 "WLAN_SW_CTRL",
624 "NC", 570 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 571 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 572 "VOL_UP_N",
627 "NC", 573 "NC",
628 "ADC_IN1", 574 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 575 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 576 "CAM0_AVDD_EN",
631 "NC", 577 "NC",
632 "CAM0_DVDD_EN", 578 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 579 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 580 "DIV_CLK2",
635 "NC", 581 "NC",
636 "NC", 582 "NC",
637 "NC", 583 "NC",
638 "SMB_STAT", 584 "SMB_STAT",
639 "NC", 585 "NC",
640 "NC", 586 "NC",
641 "ADC_IN2", 587 "ADC_IN2",
642 "OPTION1", 588 "OPTION1",
643 "WCSS_PWR_REQ", 589 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 590 "PM845_GPIO24",
645 "OPTION2", 591 "OPTION2",
646 "PM845_SLB"; 592 "PM845_SLB";
647 593
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v 594 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
649 pins = "gpio12"; 595 pins = "gpio12";
650 function = "normal"; 596 function = "normal";
651 597
652 bias-pull-up; 598 bias-pull-up;
653 drive-push-pull; 599 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 600 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 601 };
656 602
657 cam0_avdd_2v8_en_default: cam0-avdd-2v 603 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
658 pins = "gpio10"; 604 pins = "gpio10";
659 function = "normal"; 605 function = "normal";
660 606
661 bias-pull-up; 607 bias-pull-up;
662 drive-push-pull; 608 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 609 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 610 };
665 611
666 vol_up_pin_a: vol-up-active-state { 612 vol_up_pin_a: vol-up-active-state {
667 pins = "gpio6"; 613 pins = "gpio6";
668 function = "normal"; 614 function = "normal";
669 input-enable; 615 input-enable;
670 bias-pull-up; 616 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 617 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 618 };
673 }; 619 };
674 620
675 &pm8998_resin { !! 621 &pm8998_pon {
676 linux,code = <KEY_VOLUMEDOWN>; !! 622 resin {
677 status = "okay"; !! 623 compatible = "qcom,pm8941-resin";
>> 624 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
>> 625 debounce = <15625>;
>> 626 bias-pull-up;
>> 627 linux,code = <KEY_VOLUMEDOWN>;
>> 628 };
678 }; 629 };
679 630
680 &pmi8998_lpg { 631 &pmi8998_lpg {
681 status = "okay"; 632 status = "okay";
682 633
683 qcom,power-source = <1>; 634 qcom,power-source = <1>;
684 635
685 led@3 { 636 led@3 {
686 reg = <3>; 637 reg = <3>;
687 color = <LED_COLOR_ID_GREEN>; 638 color = <LED_COLOR_ID_GREEN>;
688 function = LED_FUNCTION_HEARTB 639 function = LED_FUNCTION_HEARTBEAT;
689 function-enumerator = <3>; 640 function-enumerator = <3>;
690 641
691 linux,default-trigger = "heart 642 linux,default-trigger = "heartbeat";
692 default-state = "on"; 643 default-state = "on";
693 }; 644 };
694 645
695 led@4 { 646 led@4 {
696 reg = <4>; 647 reg = <4>;
697 color = <LED_COLOR_ID_GREEN>; 648 color = <LED_COLOR_ID_GREEN>;
698 function = LED_FUNCTION_INDICA 649 function = LED_FUNCTION_INDICATOR;
699 function-enumerator = <2>; 650 function-enumerator = <2>;
700 }; 651 };
701 652
702 led@5 { 653 led@5 {
703 reg = <5>; 654 reg = <5>;
704 color = <LED_COLOR_ID_GREEN>; 655 color = <LED_COLOR_ID_GREEN>;
705 function = LED_FUNCTION_INDICA 656 function = LED_FUNCTION_INDICATOR;
706 function-enumerator = <1>; 657 function-enumerator = <1>;
707 }; 658 };
708 }; 659 };
709 660
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 661 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 662 &q6afedai {
712 dai@22 { !! 663 qi2s@22 {
713 reg = <QUATERNARY_MI2S_RX>; 664 reg = <QUATERNARY_MI2S_RX>;
714 qcom,sd-lines = <0 1 2 3>; 665 qcom,sd-lines = <0 1 2 3>;
715 }; 666 };
716 }; 667 };
717 668
718 &q6asmdai { 669 &q6asmdai {
719 dai@0 { 670 dai@0 {
720 reg = <0>; 671 reg = <0>;
721 }; 672 };
722 673
723 dai@1 { 674 dai@1 {
724 reg = <1>; 675 reg = <1>;
725 }; 676 };
726 677
727 dai@2 { 678 dai@2 {
728 reg = <2>; 679 reg = <2>;
729 }; 680 };
730 681
731 dai@3 { 682 dai@3 {
732 reg = <3>; 683 reg = <3>;
733 direction = <2>; 684 direction = <2>;
734 is-compress-dai; 685 is-compress-dai;
735 }; 686 };
736 }; 687 };
737 688
738 &qupv3_id_0 { 689 &qupv3_id_0 {
739 status = "okay"; 690 status = "okay";
740 }; 691 };
741 692
742 &qupv3_id_1 { 693 &qupv3_id_1 {
743 status = "okay"; 694 status = "okay";
744 }; 695 };
745 696
746 &sdhc_2 { 697 &sdhc_2 {
747 status = "okay"; 698 status = "okay";
748 699
749 pinctrl-names = "default"; 700 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 701 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 702
752 vmmc-supply = <&vreg_l21a_2p95>; 703 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 704 vqmmc-supply = <&vreg_l13a_2p95>;
754 705
755 bus-width = <4>; 706 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 707 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 708 };
758 709
759 &sound { 710 &sound {
760 compatible = "qcom,db845c-sndcard", "q !! 711 compatible = "qcom,db845c-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 712 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 713 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 714 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 715 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 716 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 717 pinctrl-names = "default";
767 model = "DB845c"; 718 model = "DB845c";
768 audio-routing = 719 audio-routing =
769 "RX_BIAS", "MCLK", 720 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 721 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 722 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 723 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 724 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 725 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 726 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 727 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 728 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 729 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 730 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 731 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 732 "MultiMedia3 Capture", "MM_UL3";
782 733
783 mm1-dai-link { 734 mm1-dai-link {
784 link-name = "MultiMedia1"; 735 link-name = "MultiMedia1";
785 cpu { 736 cpu {
786 sound-dai = <&q6asmdai 737 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 738 };
788 }; 739 };
789 740
790 mm2-dai-link { 741 mm2-dai-link {
791 link-name = "MultiMedia2"; 742 link-name = "MultiMedia2";
792 cpu { 743 cpu {
793 sound-dai = <&q6asmdai 744 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 745 };
795 }; 746 };
796 747
797 mm3-dai-link { 748 mm3-dai-link {
798 link-name = "MultiMedia3"; 749 link-name = "MultiMedia3";
799 cpu { 750 cpu {
800 sound-dai = <&q6asmdai 751 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 752 };
802 }; 753 };
803 754
804 mm4-dai-link { 755 mm4-dai-link {
805 link-name = "MultiMedia4"; 756 link-name = "MultiMedia4";
806 cpu { 757 cpu {
807 sound-dai = <&q6asmdai 758 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 759 };
809 }; 760 };
810 761
811 hdmi-dai-link { 762 hdmi-dai-link {
812 link-name = "HDMI Playback"; 763 link-name = "HDMI Playback";
813 cpu { 764 cpu {
814 sound-dai = <&q6afedai 765 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 766 };
816 767
817 platform { 768 platform {
818 sound-dai = <&q6routin 769 sound-dai = <&q6routing>;
819 }; 770 };
820 771
821 codec { 772 codec {
822 sound-dai = <<9611_c 773 sound-dai = <<9611_codec 0>;
823 }; 774 };
824 }; 775 };
825 776
826 slim-dai-link { 777 slim-dai-link {
827 link-name = "SLIM Playback"; 778 link-name = "SLIM Playback";
828 cpu { 779 cpu {
829 sound-dai = <&q6afedai 780 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 781 };
831 782
832 platform { 783 platform {
833 sound-dai = <&q6routin 784 sound-dai = <&q6routing>;
834 }; 785 };
835 786
836 codec { 787 codec {
837 sound-dai = <&left_spk 788 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 789 };
839 }; 790 };
840 791
841 slimcap-dai-link { 792 slimcap-dai-link {
842 link-name = "SLIM Capture"; 793 link-name = "SLIM Capture";
843 cpu { 794 cpu {
844 sound-dai = <&q6afedai 795 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 796 };
846 797
847 platform { 798 platform {
848 sound-dai = <&q6routin 799 sound-dai = <&q6routing>;
849 }; 800 };
850 801
851 codec { 802 codec {
852 sound-dai = <&wcd9340 803 sound-dai = <&wcd9340 1>;
853 }; 804 };
854 }; 805 };
855 }; 806 };
856 807
857 &spi0 { 808 &spi0 {
858 status = "okay"; 809 status = "okay";
859 pinctrl-names = "default"; 810 pinctrl-names = "default";
860 pinctrl-0 = <&qup_spi0_default>; 811 pinctrl-0 = <&qup_spi0_default>;
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; 812 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
862 813
863 can@0 { 814 can@0 {
864 compatible = "microchip,mcp251 815 compatible = "microchip,mcp2517fd";
865 reg = <0>; 816 reg = <0>;
866 clocks = <&clk40M>; 817 clocks = <&clk40M>;
867 interrupts-extended = <&tlmm 1 818 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
868 spi-max-frequency = <10000000> 819 spi-max-frequency = <10000000>;
869 vdd-supply = <&vdc_5v>; 820 vdd-supply = <&vdc_5v>;
870 xceiver-supply = <&vdc_5v>; 821 xceiver-supply = <&vdc_5v>;
871 }; 822 };
872 }; 823 };
873 824
874 &spi2 { 825 &spi2 {
875 /* On Low speed expansion */ 826 /* On Low speed expansion */
>> 827 label = "LS-SPI0";
876 status = "okay"; 828 status = "okay";
877 }; 829 };
878 830
879 &tlmm { 831 &tlmm {
880 cam0_default: cam0-default-state { !! 832 cam0_default: cam0_default {
881 rst-pins { !! 833 rst {
882 pins = "gpio9"; 834 pins = "gpio9";
883 function = "gpio"; 835 function = "gpio";
884 836
885 drive-strength = <16>; 837 drive-strength = <16>;
886 bias-disable; 838 bias-disable;
887 }; 839 };
888 840
889 mclk0-pins { !! 841 mclk0 {
890 pins = "gpio13"; 842 pins = "gpio13";
891 function = "cam_mclk"; 843 function = "cam_mclk";
892 844
893 drive-strength = <16>; 845 drive-strength = <16>;
894 bias-disable; 846 bias-disable;
895 }; 847 };
896 }; 848 };
897 849
898 cam3_default: cam3-default-state { !! 850 cam3_default: cam3_default {
899 rst-pins { !! 851 rst {
900 function = "gpio"; 852 function = "gpio";
901 pins = "gpio21"; 853 pins = "gpio21";
902 854
903 drive-strength = <16>; 855 drive-strength = <16>;
904 bias-disable; 856 bias-disable;
905 }; 857 };
906 858
907 mclk3-pins { !! 859 mclk3 {
908 function = "cam_mclk"; 860 function = "cam_mclk";
909 pins = "gpio16"; 861 pins = "gpio16";
910 862
911 drive-strength = <16>; 863 drive-strength = <16>;
912 bias-disable; 864 bias-disable;
913 }; 865 };
914 }; 866 };
915 867
916 dsi_sw_sel: dsi-sw-sel-state { !! 868 dsi_sw_sel: dsi-sw-sel {
917 pins = "gpio120"; 869 pins = "gpio120";
918 function = "gpio"; 870 function = "gpio";
919 871
920 drive-strength = <2>; 872 drive-strength = <2>;
921 bias-disable; 873 bias-disable;
922 output-high; 874 output-high;
923 }; 875 };
924 876
925 lt9611_irq_pin: lt9611-irq-state { !! 877 lt9611_irq_pin: lt9611-irq {
926 pins = "gpio84"; 878 pins = "gpio84";
927 function = "gpio"; 879 function = "gpio";
928 bias-disable; 880 bias-disable;
929 }; 881 };
930 882
931 pcie0_default_state: pcie0-default-sta !! 883 pcie0_default_state: pcie0-default {
932 clkreq-pins { !! 884 clkreq {
933 pins = "gpio36"; 885 pins = "gpio36";
934 function = "pci_e0"; 886 function = "pci_e0";
935 bias-pull-up; 887 bias-pull-up;
936 }; 888 };
937 889
938 reset-n-pins { !! 890 reset-n {
939 pins = "gpio35"; 891 pins = "gpio35";
940 function = "gpio"; 892 function = "gpio";
941 893
942 drive-strength = <2>; 894 drive-strength = <2>;
943 output-low; 895 output-low;
944 bias-pull-down; 896 bias-pull-down;
945 }; 897 };
946 898
947 wake-n-pins { !! 899 wake-n {
948 pins = "gpio37"; 900 pins = "gpio37";
949 function = "gpio"; 901 function = "gpio";
950 902
951 drive-strength = <2>; 903 drive-strength = <2>;
952 bias-pull-up; 904 bias-pull-up;
953 }; 905 };
954 }; 906 };
955 907
956 pcie0_pwren_state: pcie0-pwren-state { !! 908 pcie0_pwren_state: pcie0-pwren {
957 pins = "gpio90"; 909 pins = "gpio90";
958 function = "gpio"; 910 function = "gpio";
959 911
960 drive-strength = <2>; 912 drive-strength = <2>;
961 bias-disable; 913 bias-disable;
962 }; 914 };
963 915
964 pcie1_default_state: pcie1-default-sta !! 916 pcie1_default_state: pcie1-default {
965 perst-n-pins { !! 917 perst-n {
966 pins = "gpio102"; 918 pins = "gpio102";
967 function = "gpio"; 919 function = "gpio";
968 920
969 drive-strength = <16>; 921 drive-strength = <16>;
970 bias-disable; 922 bias-disable;
971 }; 923 };
972 924
973 clkreq-pins { !! 925 clkreq {
974 pins = "gpio103"; 926 pins = "gpio103";
975 function = "pci_e1"; 927 function = "pci_e1";
976 bias-pull-up; 928 bias-pull-up;
977 }; 929 };
978 930
979 wake-n-pins { !! 931 wake-n {
980 pins = "gpio11"; 932 pins = "gpio11";
981 function = "gpio"; 933 function = "gpio";
982 934
983 drive-strength = <2>; 935 drive-strength = <2>;
984 bias-pull-up; 936 bias-pull-up;
985 }; 937 };
986 938
987 reset-n-pins { !! 939 reset-n {
988 pins = "gpio75"; 940 pins = "gpio75";
989 function = "gpio"; 941 function = "gpio";
990 942
991 drive-strength = <16>; 943 drive-strength = <16>;
992 bias-pull-up; 944 bias-pull-up;
993 output-high; 945 output-high;
994 }; 946 };
995 }; 947 };
996 948
997 sdc2_default_state: sdc2-default-state !! 949 sdc2_default_state: sdc2-default {
998 clk-pins { !! 950 clk {
999 pins = "sdc2_clk"; 951 pins = "sdc2_clk";
1000 bias-disable; 952 bias-disable;
1001 953
1002 /* 954 /*
1003 * It seems that mmc_ 955 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 956 * strength is not 16 on clk, cmd, and data pins.
1005 */ 957 */
1006 drive-strength = <16> 958 drive-strength = <16>;
1007 }; 959 };
1008 960
1009 cmd-pins { !! 961 cmd {
1010 pins = "sdc2_cmd"; 962 pins = "sdc2_cmd";
1011 bias-pull-up; 963 bias-pull-up;
1012 drive-strength = <10> 964 drive-strength = <10>;
1013 }; 965 };
1014 966
1015 data-pins { !! 967 data {
1016 pins = "sdc2_data"; 968 pins = "sdc2_data";
1017 bias-pull-up; 969 bias-pull-up;
1018 drive-strength = <10> 970 drive-strength = <10>;
1019 }; 971 };
1020 }; 972 };
1021 973
1022 sdc2_card_det_n: sd-card-det-n-state !! 974 sdc2_card_det_n: sd-card-det-n {
1023 pins = "gpio126"; 975 pins = "gpio126";
1024 function = "gpio"; 976 function = "gpio";
1025 bias-pull-up; 977 bias-pull-up;
1026 }; 978 };
>> 979
>> 980 wcd_intr_default: wcd_intr_default {
>> 981 pins = "gpio54";
>> 982 function = "gpio";
>> 983
>> 984 input-enable;
>> 985 bias-pull-down;
>> 986 drive-strength = <2>;
>> 987 };
1027 }; 988 };
1028 989
1029 &uart3 { 990 &uart3 {
1030 label = "LS-UART0"; 991 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; <<
1032 <<
1033 status = "disabled"; 992 status = "disabled";
1034 }; 993 };
1035 994
1036 &uart6 { 995 &uart6 {
1037 status = "okay"; 996 status = "okay";
1038 997
1039 pinctrl-0 = <&qup_uart6_4pin>; <<
1040 <<
1041 bluetooth { 998 bluetooth {
1042 compatible = "qcom,wcn3990-bt 999 compatible = "qcom,wcn3990-bt";
1043 1000
1044 vddio-supply = <&vreg_s4a_1p8 1001 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 1002 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 1003 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 1004 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 1005 max-speed = <3200000>;
1049 }; 1006 };
1050 }; 1007 };
1051 1008
1052 &uart9 { 1009 &uart9 {
1053 label = "LS-UART1"; 1010 label = "LS-UART1";
1054 status = "okay"; 1011 status = "okay";
1055 }; 1012 };
1056 1013
1057 &usb_1 { 1014 &usb_1 {
1058 status = "okay"; 1015 status = "okay";
1059 }; 1016 };
1060 1017
1061 &usb_1_dwc3 { 1018 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 1019 dr_mode = "peripheral";
1063 }; 1020 };
1064 1021
1065 &usb_1_hsphy { 1022 &usb_1_hsphy {
1066 status = "okay"; 1023 status = "okay";
1067 1024
1068 vdd-supply = <&vreg_l1a_0p875>; 1025 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 1026 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1027 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 1028
1072 qcom,imp-res-offset-value = <8>; 1029 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1030 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 1031 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 1032 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 1033 };
1077 1034
1078 &usb_1_qmpphy { 1035 &usb_1_qmpphy {
1079 status = "okay"; 1036 status = "okay";
1080 1037
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 1038 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 1039 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 1040 };
1084 1041
1085 &usb_2 { 1042 &usb_2 {
1086 status = "okay"; 1043 status = "okay";
1087 }; 1044 };
1088 1045
1089 &usb_2_dwc3 { 1046 &usb_2_dwc3 {
1090 dr_mode = "host"; 1047 dr_mode = "host";
1091 }; 1048 };
1092 1049
1093 &usb_2_hsphy { 1050 &usb_2_hsphy {
1094 status = "okay"; 1051 status = "okay";
1095 1052
1096 vdd-supply = <&vreg_l1a_0p875>; 1053 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 1054 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1055 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 1056
1100 qcom,imp-res-offset-value = <8>; 1057 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1058 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 1059 };
1103 1060
1104 &usb_2_qmpphy { 1061 &usb_2_qmpphy {
1105 status = "okay"; 1062 status = "okay";
1106 1063
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 1064 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 1065 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 1066 };
1110 1067
1111 &ufs_mem_hc { 1068 &ufs_mem_hc {
1112 status = "okay"; 1069 status = "okay";
1113 1070
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 1071 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 1072
1116 vcc-supply = <&vreg_l20a_2p95>; 1073 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 1074 vcc-max-microamp = <800000>;
1118 }; 1075 };
1119 1076
1120 &ufs_mem_phy { 1077 &ufs_mem_phy {
1121 status = "okay"; 1078 status = "okay";
1122 1079
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 1080 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 1081 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 1082 };
1126 1083
1127 &venus { 1084 &venus {
1128 status = "okay"; 1085 status = "okay";
1129 }; 1086 };
1130 1087
1131 &wcd9340 { !! 1088 &wcd9340{
>> 1089 pinctrl-0 = <&wcd_intr_default>;
>> 1090 pinctrl-names = "default";
>> 1091 clock-names = "extclk";
>> 1092 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H 1093 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1094 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1095 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1096 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1097 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1098 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1099
1139 swm: soundwire@c85 { !! 1100 swm: swm@c85 {
1140 left_spkr: speaker@0,1 { !! 1101 left_spkr: wsa8810-left{
1141 compatible = "sdw1021 1102 compatible = "sdw10217201000";
1142 reg = <0 1>; 1103 reg = <0 1>;
1143 powerdown-gpios = <&w 1104 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1105 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1106 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1107 #sound-dai-cells = <0>;
1147 }; 1108 };
1148 1109
1149 right_spkr: speaker@0,2 { !! 1110 right_spkr: wsa8810-right{
1150 compatible = "sdw1021 1111 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w 1112 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1113 reg = <0 2>;
1153 #thermal-sensor-cells 1114 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1115 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1116 #sound-dai-cells = <0>;
1156 }; 1117 };
1157 }; 1118 };
1158 }; 1119 };
1159 1120
1160 &wifi { 1121 &wifi {
1161 status = "okay"; 1122 status = "okay";
1162 1123
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1124 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1125 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1126 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1127 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1128
1168 qcom,snoc-host-cap-8bit-quirk; 1129 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th 1130 qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
1170 }; 1131 };
1171 1132
1172 /* PINCTRL - additions to nodes defined in sd 1133 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1134 &qup_spi2_default {
1174 drive-strength = <16>; !! 1135 pinconf {
>> 1136 pins = "gpio27", "gpio28", "gpio29", "gpio30";
>> 1137 drive-strength = <16>;
>> 1138 };
>> 1139 };
>> 1140
>> 1141 &qup_uart3_default{
>> 1142 pinmux {
>> 1143 pins = "gpio41", "gpio42", "gpio43", "gpio44";
>> 1144 function = "qup3";
>> 1145 };
1175 }; 1146 };
1176 1147
1177 &qup_i2c10_default { 1148 &qup_i2c10_default {
1178 drive-strength = <2>; !! 1149 pinconf {
1179 bias-disable; !! 1150 pins = "gpio55", "gpio56";
>> 1151 drive-strength = <2>;
>> 1152 bias-disable;
>> 1153 };
>> 1154 };
>> 1155
>> 1156 &qup_uart6_default {
>> 1157 pinmux {
>> 1158 pins = "gpio45", "gpio46", "gpio47", "gpio48";
>> 1159 function = "qup6";
>> 1160 };
>> 1161
>> 1162 cts {
>> 1163 pins = "gpio45";
>> 1164 bias-disable;
>> 1165 };
>> 1166
>> 1167 rts-tx {
>> 1168 pins = "gpio46", "gpio47";
>> 1169 drive-strength = <2>;
>> 1170 bias-disable;
>> 1171 };
>> 1172
>> 1173 rx {
>> 1174 pins = "gpio48";
>> 1175 bias-pull-up;
>> 1176 };
>> 1177 };
>> 1178
>> 1179 &qup_uart9_default {
>> 1180 pinconf-tx {
>> 1181 pins = "gpio4";
>> 1182 drive-strength = <2>;
>> 1183 bias-disable;
>> 1184 };
>> 1185
>> 1186 pinconf-rx {
>> 1187 pins = "gpio5";
>> 1188 drive-strength = <2>;
>> 1189 bias-pull-up;
>> 1190 };
>> 1191 };
>> 1192
>> 1193 &pm8998_gpio {
>> 1194
>> 1195 };
>> 1196
>> 1197 &cci {
>> 1198 status = "okay";
1180 }; 1199 };
1181 1200
1182 &qup_uart9_rx { !! 1201 &camss {
1183 drive-strength = <2>; !! 1202 vdda-phy-supply = <&vreg_l1a_0p875>;
1184 bias-pull-up; !! 1203 vdda-pll-supply = <&vreg_l26a_1p2>;
>> 1204
>> 1205 status = "ok";
>> 1206
>> 1207 ports {
>> 1208 #address-cells = <1>;
>> 1209 #size-cells = <0>;
>> 1210 port@0 {
>> 1211 reg = <0>;
>> 1212 csiphy0_ep: endpoint {
>> 1213 data-lanes = <0 1 2 3>;
>> 1214 remote-endpoint = <&ov8856_ep>;
>> 1215 };
>> 1216 };
>> 1217 };
1185 }; 1218 };
1186 1219
1187 &qup_uart9_tx { !! 1220 &cci_i2c0 {
1188 drive-strength = <2>; !! 1221 camera@10 {
1189 bias-disable; !! 1222 compatible = "ovti,ov8856";
>> 1223 reg = <0x10>;
>> 1224
>> 1225 // CAM0_RST_N
>> 1226 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
>> 1227 pinctrl-names = "default";
>> 1228 pinctrl-0 = <&cam0_default>;
>> 1229
>> 1230 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
>> 1231 clock-names = "xvclk";
>> 1232 clock-frequency = <19200000>;
>> 1233
>> 1234 /* The &vreg_s4a_1p8 trace is powered on as a,
>> 1235 * so it is represented by a fixed regulator.
>> 1236 *
>> 1237 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
>> 1238 * both have to be enabled through the power management
>> 1239 * gpios.
>> 1240 */
>> 1241 dovdd-supply = <&vreg_lvs1a_1p8>;
>> 1242 avdd-supply = <&cam0_avdd_2v8>;
>> 1243 dvdd-supply = <&cam0_dvdd_1v2>;
>> 1244
>> 1245 status = "ok";
>> 1246
>> 1247 port {
>> 1248 ov8856_ep: endpoint {
>> 1249 link-frequencies = /bits/ 64
>> 1250 <360000000 180000000>;
>> 1251 data-lanes = <1 2 3 4>;
>> 1252 remote-endpoint = <&csiphy0_ep>;
>> 1253 };
>> 1254 };
>> 1255 };
>> 1256 };
>> 1257
>> 1258 &cci_i2c1 {
>> 1259 camera@60 {
>> 1260 compatible = "ovti,ov7251";
>> 1261
>> 1262 // I2C address as per ov7251.txt linux documentation
>> 1263 reg = <0x60>;
>> 1264
>> 1265 // CAM3_RST_N
>> 1266 enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
>> 1267 pinctrl-names = "default";
>> 1268 pinctrl-0 = <&cam3_default>;
>> 1269
>> 1270 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
>> 1271 clock-names = "xclk";
>> 1272 clock-frequency = <24000000>;
>> 1273
>> 1274 /* The &vreg_s4a_1p8 trace always powered on.
>> 1275 *
>> 1276 * The 2.8V vdda-supply regulator is enabled when the
>> 1277 * vreg_s4a_1p8 trace is pulled high.
>> 1278 * It too is represented by a fixed regulator.
>> 1279 *
>> 1280 * No 1.2V vddd-supply regulator is used.
>> 1281 */
>> 1282 vdddo-supply = <&vreg_lvs1a_1p8>;
>> 1283 vdda-supply = <&cam3_avdd_2v8>;
>> 1284
>> 1285 status = "disable";
>> 1286
>> 1287 port {
>> 1288 ov7251_ep: endpoint {
>> 1289 data-lanes = <0 1>;
>> 1290 // remote-endpoint = <&csiphy3_ep>;
>> 1291 };
>> 1292 };
>> 1293 };
1190 }; 1294 };
1191 1295
1192 /* PINCTRL - additions to nodes defined in sd 1296 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1193 &qup_spi0_default { 1297 &qup_spi0_default {
1194 drive-strength = <6>; !! 1298 config {
1195 bias-disable; !! 1299 drive-strength = <6>;
>> 1300 bias-disable;
>> 1301 };
1196 }; 1302 };
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