1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 13 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" 14 #include "sdm845-wcd9340.dtsi"
15 #include "pm8998.dtsi" 15 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 16 #include "pmi8998.dtsi"
17 17
18 / { 18 / {
19 model = "Thundercomm Dragonboard 845c" 19 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 20 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; 21 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>; 22 qcom,board-id = <8 0>;
23 23
24 aliases { 24 aliases {
25 serial0 = &uart9; 25 serial0 = &uart9;
26 serial1 = &uart6; 26 serial1 = &uart6;
27 }; 27 };
28 28
29 chosen { 29 chosen {
30 stdout-path = "serial0:115200n 30 stdout-path = "serial0:115200n8";
31 }; 31 };
32 32
33 /* Fixed crystal oscillator dedicated 33 /* Fixed crystal oscillator dedicated to MCP2517FD */
34 clk40M: can-clock { 34 clk40M: can-clock {
35 compatible = "fixed-clock"; 35 compatible = "fixed-clock";
36 #clock-cells = <0>; 36 #clock-cells = <0>;
37 clock-frequency = <40000000>; 37 clock-frequency = <40000000>;
38 }; 38 };
39 39
40 dc12v: dc12v-regulator { 40 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 41 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 42 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 43 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 44 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 45 regulator-always-on;
46 }; 46 };
47 47
48 gpio-keys { 48 gpio-keys {
49 compatible = "gpio-keys"; 49 compatible = "gpio-keys";
50 autorepeat; 50 autorepeat;
51 51
52 pinctrl-names = "default"; 52 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 53 pinctrl-0 = <&vol_up_pin_a>;
54 54
55 key-vol-up { 55 key-vol-up {
56 label = "Volume Up"; 56 label = "Volume Up";
57 linux,code = <KEY_VOLU 57 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios 58 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
59 }; 59 };
60 }; 60 };
61 61
62 leds { 62 leds {
63 compatible = "gpio-leds"; 63 compatible = "gpio-leds";
64 64
65 led-0 { 65 led-0 {
66 label = "green:user4"; 66 label = "green:user4";
67 function = LED_FUNCTIO 67 function = LED_FUNCTION_INDICATOR;
68 color = <LED_COLOR_ID_ 68 color = <LED_COLOR_ID_GREEN>;
69 gpios = <&pm8998_gpios 69 gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>;
>> 70 linux,default-trigger = "panic-indicator";
70 default-state = "off"; 71 default-state = "off";
71 panic-indicator; <<
72 }; 72 };
73 73
74 led-1 { 74 led-1 {
75 label = "yellow:wlan"; 75 label = "yellow:wlan";
76 function = LED_FUNCTIO 76 function = LED_FUNCTION_WLAN;
77 color = <LED_COLOR_ID_ 77 color = <LED_COLOR_ID_YELLOW>;
78 gpios = <&pm8998_gpios 78 gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>;
79 linux,default-trigger 79 linux,default-trigger = "phy0tx";
80 default-state = "off"; 80 default-state = "off";
81 }; 81 };
82 82
83 led-2 { 83 led-2 {
84 label = "blue:bt"; 84 label = "blue:bt";
85 function = LED_FUNCTIO 85 function = LED_FUNCTION_BLUETOOTH;
86 color = <LED_COLOR_ID_ 86 color = <LED_COLOR_ID_BLUE>;
87 gpios = <&pm8998_gpios 87 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger 88 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 89 default-state = "off";
90 }; 90 };
91 }; 91 };
92 92
93 hdmi-out { 93 hdmi-out {
94 compatible = "hdmi-connector"; 94 compatible = "hdmi-connector";
95 type = "a"; 95 type = "a";
96 96
97 port { 97 port {
98 hdmi_con: endpoint { 98 hdmi_con: endpoint {
99 remote-endpoin 99 remote-endpoint = <<9611_out>;
100 }; 100 };
101 }; 101 };
102 }; 102 };
103 103
104 reserved-memory { <<
105 /* Cont splash region set up b <<
106 cont_splash_mem: framebuffer@9 <<
107 reg = <0x0 0x9d400000 <<
108 no-map; <<
109 }; <<
110 }; <<
111 <<
112 lt9611_1v8: lt9611-vdd18-regulator { 104 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 105 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 106 regulator-name = "LT9611_1V8";
115 107
116 vin-supply = <&vdc_5v>; 108 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 109 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 110 regulator-max-microvolt = <1800000>;
119 111
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 112 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 113 enable-active-high;
122 }; 114 };
123 115
124 lt9611_3v3: lt9611-3v3 { 116 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 117 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 118 regulator-name = "LT9611_3V3";
127 119
128 vin-supply = <&vdc_3v3>; 120 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 121 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 122 regulator-max-microvolt = <3300000>;
131 123
132 /* 124 /*
133 * TODO: make it possible to d 125 * TODO: make it possible to drive same GPIO from two clients
134 * gpio = <&tlmm 89 GPIO_ACTIV 126 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
135 * enable-active-high; 127 * enable-active-high;
136 */ 128 */
137 }; 129 };
138 130
139 pcie0_1p05v: pcie-0-1p05v-regulator { 131 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 132 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 133 regulator-name = "PCIE0_1.05V";
142 134
143 vin-supply = <&vbat>; 135 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 136 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 137 regulator-max-microvolt = <1050000>;
146 138
147 /* 139 /*
148 * TODO: make it possible to d 140 * TODO: make it possible to drive same GPIO from two clients
149 * gpio = <&tlmm 90 GPIO_ACTIV 141 * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
150 * enable-active-high; 142 * enable-active-high;
151 */ 143 */
152 }; 144 };
153 145
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator 146 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator {
155 compatible = "regulator-fixed" 147 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 148 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 149 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 150 regulator-max-microvolt = <1200000>;
159 enable-active-high; 151 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ 152 gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 153 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 154 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 155 vin-supply = <&vbat>;
164 }; 156 };
165 157
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator 158 cam0_avdd_2v8: cam0-avdd-2v8-regulator {
167 compatible = "regulator-fixed" 159 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 160 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 161 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 162 regulator-max-microvolt = <2800000>;
171 enable-active-high; 163 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ 164 gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 165 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 166 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 167 vin-supply = <&vbat>;
176 }; 168 };
177 169
178 /* This regulator is enabled when the 170 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator 171 cam3_avdd_2v8: cam3-avdd-2v8-regulator {
180 compatible = "regulator-fixed" 172 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 173 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 174 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 175 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 176 regulator-always-on;
185 vin-supply = <&vbat>; 177 vin-supply = <&vbat>;
186 }; 178 };
187 179
188 pcie0_3p3v_dual: vldo-3v3-regulator { 180 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 181 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 182 regulator-name = "VLDO_3V3";
191 183
192 vin-supply = <&vbat>; 184 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 185 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 186 regulator-max-microvolt = <3300000>;
195 187
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 188 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 189 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 190
205 pinctrl-names = "default"; 191 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 192 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 193 };
208 194
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 195 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 196 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 197 regulator-name = "V5P0_HDMIOUT";
212 198
213 vin-supply = <&vdc_5v>; 199 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 200 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 201 regulator-max-microvolt = <500000>;
216 202
217 /* 203 /*
218 * TODO: make it possible to d 204 * TODO: make it possible to drive same GPIO from two clients
219 * gpio = <&tlmm 89 GPIO_ACTIV 205 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
220 * enable-active-high; 206 * enable-active-high;
221 */ 207 */
222 }; 208 };
223 209
224 vbat: vbat-regulator { 210 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 211 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 212 regulator-name = "VBAT";
227 213
228 vin-supply = <&dc12v>; 214 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 215 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 216 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 217 regulator-always-on;
232 }; 218 };
233 219
234 vbat_som: vbat-som-regulator { 220 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 221 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 222 regulator-name = "VBAT_SOM";
237 223
238 vin-supply = <&dc12v>; 224 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 225 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 226 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 227 regulator-always-on;
242 }; 228 };
243 229
244 vdc_3v3: vdc-3v3-regulator { 230 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 231 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 232 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 233 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 234 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 235 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 236 regulator-always-on;
251 }; 237 };
252 238
253 vdc_5v: vdc-5v-regulator { 239 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 240 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 241 regulator-name = "VDC_5V";
256 242
257 vin-supply = <&dc12v>; 243 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 244 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 245 regulator-max-microvolt = <500000>;
260 regulator-always-on; 246 regulator-always-on;
261 }; 247 };
262 248
263 vreg_s4a_1p8: vreg-s4a-1p8 { 249 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 250 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 251 regulator-name = "vreg_s4a_1p8";
266 252
267 regulator-min-microvolt = <180 253 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 254 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 255 regulator-always-on;
270 }; 256 };
271 257
272 vph_pwr: vph-pwr-regulator { 258 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 259 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 260 regulator-name = "vph_pwr";
275 261
276 vin-supply = <&vbat_som>; 262 vin-supply = <&vbat_som>;
277 }; 263 };
278 }; 264 };
279 265
280 &adsp_pas { 266 &adsp_pas {
281 status = "okay"; 267 status = "okay";
282 268
283 firmware-name = "qcom/sdm845/adsp.mbn" 269 firmware-name = "qcom/sdm845/adsp.mbn";
284 }; 270 };
285 271
286 &apps_rsc { 272 &apps_rsc {
287 regulators-0 { 273 regulators-0 {
288 compatible = "qcom,pm8998-rpmh 274 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 275 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 276 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 277 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 278 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 279 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 280 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 281 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 282 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 283 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 284 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 285 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 286 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 287 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 288 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 289 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 290 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 291 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 292 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 293 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 294 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 295 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 296 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 297 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 298 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 299 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 300 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 301 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 302 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 303
318 vreg_s3a_1p35: smps3 { 304 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 305 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 306 regulator-max-microvolt = <1352000>;
321 }; 307 };
322 308
323 vreg_s5a_2p04: smps5 { 309 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 310 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 311 regulator-max-microvolt = <2040000>;
326 }; 312 };
327 313
328 vreg_s7a_1p025: smps7 { 314 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 315 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 316 regulator-max-microvolt = <1028000>;
331 }; 317 };
332 318
333 vreg_l1a_0p875: ldo1 { 319 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 320 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 321 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 322 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 323 };
338 324
339 vreg_l5a_0p8: ldo5 { 325 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 326 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 327 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 328 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 329 };
344 330
345 vreg_l12a_1p8: ldo12 { 331 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 332 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 333 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 334 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 335 };
350 336
351 vreg_l7a_1p8: ldo7 { 337 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 338 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 339 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 340 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 341 };
356 342
357 vreg_l13a_2p95: ldo13 { 343 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 344 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 345 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 346 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 347 };
362 348
363 vreg_l17a_1p3: ldo17 { 349 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 350 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 351 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 352 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 353 };
368 354
369 vreg_l20a_2p95: ldo20 { 355 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 356 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 357 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 358 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 359 };
374 360
375 vreg_l21a_2p95: ldo21 { 361 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 362 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 363 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 364 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 365 };
380 366
381 vreg_l24a_3p075: ldo24 { 367 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 368 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 369 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 370 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 371 };
386 372
387 vreg_l25a_3p3: ldo25 { 373 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 374 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 375 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 376 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 377 };
392 378
393 vreg_l26a_1p2: ldo26 { 379 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 380 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 381 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 382 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 383 };
398 384
399 vreg_lvs1a_1p8: lvs1 { 385 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 386 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 387 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 388 regulator-always-on;
403 }; 389 };
404 390
405 vreg_lvs2a_1p8: lvs2 { 391 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 392 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 393 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 394 regulator-always-on;
409 }; 395 };
410 }; 396 };
411 397
412 regulators-1 { 398 regulators-1 {
413 compatible = "qcom,pmi8998-rpm 399 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 400 qcom,pmic-id = "b";
415 401
416 vdd-bob-supply = <&vph_pwr>; 402 vdd-bob-supply = <&vph_pwr>;
417 403
418 vreg_bob: bob { 404 vreg_bob: bob {
419 regulator-min-microvol 405 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 406 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 407 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 408 regulator-allow-bypass;
423 }; 409 };
424 }; 410 };
425 }; 411 };
426 412
427 &camss { !! 413 &cdsp_pas {
>> 414 status = "okay";
>> 415 firmware-name = "qcom/sdm845/cdsp.mbn";
>> 416 };
>> 417
>> 418 &dsi0 {
428 status = "okay"; 419 status = "okay";
>> 420 vdda-supply = <&vreg_l26a_1p2>;
429 421
430 vdda-phy-supply = <&vreg_l1a_0p875>; !! 422 ports {
431 vdda-pll-supply = <&vreg_l26a_1p2>; !! 423 port@1 {
>> 424 endpoint {
>> 425 remote-endpoint = <<9611_a>;
>> 426 data-lanes = <0 1 2 3>;
>> 427 };
>> 428 };
>> 429 };
432 }; 430 };
433 431
434 &cdsp_pas { !! 432 &dsi0_phy {
435 status = "okay"; 433 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" !! 434 vdds-supply = <&vreg_l1a_0p875>;
437 }; 435 };
438 436
439 &gcc { 437 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 438 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 439 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI 440 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
443 <GCC_LPASS_Q6_AXI_C 441 <GCC_LPASS_Q6_AXI_CLK>,
444 <GCC_LPASS_SWAY_CLK 442 <GCC_LPASS_SWAY_CLK>;
445 }; 443 };
446 444
447 &gmu { 445 &gmu {
448 status = "okay"; 446 status = "okay";
449 }; 447 };
450 448
451 &gpi_dma0 { 449 &gpi_dma0 {
452 status = "okay"; 450 status = "okay";
453 }; 451 };
454 452
455 &gpi_dma1 { 453 &gpi_dma1 {
456 status = "okay"; 454 status = "okay";
457 }; 455 };
458 456
459 &gpu { 457 &gpu {
460 status = "okay"; 458 status = "okay";
461 zap-shader { 459 zap-shader {
462 memory-region = <&gpu_mem>; 460 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 461 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 462 };
465 }; 463 };
466 464
467 &i2c10 { 465 &i2c10 {
468 status = "okay"; 466 status = "okay";
469 clock-frequency = <400000>; 467 clock-frequency = <400000>;
470 468
471 lt9611_codec: hdmi-bridge@3b { 469 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 470 compatible = "lontium,lt9611";
473 reg = <0x3b>; 471 reg = <0x3b>;
474 #sound-dai-cells = <1>; 472 #sound-dai-cells = <1>;
475 473
476 interrupts-extended = <&tlmm 8 474 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 475
478 reset-gpios = <&tlmm 128 GPIO_ 476 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 477
480 vdd-supply = <<9611_1v8>; 478 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 479 vcc-supply = <<9611_3v3>;
482 480
483 pinctrl-names = "default"; 481 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 482 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 483
486 ports { 484 ports {
487 #address-cells = <1>; 485 #address-cells = <1>;
488 #size-cells = <0>; 486 #size-cells = <0>;
489 487
490 port@0 { 488 port@0 {
491 reg = <0>; 489 reg = <0>;
492 490
493 lt9611_a: endp 491 lt9611_a: endpoint {
494 remote !! 492 remote-endpoint = <&dsi0_out>;
495 }; <<
496 }; <<
497 <<
498 port@1 { <<
499 reg = <1>; <<
500 <<
501 lt9611_b: endp <<
502 remote <<
503 }; 493 };
504 }; 494 };
505 495
506 port@2 { 496 port@2 {
507 reg = <2>; 497 reg = <2>;
508 498
509 lt9611_out: en 499 lt9611_out: endpoint {
510 remote 500 remote-endpoint = <&hdmi_con>;
511 }; 501 };
512 }; 502 };
513 }; 503 };
514 }; 504 };
515 }; 505 };
516 506
517 &i2c11 { 507 &i2c11 {
518 /* On Low speed expansion */ 508 /* On Low speed expansion */
519 clock-frequency = <100000>; 509 clock-frequency = <100000>;
520 status = "okay"; 510 status = "okay";
521 }; 511 };
522 512
523 &i2c14 { 513 &i2c14 {
524 /* On Low speed expansion */ 514 /* On Low speed expansion */
525 clock-frequency = <100000>; 515 clock-frequency = <100000>;
526 status = "okay"; 516 status = "okay";
527 }; 517 };
528 518
529 &mdss { 519 &mdss {
530 memory-region = <&cont_splash_mem>; <<
531 status = "okay"; <<
532 }; <<
533 <<
534 &mdss_dsi0 { <<
535 status = "okay"; <<
536 vdda-supply = <&vreg_l26a_1p2>; <<
537 <<
538 qcom,dual-dsi-mode; <<
539 qcom,master-dsi; <<
540 <<
541 ports { <<
542 port@1 { <<
543 endpoint { <<
544 remote-endpoin <<
545 data-lanes = < <<
546 }; <<
547 }; <<
548 }; <<
549 }; <<
550 <<
551 &mdss_dsi0_phy { <<
552 status = "okay"; <<
553 vdds-supply = <&vreg_l1a_0p875>; <<
554 }; <<
555 <<
556 &mdss_dsi1 { <<
557 vdda-supply = <&vreg_l26a_1p2>; <<
558 <<
559 qcom,dual-dsi-mode; <<
560 <<
561 /* DSI1 is slave, so use DSI0 clocks * <<
562 assigned-clock-parents = <&mdss_dsi0_p <<
563 <<
564 status = "okay"; <<
565 <<
566 ports { <<
567 port@1 { <<
568 endpoint { <<
569 remote-endpoin <<
570 data-lanes = < <<
571 }; <<
572 }; <<
573 }; <<
574 }; <<
575 <<
576 &mdss_dsi1_phy { <<
577 vdds-supply = <&vreg_l1a_0p875>; <<
578 status = "okay"; 520 status = "okay";
579 }; 521 };
580 522
581 &mss_pil { 523 &mss_pil {
582 status = "okay"; 524 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 525 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 526 };
585 527
586 &pcie0 { 528 &pcie0 {
587 status = "okay"; 529 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO 530 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI !! 531 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 532
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 533 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 534
593 pinctrl-names = "default"; 535 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 536 pinctrl-0 = <&pcie0_default_state>;
595 }; 537 };
596 538
597 &pcie0_phy { 539 &pcie0_phy {
598 status = "okay"; 540 status = "okay";
599 541
600 vdda-phy-supply = <&vreg_l1a_0p875>; 542 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 543 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 544 };
603 545
604 &pcie1 { 546 &pcie1 {
605 status = "okay"; 547 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L 548 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 549
608 pinctrl-names = "default"; 550 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 551 pinctrl-0 = <&pcie1_default_state>;
610 }; 552 };
611 553
612 &pcie1_phy { 554 &pcie1_phy {
613 status = "okay"; 555 status = "okay";
614 556
615 vdda-phy-supply = <&vreg_l1a_0p875>; 557 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 558 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 559 };
618 560
619 &pm8998_gpios { 561 &pm8998_gpios {
620 gpio-line-names = 562 gpio-line-names =
621 "NC", 563 "NC",
622 "NC", 564 "NC",
623 "WLAN_SW_CTRL", 565 "WLAN_SW_CTRL",
624 "NC", 566 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 567 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 568 "VOL_UP_N",
627 "NC", 569 "NC",
628 "ADC_IN1", 570 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 571 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 572 "CAM0_AVDD_EN",
631 "NC", 573 "NC",
632 "CAM0_DVDD_EN", 574 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 575 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 576 "DIV_CLK2",
635 "NC", 577 "NC",
636 "NC", 578 "NC",
637 "NC", 579 "NC",
638 "SMB_STAT", 580 "SMB_STAT",
639 "NC", 581 "NC",
640 "NC", 582 "NC",
641 "ADC_IN2", 583 "ADC_IN2",
642 "OPTION1", 584 "OPTION1",
643 "WCSS_PWR_REQ", 585 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 586 "PM845_GPIO24",
645 "OPTION2", 587 "OPTION2",
646 "PM845_SLB"; 588 "PM845_SLB";
647 589
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v 590 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
649 pins = "gpio12"; 591 pins = "gpio12";
650 function = "normal"; 592 function = "normal";
651 593
652 bias-pull-up; 594 bias-pull-up;
653 drive-push-pull; 595 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 596 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 597 };
656 598
657 cam0_avdd_2v8_en_default: cam0-avdd-2v 599 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
658 pins = "gpio10"; 600 pins = "gpio10";
659 function = "normal"; 601 function = "normal";
660 602
661 bias-pull-up; 603 bias-pull-up;
662 drive-push-pull; 604 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 605 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 606 };
665 607
666 vol_up_pin_a: vol-up-active-state { 608 vol_up_pin_a: vol-up-active-state {
667 pins = "gpio6"; 609 pins = "gpio6";
668 function = "normal"; 610 function = "normal";
669 input-enable; 611 input-enable;
670 bias-pull-up; 612 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 613 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 614 };
673 }; 615 };
674 616
675 &pm8998_resin { 617 &pm8998_resin {
676 linux,code = <KEY_VOLUMEDOWN>; 618 linux,code = <KEY_VOLUMEDOWN>;
677 status = "okay"; 619 status = "okay";
678 }; 620 };
679 621
680 &pmi8998_lpg { 622 &pmi8998_lpg {
681 status = "okay"; 623 status = "okay";
682 624
683 qcom,power-source = <1>; 625 qcom,power-source = <1>;
684 626
685 led@3 { 627 led@3 {
686 reg = <3>; 628 reg = <3>;
687 color = <LED_COLOR_ID_GREEN>; 629 color = <LED_COLOR_ID_GREEN>;
688 function = LED_FUNCTION_HEARTB 630 function = LED_FUNCTION_HEARTBEAT;
689 function-enumerator = <3>; 631 function-enumerator = <3>;
690 632
691 linux,default-trigger = "heart 633 linux,default-trigger = "heartbeat";
692 default-state = "on"; 634 default-state = "on";
693 }; 635 };
694 636
695 led@4 { 637 led@4 {
696 reg = <4>; 638 reg = <4>;
697 color = <LED_COLOR_ID_GREEN>; 639 color = <LED_COLOR_ID_GREEN>;
698 function = LED_FUNCTION_INDICA 640 function = LED_FUNCTION_INDICATOR;
699 function-enumerator = <2>; 641 function-enumerator = <2>;
700 }; 642 };
701 643
702 led@5 { 644 led@5 {
703 reg = <5>; 645 reg = <5>;
704 color = <LED_COLOR_ID_GREEN>; 646 color = <LED_COLOR_ID_GREEN>;
705 function = LED_FUNCTION_INDICA 647 function = LED_FUNCTION_INDICATOR;
706 function-enumerator = <1>; 648 function-enumerator = <1>;
707 }; 649 };
708 }; 650 };
709 651
>> 652 &pmi8998_rradc {
>> 653 status = "okay";
>> 654 };
>> 655
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 656 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 657 &q6afedai {
712 dai@22 { 658 dai@22 {
713 reg = <QUATERNARY_MI2S_RX>; 659 reg = <QUATERNARY_MI2S_RX>;
714 qcom,sd-lines = <0 1 2 3>; 660 qcom,sd-lines = <0 1 2 3>;
715 }; 661 };
716 }; 662 };
717 663
718 &q6asmdai { 664 &q6asmdai {
719 dai@0 { 665 dai@0 {
720 reg = <0>; 666 reg = <0>;
721 }; 667 };
722 668
723 dai@1 { 669 dai@1 {
724 reg = <1>; 670 reg = <1>;
725 }; 671 };
726 672
727 dai@2 { 673 dai@2 {
728 reg = <2>; 674 reg = <2>;
729 }; 675 };
730 676
731 dai@3 { 677 dai@3 {
732 reg = <3>; 678 reg = <3>;
733 direction = <2>; 679 direction = <2>;
734 is-compress-dai; 680 is-compress-dai;
735 }; 681 };
736 }; 682 };
737 683
738 &qupv3_id_0 { 684 &qupv3_id_0 {
739 status = "okay"; 685 status = "okay";
740 }; 686 };
741 687
742 &qupv3_id_1 { 688 &qupv3_id_1 {
743 status = "okay"; 689 status = "okay";
744 }; 690 };
745 691
746 &sdhc_2 { 692 &sdhc_2 {
747 status = "okay"; 693 status = "okay";
748 694
749 pinctrl-names = "default"; 695 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 696 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 697
752 vmmc-supply = <&vreg_l21a_2p95>; 698 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 699 vqmmc-supply = <&vreg_l13a_2p95>;
754 700
755 bus-width = <4>; 701 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 702 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 703 };
758 704
759 &sound { 705 &sound {
760 compatible = "qcom,db845c-sndcard", "q 706 compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 707 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 708 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 709 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 710 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 711 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 712 pinctrl-names = "default";
767 model = "DB845c"; 713 model = "DB845c";
768 audio-routing = 714 audio-routing =
769 "RX_BIAS", "MCLK", 715 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 716 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 717 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 718 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 719 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 720 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 721 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 722 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 723 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 724 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 725 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 726 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 727 "MultiMedia3 Capture", "MM_UL3";
782 728
783 mm1-dai-link { 729 mm1-dai-link {
784 link-name = "MultiMedia1"; 730 link-name = "MultiMedia1";
785 cpu { 731 cpu {
786 sound-dai = <&q6asmdai 732 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 733 };
788 }; 734 };
789 735
790 mm2-dai-link { 736 mm2-dai-link {
791 link-name = "MultiMedia2"; 737 link-name = "MultiMedia2";
792 cpu { 738 cpu {
793 sound-dai = <&q6asmdai 739 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 740 };
795 }; 741 };
796 742
797 mm3-dai-link { 743 mm3-dai-link {
798 link-name = "MultiMedia3"; 744 link-name = "MultiMedia3";
799 cpu { 745 cpu {
800 sound-dai = <&q6asmdai 746 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 747 };
802 }; 748 };
803 749
804 mm4-dai-link { 750 mm4-dai-link {
805 link-name = "MultiMedia4"; 751 link-name = "MultiMedia4";
806 cpu { 752 cpu {
807 sound-dai = <&q6asmdai 753 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 754 };
809 }; 755 };
810 756
811 hdmi-dai-link { 757 hdmi-dai-link {
812 link-name = "HDMI Playback"; 758 link-name = "HDMI Playback";
813 cpu { 759 cpu {
814 sound-dai = <&q6afedai 760 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 761 };
816 762
817 platform { 763 platform {
818 sound-dai = <&q6routin 764 sound-dai = <&q6routing>;
819 }; 765 };
820 766
821 codec { 767 codec {
822 sound-dai = <<9611_c 768 sound-dai = <<9611_codec 0>;
823 }; 769 };
824 }; 770 };
825 771
826 slim-dai-link { 772 slim-dai-link {
827 link-name = "SLIM Playback"; 773 link-name = "SLIM Playback";
828 cpu { 774 cpu {
829 sound-dai = <&q6afedai 775 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 776 };
831 777
832 platform { 778 platform {
833 sound-dai = <&q6routin 779 sound-dai = <&q6routing>;
834 }; 780 };
835 781
836 codec { 782 codec {
837 sound-dai = <&left_spk 783 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 784 };
839 }; 785 };
840 786
841 slimcap-dai-link { 787 slimcap-dai-link {
842 link-name = "SLIM Capture"; 788 link-name = "SLIM Capture";
843 cpu { 789 cpu {
844 sound-dai = <&q6afedai 790 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 791 };
846 792
847 platform { 793 platform {
848 sound-dai = <&q6routin 794 sound-dai = <&q6routing>;
849 }; 795 };
850 796
851 codec { 797 codec {
852 sound-dai = <&wcd9340 798 sound-dai = <&wcd9340 1>;
853 }; 799 };
854 }; 800 };
855 }; 801 };
856 802
857 &spi0 { 803 &spi0 {
858 status = "okay"; 804 status = "okay";
859 pinctrl-names = "default"; 805 pinctrl-names = "default";
860 pinctrl-0 = <&qup_spi0_default>; 806 pinctrl-0 = <&qup_spi0_default>;
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; 807 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
862 808
863 can@0 { 809 can@0 {
864 compatible = "microchip,mcp251 810 compatible = "microchip,mcp2517fd";
865 reg = <0>; 811 reg = <0>;
866 clocks = <&clk40M>; 812 clocks = <&clk40M>;
867 interrupts-extended = <&tlmm 1 813 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
868 spi-max-frequency = <10000000> 814 spi-max-frequency = <10000000>;
869 vdd-supply = <&vdc_5v>; 815 vdd-supply = <&vdc_5v>;
870 xceiver-supply = <&vdc_5v>; 816 xceiver-supply = <&vdc_5v>;
871 }; 817 };
872 }; 818 };
873 819
874 &spi2 { 820 &spi2 {
875 /* On Low speed expansion */ 821 /* On Low speed expansion */
876 status = "okay"; 822 status = "okay";
877 }; 823 };
878 824
879 &tlmm { 825 &tlmm {
880 cam0_default: cam0-default-state { 826 cam0_default: cam0-default-state {
881 rst-pins { 827 rst-pins {
882 pins = "gpio9"; 828 pins = "gpio9";
883 function = "gpio"; 829 function = "gpio";
884 830
885 drive-strength = <16>; 831 drive-strength = <16>;
886 bias-disable; 832 bias-disable;
887 }; 833 };
888 834
889 mclk0-pins { 835 mclk0-pins {
890 pins = "gpio13"; 836 pins = "gpio13";
891 function = "cam_mclk"; 837 function = "cam_mclk";
892 838
893 drive-strength = <16>; 839 drive-strength = <16>;
894 bias-disable; 840 bias-disable;
895 }; 841 };
896 }; 842 };
897 843
898 cam3_default: cam3-default-state { 844 cam3_default: cam3-default-state {
899 rst-pins { 845 rst-pins {
900 function = "gpio"; 846 function = "gpio";
901 pins = "gpio21"; 847 pins = "gpio21";
902 848
903 drive-strength = <16>; 849 drive-strength = <16>;
904 bias-disable; 850 bias-disable;
905 }; 851 };
906 852
907 mclk3-pins { 853 mclk3-pins {
908 function = "cam_mclk"; 854 function = "cam_mclk";
909 pins = "gpio16"; 855 pins = "gpio16";
910 856
911 drive-strength = <16>; 857 drive-strength = <16>;
912 bias-disable; 858 bias-disable;
913 }; 859 };
914 }; 860 };
915 861
916 dsi_sw_sel: dsi-sw-sel-state { 862 dsi_sw_sel: dsi-sw-sel-state {
917 pins = "gpio120"; 863 pins = "gpio120";
918 function = "gpio"; 864 function = "gpio";
919 865
920 drive-strength = <2>; 866 drive-strength = <2>;
921 bias-disable; 867 bias-disable;
922 output-high; 868 output-high;
923 }; 869 };
924 870
925 lt9611_irq_pin: lt9611-irq-state { 871 lt9611_irq_pin: lt9611-irq-state {
926 pins = "gpio84"; 872 pins = "gpio84";
927 function = "gpio"; 873 function = "gpio";
928 bias-disable; 874 bias-disable;
929 }; 875 };
930 876
931 pcie0_default_state: pcie0-default-sta 877 pcie0_default_state: pcie0-default-state {
932 clkreq-pins { 878 clkreq-pins {
933 pins = "gpio36"; 879 pins = "gpio36";
934 function = "pci_e0"; 880 function = "pci_e0";
935 bias-pull-up; 881 bias-pull-up;
936 }; 882 };
937 883
938 reset-n-pins { 884 reset-n-pins {
939 pins = "gpio35"; 885 pins = "gpio35";
940 function = "gpio"; 886 function = "gpio";
941 887
942 drive-strength = <2>; 888 drive-strength = <2>;
943 output-low; 889 output-low;
944 bias-pull-down; 890 bias-pull-down;
945 }; 891 };
946 892
947 wake-n-pins { 893 wake-n-pins {
948 pins = "gpio37"; 894 pins = "gpio37";
949 function = "gpio"; 895 function = "gpio";
950 896
951 drive-strength = <2>; 897 drive-strength = <2>;
952 bias-pull-up; 898 bias-pull-up;
953 }; 899 };
954 }; 900 };
955 901
956 pcie0_pwren_state: pcie0-pwren-state { 902 pcie0_pwren_state: pcie0-pwren-state {
957 pins = "gpio90"; 903 pins = "gpio90";
958 function = "gpio"; 904 function = "gpio";
959 905
960 drive-strength = <2>; 906 drive-strength = <2>;
961 bias-disable; 907 bias-disable;
962 }; 908 };
963 909
964 pcie1_default_state: pcie1-default-sta 910 pcie1_default_state: pcie1-default-state {
965 perst-n-pins { 911 perst-n-pins {
966 pins = "gpio102"; 912 pins = "gpio102";
967 function = "gpio"; 913 function = "gpio";
968 914
969 drive-strength = <16>; 915 drive-strength = <16>;
970 bias-disable; 916 bias-disable;
971 }; 917 };
972 918
973 clkreq-pins { 919 clkreq-pins {
974 pins = "gpio103"; 920 pins = "gpio103";
975 function = "pci_e1"; 921 function = "pci_e1";
976 bias-pull-up; 922 bias-pull-up;
977 }; 923 };
978 924
979 wake-n-pins { 925 wake-n-pins {
980 pins = "gpio11"; 926 pins = "gpio11";
981 function = "gpio"; 927 function = "gpio";
982 928
983 drive-strength = <2>; 929 drive-strength = <2>;
984 bias-pull-up; 930 bias-pull-up;
985 }; 931 };
986 932
987 reset-n-pins { 933 reset-n-pins {
988 pins = "gpio75"; 934 pins = "gpio75";
989 function = "gpio"; 935 function = "gpio";
990 936
991 drive-strength = <16>; 937 drive-strength = <16>;
992 bias-pull-up; 938 bias-pull-up;
993 output-high; 939 output-high;
994 }; 940 };
995 }; 941 };
996 942
997 sdc2_default_state: sdc2-default-state 943 sdc2_default_state: sdc2-default-state {
998 clk-pins { 944 clk-pins {
999 pins = "sdc2_clk"; 945 pins = "sdc2_clk";
1000 bias-disable; 946 bias-disable;
1001 947
1002 /* 948 /*
1003 * It seems that mmc_ 949 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 950 * strength is not 16 on clk, cmd, and data pins.
1005 */ 951 */
1006 drive-strength = <16> 952 drive-strength = <16>;
1007 }; 953 };
1008 954
1009 cmd-pins { 955 cmd-pins {
1010 pins = "sdc2_cmd"; 956 pins = "sdc2_cmd";
1011 bias-pull-up; 957 bias-pull-up;
1012 drive-strength = <10> 958 drive-strength = <10>;
1013 }; 959 };
1014 960
1015 data-pins { 961 data-pins {
1016 pins = "sdc2_data"; 962 pins = "sdc2_data";
1017 bias-pull-up; 963 bias-pull-up;
1018 drive-strength = <10> 964 drive-strength = <10>;
1019 }; 965 };
1020 }; 966 };
1021 967
1022 sdc2_card_det_n: sd-card-det-n-state 968 sdc2_card_det_n: sd-card-det-n-state {
1023 pins = "gpio126"; 969 pins = "gpio126";
1024 function = "gpio"; 970 function = "gpio";
1025 bias-pull-up; 971 bias-pull-up;
1026 }; 972 };
1027 }; 973 };
1028 974
1029 &uart3 { 975 &uart3 {
1030 label = "LS-UART0"; 976 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; 977 pinctrl-0 = <&qup_uart3_4pin>;
1032 978
1033 status = "disabled"; 979 status = "disabled";
1034 }; 980 };
1035 981
1036 &uart6 { 982 &uart6 {
1037 status = "okay"; 983 status = "okay";
1038 984
1039 pinctrl-0 = <&qup_uart6_4pin>; 985 pinctrl-0 = <&qup_uart6_4pin>;
1040 986
1041 bluetooth { 987 bluetooth {
1042 compatible = "qcom,wcn3990-bt 988 compatible = "qcom,wcn3990-bt";
1043 989
1044 vddio-supply = <&vreg_s4a_1p8 990 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 991 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 992 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 993 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 994 max-speed = <3200000>;
1049 }; 995 };
1050 }; 996 };
1051 997
1052 &uart9 { 998 &uart9 {
1053 label = "LS-UART1"; 999 label = "LS-UART1";
1054 status = "okay"; 1000 status = "okay";
1055 }; 1001 };
1056 1002
1057 &usb_1 { 1003 &usb_1 {
1058 status = "okay"; 1004 status = "okay";
1059 }; 1005 };
1060 1006
1061 &usb_1_dwc3 { 1007 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 1008 dr_mode = "peripheral";
1063 }; 1009 };
1064 1010
1065 &usb_1_hsphy { 1011 &usb_1_hsphy {
1066 status = "okay"; 1012 status = "okay";
1067 1013
1068 vdd-supply = <&vreg_l1a_0p875>; 1014 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 1015 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1016 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 1017
1072 qcom,imp-res-offset-value = <8>; 1018 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1019 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 1020 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 1021 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 1022 };
1077 1023
1078 &usb_1_qmpphy { 1024 &usb_1_qmpphy {
1079 status = "okay"; 1025 status = "okay";
1080 1026
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 1027 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 1028 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 1029 };
1084 1030
1085 &usb_2 { 1031 &usb_2 {
1086 status = "okay"; 1032 status = "okay";
1087 }; 1033 };
1088 1034
1089 &usb_2_dwc3 { 1035 &usb_2_dwc3 {
1090 dr_mode = "host"; 1036 dr_mode = "host";
1091 }; 1037 };
1092 1038
1093 &usb_2_hsphy { 1039 &usb_2_hsphy {
1094 status = "okay"; 1040 status = "okay";
1095 1041
1096 vdd-supply = <&vreg_l1a_0p875>; 1042 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 1043 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1044 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 1045
1100 qcom,imp-res-offset-value = <8>; 1046 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1047 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 1048 };
1103 1049
1104 &usb_2_qmpphy { 1050 &usb_2_qmpphy {
1105 status = "okay"; 1051 status = "okay";
1106 1052
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 1053 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 1054 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 1055 };
1110 1056
1111 &ufs_mem_hc { 1057 &ufs_mem_hc {
1112 status = "okay"; 1058 status = "okay";
1113 1059
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 1060 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 1061
1116 vcc-supply = <&vreg_l20a_2p95>; 1062 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 1063 vcc-max-microamp = <800000>;
1118 }; 1064 };
1119 1065
1120 &ufs_mem_phy { 1066 &ufs_mem_phy {
1121 status = "okay"; 1067 status = "okay";
1122 1068
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 1069 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 1070 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 1071 };
1126 1072
1127 &venus { 1073 &venus {
1128 status = "okay"; 1074 status = "okay";
1129 }; 1075 };
1130 1076
1131 &wcd9340 { 1077 &wcd9340 {
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H 1078 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1079 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1080 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1081 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1082 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1083 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1084
1139 swm: soundwire@c85 { !! 1085 swm: swm@c85 {
1140 left_spkr: speaker@0,1 { 1086 left_spkr: speaker@0,1 {
1141 compatible = "sdw1021 1087 compatible = "sdw10217201000";
1142 reg = <0 1>; 1088 reg = <0 1>;
1143 powerdown-gpios = <&w 1089 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1090 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1091 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1092 #sound-dai-cells = <0>;
1147 }; 1093 };
1148 1094
1149 right_spkr: speaker@0,2 { 1095 right_spkr: speaker@0,2 {
1150 compatible = "sdw1021 1096 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w 1097 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1098 reg = <0 2>;
1153 #thermal-sensor-cells 1099 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1100 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1101 #sound-dai-cells = <0>;
1156 }; 1102 };
1157 }; 1103 };
1158 }; 1104 };
1159 1105
1160 &wifi { 1106 &wifi {
1161 status = "okay"; 1107 status = "okay";
1162 1108
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1109 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1110 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1111 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1112 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1113
1168 qcom,snoc-host-cap-8bit-quirk; 1114 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th 1115 qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
1170 }; 1116 };
1171 1117
1172 /* PINCTRL - additions to nodes defined in sd 1118 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1119 &qup_spi2_default {
1174 drive-strength = <16>; 1120 drive-strength = <16>;
1175 }; 1121 };
1176 1122
1177 &qup_i2c10_default { 1123 &qup_i2c10_default {
1178 drive-strength = <2>; 1124 drive-strength = <2>;
1179 bias-disable; 1125 bias-disable;
1180 }; 1126 };
1181 1127
1182 &qup_uart9_rx { 1128 &qup_uart9_rx {
1183 drive-strength = <2>; 1129 drive-strength = <2>;
1184 bias-pull-up; 1130 bias-pull-up;
1185 }; 1131 };
1186 1132
1187 &qup_uart9_tx { 1133 &qup_uart9_tx {
1188 drive-strength = <2>; 1134 drive-strength = <2>;
1189 bias-disable; 1135 bias-disable;
1190 }; 1136 };
1191 1137
1192 /* PINCTRL - additions to nodes defined in sd 1138 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1193 &qup_spi0_default { 1139 &qup_spi0_default {
1194 drive-strength = <6>; 1140 drive-strength = <6>;
1195 bias-disable; 1141 bias-disable;
1196 }; 1142 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.