1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 13 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" 14 #include "sdm845-wcd9340.dtsi"
15 #include "pm8998.dtsi" 15 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 16 #include "pmi8998.dtsi"
17 17
18 / { 18 / {
19 model = "Thundercomm Dragonboard 845c" 19 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 20 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; 21 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>; 22 qcom,board-id = <8 0>;
23 23
24 aliases { 24 aliases {
25 serial0 = &uart9; 25 serial0 = &uart9;
26 serial1 = &uart6; 26 serial1 = &uart6;
27 }; 27 };
28 28
29 chosen { 29 chosen {
30 stdout-path = "serial0:115200n 30 stdout-path = "serial0:115200n8";
31 }; 31 };
32 32
33 /* Fixed crystal oscillator dedicated 33 /* Fixed crystal oscillator dedicated to MCP2517FD */
34 clk40M: can-clock { 34 clk40M: can-clock {
35 compatible = "fixed-clock"; 35 compatible = "fixed-clock";
36 #clock-cells = <0>; 36 #clock-cells = <0>;
37 clock-frequency = <40000000>; 37 clock-frequency = <40000000>;
38 }; 38 };
39 39
40 dc12v: dc12v-regulator { 40 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 41 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 42 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 43 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 44 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 45 regulator-always-on;
46 }; 46 };
47 47
48 gpio-keys { 48 gpio-keys {
49 compatible = "gpio-keys"; 49 compatible = "gpio-keys";
50 autorepeat; 50 autorepeat;
51 51
52 pinctrl-names = "default"; 52 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 53 pinctrl-0 = <&vol_up_pin_a>;
54 54
55 key-vol-up { 55 key-vol-up {
56 label = "Volume Up"; 56 label = "Volume Up";
57 linux,code = <KEY_VOLU 57 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios 58 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
59 }; 59 };
60 }; 60 };
61 61
62 leds { 62 leds {
63 compatible = "gpio-leds"; 63 compatible = "gpio-leds";
64 64
65 led-0 { 65 led-0 {
66 label = "green:user4"; 66 label = "green:user4";
67 function = LED_FUNCTIO 67 function = LED_FUNCTION_INDICATOR;
68 color = <LED_COLOR_ID_ 68 color = <LED_COLOR_ID_GREEN>;
69 gpios = <&pm8998_gpios 69 gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>;
>> 70 linux,default-trigger = "panic-indicator";
70 default-state = "off"; 71 default-state = "off";
71 panic-indicator; <<
72 }; 72 };
73 73
74 led-1 { 74 led-1 {
75 label = "yellow:wlan"; 75 label = "yellow:wlan";
76 function = LED_FUNCTIO 76 function = LED_FUNCTION_WLAN;
77 color = <LED_COLOR_ID_ 77 color = <LED_COLOR_ID_YELLOW>;
78 gpios = <&pm8998_gpios 78 gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>;
79 linux,default-trigger 79 linux,default-trigger = "phy0tx";
80 default-state = "off"; 80 default-state = "off";
81 }; 81 };
82 82
83 led-2 { 83 led-2 {
84 label = "blue:bt"; 84 label = "blue:bt";
85 function = LED_FUNCTIO 85 function = LED_FUNCTION_BLUETOOTH;
86 color = <LED_COLOR_ID_ 86 color = <LED_COLOR_ID_BLUE>;
87 gpios = <&pm8998_gpios 87 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger 88 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 89 default-state = "off";
90 }; 90 };
91 }; 91 };
92 92
93 hdmi-out { 93 hdmi-out {
94 compatible = "hdmi-connector"; 94 compatible = "hdmi-connector";
95 type = "a"; 95 type = "a";
96 96
97 port { 97 port {
98 hdmi_con: endpoint { 98 hdmi_con: endpoint {
99 remote-endpoin 99 remote-endpoint = <<9611_out>;
100 }; 100 };
101 }; 101 };
102 }; 102 };
103 103
104 reserved-memory { 104 reserved-memory {
105 /* Cont splash region set up b 105 /* Cont splash region set up by the bootloader */
106 cont_splash_mem: framebuffer@9 106 cont_splash_mem: framebuffer@9d400000 {
107 reg = <0x0 0x9d400000 107 reg = <0x0 0x9d400000 0x0 0x2400000>;
108 no-map; 108 no-map;
109 }; 109 };
110 }; 110 };
111 111
112 lt9611_1v8: lt9611-vdd18-regulator { 112 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 113 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 114 regulator-name = "LT9611_1V8";
115 115
116 vin-supply = <&vdc_5v>; 116 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 117 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 118 regulator-max-microvolt = <1800000>;
119 119
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 120 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 121 enable-active-high;
122 }; 122 };
123 123
124 lt9611_3v3: lt9611-3v3 { 124 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 125 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 126 regulator-name = "LT9611_3V3";
127 127
128 vin-supply = <&vdc_3v3>; 128 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 129 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 130 regulator-max-microvolt = <3300000>;
131 131
132 /* 132 /*
133 * TODO: make it possible to d 133 * TODO: make it possible to drive same GPIO from two clients
134 * gpio = <&tlmm 89 GPIO_ACTIV 134 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
135 * enable-active-high; 135 * enable-active-high;
136 */ 136 */
137 }; 137 };
138 138
139 pcie0_1p05v: pcie-0-1p05v-regulator { 139 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 140 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 141 regulator-name = "PCIE0_1.05V";
142 142
143 vin-supply = <&vbat>; 143 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 144 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 145 regulator-max-microvolt = <1050000>;
146 146
147 /* 147 /*
148 * TODO: make it possible to d 148 * TODO: make it possible to drive same GPIO from two clients
149 * gpio = <&tlmm 90 GPIO_ACTIV 149 * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
150 * enable-active-high; 150 * enable-active-high;
151 */ 151 */
152 }; 152 };
153 153
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator 154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator {
155 compatible = "regulator-fixed" 155 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 156 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 157 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 158 regulator-max-microvolt = <1200000>;
159 enable-active-high; 159 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ 160 gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 161 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 162 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 163 vin-supply = <&vbat>;
164 }; 164 };
165 165
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator 166 cam0_avdd_2v8: cam0-avdd-2v8-regulator {
167 compatible = "regulator-fixed" 167 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 168 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 169 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 170 regulator-max-microvolt = <2800000>;
171 enable-active-high; 171 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ 172 gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 173 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 174 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 175 vin-supply = <&vbat>;
176 }; 176 };
177 177
178 /* This regulator is enabled when the 178 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator 179 cam3_avdd_2v8: cam3-avdd-2v8-regulator {
180 compatible = "regulator-fixed" 180 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 181 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 182 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 183 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 184 regulator-always-on;
185 vin-supply = <&vbat>; 185 vin-supply = <&vbat>;
186 }; 186 };
187 187
188 pcie0_3p3v_dual: vldo-3v3-regulator { 188 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 189 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 190 regulator-name = "VLDO_3V3";
191 191
192 vin-supply = <&vbat>; 192 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 193 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 194 regulator-max-microvolt = <3300000>;
195 195
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 196 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 197 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 198
205 pinctrl-names = "default"; 199 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 200 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 201 };
208 202
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 203 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 204 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 205 regulator-name = "V5P0_HDMIOUT";
212 206
213 vin-supply = <&vdc_5v>; 207 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 208 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 209 regulator-max-microvolt = <500000>;
216 210
217 /* 211 /*
218 * TODO: make it possible to d 212 * TODO: make it possible to drive same GPIO from two clients
219 * gpio = <&tlmm 89 GPIO_ACTIV 213 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
220 * enable-active-high; 214 * enable-active-high;
221 */ 215 */
222 }; 216 };
223 217
224 vbat: vbat-regulator { 218 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 219 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 220 regulator-name = "VBAT";
227 221
228 vin-supply = <&dc12v>; 222 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 223 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 224 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 225 regulator-always-on;
232 }; 226 };
233 227
234 vbat_som: vbat-som-regulator { 228 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 229 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 230 regulator-name = "VBAT_SOM";
237 231
238 vin-supply = <&dc12v>; 232 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 233 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 234 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 235 regulator-always-on;
242 }; 236 };
243 237
244 vdc_3v3: vdc-3v3-regulator { 238 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 239 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 240 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 241 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 242 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 243 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 244 regulator-always-on;
251 }; 245 };
252 246
253 vdc_5v: vdc-5v-regulator { 247 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 248 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 249 regulator-name = "VDC_5V";
256 250
257 vin-supply = <&dc12v>; 251 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 252 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 253 regulator-max-microvolt = <500000>;
260 regulator-always-on; 254 regulator-always-on;
261 }; 255 };
262 256
263 vreg_s4a_1p8: vreg-s4a-1p8 { 257 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 258 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 259 regulator-name = "vreg_s4a_1p8";
266 260
267 regulator-min-microvolt = <180 261 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 262 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 263 regulator-always-on;
270 }; 264 };
271 265
272 vph_pwr: vph-pwr-regulator { 266 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 267 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 268 regulator-name = "vph_pwr";
275 269
276 vin-supply = <&vbat_som>; 270 vin-supply = <&vbat_som>;
277 }; 271 };
278 }; 272 };
279 273
280 &adsp_pas { 274 &adsp_pas {
281 status = "okay"; 275 status = "okay";
282 276
283 firmware-name = "qcom/sdm845/adsp.mbn" 277 firmware-name = "qcom/sdm845/adsp.mbn";
284 }; 278 };
285 279
286 &apps_rsc { 280 &apps_rsc {
287 regulators-0 { 281 regulators-0 {
288 compatible = "qcom,pm8998-rpmh 282 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 283 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 284 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 285 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 286 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 287 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 288 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 289 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 290 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 291 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 292 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 293 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 294 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 295 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 296 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 297 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 298 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 299 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 300 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 301 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 302 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 303 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 304 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 305 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 306 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 307 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 308 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 309 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 310 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 311
318 vreg_s3a_1p35: smps3 { 312 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 313 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 314 regulator-max-microvolt = <1352000>;
321 }; 315 };
322 316
323 vreg_s5a_2p04: smps5 { 317 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 318 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 319 regulator-max-microvolt = <2040000>;
326 }; 320 };
327 321
328 vreg_s7a_1p025: smps7 { 322 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 323 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 324 regulator-max-microvolt = <1028000>;
331 }; 325 };
332 326
333 vreg_l1a_0p875: ldo1 { 327 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 328 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 329 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 331 };
338 332
339 vreg_l5a_0p8: ldo5 { 333 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 334 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 335 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 336 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 337 };
344 338
345 vreg_l12a_1p8: ldo12 { 339 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 340 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 341 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 343 };
350 344
351 vreg_l7a_1p8: ldo7 { 345 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 346 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 347 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 349 };
356 350
357 vreg_l13a_2p95: ldo13 { 351 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 352 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 353 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 355 };
362 356
363 vreg_l17a_1p3: ldo17 { 357 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 358 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 359 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 361 };
368 362
369 vreg_l20a_2p95: ldo20 { 363 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 364 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 365 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 367 };
374 368
375 vreg_l21a_2p95: ldo21 { 369 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 370 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 371 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 373 };
380 374
381 vreg_l24a_3p075: ldo24 { 375 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 376 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 377 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 378 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 379 };
386 380
387 vreg_l25a_3p3: ldo25 { 381 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 382 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 383 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 384 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 385 };
392 386
393 vreg_l26a_1p2: ldo26 { 387 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 388 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 389 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 390 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 391 };
398 392
399 vreg_lvs1a_1p8: lvs1 { 393 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 394 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 395 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 396 regulator-always-on;
403 }; 397 };
404 398
405 vreg_lvs2a_1p8: lvs2 { 399 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 400 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 401 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 402 regulator-always-on;
409 }; 403 };
410 }; 404 };
411 405
412 regulators-1 { 406 regulators-1 {
413 compatible = "qcom,pmi8998-rpm 407 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 408 qcom,pmic-id = "b";
415 409
416 vdd-bob-supply = <&vph_pwr>; 410 vdd-bob-supply = <&vph_pwr>;
417 411
418 vreg_bob: bob { 412 vreg_bob: bob {
419 regulator-min-microvol 413 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 414 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 415 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 416 regulator-allow-bypass;
423 }; 417 };
424 }; 418 };
425 }; 419 };
426 420
427 &camss { <<
428 status = "okay"; <<
429 <<
430 vdda-phy-supply = <&vreg_l1a_0p875>; <<
431 vdda-pll-supply = <&vreg_l26a_1p2>; <<
432 }; <<
433 <<
434 &cdsp_pas { 421 &cdsp_pas {
435 status = "okay"; 422 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" 423 firmware-name = "qcom/sdm845/cdsp.mbn";
437 }; 424 };
438 425
439 &gcc { 426 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 427 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 428 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI 429 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
443 <GCC_LPASS_Q6_AXI_C 430 <GCC_LPASS_Q6_AXI_CLK>,
444 <GCC_LPASS_SWAY_CLK 431 <GCC_LPASS_SWAY_CLK>;
445 }; 432 };
446 433
447 &gmu { 434 &gmu {
448 status = "okay"; 435 status = "okay";
449 }; 436 };
450 437
451 &gpi_dma0 { 438 &gpi_dma0 {
452 status = "okay"; 439 status = "okay";
453 }; 440 };
454 441
455 &gpi_dma1 { 442 &gpi_dma1 {
456 status = "okay"; 443 status = "okay";
457 }; 444 };
458 445
459 &gpu { 446 &gpu {
460 status = "okay"; 447 status = "okay";
461 zap-shader { 448 zap-shader {
462 memory-region = <&gpu_mem>; 449 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 450 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 451 };
465 }; 452 };
466 453
467 &i2c10 { 454 &i2c10 {
468 status = "okay"; 455 status = "okay";
469 clock-frequency = <400000>; 456 clock-frequency = <400000>;
470 457
471 lt9611_codec: hdmi-bridge@3b { 458 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 459 compatible = "lontium,lt9611";
473 reg = <0x3b>; 460 reg = <0x3b>;
474 #sound-dai-cells = <1>; 461 #sound-dai-cells = <1>;
475 462
476 interrupts-extended = <&tlmm 8 463 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 464
478 reset-gpios = <&tlmm 128 GPIO_ 465 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 466
480 vdd-supply = <<9611_1v8>; 467 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 468 vcc-supply = <<9611_3v3>;
482 469
483 pinctrl-names = "default"; 470 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 471 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 472
486 ports { 473 ports {
487 #address-cells = <1>; 474 #address-cells = <1>;
488 #size-cells = <0>; 475 #size-cells = <0>;
489 476
490 port@0 { 477 port@0 {
491 reg = <0>; 478 reg = <0>;
492 479
493 lt9611_a: endp 480 lt9611_a: endpoint {
494 remote 481 remote-endpoint = <&mdss_dsi0_out>;
495 }; 482 };
496 }; 483 };
497 484
498 port@1 { 485 port@1 {
499 reg = <1>; 486 reg = <1>;
500 487
501 lt9611_b: endp 488 lt9611_b: endpoint {
502 remote 489 remote-endpoint = <&mdss_dsi1_out>;
503 }; 490 };
504 }; 491 };
505 492
506 port@2 { 493 port@2 {
507 reg = <2>; 494 reg = <2>;
508 495
509 lt9611_out: en 496 lt9611_out: endpoint {
510 remote 497 remote-endpoint = <&hdmi_con>;
511 }; 498 };
512 }; 499 };
513 }; 500 };
514 }; 501 };
515 }; 502 };
516 503
517 &i2c11 { 504 &i2c11 {
518 /* On Low speed expansion */ 505 /* On Low speed expansion */
519 clock-frequency = <100000>; 506 clock-frequency = <100000>;
520 status = "okay"; 507 status = "okay";
521 }; 508 };
522 509
523 &i2c14 { 510 &i2c14 {
524 /* On Low speed expansion */ 511 /* On Low speed expansion */
525 clock-frequency = <100000>; 512 clock-frequency = <100000>;
526 status = "okay"; 513 status = "okay";
527 }; 514 };
528 515
529 &mdss { 516 &mdss {
530 memory-region = <&cont_splash_mem>; 517 memory-region = <&cont_splash_mem>;
531 status = "okay"; 518 status = "okay";
532 }; 519 };
533 520
534 &mdss_dsi0 { 521 &mdss_dsi0 {
535 status = "okay"; 522 status = "okay";
536 vdda-supply = <&vreg_l26a_1p2>; 523 vdda-supply = <&vreg_l26a_1p2>;
537 524
538 qcom,dual-dsi-mode; 525 qcom,dual-dsi-mode;
539 qcom,master-dsi; 526 qcom,master-dsi;
540 527
541 ports { 528 ports {
542 port@1 { 529 port@1 {
543 endpoint { 530 endpoint {
544 remote-endpoin 531 remote-endpoint = <<9611_a>;
545 data-lanes = < 532 data-lanes = <0 1 2 3>;
546 }; 533 };
547 }; 534 };
548 }; 535 };
549 }; 536 };
550 537
551 &mdss_dsi0_phy { 538 &mdss_dsi0_phy {
552 status = "okay"; 539 status = "okay";
553 vdds-supply = <&vreg_l1a_0p875>; 540 vdds-supply = <&vreg_l1a_0p875>;
554 }; 541 };
555 542
556 &mdss_dsi1 { 543 &mdss_dsi1 {
557 vdda-supply = <&vreg_l26a_1p2>; 544 vdda-supply = <&vreg_l26a_1p2>;
558 545
559 qcom,dual-dsi-mode; 546 qcom,dual-dsi-mode;
560 547
561 /* DSI1 is slave, so use DSI0 clocks * 548 /* DSI1 is slave, so use DSI0 clocks */
562 assigned-clock-parents = <&mdss_dsi0_p 549 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
563 550
564 status = "okay"; 551 status = "okay";
565 552
566 ports { 553 ports {
567 port@1 { 554 port@1 {
568 endpoint { 555 endpoint {
569 remote-endpoin 556 remote-endpoint = <<9611_b>;
570 data-lanes = < 557 data-lanes = <0 1 2 3>;
571 }; 558 };
572 }; 559 };
573 }; 560 };
574 }; 561 };
575 562
576 &mdss_dsi1_phy { 563 &mdss_dsi1_phy {
577 vdds-supply = <&vreg_l1a_0p875>; 564 vdds-supply = <&vreg_l1a_0p875>;
578 status = "okay"; 565 status = "okay";
579 }; 566 };
580 567
581 &mss_pil { 568 &mss_pil {
582 status = "okay"; 569 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 570 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 571 };
585 572
586 &pcie0 { 573 &pcie0 {
587 status = "okay"; 574 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO 575 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI !! 576 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 577
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 578 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 579
593 pinctrl-names = "default"; 580 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 581 pinctrl-0 = <&pcie0_default_state>;
595 }; 582 };
596 583
597 &pcie0_phy { 584 &pcie0_phy {
598 status = "okay"; 585 status = "okay";
599 586
600 vdda-phy-supply = <&vreg_l1a_0p875>; 587 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 588 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 589 };
603 590
604 &pcie1 { 591 &pcie1 {
605 status = "okay"; 592 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L 593 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 594
608 pinctrl-names = "default"; 595 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 596 pinctrl-0 = <&pcie1_default_state>;
610 }; 597 };
611 598
612 &pcie1_phy { 599 &pcie1_phy {
613 status = "okay"; 600 status = "okay";
614 601
615 vdda-phy-supply = <&vreg_l1a_0p875>; 602 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 603 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 604 };
618 605
619 &pm8998_gpios { 606 &pm8998_gpios {
620 gpio-line-names = 607 gpio-line-names =
621 "NC", 608 "NC",
622 "NC", 609 "NC",
623 "WLAN_SW_CTRL", 610 "WLAN_SW_CTRL",
624 "NC", 611 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 612 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 613 "VOL_UP_N",
627 "NC", 614 "NC",
628 "ADC_IN1", 615 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 616 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 617 "CAM0_AVDD_EN",
631 "NC", 618 "NC",
632 "CAM0_DVDD_EN", 619 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 620 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 621 "DIV_CLK2",
635 "NC", 622 "NC",
636 "NC", 623 "NC",
637 "NC", 624 "NC",
638 "SMB_STAT", 625 "SMB_STAT",
639 "NC", 626 "NC",
640 "NC", 627 "NC",
641 "ADC_IN2", 628 "ADC_IN2",
642 "OPTION1", 629 "OPTION1",
643 "WCSS_PWR_REQ", 630 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 631 "PM845_GPIO24",
645 "OPTION2", 632 "OPTION2",
646 "PM845_SLB"; 633 "PM845_SLB";
647 634
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v 635 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
649 pins = "gpio12"; 636 pins = "gpio12";
650 function = "normal"; 637 function = "normal";
651 638
652 bias-pull-up; 639 bias-pull-up;
653 drive-push-pull; 640 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 641 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 642 };
656 643
657 cam0_avdd_2v8_en_default: cam0-avdd-2v 644 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
658 pins = "gpio10"; 645 pins = "gpio10";
659 function = "normal"; 646 function = "normal";
660 647
661 bias-pull-up; 648 bias-pull-up;
662 drive-push-pull; 649 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 650 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 651 };
665 652
666 vol_up_pin_a: vol-up-active-state { 653 vol_up_pin_a: vol-up-active-state {
667 pins = "gpio6"; 654 pins = "gpio6";
668 function = "normal"; 655 function = "normal";
669 input-enable; 656 input-enable;
670 bias-pull-up; 657 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 658 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 659 };
673 }; 660 };
674 661
675 &pm8998_resin { 662 &pm8998_resin {
676 linux,code = <KEY_VOLUMEDOWN>; 663 linux,code = <KEY_VOLUMEDOWN>;
677 status = "okay"; 664 status = "okay";
678 }; 665 };
679 666
680 &pmi8998_lpg { 667 &pmi8998_lpg {
681 status = "okay"; 668 status = "okay";
682 669
683 qcom,power-source = <1>; 670 qcom,power-source = <1>;
684 671
685 led@3 { 672 led@3 {
686 reg = <3>; 673 reg = <3>;
687 color = <LED_COLOR_ID_GREEN>; 674 color = <LED_COLOR_ID_GREEN>;
688 function = LED_FUNCTION_HEARTB 675 function = LED_FUNCTION_HEARTBEAT;
689 function-enumerator = <3>; 676 function-enumerator = <3>;
690 677
691 linux,default-trigger = "heart 678 linux,default-trigger = "heartbeat";
692 default-state = "on"; 679 default-state = "on";
693 }; 680 };
694 681
695 led@4 { 682 led@4 {
696 reg = <4>; 683 reg = <4>;
697 color = <LED_COLOR_ID_GREEN>; 684 color = <LED_COLOR_ID_GREEN>;
698 function = LED_FUNCTION_INDICA 685 function = LED_FUNCTION_INDICATOR;
699 function-enumerator = <2>; 686 function-enumerator = <2>;
700 }; 687 };
701 688
702 led@5 { 689 led@5 {
703 reg = <5>; 690 reg = <5>;
704 color = <LED_COLOR_ID_GREEN>; 691 color = <LED_COLOR_ID_GREEN>;
705 function = LED_FUNCTION_INDICA 692 function = LED_FUNCTION_INDICATOR;
706 function-enumerator = <1>; 693 function-enumerator = <1>;
707 }; 694 };
708 }; 695 };
709 696
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 697 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 698 &q6afedai {
712 dai@22 { 699 dai@22 {
713 reg = <QUATERNARY_MI2S_RX>; 700 reg = <QUATERNARY_MI2S_RX>;
714 qcom,sd-lines = <0 1 2 3>; 701 qcom,sd-lines = <0 1 2 3>;
715 }; 702 };
716 }; 703 };
717 704
718 &q6asmdai { 705 &q6asmdai {
719 dai@0 { 706 dai@0 {
720 reg = <0>; 707 reg = <0>;
721 }; 708 };
722 709
723 dai@1 { 710 dai@1 {
724 reg = <1>; 711 reg = <1>;
725 }; 712 };
726 713
727 dai@2 { 714 dai@2 {
728 reg = <2>; 715 reg = <2>;
729 }; 716 };
730 717
731 dai@3 { 718 dai@3 {
732 reg = <3>; 719 reg = <3>;
733 direction = <2>; 720 direction = <2>;
734 is-compress-dai; 721 is-compress-dai;
735 }; 722 };
736 }; 723 };
737 724
738 &qupv3_id_0 { 725 &qupv3_id_0 {
739 status = "okay"; 726 status = "okay";
740 }; 727 };
741 728
742 &qupv3_id_1 { 729 &qupv3_id_1 {
743 status = "okay"; 730 status = "okay";
744 }; 731 };
745 732
746 &sdhc_2 { 733 &sdhc_2 {
747 status = "okay"; 734 status = "okay";
748 735
749 pinctrl-names = "default"; 736 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 737 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 738
752 vmmc-supply = <&vreg_l21a_2p95>; 739 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 740 vqmmc-supply = <&vreg_l13a_2p95>;
754 741
755 bus-width = <4>; 742 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 743 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 744 };
758 745
759 &sound { 746 &sound {
760 compatible = "qcom,db845c-sndcard", "q 747 compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 748 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 749 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 750 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 751 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 752 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 753 pinctrl-names = "default";
767 model = "DB845c"; 754 model = "DB845c";
768 audio-routing = 755 audio-routing =
769 "RX_BIAS", "MCLK", 756 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 757 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 758 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 759 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 760 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 761 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 762 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 763 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 764 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 765 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 766 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 767 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 768 "MultiMedia3 Capture", "MM_UL3";
782 769
783 mm1-dai-link { 770 mm1-dai-link {
784 link-name = "MultiMedia1"; 771 link-name = "MultiMedia1";
785 cpu { 772 cpu {
786 sound-dai = <&q6asmdai 773 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 774 };
788 }; 775 };
789 776
790 mm2-dai-link { 777 mm2-dai-link {
791 link-name = "MultiMedia2"; 778 link-name = "MultiMedia2";
792 cpu { 779 cpu {
793 sound-dai = <&q6asmdai 780 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 781 };
795 }; 782 };
796 783
797 mm3-dai-link { 784 mm3-dai-link {
798 link-name = "MultiMedia3"; 785 link-name = "MultiMedia3";
799 cpu { 786 cpu {
800 sound-dai = <&q6asmdai 787 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 788 };
802 }; 789 };
803 790
804 mm4-dai-link { 791 mm4-dai-link {
805 link-name = "MultiMedia4"; 792 link-name = "MultiMedia4";
806 cpu { 793 cpu {
807 sound-dai = <&q6asmdai 794 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 795 };
809 }; 796 };
810 797
811 hdmi-dai-link { 798 hdmi-dai-link {
812 link-name = "HDMI Playback"; 799 link-name = "HDMI Playback";
813 cpu { 800 cpu {
814 sound-dai = <&q6afedai 801 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 802 };
816 803
817 platform { 804 platform {
818 sound-dai = <&q6routin 805 sound-dai = <&q6routing>;
819 }; 806 };
820 807
821 codec { 808 codec {
822 sound-dai = <<9611_c 809 sound-dai = <<9611_codec 0>;
823 }; 810 };
824 }; 811 };
825 812
826 slim-dai-link { 813 slim-dai-link {
827 link-name = "SLIM Playback"; 814 link-name = "SLIM Playback";
828 cpu { 815 cpu {
829 sound-dai = <&q6afedai 816 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 817 };
831 818
832 platform { 819 platform {
833 sound-dai = <&q6routin 820 sound-dai = <&q6routing>;
834 }; 821 };
835 822
836 codec { 823 codec {
837 sound-dai = <&left_spk 824 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 825 };
839 }; 826 };
840 827
841 slimcap-dai-link { 828 slimcap-dai-link {
842 link-name = "SLIM Capture"; 829 link-name = "SLIM Capture";
843 cpu { 830 cpu {
844 sound-dai = <&q6afedai 831 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 832 };
846 833
847 platform { 834 platform {
848 sound-dai = <&q6routin 835 sound-dai = <&q6routing>;
849 }; 836 };
850 837
851 codec { 838 codec {
852 sound-dai = <&wcd9340 839 sound-dai = <&wcd9340 1>;
853 }; 840 };
854 }; 841 };
855 }; 842 };
856 843
857 &spi0 { 844 &spi0 {
858 status = "okay"; 845 status = "okay";
859 pinctrl-names = "default"; 846 pinctrl-names = "default";
860 pinctrl-0 = <&qup_spi0_default>; 847 pinctrl-0 = <&qup_spi0_default>;
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; 848 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
862 849
863 can@0 { 850 can@0 {
864 compatible = "microchip,mcp251 851 compatible = "microchip,mcp2517fd";
865 reg = <0>; 852 reg = <0>;
866 clocks = <&clk40M>; 853 clocks = <&clk40M>;
867 interrupts-extended = <&tlmm 1 854 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
868 spi-max-frequency = <10000000> 855 spi-max-frequency = <10000000>;
869 vdd-supply = <&vdc_5v>; 856 vdd-supply = <&vdc_5v>;
870 xceiver-supply = <&vdc_5v>; 857 xceiver-supply = <&vdc_5v>;
871 }; 858 };
872 }; 859 };
873 860
874 &spi2 { 861 &spi2 {
875 /* On Low speed expansion */ 862 /* On Low speed expansion */
876 status = "okay"; 863 status = "okay";
877 }; 864 };
878 865
879 &tlmm { 866 &tlmm {
880 cam0_default: cam0-default-state { 867 cam0_default: cam0-default-state {
881 rst-pins { 868 rst-pins {
882 pins = "gpio9"; 869 pins = "gpio9";
883 function = "gpio"; 870 function = "gpio";
884 871
885 drive-strength = <16>; 872 drive-strength = <16>;
886 bias-disable; 873 bias-disable;
887 }; 874 };
888 875
889 mclk0-pins { 876 mclk0-pins {
890 pins = "gpio13"; 877 pins = "gpio13";
891 function = "cam_mclk"; 878 function = "cam_mclk";
892 879
893 drive-strength = <16>; 880 drive-strength = <16>;
894 bias-disable; 881 bias-disable;
895 }; 882 };
896 }; 883 };
897 884
898 cam3_default: cam3-default-state { 885 cam3_default: cam3-default-state {
899 rst-pins { 886 rst-pins {
900 function = "gpio"; 887 function = "gpio";
901 pins = "gpio21"; 888 pins = "gpio21";
902 889
903 drive-strength = <16>; 890 drive-strength = <16>;
904 bias-disable; 891 bias-disable;
905 }; 892 };
906 893
907 mclk3-pins { 894 mclk3-pins {
908 function = "cam_mclk"; 895 function = "cam_mclk";
909 pins = "gpio16"; 896 pins = "gpio16";
910 897
911 drive-strength = <16>; 898 drive-strength = <16>;
912 bias-disable; 899 bias-disable;
913 }; 900 };
914 }; 901 };
915 902
916 dsi_sw_sel: dsi-sw-sel-state { 903 dsi_sw_sel: dsi-sw-sel-state {
917 pins = "gpio120"; 904 pins = "gpio120";
918 function = "gpio"; 905 function = "gpio";
919 906
920 drive-strength = <2>; 907 drive-strength = <2>;
921 bias-disable; 908 bias-disable;
922 output-high; 909 output-high;
923 }; 910 };
924 911
925 lt9611_irq_pin: lt9611-irq-state { 912 lt9611_irq_pin: lt9611-irq-state {
926 pins = "gpio84"; 913 pins = "gpio84";
927 function = "gpio"; 914 function = "gpio";
928 bias-disable; 915 bias-disable;
929 }; 916 };
930 917
931 pcie0_default_state: pcie0-default-sta 918 pcie0_default_state: pcie0-default-state {
932 clkreq-pins { 919 clkreq-pins {
933 pins = "gpio36"; 920 pins = "gpio36";
934 function = "pci_e0"; 921 function = "pci_e0";
935 bias-pull-up; 922 bias-pull-up;
936 }; 923 };
937 924
938 reset-n-pins { 925 reset-n-pins {
939 pins = "gpio35"; 926 pins = "gpio35";
940 function = "gpio"; 927 function = "gpio";
941 928
942 drive-strength = <2>; 929 drive-strength = <2>;
943 output-low; 930 output-low;
944 bias-pull-down; 931 bias-pull-down;
945 }; 932 };
946 933
947 wake-n-pins { 934 wake-n-pins {
948 pins = "gpio37"; 935 pins = "gpio37";
949 function = "gpio"; 936 function = "gpio";
950 937
951 drive-strength = <2>; 938 drive-strength = <2>;
952 bias-pull-up; 939 bias-pull-up;
953 }; 940 };
954 }; 941 };
955 942
956 pcie0_pwren_state: pcie0-pwren-state { 943 pcie0_pwren_state: pcie0-pwren-state {
957 pins = "gpio90"; 944 pins = "gpio90";
958 function = "gpio"; 945 function = "gpio";
959 946
960 drive-strength = <2>; 947 drive-strength = <2>;
961 bias-disable; 948 bias-disable;
962 }; 949 };
963 950
964 pcie1_default_state: pcie1-default-sta 951 pcie1_default_state: pcie1-default-state {
965 perst-n-pins { 952 perst-n-pins {
966 pins = "gpio102"; 953 pins = "gpio102";
967 function = "gpio"; 954 function = "gpio";
968 955
969 drive-strength = <16>; 956 drive-strength = <16>;
970 bias-disable; 957 bias-disable;
971 }; 958 };
972 959
973 clkreq-pins { 960 clkreq-pins {
974 pins = "gpio103"; 961 pins = "gpio103";
975 function = "pci_e1"; 962 function = "pci_e1";
976 bias-pull-up; 963 bias-pull-up;
977 }; 964 };
978 965
979 wake-n-pins { 966 wake-n-pins {
980 pins = "gpio11"; 967 pins = "gpio11";
981 function = "gpio"; 968 function = "gpio";
982 969
983 drive-strength = <2>; 970 drive-strength = <2>;
984 bias-pull-up; 971 bias-pull-up;
985 }; 972 };
986 973
987 reset-n-pins { 974 reset-n-pins {
988 pins = "gpio75"; 975 pins = "gpio75";
989 function = "gpio"; 976 function = "gpio";
990 977
991 drive-strength = <16>; 978 drive-strength = <16>;
992 bias-pull-up; 979 bias-pull-up;
993 output-high; 980 output-high;
994 }; 981 };
995 }; 982 };
996 983
997 sdc2_default_state: sdc2-default-state 984 sdc2_default_state: sdc2-default-state {
998 clk-pins { 985 clk-pins {
999 pins = "sdc2_clk"; 986 pins = "sdc2_clk";
1000 bias-disable; 987 bias-disable;
1001 988
1002 /* 989 /*
1003 * It seems that mmc_ 990 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 991 * strength is not 16 on clk, cmd, and data pins.
1005 */ 992 */
1006 drive-strength = <16> 993 drive-strength = <16>;
1007 }; 994 };
1008 995
1009 cmd-pins { 996 cmd-pins {
1010 pins = "sdc2_cmd"; 997 pins = "sdc2_cmd";
1011 bias-pull-up; 998 bias-pull-up;
1012 drive-strength = <10> 999 drive-strength = <10>;
1013 }; 1000 };
1014 1001
1015 data-pins { 1002 data-pins {
1016 pins = "sdc2_data"; 1003 pins = "sdc2_data";
1017 bias-pull-up; 1004 bias-pull-up;
1018 drive-strength = <10> 1005 drive-strength = <10>;
1019 }; 1006 };
1020 }; 1007 };
1021 1008
1022 sdc2_card_det_n: sd-card-det-n-state 1009 sdc2_card_det_n: sd-card-det-n-state {
1023 pins = "gpio126"; 1010 pins = "gpio126";
1024 function = "gpio"; 1011 function = "gpio";
1025 bias-pull-up; 1012 bias-pull-up;
1026 }; 1013 };
1027 }; 1014 };
1028 1015
1029 &uart3 { 1016 &uart3 {
1030 label = "LS-UART0"; 1017 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; 1018 pinctrl-0 = <&qup_uart3_4pin>;
1032 1019
1033 status = "disabled"; 1020 status = "disabled";
1034 }; 1021 };
1035 1022
1036 &uart6 { 1023 &uart6 {
1037 status = "okay"; 1024 status = "okay";
1038 1025
1039 pinctrl-0 = <&qup_uart6_4pin>; 1026 pinctrl-0 = <&qup_uart6_4pin>;
1040 1027
1041 bluetooth { 1028 bluetooth {
1042 compatible = "qcom,wcn3990-bt 1029 compatible = "qcom,wcn3990-bt";
1043 1030
1044 vddio-supply = <&vreg_s4a_1p8 1031 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 1032 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 1033 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 1034 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 1035 max-speed = <3200000>;
1049 }; 1036 };
1050 }; 1037 };
1051 1038
1052 &uart9 { 1039 &uart9 {
1053 label = "LS-UART1"; 1040 label = "LS-UART1";
1054 status = "okay"; 1041 status = "okay";
1055 }; 1042 };
1056 1043
1057 &usb_1 { 1044 &usb_1 {
1058 status = "okay"; 1045 status = "okay";
1059 }; 1046 };
1060 1047
1061 &usb_1_dwc3 { 1048 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 1049 dr_mode = "peripheral";
1063 }; 1050 };
1064 1051
1065 &usb_1_hsphy { 1052 &usb_1_hsphy {
1066 status = "okay"; 1053 status = "okay";
1067 1054
1068 vdd-supply = <&vreg_l1a_0p875>; 1055 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 1056 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1057 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 1058
1072 qcom,imp-res-offset-value = <8>; 1059 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1060 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 1061 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 1062 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 1063 };
1077 1064
1078 &usb_1_qmpphy { 1065 &usb_1_qmpphy {
1079 status = "okay"; 1066 status = "okay";
1080 1067
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 1068 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 1069 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 1070 };
1084 1071
1085 &usb_2 { 1072 &usb_2 {
1086 status = "okay"; 1073 status = "okay";
1087 }; 1074 };
1088 1075
1089 &usb_2_dwc3 { 1076 &usb_2_dwc3 {
1090 dr_mode = "host"; 1077 dr_mode = "host";
1091 }; 1078 };
1092 1079
1093 &usb_2_hsphy { 1080 &usb_2_hsphy {
1094 status = "okay"; 1081 status = "okay";
1095 1082
1096 vdd-supply = <&vreg_l1a_0p875>; 1083 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 1084 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1085 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 1086
1100 qcom,imp-res-offset-value = <8>; 1087 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1088 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 1089 };
1103 1090
1104 &usb_2_qmpphy { 1091 &usb_2_qmpphy {
1105 status = "okay"; 1092 status = "okay";
1106 1093
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 1094 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 1095 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 1096 };
1110 1097
1111 &ufs_mem_hc { 1098 &ufs_mem_hc {
1112 status = "okay"; 1099 status = "okay";
1113 1100
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 1101 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 1102
1116 vcc-supply = <&vreg_l20a_2p95>; 1103 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 1104 vcc-max-microamp = <800000>;
1118 }; 1105 };
1119 1106
1120 &ufs_mem_phy { 1107 &ufs_mem_phy {
1121 status = "okay"; 1108 status = "okay";
1122 1109
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 1110 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 1111 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 1112 };
1126 1113
1127 &venus { 1114 &venus {
1128 status = "okay"; 1115 status = "okay";
1129 }; 1116 };
1130 1117
1131 &wcd9340 { 1118 &wcd9340 {
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H 1119 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1120 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1121 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1122 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1123 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1124 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1125
1139 swm: soundwire@c85 { !! 1126 swm: swm@c85 {
1140 left_spkr: speaker@0,1 { 1127 left_spkr: speaker@0,1 {
1141 compatible = "sdw1021 1128 compatible = "sdw10217201000";
1142 reg = <0 1>; 1129 reg = <0 1>;
1143 powerdown-gpios = <&w 1130 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1131 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1132 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1133 #sound-dai-cells = <0>;
1147 }; 1134 };
1148 1135
1149 right_spkr: speaker@0,2 { 1136 right_spkr: speaker@0,2 {
1150 compatible = "sdw1021 1137 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w 1138 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1139 reg = <0 2>;
1153 #thermal-sensor-cells 1140 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1141 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1142 #sound-dai-cells = <0>;
1156 }; 1143 };
1157 }; 1144 };
1158 }; 1145 };
1159 1146
1160 &wifi { 1147 &wifi {
1161 status = "okay"; 1148 status = "okay";
1162 1149
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1150 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1151 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1152 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1153 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1154
1168 qcom,snoc-host-cap-8bit-quirk; 1155 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th 1156 qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
1170 }; 1157 };
1171 1158
1172 /* PINCTRL - additions to nodes defined in sd 1159 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1160 &qup_spi2_default {
1174 drive-strength = <16>; 1161 drive-strength = <16>;
1175 }; 1162 };
1176 1163
1177 &qup_i2c10_default { 1164 &qup_i2c10_default {
1178 drive-strength = <2>; 1165 drive-strength = <2>;
1179 bias-disable; 1166 bias-disable;
1180 }; 1167 };
1181 1168
1182 &qup_uart9_rx { 1169 &qup_uart9_rx {
1183 drive-strength = <2>; 1170 drive-strength = <2>;
1184 bias-pull-up; 1171 bias-pull-up;
1185 }; 1172 };
1186 1173
1187 &qup_uart9_tx { 1174 &qup_uart9_tx {
1188 drive-strength = <2>; 1175 drive-strength = <2>;
1189 bias-disable; 1176 bias-disable;
1190 }; 1177 };
1191 1178
1192 /* PINCTRL - additions to nodes defined in sd 1179 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1193 &qup_spi0_default { 1180 &qup_spi0_default {
1194 drive-strength = <6>; 1181 drive-strength = <6>;
1195 bias-disable; 1182 bias-disable;
1196 }; 1183 };
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