1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 13 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" 14 #include "sdm845-wcd9340.dtsi"
15 #include "pm8998.dtsi" 15 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 16 #include "pmi8998.dtsi"
17 17
18 / { 18 / {
19 model = "Thundercomm Dragonboard 845c" 19 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 20 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; 21 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>; 22 qcom,board-id = <8 0>;
23 23
24 aliases { 24 aliases {
25 serial0 = &uart9; 25 serial0 = &uart9;
26 serial1 = &uart6; 26 serial1 = &uart6;
27 }; 27 };
28 28
29 chosen { 29 chosen {
30 stdout-path = "serial0:115200n 30 stdout-path = "serial0:115200n8";
31 }; 31 };
32 32
33 /* Fixed crystal oscillator dedicated 33 /* Fixed crystal oscillator dedicated to MCP2517FD */
34 clk40M: can-clock { 34 clk40M: can-clock {
35 compatible = "fixed-clock"; 35 compatible = "fixed-clock";
36 #clock-cells = <0>; 36 #clock-cells = <0>;
37 clock-frequency = <40000000>; 37 clock-frequency = <40000000>;
38 }; 38 };
39 39
40 dc12v: dc12v-regulator { 40 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 41 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 42 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 43 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 44 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 45 regulator-always-on;
46 }; 46 };
47 47
48 gpio-keys { 48 gpio-keys {
49 compatible = "gpio-keys"; 49 compatible = "gpio-keys";
50 autorepeat; 50 autorepeat;
51 51
52 pinctrl-names = "default"; 52 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 53 pinctrl-0 = <&vol_up_pin_a>;
54 54
55 key-vol-up { 55 key-vol-up {
56 label = "Volume Up"; 56 label = "Volume Up";
57 linux,code = <KEY_VOLU 57 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios 58 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
59 }; 59 };
60 }; 60 };
61 61
62 leds { 62 leds {
63 compatible = "gpio-leds"; 63 compatible = "gpio-leds";
64 64
65 led-0 { 65 led-0 {
66 label = "green:user4"; 66 label = "green:user4";
67 function = LED_FUNCTIO 67 function = LED_FUNCTION_INDICATOR;
68 color = <LED_COLOR_ID_ 68 color = <LED_COLOR_ID_GREEN>;
69 gpios = <&pm8998_gpios 69 gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>;
70 default-state = "off"; 70 default-state = "off";
71 panic-indicator; 71 panic-indicator;
72 }; 72 };
73 73
74 led-1 { 74 led-1 {
75 label = "yellow:wlan"; 75 label = "yellow:wlan";
76 function = LED_FUNCTIO 76 function = LED_FUNCTION_WLAN;
77 color = <LED_COLOR_ID_ 77 color = <LED_COLOR_ID_YELLOW>;
78 gpios = <&pm8998_gpios 78 gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>;
79 linux,default-trigger 79 linux,default-trigger = "phy0tx";
80 default-state = "off"; 80 default-state = "off";
81 }; 81 };
82 82
83 led-2 { 83 led-2 {
84 label = "blue:bt"; 84 label = "blue:bt";
85 function = LED_FUNCTIO 85 function = LED_FUNCTION_BLUETOOTH;
86 color = <LED_COLOR_ID_ 86 color = <LED_COLOR_ID_BLUE>;
87 gpios = <&pm8998_gpios 87 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger 88 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 89 default-state = "off";
90 }; 90 };
91 }; 91 };
92 92
93 hdmi-out { 93 hdmi-out {
94 compatible = "hdmi-connector"; 94 compatible = "hdmi-connector";
95 type = "a"; 95 type = "a";
96 96
97 port { 97 port {
98 hdmi_con: endpoint { 98 hdmi_con: endpoint {
99 remote-endpoin 99 remote-endpoint = <<9611_out>;
100 }; 100 };
101 }; 101 };
102 }; 102 };
103 103
104 reserved-memory { 104 reserved-memory {
105 /* Cont splash region set up b 105 /* Cont splash region set up by the bootloader */
106 cont_splash_mem: framebuffer@9 106 cont_splash_mem: framebuffer@9d400000 {
107 reg = <0x0 0x9d400000 107 reg = <0x0 0x9d400000 0x0 0x2400000>;
108 no-map; 108 no-map;
109 }; 109 };
110 }; 110 };
111 111
112 lt9611_1v8: lt9611-vdd18-regulator { 112 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 113 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 114 regulator-name = "LT9611_1V8";
115 115
116 vin-supply = <&vdc_5v>; 116 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 117 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 118 regulator-max-microvolt = <1800000>;
119 119
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 120 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 121 enable-active-high;
122 }; 122 };
123 123
124 lt9611_3v3: lt9611-3v3 { 124 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 125 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 126 regulator-name = "LT9611_3V3";
127 127
128 vin-supply = <&vdc_3v3>; 128 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 129 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 130 regulator-max-microvolt = <3300000>;
131 131
132 /* 132 /*
133 * TODO: make it possible to d 133 * TODO: make it possible to drive same GPIO from two clients
134 * gpio = <&tlmm 89 GPIO_ACTIV 134 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
135 * enable-active-high; 135 * enable-active-high;
136 */ 136 */
137 }; 137 };
138 138
139 pcie0_1p05v: pcie-0-1p05v-regulator { 139 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 140 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 141 regulator-name = "PCIE0_1.05V";
142 142
143 vin-supply = <&vbat>; 143 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 144 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 145 regulator-max-microvolt = <1050000>;
146 146
147 /* 147 /*
148 * TODO: make it possible to d 148 * TODO: make it possible to drive same GPIO from two clients
149 * gpio = <&tlmm 90 GPIO_ACTIV 149 * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
150 * enable-active-high; 150 * enable-active-high;
151 */ 151 */
152 }; 152 };
153 153
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator 154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator {
155 compatible = "regulator-fixed" 155 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 156 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 157 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 158 regulator-max-microvolt = <1200000>;
159 enable-active-high; 159 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ 160 gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 161 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 162 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 163 vin-supply = <&vbat>;
164 }; 164 };
165 165
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator 166 cam0_avdd_2v8: cam0-avdd-2v8-regulator {
167 compatible = "regulator-fixed" 167 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 168 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 169 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 170 regulator-max-microvolt = <2800000>;
171 enable-active-high; 171 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ 172 gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 173 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 174 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 175 vin-supply = <&vbat>;
176 }; 176 };
177 177
178 /* This regulator is enabled when the 178 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator 179 cam3_avdd_2v8: cam3-avdd-2v8-regulator {
180 compatible = "regulator-fixed" 180 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 181 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 182 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 183 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 184 regulator-always-on;
185 vin-supply = <&vbat>; 185 vin-supply = <&vbat>;
186 }; 186 };
187 187
188 pcie0_3p3v_dual: vldo-3v3-regulator { 188 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 189 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 190 regulator-name = "VLDO_3V3";
191 191
192 vin-supply = <&vbat>; 192 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 193 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 194 regulator-max-microvolt = <3300000>;
195 195
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 196 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 197 enable-active-high;
198 /* <<
199 * FIXME: this regulator is re <<
200 * port. Keep it always on unt <<
201 * relationship. <<
202 */ <<
203 regulator-always-on; <<
204 198
205 pinctrl-names = "default"; 199 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 200 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 201 };
208 202
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 203 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 204 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 205 regulator-name = "V5P0_HDMIOUT";
212 206
213 vin-supply = <&vdc_5v>; 207 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 208 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 209 regulator-max-microvolt = <500000>;
216 210
217 /* 211 /*
218 * TODO: make it possible to d 212 * TODO: make it possible to drive same GPIO from two clients
219 * gpio = <&tlmm 89 GPIO_ACTIV 213 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
220 * enable-active-high; 214 * enable-active-high;
221 */ 215 */
222 }; 216 };
223 217
224 vbat: vbat-regulator { 218 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 219 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 220 regulator-name = "VBAT";
227 221
228 vin-supply = <&dc12v>; 222 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 223 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 224 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 225 regulator-always-on;
232 }; 226 };
233 227
234 vbat_som: vbat-som-regulator { 228 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 229 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 230 regulator-name = "VBAT_SOM";
237 231
238 vin-supply = <&dc12v>; 232 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 233 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 234 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 235 regulator-always-on;
242 }; 236 };
243 237
244 vdc_3v3: vdc-3v3-regulator { 238 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 239 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 240 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 241 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 242 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 243 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 244 regulator-always-on;
251 }; 245 };
252 246
253 vdc_5v: vdc-5v-regulator { 247 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 248 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 249 regulator-name = "VDC_5V";
256 250
257 vin-supply = <&dc12v>; 251 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 252 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 253 regulator-max-microvolt = <500000>;
260 regulator-always-on; 254 regulator-always-on;
261 }; 255 };
262 256
263 vreg_s4a_1p8: vreg-s4a-1p8 { 257 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 258 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 259 regulator-name = "vreg_s4a_1p8";
266 260
267 regulator-min-microvolt = <180 261 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 262 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 263 regulator-always-on;
270 }; 264 };
271 265
272 vph_pwr: vph-pwr-regulator { 266 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 267 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 268 regulator-name = "vph_pwr";
275 269
276 vin-supply = <&vbat_som>; 270 vin-supply = <&vbat_som>;
277 }; 271 };
278 }; 272 };
279 273
280 &adsp_pas { 274 &adsp_pas {
281 status = "okay"; 275 status = "okay";
282 276
283 firmware-name = "qcom/sdm845/adsp.mbn" 277 firmware-name = "qcom/sdm845/adsp.mbn";
284 }; 278 };
285 279
286 &apps_rsc { 280 &apps_rsc {
287 regulators-0 { 281 regulators-0 {
288 compatible = "qcom,pm8998-rpmh 282 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 283 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 284 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 285 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 286 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 287 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 288 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 289 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 290 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 291 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 292 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 293 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 294 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 295 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 296 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 297 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 298 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 299 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 300 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 301 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 302 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 303 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 304 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 305 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 306 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 307 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 308 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 309 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 310 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 311
318 vreg_s3a_1p35: smps3 { 312 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 313 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 314 regulator-max-microvolt = <1352000>;
321 }; 315 };
322 316
323 vreg_s5a_2p04: smps5 { 317 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 318 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 319 regulator-max-microvolt = <2040000>;
326 }; 320 };
327 321
328 vreg_s7a_1p025: smps7 { 322 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 323 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 324 regulator-max-microvolt = <1028000>;
331 }; 325 };
332 326
333 vreg_l1a_0p875: ldo1 { 327 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 328 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 329 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 331 };
338 332
339 vreg_l5a_0p8: ldo5 { 333 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 334 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 335 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 336 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 337 };
344 338
345 vreg_l12a_1p8: ldo12 { 339 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 340 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 341 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 343 };
350 344
351 vreg_l7a_1p8: ldo7 { 345 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 346 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 347 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 349 };
356 350
357 vreg_l13a_2p95: ldo13 { 351 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 352 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 353 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 355 };
362 356
363 vreg_l17a_1p3: ldo17 { 357 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 358 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 359 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 361 };
368 362
369 vreg_l20a_2p95: ldo20 { 363 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 364 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 365 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 367 };
374 368
375 vreg_l21a_2p95: ldo21 { 369 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 370 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 371 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 373 };
380 374
381 vreg_l24a_3p075: ldo24 { 375 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 376 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 377 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 378 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 379 };
386 380
387 vreg_l25a_3p3: ldo25 { 381 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 382 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 383 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 384 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 385 };
392 386
393 vreg_l26a_1p2: ldo26 { 387 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 388 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 389 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 390 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 391 };
398 392
399 vreg_lvs1a_1p8: lvs1 { 393 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 394 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 395 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 396 regulator-always-on;
403 }; 397 };
404 398
405 vreg_lvs2a_1p8: lvs2 { 399 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 400 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 401 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 402 regulator-always-on;
409 }; 403 };
410 }; 404 };
411 405
412 regulators-1 { 406 regulators-1 {
413 compatible = "qcom,pmi8998-rpm 407 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 408 qcom,pmic-id = "b";
415 409
416 vdd-bob-supply = <&vph_pwr>; 410 vdd-bob-supply = <&vph_pwr>;
417 411
418 vreg_bob: bob { 412 vreg_bob: bob {
419 regulator-min-microvol 413 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 414 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 415 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 416 regulator-allow-bypass;
423 }; 417 };
424 }; 418 };
425 }; 419 };
426 420
427 &camss { 421 &camss {
428 status = "okay"; 422 status = "okay";
429 423
430 vdda-phy-supply = <&vreg_l1a_0p875>; 424 vdda-phy-supply = <&vreg_l1a_0p875>;
431 vdda-pll-supply = <&vreg_l26a_1p2>; 425 vdda-pll-supply = <&vreg_l26a_1p2>;
432 }; 426 };
433 427
434 &cdsp_pas { 428 &cdsp_pas {
435 status = "okay"; 429 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" 430 firmware-name = "qcom/sdm845/cdsp.mbn";
437 }; 431 };
438 432
439 &gcc { 433 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 434 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 435 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI 436 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
443 <GCC_LPASS_Q6_AXI_C 437 <GCC_LPASS_Q6_AXI_CLK>,
444 <GCC_LPASS_SWAY_CLK 438 <GCC_LPASS_SWAY_CLK>;
445 }; 439 };
446 440
447 &gmu { 441 &gmu {
448 status = "okay"; 442 status = "okay";
449 }; 443 };
450 444
451 &gpi_dma0 { 445 &gpi_dma0 {
452 status = "okay"; 446 status = "okay";
453 }; 447 };
454 448
455 &gpi_dma1 { 449 &gpi_dma1 {
456 status = "okay"; 450 status = "okay";
457 }; 451 };
458 452
459 &gpu { 453 &gpu {
460 status = "okay"; 454 status = "okay";
461 zap-shader { 455 zap-shader {
462 memory-region = <&gpu_mem>; 456 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 457 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 458 };
465 }; 459 };
466 460
467 &i2c10 { 461 &i2c10 {
468 status = "okay"; 462 status = "okay";
469 clock-frequency = <400000>; 463 clock-frequency = <400000>;
470 464
471 lt9611_codec: hdmi-bridge@3b { 465 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 466 compatible = "lontium,lt9611";
473 reg = <0x3b>; 467 reg = <0x3b>;
474 #sound-dai-cells = <1>; 468 #sound-dai-cells = <1>;
475 469
476 interrupts-extended = <&tlmm 8 470 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 471
478 reset-gpios = <&tlmm 128 GPIO_ 472 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 473
480 vdd-supply = <<9611_1v8>; 474 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 475 vcc-supply = <<9611_3v3>;
482 476
483 pinctrl-names = "default"; 477 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 478 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 479
486 ports { 480 ports {
487 #address-cells = <1>; 481 #address-cells = <1>;
488 #size-cells = <0>; 482 #size-cells = <0>;
489 483
490 port@0 { 484 port@0 {
491 reg = <0>; 485 reg = <0>;
492 486
493 lt9611_a: endp 487 lt9611_a: endpoint {
494 remote 488 remote-endpoint = <&mdss_dsi0_out>;
495 }; 489 };
496 }; 490 };
497 491
498 port@1 { 492 port@1 {
499 reg = <1>; 493 reg = <1>;
500 494
501 lt9611_b: endp 495 lt9611_b: endpoint {
502 remote 496 remote-endpoint = <&mdss_dsi1_out>;
503 }; 497 };
504 }; 498 };
505 499
506 port@2 { 500 port@2 {
507 reg = <2>; 501 reg = <2>;
508 502
509 lt9611_out: en 503 lt9611_out: endpoint {
510 remote 504 remote-endpoint = <&hdmi_con>;
511 }; 505 };
512 }; 506 };
513 }; 507 };
514 }; 508 };
515 }; 509 };
516 510
517 &i2c11 { 511 &i2c11 {
518 /* On Low speed expansion */ 512 /* On Low speed expansion */
519 clock-frequency = <100000>; 513 clock-frequency = <100000>;
520 status = "okay"; 514 status = "okay";
521 }; 515 };
522 516
523 &i2c14 { 517 &i2c14 {
524 /* On Low speed expansion */ 518 /* On Low speed expansion */
525 clock-frequency = <100000>; 519 clock-frequency = <100000>;
526 status = "okay"; 520 status = "okay";
527 }; 521 };
528 522
529 &mdss { 523 &mdss {
530 memory-region = <&cont_splash_mem>; 524 memory-region = <&cont_splash_mem>;
531 status = "okay"; 525 status = "okay";
532 }; 526 };
533 527
534 &mdss_dsi0 { 528 &mdss_dsi0 {
535 status = "okay"; 529 status = "okay";
536 vdda-supply = <&vreg_l26a_1p2>; 530 vdda-supply = <&vreg_l26a_1p2>;
537 531
538 qcom,dual-dsi-mode; 532 qcom,dual-dsi-mode;
539 qcom,master-dsi; 533 qcom,master-dsi;
540 534
541 ports { 535 ports {
542 port@1 { 536 port@1 {
543 endpoint { 537 endpoint {
544 remote-endpoin 538 remote-endpoint = <<9611_a>;
545 data-lanes = < 539 data-lanes = <0 1 2 3>;
546 }; 540 };
547 }; 541 };
548 }; 542 };
549 }; 543 };
550 544
551 &mdss_dsi0_phy { 545 &mdss_dsi0_phy {
552 status = "okay"; 546 status = "okay";
553 vdds-supply = <&vreg_l1a_0p875>; 547 vdds-supply = <&vreg_l1a_0p875>;
554 }; 548 };
555 549
556 &mdss_dsi1 { 550 &mdss_dsi1 {
557 vdda-supply = <&vreg_l26a_1p2>; 551 vdda-supply = <&vreg_l26a_1p2>;
558 552
559 qcom,dual-dsi-mode; 553 qcom,dual-dsi-mode;
560 554
561 /* DSI1 is slave, so use DSI0 clocks * 555 /* DSI1 is slave, so use DSI0 clocks */
562 assigned-clock-parents = <&mdss_dsi0_p 556 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
563 557
564 status = "okay"; 558 status = "okay";
565 559
566 ports { 560 ports {
567 port@1 { 561 port@1 {
568 endpoint { 562 endpoint {
569 remote-endpoin 563 remote-endpoint = <<9611_b>;
570 data-lanes = < 564 data-lanes = <0 1 2 3>;
571 }; 565 };
572 }; 566 };
573 }; 567 };
574 }; 568 };
575 569
576 &mdss_dsi1_phy { 570 &mdss_dsi1_phy {
577 vdds-supply = <&vreg_l1a_0p875>; 571 vdds-supply = <&vreg_l1a_0p875>;
578 status = "okay"; 572 status = "okay";
579 }; 573 };
580 574
581 &mss_pil { 575 &mss_pil {
582 status = "okay"; 576 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 577 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 578 };
585 579
586 &pcie0 { 580 &pcie0 {
587 status = "okay"; 581 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO 582 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI 583 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 584
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 585 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 586
593 pinctrl-names = "default"; 587 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 588 pinctrl-0 = <&pcie0_default_state>;
595 }; 589 };
596 590
597 &pcie0_phy { 591 &pcie0_phy {
598 status = "okay"; 592 status = "okay";
599 593
600 vdda-phy-supply = <&vreg_l1a_0p875>; 594 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 595 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 596 };
603 597
604 &pcie1 { 598 &pcie1 {
605 status = "okay"; 599 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L 600 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 601
608 pinctrl-names = "default"; 602 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 603 pinctrl-0 = <&pcie1_default_state>;
610 }; 604 };
611 605
612 &pcie1_phy { 606 &pcie1_phy {
613 status = "okay"; 607 status = "okay";
614 608
615 vdda-phy-supply = <&vreg_l1a_0p875>; 609 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 610 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 611 };
618 612
619 &pm8998_gpios { 613 &pm8998_gpios {
620 gpio-line-names = 614 gpio-line-names =
621 "NC", 615 "NC",
622 "NC", 616 "NC",
623 "WLAN_SW_CTRL", 617 "WLAN_SW_CTRL",
624 "NC", 618 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 619 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 620 "VOL_UP_N",
627 "NC", 621 "NC",
628 "ADC_IN1", 622 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 623 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 624 "CAM0_AVDD_EN",
631 "NC", 625 "NC",
632 "CAM0_DVDD_EN", 626 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 627 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 628 "DIV_CLK2",
635 "NC", 629 "NC",
636 "NC", 630 "NC",
637 "NC", 631 "NC",
638 "SMB_STAT", 632 "SMB_STAT",
639 "NC", 633 "NC",
640 "NC", 634 "NC",
641 "ADC_IN2", 635 "ADC_IN2",
642 "OPTION1", 636 "OPTION1",
643 "WCSS_PWR_REQ", 637 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 638 "PM845_GPIO24",
645 "OPTION2", 639 "OPTION2",
646 "PM845_SLB"; 640 "PM845_SLB";
647 641
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v 642 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
649 pins = "gpio12"; 643 pins = "gpio12";
650 function = "normal"; 644 function = "normal";
651 645
652 bias-pull-up; 646 bias-pull-up;
653 drive-push-pull; 647 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 648 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 649 };
656 650
657 cam0_avdd_2v8_en_default: cam0-avdd-2v 651 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
658 pins = "gpio10"; 652 pins = "gpio10";
659 function = "normal"; 653 function = "normal";
660 654
661 bias-pull-up; 655 bias-pull-up;
662 drive-push-pull; 656 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 657 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 658 };
665 659
666 vol_up_pin_a: vol-up-active-state { 660 vol_up_pin_a: vol-up-active-state {
667 pins = "gpio6"; 661 pins = "gpio6";
668 function = "normal"; 662 function = "normal";
669 input-enable; 663 input-enable;
670 bias-pull-up; 664 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 665 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 666 };
673 }; 667 };
674 668
675 &pm8998_resin { 669 &pm8998_resin {
676 linux,code = <KEY_VOLUMEDOWN>; 670 linux,code = <KEY_VOLUMEDOWN>;
677 status = "okay"; 671 status = "okay";
678 }; 672 };
679 673
680 &pmi8998_lpg { 674 &pmi8998_lpg {
681 status = "okay"; 675 status = "okay";
682 676
683 qcom,power-source = <1>; 677 qcom,power-source = <1>;
684 678
685 led@3 { 679 led@3 {
686 reg = <3>; 680 reg = <3>;
687 color = <LED_COLOR_ID_GREEN>; 681 color = <LED_COLOR_ID_GREEN>;
688 function = LED_FUNCTION_HEARTB 682 function = LED_FUNCTION_HEARTBEAT;
689 function-enumerator = <3>; 683 function-enumerator = <3>;
690 684
691 linux,default-trigger = "heart 685 linux,default-trigger = "heartbeat";
692 default-state = "on"; 686 default-state = "on";
693 }; 687 };
694 688
695 led@4 { 689 led@4 {
696 reg = <4>; 690 reg = <4>;
697 color = <LED_COLOR_ID_GREEN>; 691 color = <LED_COLOR_ID_GREEN>;
698 function = LED_FUNCTION_INDICA 692 function = LED_FUNCTION_INDICATOR;
699 function-enumerator = <2>; 693 function-enumerator = <2>;
700 }; 694 };
701 695
702 led@5 { 696 led@5 {
703 reg = <5>; 697 reg = <5>;
704 color = <LED_COLOR_ID_GREEN>; 698 color = <LED_COLOR_ID_GREEN>;
705 function = LED_FUNCTION_INDICA 699 function = LED_FUNCTION_INDICATOR;
706 function-enumerator = <1>; 700 function-enumerator = <1>;
707 }; 701 };
708 }; 702 };
709 703
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 704 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 705 &q6afedai {
712 dai@22 { 706 dai@22 {
713 reg = <QUATERNARY_MI2S_RX>; 707 reg = <QUATERNARY_MI2S_RX>;
714 qcom,sd-lines = <0 1 2 3>; 708 qcom,sd-lines = <0 1 2 3>;
715 }; 709 };
716 }; 710 };
717 711
718 &q6asmdai { 712 &q6asmdai {
719 dai@0 { 713 dai@0 {
720 reg = <0>; 714 reg = <0>;
721 }; 715 };
722 716
723 dai@1 { 717 dai@1 {
724 reg = <1>; 718 reg = <1>;
725 }; 719 };
726 720
727 dai@2 { 721 dai@2 {
728 reg = <2>; 722 reg = <2>;
729 }; 723 };
730 724
731 dai@3 { 725 dai@3 {
732 reg = <3>; 726 reg = <3>;
733 direction = <2>; 727 direction = <2>;
734 is-compress-dai; 728 is-compress-dai;
735 }; 729 };
736 }; 730 };
737 731
738 &qupv3_id_0 { 732 &qupv3_id_0 {
739 status = "okay"; 733 status = "okay";
740 }; 734 };
741 735
742 &qupv3_id_1 { 736 &qupv3_id_1 {
743 status = "okay"; 737 status = "okay";
744 }; 738 };
745 739
746 &sdhc_2 { 740 &sdhc_2 {
747 status = "okay"; 741 status = "okay";
748 742
749 pinctrl-names = "default"; 743 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 744 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 745
752 vmmc-supply = <&vreg_l21a_2p95>; 746 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 747 vqmmc-supply = <&vreg_l13a_2p95>;
754 748
755 bus-width = <4>; 749 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 750 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 751 };
758 752
759 &sound { 753 &sound {
760 compatible = "qcom,db845c-sndcard", "q 754 compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 755 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 756 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 757 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 758 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 759 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 760 pinctrl-names = "default";
767 model = "DB845c"; 761 model = "DB845c";
768 audio-routing = 762 audio-routing =
769 "RX_BIAS", "MCLK", 763 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 764 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 765 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 766 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 767 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 768 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 769 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 770 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 771 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 772 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 773 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 774 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 775 "MultiMedia3 Capture", "MM_UL3";
782 776
783 mm1-dai-link { 777 mm1-dai-link {
784 link-name = "MultiMedia1"; 778 link-name = "MultiMedia1";
785 cpu { 779 cpu {
786 sound-dai = <&q6asmdai 780 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 781 };
788 }; 782 };
789 783
790 mm2-dai-link { 784 mm2-dai-link {
791 link-name = "MultiMedia2"; 785 link-name = "MultiMedia2";
792 cpu { 786 cpu {
793 sound-dai = <&q6asmdai 787 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 788 };
795 }; 789 };
796 790
797 mm3-dai-link { 791 mm3-dai-link {
798 link-name = "MultiMedia3"; 792 link-name = "MultiMedia3";
799 cpu { 793 cpu {
800 sound-dai = <&q6asmdai 794 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 795 };
802 }; 796 };
803 797
804 mm4-dai-link { 798 mm4-dai-link {
805 link-name = "MultiMedia4"; 799 link-name = "MultiMedia4";
806 cpu { 800 cpu {
807 sound-dai = <&q6asmdai 801 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 802 };
809 }; 803 };
810 804
811 hdmi-dai-link { 805 hdmi-dai-link {
812 link-name = "HDMI Playback"; 806 link-name = "HDMI Playback";
813 cpu { 807 cpu {
814 sound-dai = <&q6afedai 808 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 809 };
816 810
817 platform { 811 platform {
818 sound-dai = <&q6routin 812 sound-dai = <&q6routing>;
819 }; 813 };
820 814
821 codec { 815 codec {
822 sound-dai = <<9611_c 816 sound-dai = <<9611_codec 0>;
823 }; 817 };
824 }; 818 };
825 819
826 slim-dai-link { 820 slim-dai-link {
827 link-name = "SLIM Playback"; 821 link-name = "SLIM Playback";
828 cpu { 822 cpu {
829 sound-dai = <&q6afedai 823 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 824 };
831 825
832 platform { 826 platform {
833 sound-dai = <&q6routin 827 sound-dai = <&q6routing>;
834 }; 828 };
835 829
836 codec { 830 codec {
837 sound-dai = <&left_spk 831 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 832 };
839 }; 833 };
840 834
841 slimcap-dai-link { 835 slimcap-dai-link {
842 link-name = "SLIM Capture"; 836 link-name = "SLIM Capture";
843 cpu { 837 cpu {
844 sound-dai = <&q6afedai 838 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 839 };
846 840
847 platform { 841 platform {
848 sound-dai = <&q6routin 842 sound-dai = <&q6routing>;
849 }; 843 };
850 844
851 codec { 845 codec {
852 sound-dai = <&wcd9340 846 sound-dai = <&wcd9340 1>;
853 }; 847 };
854 }; 848 };
855 }; 849 };
856 850
857 &spi0 { 851 &spi0 {
858 status = "okay"; 852 status = "okay";
859 pinctrl-names = "default"; 853 pinctrl-names = "default";
860 pinctrl-0 = <&qup_spi0_default>; 854 pinctrl-0 = <&qup_spi0_default>;
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; 855 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
862 856
863 can@0 { 857 can@0 {
864 compatible = "microchip,mcp251 858 compatible = "microchip,mcp2517fd";
865 reg = <0>; 859 reg = <0>;
866 clocks = <&clk40M>; 860 clocks = <&clk40M>;
867 interrupts-extended = <&tlmm 1 861 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
868 spi-max-frequency = <10000000> 862 spi-max-frequency = <10000000>;
869 vdd-supply = <&vdc_5v>; 863 vdd-supply = <&vdc_5v>;
870 xceiver-supply = <&vdc_5v>; 864 xceiver-supply = <&vdc_5v>;
871 }; 865 };
872 }; 866 };
873 867
874 &spi2 { 868 &spi2 {
875 /* On Low speed expansion */ 869 /* On Low speed expansion */
876 status = "okay"; 870 status = "okay";
877 }; 871 };
878 872
879 &tlmm { 873 &tlmm {
880 cam0_default: cam0-default-state { 874 cam0_default: cam0-default-state {
881 rst-pins { 875 rst-pins {
882 pins = "gpio9"; 876 pins = "gpio9";
883 function = "gpio"; 877 function = "gpio";
884 878
885 drive-strength = <16>; 879 drive-strength = <16>;
886 bias-disable; 880 bias-disable;
887 }; 881 };
888 882
889 mclk0-pins { 883 mclk0-pins {
890 pins = "gpio13"; 884 pins = "gpio13";
891 function = "cam_mclk"; 885 function = "cam_mclk";
892 886
893 drive-strength = <16>; 887 drive-strength = <16>;
894 bias-disable; 888 bias-disable;
895 }; 889 };
896 }; 890 };
897 891
898 cam3_default: cam3-default-state { 892 cam3_default: cam3-default-state {
899 rst-pins { 893 rst-pins {
900 function = "gpio"; 894 function = "gpio";
901 pins = "gpio21"; 895 pins = "gpio21";
902 896
903 drive-strength = <16>; 897 drive-strength = <16>;
904 bias-disable; 898 bias-disable;
905 }; 899 };
906 900
907 mclk3-pins { 901 mclk3-pins {
908 function = "cam_mclk"; 902 function = "cam_mclk";
909 pins = "gpio16"; 903 pins = "gpio16";
910 904
911 drive-strength = <16>; 905 drive-strength = <16>;
912 bias-disable; 906 bias-disable;
913 }; 907 };
914 }; 908 };
915 909
916 dsi_sw_sel: dsi-sw-sel-state { 910 dsi_sw_sel: dsi-sw-sel-state {
917 pins = "gpio120"; 911 pins = "gpio120";
918 function = "gpio"; 912 function = "gpio";
919 913
920 drive-strength = <2>; 914 drive-strength = <2>;
921 bias-disable; 915 bias-disable;
922 output-high; 916 output-high;
923 }; 917 };
924 918
925 lt9611_irq_pin: lt9611-irq-state { 919 lt9611_irq_pin: lt9611-irq-state {
926 pins = "gpio84"; 920 pins = "gpio84";
927 function = "gpio"; 921 function = "gpio";
928 bias-disable; 922 bias-disable;
929 }; 923 };
930 924
931 pcie0_default_state: pcie0-default-sta 925 pcie0_default_state: pcie0-default-state {
932 clkreq-pins { 926 clkreq-pins {
933 pins = "gpio36"; 927 pins = "gpio36";
934 function = "pci_e0"; 928 function = "pci_e0";
935 bias-pull-up; 929 bias-pull-up;
936 }; 930 };
937 931
938 reset-n-pins { 932 reset-n-pins {
939 pins = "gpio35"; 933 pins = "gpio35";
940 function = "gpio"; 934 function = "gpio";
941 935
942 drive-strength = <2>; 936 drive-strength = <2>;
943 output-low; 937 output-low;
944 bias-pull-down; 938 bias-pull-down;
945 }; 939 };
946 940
947 wake-n-pins { 941 wake-n-pins {
948 pins = "gpio37"; 942 pins = "gpio37";
949 function = "gpio"; 943 function = "gpio";
950 944
951 drive-strength = <2>; 945 drive-strength = <2>;
952 bias-pull-up; 946 bias-pull-up;
953 }; 947 };
954 }; 948 };
955 949
956 pcie0_pwren_state: pcie0-pwren-state { 950 pcie0_pwren_state: pcie0-pwren-state {
957 pins = "gpio90"; 951 pins = "gpio90";
958 function = "gpio"; 952 function = "gpio";
959 953
960 drive-strength = <2>; 954 drive-strength = <2>;
961 bias-disable; 955 bias-disable;
962 }; 956 };
963 957
964 pcie1_default_state: pcie1-default-sta 958 pcie1_default_state: pcie1-default-state {
965 perst-n-pins { 959 perst-n-pins {
966 pins = "gpio102"; 960 pins = "gpio102";
967 function = "gpio"; 961 function = "gpio";
968 962
969 drive-strength = <16>; 963 drive-strength = <16>;
970 bias-disable; 964 bias-disable;
971 }; 965 };
972 966
973 clkreq-pins { 967 clkreq-pins {
974 pins = "gpio103"; 968 pins = "gpio103";
975 function = "pci_e1"; 969 function = "pci_e1";
976 bias-pull-up; 970 bias-pull-up;
977 }; 971 };
978 972
979 wake-n-pins { 973 wake-n-pins {
980 pins = "gpio11"; 974 pins = "gpio11";
981 function = "gpio"; 975 function = "gpio";
982 976
983 drive-strength = <2>; 977 drive-strength = <2>;
984 bias-pull-up; 978 bias-pull-up;
985 }; 979 };
986 980
987 reset-n-pins { 981 reset-n-pins {
988 pins = "gpio75"; 982 pins = "gpio75";
989 function = "gpio"; 983 function = "gpio";
990 984
991 drive-strength = <16>; 985 drive-strength = <16>;
992 bias-pull-up; 986 bias-pull-up;
993 output-high; 987 output-high;
994 }; 988 };
995 }; 989 };
996 990
997 sdc2_default_state: sdc2-default-state 991 sdc2_default_state: sdc2-default-state {
998 clk-pins { 992 clk-pins {
999 pins = "sdc2_clk"; 993 pins = "sdc2_clk";
1000 bias-disable; 994 bias-disable;
1001 995
1002 /* 996 /*
1003 * It seems that mmc_ 997 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 998 * strength is not 16 on clk, cmd, and data pins.
1005 */ 999 */
1006 drive-strength = <16> 1000 drive-strength = <16>;
1007 }; 1001 };
1008 1002
1009 cmd-pins { 1003 cmd-pins {
1010 pins = "sdc2_cmd"; 1004 pins = "sdc2_cmd";
1011 bias-pull-up; 1005 bias-pull-up;
1012 drive-strength = <10> 1006 drive-strength = <10>;
1013 }; 1007 };
1014 1008
1015 data-pins { 1009 data-pins {
1016 pins = "sdc2_data"; 1010 pins = "sdc2_data";
1017 bias-pull-up; 1011 bias-pull-up;
1018 drive-strength = <10> 1012 drive-strength = <10>;
1019 }; 1013 };
1020 }; 1014 };
1021 1015
1022 sdc2_card_det_n: sd-card-det-n-state 1016 sdc2_card_det_n: sd-card-det-n-state {
1023 pins = "gpio126"; 1017 pins = "gpio126";
1024 function = "gpio"; 1018 function = "gpio";
1025 bias-pull-up; 1019 bias-pull-up;
1026 }; 1020 };
1027 }; 1021 };
1028 1022
1029 &uart3 { 1023 &uart3 {
1030 label = "LS-UART0"; 1024 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; 1025 pinctrl-0 = <&qup_uart3_4pin>;
1032 1026
1033 status = "disabled"; 1027 status = "disabled";
1034 }; 1028 };
1035 1029
1036 &uart6 { 1030 &uart6 {
1037 status = "okay"; 1031 status = "okay";
1038 1032
1039 pinctrl-0 = <&qup_uart6_4pin>; 1033 pinctrl-0 = <&qup_uart6_4pin>;
1040 1034
1041 bluetooth { 1035 bluetooth {
1042 compatible = "qcom,wcn3990-bt 1036 compatible = "qcom,wcn3990-bt";
1043 1037
1044 vddio-supply = <&vreg_s4a_1p8 1038 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 1039 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 1040 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 1041 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 1042 max-speed = <3200000>;
1049 }; 1043 };
1050 }; 1044 };
1051 1045
1052 &uart9 { 1046 &uart9 {
1053 label = "LS-UART1"; 1047 label = "LS-UART1";
1054 status = "okay"; 1048 status = "okay";
1055 }; 1049 };
1056 1050
1057 &usb_1 { 1051 &usb_1 {
1058 status = "okay"; 1052 status = "okay";
1059 }; 1053 };
1060 1054
1061 &usb_1_dwc3 { 1055 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 1056 dr_mode = "peripheral";
1063 }; 1057 };
1064 1058
1065 &usb_1_hsphy { 1059 &usb_1_hsphy {
1066 status = "okay"; 1060 status = "okay";
1067 1061
1068 vdd-supply = <&vreg_l1a_0p875>; 1062 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 1063 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1064 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 1065
1072 qcom,imp-res-offset-value = <8>; 1066 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1067 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 1068 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 1069 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 1070 };
1077 1071
1078 &usb_1_qmpphy { 1072 &usb_1_qmpphy {
1079 status = "okay"; 1073 status = "okay";
1080 1074
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 1075 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 1076 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 1077 };
1084 1078
1085 &usb_2 { 1079 &usb_2 {
1086 status = "okay"; 1080 status = "okay";
1087 }; 1081 };
1088 1082
1089 &usb_2_dwc3 { 1083 &usb_2_dwc3 {
1090 dr_mode = "host"; 1084 dr_mode = "host";
1091 }; 1085 };
1092 1086
1093 &usb_2_hsphy { 1087 &usb_2_hsphy {
1094 status = "okay"; 1088 status = "okay";
1095 1089
1096 vdd-supply = <&vreg_l1a_0p875>; 1090 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 1091 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1092 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 1093
1100 qcom,imp-res-offset-value = <8>; 1094 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1095 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 1096 };
1103 1097
1104 &usb_2_qmpphy { 1098 &usb_2_qmpphy {
1105 status = "okay"; 1099 status = "okay";
1106 1100
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 1101 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 1102 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 1103 };
1110 1104
1111 &ufs_mem_hc { 1105 &ufs_mem_hc {
1112 status = "okay"; 1106 status = "okay";
1113 1107
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 1108 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 1109
1116 vcc-supply = <&vreg_l20a_2p95>; 1110 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 1111 vcc-max-microamp = <800000>;
1118 }; 1112 };
1119 1113
1120 &ufs_mem_phy { 1114 &ufs_mem_phy {
1121 status = "okay"; 1115 status = "okay";
1122 1116
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 1117 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 1118 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 1119 };
1126 1120
1127 &venus { 1121 &venus {
1128 status = "okay"; 1122 status = "okay";
1129 }; 1123 };
1130 1124
1131 &wcd9340 { 1125 &wcd9340 {
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H 1126 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1127 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1128 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1129 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1130 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1131 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1132
1139 swm: soundwire@c85 { 1133 swm: soundwire@c85 {
1140 left_spkr: speaker@0,1 { 1134 left_spkr: speaker@0,1 {
1141 compatible = "sdw1021 1135 compatible = "sdw10217201000";
1142 reg = <0 1>; 1136 reg = <0 1>;
1143 powerdown-gpios = <&w 1137 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1138 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1139 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1140 #sound-dai-cells = <0>;
1147 }; 1141 };
1148 1142
1149 right_spkr: speaker@0,2 { 1143 right_spkr: speaker@0,2 {
1150 compatible = "sdw1021 1144 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w 1145 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1146 reg = <0 2>;
1153 #thermal-sensor-cells 1147 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1148 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1149 #sound-dai-cells = <0>;
1156 }; 1150 };
1157 }; 1151 };
1158 }; 1152 };
1159 1153
1160 &wifi { 1154 &wifi {
1161 status = "okay"; 1155 status = "okay";
1162 1156
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1157 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1158 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1159 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1160 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1161
1168 qcom,snoc-host-cap-8bit-quirk; 1162 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th 1163 qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
1170 }; 1164 };
1171 1165
1172 /* PINCTRL - additions to nodes defined in sd 1166 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1167 &qup_spi2_default {
1174 drive-strength = <16>; 1168 drive-strength = <16>;
1175 }; 1169 };
1176 1170
1177 &qup_i2c10_default { 1171 &qup_i2c10_default {
1178 drive-strength = <2>; 1172 drive-strength = <2>;
1179 bias-disable; 1173 bias-disable;
1180 }; 1174 };
1181 1175
1182 &qup_uart9_rx { 1176 &qup_uart9_rx {
1183 drive-strength = <2>; 1177 drive-strength = <2>;
1184 bias-pull-up; 1178 bias-pull-up;
1185 }; 1179 };
1186 1180
1187 &qup_uart9_tx { 1181 &qup_uart9_tx {
1188 drive-strength = <2>; 1182 drive-strength = <2>;
1189 bias-disable; 1183 bias-disable;
1190 }; 1184 };
1191 1185
1192 /* PINCTRL - additions to nodes defined in sd 1186 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1193 &qup_spi0_default { 1187 &qup_spi0_default {
1194 drive-strength = <6>; 1188 drive-strength = <6>;
1195 bias-disable; 1189 bias-disable;
1196 }; 1190 };
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