1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2019, Linaro Ltd. 3 * Copyright (c) 2019, Linaro Ltd.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi" 13 #include "sdm845.dtsi"
14 #include "sdm845-wcd9340.dtsi" 14 #include "sdm845-wcd9340.dtsi"
15 #include "pm8998.dtsi" 15 #include "pm8998.dtsi"
16 #include "pmi8998.dtsi" 16 #include "pmi8998.dtsi"
17 17
18 / { 18 / {
19 model = "Thundercomm Dragonboard 845c" 19 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qc 20 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>; 21 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>; 22 qcom,board-id = <8 0>;
23 23
24 aliases { 24 aliases {
25 serial0 = &uart9; 25 serial0 = &uart9;
26 serial1 = &uart6; 26 serial1 = &uart6;
27 }; 27 };
28 28
29 chosen { 29 chosen {
30 stdout-path = "serial0:115200n 30 stdout-path = "serial0:115200n8";
31 }; 31 };
32 32
33 /* Fixed crystal oscillator dedicated 33 /* Fixed crystal oscillator dedicated to MCP2517FD */
34 clk40M: can-clock { 34 clk40M: can-clock {
35 compatible = "fixed-clock"; 35 compatible = "fixed-clock";
36 #clock-cells = <0>; 36 #clock-cells = <0>;
37 clock-frequency = <40000000>; 37 clock-frequency = <40000000>;
38 }; 38 };
39 39
40 dc12v: dc12v-regulator { 40 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed" 41 compatible = "regulator-fixed";
42 regulator-name = "DC12V"; 42 regulator-name = "DC12V";
43 regulator-min-microvolt = <120 43 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <120 44 regulator-max-microvolt = <12000000>;
45 regulator-always-on; 45 regulator-always-on;
46 }; 46 };
47 47
48 gpio-keys { 48 gpio-keys {
49 compatible = "gpio-keys"; 49 compatible = "gpio-keys";
50 autorepeat; 50 autorepeat;
51 51
52 pinctrl-names = "default"; 52 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>; 53 pinctrl-0 = <&vol_up_pin_a>;
54 54
55 key-vol-up { 55 key-vol-up {
56 label = "Volume Up"; 56 label = "Volume Up";
57 linux,code = <KEY_VOLU 57 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios 58 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
59 }; 59 };
60 }; 60 };
61 61
62 leds { 62 leds {
63 compatible = "gpio-leds"; 63 compatible = "gpio-leds";
64 64
65 led-0 { 65 led-0 {
66 label = "green:user4"; 66 label = "green:user4";
67 function = LED_FUNCTIO 67 function = LED_FUNCTION_INDICATOR;
68 color = <LED_COLOR_ID_ 68 color = <LED_COLOR_ID_GREEN>;
69 gpios = <&pm8998_gpios 69 gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>;
70 default-state = "off"; 70 default-state = "off";
71 panic-indicator; 71 panic-indicator;
72 }; 72 };
73 73
74 led-1 { 74 led-1 {
75 label = "yellow:wlan"; 75 label = "yellow:wlan";
76 function = LED_FUNCTIO 76 function = LED_FUNCTION_WLAN;
77 color = <LED_COLOR_ID_ 77 color = <LED_COLOR_ID_YELLOW>;
78 gpios = <&pm8998_gpios 78 gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>;
79 linux,default-trigger 79 linux,default-trigger = "phy0tx";
80 default-state = "off"; 80 default-state = "off";
81 }; 81 };
82 82
83 led-2 { 83 led-2 {
84 label = "blue:bt"; 84 label = "blue:bt";
85 function = LED_FUNCTIO 85 function = LED_FUNCTION_BLUETOOTH;
86 color = <LED_COLOR_ID_ 86 color = <LED_COLOR_ID_BLUE>;
87 gpios = <&pm8998_gpios 87 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger 88 linux,default-trigger = "bluetooth-power";
89 default-state = "off"; 89 default-state = "off";
90 }; 90 };
91 }; 91 };
92 92
93 hdmi-out { 93 hdmi-out {
94 compatible = "hdmi-connector"; 94 compatible = "hdmi-connector";
95 type = "a"; 95 type = "a";
96 96
97 port { 97 port {
98 hdmi_con: endpoint { 98 hdmi_con: endpoint {
99 remote-endpoin 99 remote-endpoint = <<9611_out>;
100 }; 100 };
101 }; 101 };
102 }; 102 };
103 103
104 reserved-memory { 104 reserved-memory {
105 /* Cont splash region set up b 105 /* Cont splash region set up by the bootloader */
106 cont_splash_mem: framebuffer@9 106 cont_splash_mem: framebuffer@9d400000 {
107 reg = <0x0 0x9d400000 107 reg = <0x0 0x9d400000 0x0 0x2400000>;
108 no-map; 108 no-map;
109 }; 109 };
110 }; 110 };
111 111
112 lt9611_1v8: lt9611-vdd18-regulator { 112 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed" 113 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8"; 114 regulator-name = "LT9611_1V8";
115 115
116 vin-supply = <&vdc_5v>; 116 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <180 117 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <180 118 regulator-max-microvolt = <1800000>;
119 119
120 gpio = <&tlmm 89 GPIO_ACTIVE_H 120 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high; 121 enable-active-high;
122 }; 122 };
123 123
124 lt9611_3v3: lt9611-3v3 { 124 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed" 125 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3"; 126 regulator-name = "LT9611_3V3";
127 127
128 vin-supply = <&vdc_3v3>; 128 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <330 129 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <330 130 regulator-max-microvolt = <3300000>;
131 131
132 /* 132 /*
133 * TODO: make it possible to d 133 * TODO: make it possible to drive same GPIO from two clients
134 * gpio = <&tlmm 89 GPIO_ACTIV 134 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
135 * enable-active-high; 135 * enable-active-high;
136 */ 136 */
137 }; 137 };
138 138
139 pcie0_1p05v: pcie-0-1p05v-regulator { 139 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed" 140 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V" 141 regulator-name = "PCIE0_1.05V";
142 142
143 vin-supply = <&vbat>; 143 vin-supply = <&vbat>;
144 regulator-min-microvolt = <105 144 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <105 145 regulator-max-microvolt = <1050000>;
146 146
147 /* 147 /*
148 * TODO: make it possible to d 148 * TODO: make it possible to drive same GPIO from two clients
149 * gpio = <&tlmm 90 GPIO_ACTIV 149 * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
150 * enable-active-high; 150 * enable-active-high;
151 */ 151 */
152 }; 152 };
153 153
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator 154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator {
155 compatible = "regulator-fixed" 155 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V 156 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <120 157 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <120 158 regulator-max-microvolt = <1200000>;
159 enable-active-high; 159 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ 160 gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default"; 161 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en 162 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>; 163 vin-supply = <&vbat>;
164 }; 164 };
165 165
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator 166 cam0_avdd_2v8: cam0-avdd-2v8-regulator {
167 compatible = "regulator-fixed" 167 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V 168 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <280 169 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <280 170 regulator-max-microvolt = <2800000>;
171 enable-active-high; 171 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ 172 gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default"; 173 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en 174 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>; 175 vin-supply = <&vbat>;
176 }; 176 };
177 177
178 /* This regulator is enabled when the 178 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator 179 cam3_avdd_2v8: cam3-avdd-2v8-regulator {
180 compatible = "regulator-fixed" 180 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V 181 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <280 182 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <280 183 regulator-max-microvolt = <2800000>;
184 regulator-always-on; 184 regulator-always-on;
185 vin-supply = <&vbat>; 185 vin-supply = <&vbat>;
186 }; 186 };
187 187
188 pcie0_3p3v_dual: vldo-3v3-regulator { 188 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed" 189 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3"; 190 regulator-name = "VLDO_3V3";
191 191
192 vin-supply = <&vbat>; 192 vin-supply = <&vbat>;
193 regulator-min-microvolt = <330 193 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <330 194 regulator-max-microvolt = <3300000>;
195 195
196 gpio = <&tlmm 90 GPIO_ACTIVE_H 196 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high; 197 enable-active-high;
198 /* 198 /*
199 * FIXME: this regulator is re 199 * FIXME: this regulator is responsible for VBUS on the left USB
200 * port. Keep it always on unt 200 * port. Keep it always on until we can correctly model this
201 * relationship. 201 * relationship.
202 */ 202 */
203 regulator-always-on; 203 regulator-always-on;
204 204
205 pinctrl-names = "default"; 205 pinctrl-names = "default";
206 pinctrl-0 = <&pcie0_pwren_stat 206 pinctrl-0 = <&pcie0_pwren_state>;
207 }; 207 };
208 208
209 v5p0_hdmiout: v5p0-hdmiout-regulator { 209 v5p0_hdmiout: v5p0-hdmiout-regulator {
210 compatible = "regulator-fixed" 210 compatible = "regulator-fixed";
211 regulator-name = "V5P0_HDMIOUT 211 regulator-name = "V5P0_HDMIOUT";
212 212
213 vin-supply = <&vdc_5v>; 213 vin-supply = <&vdc_5v>;
214 regulator-min-microvolt = <500 214 regulator-min-microvolt = <500000>;
215 regulator-max-microvolt = <500 215 regulator-max-microvolt = <500000>;
216 216
217 /* 217 /*
218 * TODO: make it possible to d 218 * TODO: make it possible to drive same GPIO from two clients
219 * gpio = <&tlmm 89 GPIO_ACTIV 219 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
220 * enable-active-high; 220 * enable-active-high;
221 */ 221 */
222 }; 222 };
223 223
224 vbat: vbat-regulator { 224 vbat: vbat-regulator {
225 compatible = "regulator-fixed" 225 compatible = "regulator-fixed";
226 regulator-name = "VBAT"; 226 regulator-name = "VBAT";
227 227
228 vin-supply = <&dc12v>; 228 vin-supply = <&dc12v>;
229 regulator-min-microvolt = <420 229 regulator-min-microvolt = <4200000>;
230 regulator-max-microvolt = <420 230 regulator-max-microvolt = <4200000>;
231 regulator-always-on; 231 regulator-always-on;
232 }; 232 };
233 233
234 vbat_som: vbat-som-regulator { 234 vbat_som: vbat-som-regulator {
235 compatible = "regulator-fixed" 235 compatible = "regulator-fixed";
236 regulator-name = "VBAT_SOM"; 236 regulator-name = "VBAT_SOM";
237 237
238 vin-supply = <&dc12v>; 238 vin-supply = <&dc12v>;
239 regulator-min-microvolt = <420 239 regulator-min-microvolt = <4200000>;
240 regulator-max-microvolt = <420 240 regulator-max-microvolt = <4200000>;
241 regulator-always-on; 241 regulator-always-on;
242 }; 242 };
243 243
244 vdc_3v3: vdc-3v3-regulator { 244 vdc_3v3: vdc-3v3-regulator {
245 compatible = "regulator-fixed" 245 compatible = "regulator-fixed";
246 regulator-name = "VDC_3V3"; 246 regulator-name = "VDC_3V3";
247 vin-supply = <&dc12v>; 247 vin-supply = <&dc12v>;
248 regulator-min-microvolt = <330 248 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <330 249 regulator-max-microvolt = <3300000>;
250 regulator-always-on; 250 regulator-always-on;
251 }; 251 };
252 252
253 vdc_5v: vdc-5v-regulator { 253 vdc_5v: vdc-5v-regulator {
254 compatible = "regulator-fixed" 254 compatible = "regulator-fixed";
255 regulator-name = "VDC_5V"; 255 regulator-name = "VDC_5V";
256 256
257 vin-supply = <&dc12v>; 257 vin-supply = <&dc12v>;
258 regulator-min-microvolt = <500 258 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <500 259 regulator-max-microvolt = <500000>;
260 regulator-always-on; 260 regulator-always-on;
261 }; 261 };
262 262
263 vreg_s4a_1p8: vreg-s4a-1p8 { 263 vreg_s4a_1p8: vreg-s4a-1p8 {
264 compatible = "regulator-fixed" 264 compatible = "regulator-fixed";
265 regulator-name = "vreg_s4a_1p8 265 regulator-name = "vreg_s4a_1p8";
266 266
267 regulator-min-microvolt = <180 267 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <180 268 regulator-max-microvolt = <1800000>;
269 regulator-always-on; 269 regulator-always-on;
270 }; 270 };
271 271
272 vph_pwr: vph-pwr-regulator { 272 vph_pwr: vph-pwr-regulator {
273 compatible = "regulator-fixed" 273 compatible = "regulator-fixed";
274 regulator-name = "vph_pwr"; 274 regulator-name = "vph_pwr";
275 275
276 vin-supply = <&vbat_som>; 276 vin-supply = <&vbat_som>;
277 }; 277 };
278 }; 278 };
279 279
280 &adsp_pas { 280 &adsp_pas {
281 status = "okay"; 281 status = "okay";
282 282
283 firmware-name = "qcom/sdm845/adsp.mbn" 283 firmware-name = "qcom/sdm845/adsp.mbn";
284 }; 284 };
285 285
286 &apps_rsc { 286 &apps_rsc {
287 regulators-0 { 287 regulators-0 {
288 compatible = "qcom,pm8998-rpmh 288 compatible = "qcom,pm8998-rpmh-regulators";
289 qcom,pmic-id = "a"; 289 qcom,pmic-id = "a";
290 vdd-s1-supply = <&vph_pwr>; 290 vdd-s1-supply = <&vph_pwr>;
291 vdd-s2-supply = <&vph_pwr>; 291 vdd-s2-supply = <&vph_pwr>;
292 vdd-s3-supply = <&vph_pwr>; 292 vdd-s3-supply = <&vph_pwr>;
293 vdd-s4-supply = <&vph_pwr>; 293 vdd-s4-supply = <&vph_pwr>;
294 vdd-s5-supply = <&vph_pwr>; 294 vdd-s5-supply = <&vph_pwr>;
295 vdd-s6-supply = <&vph_pwr>; 295 vdd-s6-supply = <&vph_pwr>;
296 vdd-s7-supply = <&vph_pwr>; 296 vdd-s7-supply = <&vph_pwr>;
297 vdd-s8-supply = <&vph_pwr>; 297 vdd-s8-supply = <&vph_pwr>;
298 vdd-s9-supply = <&vph_pwr>; 298 vdd-s9-supply = <&vph_pwr>;
299 vdd-s10-supply = <&vph_pwr>; 299 vdd-s10-supply = <&vph_pwr>;
300 vdd-s11-supply = <&vph_pwr>; 300 vdd-s11-supply = <&vph_pwr>;
301 vdd-s12-supply = <&vph_pwr>; 301 vdd-s12-supply = <&vph_pwr>;
302 vdd-s13-supply = <&vph_pwr>; 302 vdd-s13-supply = <&vph_pwr>;
303 vdd-l1-l27-supply = <&vreg_s7a 303 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
304 vdd-l2-l8-l17-supply = <&vreg_ 304 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
305 vdd-l3-l11-supply = <&vreg_s7a 305 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
306 vdd-l4-l5-supply = <&vreg_s7a_ 306 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
307 vdd-l6-supply = <&vph_pwr>; 307 vdd-l6-supply = <&vph_pwr>;
308 vdd-l7-l12-l14-l15-supply = <& 308 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
309 vdd-l9-supply = <&vreg_bob>; 309 vdd-l9-supply = <&vreg_bob>;
310 vdd-l10-l23-l25-supply = <&vre 310 vdd-l10-l23-l25-supply = <&vreg_bob>;
311 vdd-l13-l19-l21-supply = <&vre 311 vdd-l13-l19-l21-supply = <&vreg_bob>;
312 vdd-l16-l28-supply = <&vreg_bo 312 vdd-l16-l28-supply = <&vreg_bob>;
313 vdd-l18-l22-supply = <&vreg_bo 313 vdd-l18-l22-supply = <&vreg_bob>;
314 vdd-l20-l24-supply = <&vreg_bo 314 vdd-l20-l24-supply = <&vreg_bob>;
315 vdd-l26-supply = <&vreg_s3a_1p 315 vdd-l26-supply = <&vreg_s3a_1p35>;
316 vin-lvs-1-2-supply = <&vreg_s4 316 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
317 317
318 vreg_s3a_1p35: smps3 { 318 vreg_s3a_1p35: smps3 {
319 regulator-min-microvol 319 regulator-min-microvolt = <1352000>;
320 regulator-max-microvol 320 regulator-max-microvolt = <1352000>;
321 }; 321 };
322 322
323 vreg_s5a_2p04: smps5 { 323 vreg_s5a_2p04: smps5 {
324 regulator-min-microvol 324 regulator-min-microvolt = <1904000>;
325 regulator-max-microvol 325 regulator-max-microvolt = <2040000>;
326 }; 326 };
327 327
328 vreg_s7a_1p025: smps7 { 328 vreg_s7a_1p025: smps7 {
329 regulator-min-microvol 329 regulator-min-microvolt = <900000>;
330 regulator-max-microvol 330 regulator-max-microvolt = <1028000>;
331 }; 331 };
332 332
333 vreg_l1a_0p875: ldo1 { 333 vreg_l1a_0p875: ldo1 {
334 regulator-min-microvol 334 regulator-min-microvolt = <880000>;
335 regulator-max-microvol 335 regulator-max-microvolt = <880000>;
336 regulator-initial-mode 336 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 }; 337 };
338 338
339 vreg_l5a_0p8: ldo5 { 339 vreg_l5a_0p8: ldo5 {
340 regulator-min-microvol 340 regulator-min-microvolt = <800000>;
341 regulator-max-microvol 341 regulator-max-microvolt = <800000>;
342 regulator-initial-mode 342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 343 };
344 344
345 vreg_l12a_1p8: ldo12 { 345 vreg_l12a_1p8: ldo12 {
346 regulator-min-microvol 346 regulator-min-microvolt = <1800000>;
347 regulator-max-microvol 347 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode 348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 349 };
350 350
351 vreg_l7a_1p8: ldo7 { 351 vreg_l7a_1p8: ldo7 {
352 regulator-min-microvol 352 regulator-min-microvolt = <1800000>;
353 regulator-max-microvol 353 regulator-max-microvolt = <1800000>;
354 regulator-initial-mode 354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 355 };
356 356
357 vreg_l13a_2p95: ldo13 { 357 vreg_l13a_2p95: ldo13 {
358 regulator-min-microvol 358 regulator-min-microvolt = <1800000>;
359 regulator-max-microvol 359 regulator-max-microvolt = <2960000>;
360 regulator-initial-mode 360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 361 };
362 362
363 vreg_l17a_1p3: ldo17 { 363 vreg_l17a_1p3: ldo17 {
364 regulator-min-microvol 364 regulator-min-microvolt = <1304000>;
365 regulator-max-microvol 365 regulator-max-microvolt = <1304000>;
366 regulator-initial-mode 366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 367 };
368 368
369 vreg_l20a_2p95: ldo20 { 369 vreg_l20a_2p95: ldo20 {
370 regulator-min-microvol 370 regulator-min-microvolt = <2960000>;
371 regulator-max-microvol 371 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode 372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 }; 373 };
374 374
375 vreg_l21a_2p95: ldo21 { 375 vreg_l21a_2p95: ldo21 {
376 regulator-min-microvol 376 regulator-min-microvolt = <2960000>;
377 regulator-max-microvol 377 regulator-max-microvolt = <2968000>;
378 regulator-initial-mode 378 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 }; 379 };
380 380
381 vreg_l24a_3p075: ldo24 { 381 vreg_l24a_3p075: ldo24 {
382 regulator-min-microvol 382 regulator-min-microvolt = <3088000>;
383 regulator-max-microvol 383 regulator-max-microvolt = <3088000>;
384 regulator-initial-mode 384 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 }; 385 };
386 386
387 vreg_l25a_3p3: ldo25 { 387 vreg_l25a_3p3: ldo25 {
388 regulator-min-microvol 388 regulator-min-microvolt = <3300000>;
389 regulator-max-microvol 389 regulator-max-microvolt = <3312000>;
390 regulator-initial-mode 390 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 }; 391 };
392 392
393 vreg_l26a_1p2: ldo26 { 393 vreg_l26a_1p2: ldo26 {
394 regulator-min-microvol 394 regulator-min-microvolt = <1200000>;
395 regulator-max-microvol 395 regulator-max-microvolt = <1200000>;
396 regulator-initial-mode 396 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
397 }; 397 };
398 398
399 vreg_lvs1a_1p8: lvs1 { 399 vreg_lvs1a_1p8: lvs1 {
400 regulator-min-microvol 400 regulator-min-microvolt = <1800000>;
401 regulator-max-microvol 401 regulator-max-microvolt = <1800000>;
402 regulator-always-on; 402 regulator-always-on;
403 }; 403 };
404 404
405 vreg_lvs2a_1p8: lvs2 { 405 vreg_lvs2a_1p8: lvs2 {
406 regulator-min-microvol 406 regulator-min-microvolt = <1800000>;
407 regulator-max-microvol 407 regulator-max-microvolt = <1800000>;
408 regulator-always-on; 408 regulator-always-on;
409 }; 409 };
410 }; 410 };
411 411
412 regulators-1 { 412 regulators-1 {
413 compatible = "qcom,pmi8998-rpm 413 compatible = "qcom,pmi8998-rpmh-regulators";
414 qcom,pmic-id = "b"; 414 qcom,pmic-id = "b";
415 415
416 vdd-bob-supply = <&vph_pwr>; 416 vdd-bob-supply = <&vph_pwr>;
417 417
418 vreg_bob: bob { 418 vreg_bob: bob {
419 regulator-min-microvol 419 regulator-min-microvolt = <3312000>;
420 regulator-max-microvol 420 regulator-max-microvolt = <3600000>;
421 regulator-initial-mode 421 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
422 regulator-allow-bypass 422 regulator-allow-bypass;
423 }; 423 };
424 }; 424 };
425 }; 425 };
426 426
427 &camss { 427 &camss {
428 status = "okay"; 428 status = "okay";
429 429
430 vdda-phy-supply = <&vreg_l1a_0p875>; 430 vdda-phy-supply = <&vreg_l1a_0p875>;
431 vdda-pll-supply = <&vreg_l26a_1p2>; 431 vdda-pll-supply = <&vreg_l26a_1p2>;
432 }; 432 };
433 433
434 &cdsp_pas { 434 &cdsp_pas {
435 status = "okay"; 435 status = "okay";
436 firmware-name = "qcom/sdm845/cdsp.mbn" 436 firmware-name = "qcom/sdm845/cdsp.mbn";
437 }; 437 };
438 438
439 &gcc { 439 &gcc {
440 protected-clocks = <GCC_QSPI_CORE_CLK> 440 protected-clocks = <GCC_QSPI_CORE_CLK>,
441 <GCC_QSPI_CORE_CLK_ 441 <GCC_QSPI_CORE_CLK_SRC>,
442 <GCC_QSPI_CNOC_PERI 442 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
443 <GCC_LPASS_Q6_AXI_C 443 <GCC_LPASS_Q6_AXI_CLK>,
444 <GCC_LPASS_SWAY_CLK 444 <GCC_LPASS_SWAY_CLK>;
445 }; 445 };
446 446
447 &gmu { 447 &gmu {
448 status = "okay"; 448 status = "okay";
449 }; 449 };
450 450
451 &gpi_dma0 { 451 &gpi_dma0 {
452 status = "okay"; 452 status = "okay";
453 }; 453 };
454 454
455 &gpi_dma1 { 455 &gpi_dma1 {
456 status = "okay"; 456 status = "okay";
457 }; 457 };
458 458
459 &gpu { 459 &gpu {
460 status = "okay"; 460 status = "okay";
461 zap-shader { 461 zap-shader {
462 memory-region = <&gpu_mem>; 462 memory-region = <&gpu_mem>;
463 firmware-name = "qcom/sdm845/a 463 firmware-name = "qcom/sdm845/a630_zap.mbn";
464 }; 464 };
465 }; 465 };
466 466
467 &i2c10 { 467 &i2c10 {
468 status = "okay"; 468 status = "okay";
469 clock-frequency = <400000>; 469 clock-frequency = <400000>;
470 470
471 lt9611_codec: hdmi-bridge@3b { 471 lt9611_codec: hdmi-bridge@3b {
472 compatible = "lontium,lt9611"; 472 compatible = "lontium,lt9611";
473 reg = <0x3b>; 473 reg = <0x3b>;
474 #sound-dai-cells = <1>; 474 #sound-dai-cells = <1>;
475 475
476 interrupts-extended = <&tlmm 8 476 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
477 477
478 reset-gpios = <&tlmm 128 GPIO_ 478 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
479 479
480 vdd-supply = <<9611_1v8>; 480 vdd-supply = <<9611_1v8>;
481 vcc-supply = <<9611_3v3>; 481 vcc-supply = <<9611_3v3>;
482 482
483 pinctrl-names = "default"; 483 pinctrl-names = "default";
484 pinctrl-0 = <<9611_irq_pin>, 484 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
485 485
486 ports { 486 ports {
487 #address-cells = <1>; 487 #address-cells = <1>;
488 #size-cells = <0>; 488 #size-cells = <0>;
489 489
490 port@0 { 490 port@0 {
491 reg = <0>; 491 reg = <0>;
492 492
493 lt9611_a: endp 493 lt9611_a: endpoint {
494 remote 494 remote-endpoint = <&mdss_dsi0_out>;
495 }; 495 };
496 }; 496 };
497 497
498 port@1 { 498 port@1 {
499 reg = <1>; 499 reg = <1>;
500 500
501 lt9611_b: endp 501 lt9611_b: endpoint {
502 remote 502 remote-endpoint = <&mdss_dsi1_out>;
503 }; 503 };
504 }; 504 };
505 505
506 port@2 { 506 port@2 {
507 reg = <2>; 507 reg = <2>;
508 508
509 lt9611_out: en 509 lt9611_out: endpoint {
510 remote 510 remote-endpoint = <&hdmi_con>;
511 }; 511 };
512 }; 512 };
513 }; 513 };
514 }; 514 };
515 }; 515 };
516 516
517 &i2c11 { 517 &i2c11 {
518 /* On Low speed expansion */ 518 /* On Low speed expansion */
519 clock-frequency = <100000>; 519 clock-frequency = <100000>;
520 status = "okay"; 520 status = "okay";
521 }; 521 };
522 522
523 &i2c14 { 523 &i2c14 {
524 /* On Low speed expansion */ 524 /* On Low speed expansion */
525 clock-frequency = <100000>; 525 clock-frequency = <100000>;
526 status = "okay"; 526 status = "okay";
527 }; 527 };
528 528
529 &mdss { 529 &mdss {
530 memory-region = <&cont_splash_mem>; 530 memory-region = <&cont_splash_mem>;
531 status = "okay"; 531 status = "okay";
532 }; 532 };
533 533
534 &mdss_dsi0 { 534 &mdss_dsi0 {
535 status = "okay"; 535 status = "okay";
536 vdda-supply = <&vreg_l26a_1p2>; 536 vdda-supply = <&vreg_l26a_1p2>;
537 537
538 qcom,dual-dsi-mode; 538 qcom,dual-dsi-mode;
539 qcom,master-dsi; 539 qcom,master-dsi;
540 540
541 ports { 541 ports {
542 port@1 { 542 port@1 {
543 endpoint { 543 endpoint {
544 remote-endpoin 544 remote-endpoint = <<9611_a>;
545 data-lanes = < 545 data-lanes = <0 1 2 3>;
546 }; 546 };
547 }; 547 };
548 }; 548 };
549 }; 549 };
550 550
551 &mdss_dsi0_phy { 551 &mdss_dsi0_phy {
552 status = "okay"; 552 status = "okay";
553 vdds-supply = <&vreg_l1a_0p875>; 553 vdds-supply = <&vreg_l1a_0p875>;
554 }; 554 };
555 555
556 &mdss_dsi1 { 556 &mdss_dsi1 {
557 vdda-supply = <&vreg_l26a_1p2>; 557 vdda-supply = <&vreg_l26a_1p2>;
558 558
559 qcom,dual-dsi-mode; 559 qcom,dual-dsi-mode;
560 560
561 /* DSI1 is slave, so use DSI0 clocks * 561 /* DSI1 is slave, so use DSI0 clocks */
562 assigned-clock-parents = <&mdss_dsi0_p 562 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
563 563
564 status = "okay"; 564 status = "okay";
565 565
566 ports { 566 ports {
567 port@1 { 567 port@1 {
568 endpoint { 568 endpoint {
569 remote-endpoin 569 remote-endpoint = <<9611_b>;
570 data-lanes = < 570 data-lanes = <0 1 2 3>;
571 }; 571 };
572 }; 572 };
573 }; 573 };
574 }; 574 };
575 575
576 &mdss_dsi1_phy { 576 &mdss_dsi1_phy {
577 vdds-supply = <&vreg_l1a_0p875>; 577 vdds-supply = <&vreg_l1a_0p875>;
578 status = "okay"; 578 status = "okay";
579 }; 579 };
580 580
581 &mss_pil { 581 &mss_pil {
582 status = "okay"; 582 status = "okay";
583 firmware-name = "qcom/sdm845/mba.mbn", 583 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
584 }; 584 };
585 585
586 &pcie0 { 586 &pcie0 {
587 status = "okay"; 587 status = "okay";
588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO 588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HI 589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>;
590 590
591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 591 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
592 592
593 pinctrl-names = "default"; 593 pinctrl-names = "default";
594 pinctrl-0 = <&pcie0_default_state>; 594 pinctrl-0 = <&pcie0_default_state>;
595 }; 595 };
596 596
597 &pcie0_phy { 597 &pcie0_phy {
598 status = "okay"; 598 status = "okay";
599 599
600 vdda-phy-supply = <&vreg_l1a_0p875>; 600 vdda-phy-supply = <&vreg_l1a_0p875>;
601 vdda-pll-supply = <&vreg_l26a_1p2>; 601 vdda-pll-supply = <&vreg_l26a_1p2>;
602 }; 602 };
603 603
604 &pcie1 { 604 &pcie1 {
605 status = "okay"; 605 status = "okay";
606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L 606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
607 607
608 pinctrl-names = "default"; 608 pinctrl-names = "default";
609 pinctrl-0 = <&pcie1_default_state>; 609 pinctrl-0 = <&pcie1_default_state>;
610 }; 610 };
611 611
612 &pcie1_phy { 612 &pcie1_phy {
613 status = "okay"; 613 status = "okay";
614 614
615 vdda-phy-supply = <&vreg_l1a_0p875>; 615 vdda-phy-supply = <&vreg_l1a_0p875>;
616 vdda-pll-supply = <&vreg_l26a_1p2>; 616 vdda-pll-supply = <&vreg_l26a_1p2>;
617 }; 617 };
618 618
619 &pm8998_gpios { 619 &pm8998_gpios {
620 gpio-line-names = 620 gpio-line-names =
621 "NC", 621 "NC",
622 "NC", 622 "NC",
623 "WLAN_SW_CTRL", 623 "WLAN_SW_CTRL",
624 "NC", 624 "NC",
625 "PM_GPIO5_BLUE_BT_LED", 625 "PM_GPIO5_BLUE_BT_LED",
626 "VOL_UP_N", 626 "VOL_UP_N",
627 "NC", 627 "NC",
628 "ADC_IN1", 628 "ADC_IN1",
629 "PM_GPIO9_YEL_WIFI_LED", 629 "PM_GPIO9_YEL_WIFI_LED",
630 "CAM0_AVDD_EN", 630 "CAM0_AVDD_EN",
631 "NC", 631 "NC",
632 "CAM0_DVDD_EN", 632 "CAM0_DVDD_EN",
633 "PM_GPIO13_GREEN_U4_LED", 633 "PM_GPIO13_GREEN_U4_LED",
634 "DIV_CLK2", 634 "DIV_CLK2",
635 "NC", 635 "NC",
636 "NC", 636 "NC",
637 "NC", 637 "NC",
638 "SMB_STAT", 638 "SMB_STAT",
639 "NC", 639 "NC",
640 "NC", 640 "NC",
641 "ADC_IN2", 641 "ADC_IN2",
642 "OPTION1", 642 "OPTION1",
643 "WCSS_PWR_REQ", 643 "WCSS_PWR_REQ",
644 "PM845_GPIO24", 644 "PM845_GPIO24",
645 "OPTION2", 645 "OPTION2",
646 "PM845_SLB"; 646 "PM845_SLB";
647 647
648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v 648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
649 pins = "gpio12"; 649 pins = "gpio12";
650 function = "normal"; 650 function = "normal";
651 651
652 bias-pull-up; 652 bias-pull-up;
653 drive-push-pull; 653 drive-push-pull;
654 qcom,drive-strength = <PMIC_GP 654 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
655 }; 655 };
656 656
657 cam0_avdd_2v8_en_default: cam0-avdd-2v 657 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
658 pins = "gpio10"; 658 pins = "gpio10";
659 function = "normal"; 659 function = "normal";
660 660
661 bias-pull-up; 661 bias-pull-up;
662 drive-push-pull; 662 drive-push-pull;
663 qcom,drive-strength = <PMIC_GP 663 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
664 }; 664 };
665 665
666 vol_up_pin_a: vol-up-active-state { 666 vol_up_pin_a: vol-up-active-state {
667 pins = "gpio6"; 667 pins = "gpio6";
668 function = "normal"; 668 function = "normal";
669 input-enable; 669 input-enable;
670 bias-pull-up; 670 bias-pull-up;
671 qcom,drive-strength = <PMIC_GP 671 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
672 }; 672 };
673 }; 673 };
674 674
675 &pm8998_resin { 675 &pm8998_resin {
676 linux,code = <KEY_VOLUMEDOWN>; 676 linux,code = <KEY_VOLUMEDOWN>;
677 status = "okay"; 677 status = "okay";
678 }; 678 };
679 679
680 &pmi8998_lpg { 680 &pmi8998_lpg {
681 status = "okay"; 681 status = "okay";
682 682
683 qcom,power-source = <1>; 683 qcom,power-source = <1>;
684 684
685 led@3 { 685 led@3 {
686 reg = <3>; 686 reg = <3>;
687 color = <LED_COLOR_ID_GREEN>; 687 color = <LED_COLOR_ID_GREEN>;
688 function = LED_FUNCTION_HEARTB 688 function = LED_FUNCTION_HEARTBEAT;
689 function-enumerator = <3>; 689 function-enumerator = <3>;
690 690
691 linux,default-trigger = "heart 691 linux,default-trigger = "heartbeat";
692 default-state = "on"; 692 default-state = "on";
693 }; 693 };
694 694
695 led@4 { 695 led@4 {
696 reg = <4>; 696 reg = <4>;
697 color = <LED_COLOR_ID_GREEN>; 697 color = <LED_COLOR_ID_GREEN>;
698 function = LED_FUNCTION_INDICA 698 function = LED_FUNCTION_INDICATOR;
699 function-enumerator = <2>; 699 function-enumerator = <2>;
700 }; 700 };
701 701
702 led@5 { 702 led@5 {
703 reg = <5>; 703 reg = <5>;
704 color = <LED_COLOR_ID_GREEN>; 704 color = <LED_COLOR_ID_GREEN>;
705 function = LED_FUNCTION_INDICA 705 function = LED_FUNCTION_INDICATOR;
706 function-enumerator = <1>; 706 function-enumerator = <1>;
707 }; 707 };
708 }; 708 };
709 709
710 /* QUAT I2S Uses 4 I2S SD Lines for audio on L 710 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
711 &q6afedai { 711 &q6afedai {
712 dai@22 { 712 dai@22 {
713 reg = <QUATERNARY_MI2S_RX>; 713 reg = <QUATERNARY_MI2S_RX>;
714 qcom,sd-lines = <0 1 2 3>; 714 qcom,sd-lines = <0 1 2 3>;
715 }; 715 };
716 }; 716 };
717 717
718 &q6asmdai { 718 &q6asmdai {
719 dai@0 { 719 dai@0 {
720 reg = <0>; 720 reg = <0>;
721 }; 721 };
722 722
723 dai@1 { 723 dai@1 {
724 reg = <1>; 724 reg = <1>;
725 }; 725 };
726 726
727 dai@2 { 727 dai@2 {
728 reg = <2>; 728 reg = <2>;
729 }; 729 };
730 730
731 dai@3 { 731 dai@3 {
732 reg = <3>; 732 reg = <3>;
733 direction = <2>; 733 direction = <2>;
734 is-compress-dai; 734 is-compress-dai;
735 }; 735 };
736 }; 736 };
737 737
738 &qupv3_id_0 { 738 &qupv3_id_0 {
739 status = "okay"; 739 status = "okay";
740 }; 740 };
741 741
742 &qupv3_id_1 { 742 &qupv3_id_1 {
743 status = "okay"; 743 status = "okay";
744 }; 744 };
745 745
746 &sdhc_2 { 746 &sdhc_2 {
747 status = "okay"; 747 status = "okay";
748 748
749 pinctrl-names = "default"; 749 pinctrl-names = "default";
750 pinctrl-0 = <&sdc2_default_state &sdc2 750 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
751 751
752 vmmc-supply = <&vreg_l21a_2p95>; 752 vmmc-supply = <&vreg_l21a_2p95>;
753 vqmmc-supply = <&vreg_l13a_2p95>; 753 vqmmc-supply = <&vreg_l13a_2p95>;
754 754
755 bus-width = <4>; 755 bus-width = <4>;
756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
757 }; 757 };
758 758
759 &sound { 759 &sound {
760 compatible = "qcom,db845c-sndcard", "q 760 compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard";
761 pinctrl-0 = <&quat_mi2s_active 761 pinctrl-0 = <&quat_mi2s_active
762 &quat_mi2s_sd0_active 762 &quat_mi2s_sd0_active
763 &quat_mi2s_sd1_active 763 &quat_mi2s_sd1_active
764 &quat_mi2s_sd2_active 764 &quat_mi2s_sd2_active
765 &quat_mi2s_sd3_active 765 &quat_mi2s_sd3_active>;
766 pinctrl-names = "default"; 766 pinctrl-names = "default";
767 model = "DB845c"; 767 model = "DB845c";
768 audio-routing = 768 audio-routing =
769 "RX_BIAS", "MCLK", 769 "RX_BIAS", "MCLK",
770 "AMIC1", "MIC BIAS1", 770 "AMIC1", "MIC BIAS1",
771 "AMIC2", "MIC BIAS2", 771 "AMIC2", "MIC BIAS2",
772 "DMIC0", "MIC BIAS1", 772 "DMIC0", "MIC BIAS1",
773 "DMIC1", "MIC BIAS1", 773 "DMIC1", "MIC BIAS1",
774 "DMIC2", "MIC BIAS3", 774 "DMIC2", "MIC BIAS3",
775 "DMIC3", "MIC BIAS3", 775 "DMIC3", "MIC BIAS3",
776 "SpkrLeft IN", "SPK1 OUT", 776 "SpkrLeft IN", "SPK1 OUT",
777 "SpkrRight IN", "SPK2 OUT", 777 "SpkrRight IN", "SPK2 OUT",
778 "MM_DL1", "MultiMedia1 Playba 778 "MM_DL1", "MultiMedia1 Playback",
779 "MM_DL2", "MultiMedia2 Playba 779 "MM_DL2", "MultiMedia2 Playback",
780 "MM_DL4", "MultiMedia4 Playba 780 "MM_DL4", "MultiMedia4 Playback",
781 "MultiMedia3 Capture", "MM_UL3 781 "MultiMedia3 Capture", "MM_UL3";
782 782
783 mm1-dai-link { 783 mm1-dai-link {
784 link-name = "MultiMedia1"; 784 link-name = "MultiMedia1";
785 cpu { 785 cpu {
786 sound-dai = <&q6asmdai 786 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
787 }; 787 };
788 }; 788 };
789 789
790 mm2-dai-link { 790 mm2-dai-link {
791 link-name = "MultiMedia2"; 791 link-name = "MultiMedia2";
792 cpu { 792 cpu {
793 sound-dai = <&q6asmdai 793 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
794 }; 794 };
795 }; 795 };
796 796
797 mm3-dai-link { 797 mm3-dai-link {
798 link-name = "MultiMedia3"; 798 link-name = "MultiMedia3";
799 cpu { 799 cpu {
800 sound-dai = <&q6asmdai 800 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
801 }; 801 };
802 }; 802 };
803 803
804 mm4-dai-link { 804 mm4-dai-link {
805 link-name = "MultiMedia4"; 805 link-name = "MultiMedia4";
806 cpu { 806 cpu {
807 sound-dai = <&q6asmdai 807 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
808 }; 808 };
809 }; 809 };
810 810
811 hdmi-dai-link { 811 hdmi-dai-link {
812 link-name = "HDMI Playback"; 812 link-name = "HDMI Playback";
813 cpu { 813 cpu {
814 sound-dai = <&q6afedai 814 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
815 }; 815 };
816 816
817 platform { 817 platform {
818 sound-dai = <&q6routin 818 sound-dai = <&q6routing>;
819 }; 819 };
820 820
821 codec { 821 codec {
822 sound-dai = <<9611_c 822 sound-dai = <<9611_codec 0>;
823 }; 823 };
824 }; 824 };
825 825
826 slim-dai-link { 826 slim-dai-link {
827 link-name = "SLIM Playback"; 827 link-name = "SLIM Playback";
828 cpu { 828 cpu {
829 sound-dai = <&q6afedai 829 sound-dai = <&q6afedai SLIMBUS_0_RX>;
830 }; 830 };
831 831
832 platform { 832 platform {
833 sound-dai = <&q6routin 833 sound-dai = <&q6routing>;
834 }; 834 };
835 835
836 codec { 836 codec {
837 sound-dai = <&left_spk 837 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
838 }; 838 };
839 }; 839 };
840 840
841 slimcap-dai-link { 841 slimcap-dai-link {
842 link-name = "SLIM Capture"; 842 link-name = "SLIM Capture";
843 cpu { 843 cpu {
844 sound-dai = <&q6afedai 844 sound-dai = <&q6afedai SLIMBUS_0_TX>;
845 }; 845 };
846 846
847 platform { 847 platform {
848 sound-dai = <&q6routin 848 sound-dai = <&q6routing>;
849 }; 849 };
850 850
851 codec { 851 codec {
852 sound-dai = <&wcd9340 852 sound-dai = <&wcd9340 1>;
853 }; 853 };
854 }; 854 };
855 }; 855 };
856 856
857 &spi0 { 857 &spi0 {
858 status = "okay"; 858 status = "okay";
859 pinctrl-names = "default"; 859 pinctrl-names = "default";
860 pinctrl-0 = <&qup_spi0_default>; 860 pinctrl-0 = <&qup_spi0_default>;
861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; 861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
862 862
863 can@0 { 863 can@0 {
864 compatible = "microchip,mcp251 864 compatible = "microchip,mcp2517fd";
865 reg = <0>; 865 reg = <0>;
866 clocks = <&clk40M>; 866 clocks = <&clk40M>;
867 interrupts-extended = <&tlmm 1 867 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
868 spi-max-frequency = <10000000> 868 spi-max-frequency = <10000000>;
869 vdd-supply = <&vdc_5v>; 869 vdd-supply = <&vdc_5v>;
870 xceiver-supply = <&vdc_5v>; 870 xceiver-supply = <&vdc_5v>;
871 }; 871 };
872 }; 872 };
873 873
874 &spi2 { 874 &spi2 {
875 /* On Low speed expansion */ 875 /* On Low speed expansion */
876 status = "okay"; 876 status = "okay";
877 }; 877 };
878 878
879 &tlmm { 879 &tlmm {
880 cam0_default: cam0-default-state { 880 cam0_default: cam0-default-state {
881 rst-pins { 881 rst-pins {
882 pins = "gpio9"; 882 pins = "gpio9";
883 function = "gpio"; 883 function = "gpio";
884 884
885 drive-strength = <16>; 885 drive-strength = <16>;
886 bias-disable; 886 bias-disable;
887 }; 887 };
888 888
889 mclk0-pins { 889 mclk0-pins {
890 pins = "gpio13"; 890 pins = "gpio13";
891 function = "cam_mclk"; 891 function = "cam_mclk";
892 892
893 drive-strength = <16>; 893 drive-strength = <16>;
894 bias-disable; 894 bias-disable;
895 }; 895 };
896 }; 896 };
897 897
898 cam3_default: cam3-default-state { 898 cam3_default: cam3-default-state {
899 rst-pins { 899 rst-pins {
900 function = "gpio"; 900 function = "gpio";
901 pins = "gpio21"; 901 pins = "gpio21";
902 902
903 drive-strength = <16>; 903 drive-strength = <16>;
904 bias-disable; 904 bias-disable;
905 }; 905 };
906 906
907 mclk3-pins { 907 mclk3-pins {
908 function = "cam_mclk"; 908 function = "cam_mclk";
909 pins = "gpio16"; 909 pins = "gpio16";
910 910
911 drive-strength = <16>; 911 drive-strength = <16>;
912 bias-disable; 912 bias-disable;
913 }; 913 };
914 }; 914 };
915 915
916 dsi_sw_sel: dsi-sw-sel-state { 916 dsi_sw_sel: dsi-sw-sel-state {
917 pins = "gpio120"; 917 pins = "gpio120";
918 function = "gpio"; 918 function = "gpio";
919 919
920 drive-strength = <2>; 920 drive-strength = <2>;
921 bias-disable; 921 bias-disable;
922 output-high; 922 output-high;
923 }; 923 };
924 924
925 lt9611_irq_pin: lt9611-irq-state { 925 lt9611_irq_pin: lt9611-irq-state {
926 pins = "gpio84"; 926 pins = "gpio84";
927 function = "gpio"; 927 function = "gpio";
928 bias-disable; 928 bias-disable;
929 }; 929 };
930 930
931 pcie0_default_state: pcie0-default-sta 931 pcie0_default_state: pcie0-default-state {
932 clkreq-pins { 932 clkreq-pins {
933 pins = "gpio36"; 933 pins = "gpio36";
934 function = "pci_e0"; 934 function = "pci_e0";
935 bias-pull-up; 935 bias-pull-up;
936 }; 936 };
937 937
938 reset-n-pins { 938 reset-n-pins {
939 pins = "gpio35"; 939 pins = "gpio35";
940 function = "gpio"; 940 function = "gpio";
941 941
942 drive-strength = <2>; 942 drive-strength = <2>;
943 output-low; 943 output-low;
944 bias-pull-down; 944 bias-pull-down;
945 }; 945 };
946 946
947 wake-n-pins { 947 wake-n-pins {
948 pins = "gpio37"; 948 pins = "gpio37";
949 function = "gpio"; 949 function = "gpio";
950 950
951 drive-strength = <2>; 951 drive-strength = <2>;
952 bias-pull-up; 952 bias-pull-up;
953 }; 953 };
954 }; 954 };
955 955
956 pcie0_pwren_state: pcie0-pwren-state { 956 pcie0_pwren_state: pcie0-pwren-state {
957 pins = "gpio90"; 957 pins = "gpio90";
958 function = "gpio"; 958 function = "gpio";
959 959
960 drive-strength = <2>; 960 drive-strength = <2>;
961 bias-disable; 961 bias-disable;
962 }; 962 };
963 963
964 pcie1_default_state: pcie1-default-sta 964 pcie1_default_state: pcie1-default-state {
965 perst-n-pins { 965 perst-n-pins {
966 pins = "gpio102"; 966 pins = "gpio102";
967 function = "gpio"; 967 function = "gpio";
968 968
969 drive-strength = <16>; 969 drive-strength = <16>;
970 bias-disable; 970 bias-disable;
971 }; 971 };
972 972
973 clkreq-pins { 973 clkreq-pins {
974 pins = "gpio103"; 974 pins = "gpio103";
975 function = "pci_e1"; 975 function = "pci_e1";
976 bias-pull-up; 976 bias-pull-up;
977 }; 977 };
978 978
979 wake-n-pins { 979 wake-n-pins {
980 pins = "gpio11"; 980 pins = "gpio11";
981 function = "gpio"; 981 function = "gpio";
982 982
983 drive-strength = <2>; 983 drive-strength = <2>;
984 bias-pull-up; 984 bias-pull-up;
985 }; 985 };
986 986
987 reset-n-pins { 987 reset-n-pins {
988 pins = "gpio75"; 988 pins = "gpio75";
989 function = "gpio"; 989 function = "gpio";
990 990
991 drive-strength = <16>; 991 drive-strength = <16>;
992 bias-pull-up; 992 bias-pull-up;
993 output-high; 993 output-high;
994 }; 994 };
995 }; 995 };
996 996
997 sdc2_default_state: sdc2-default-state 997 sdc2_default_state: sdc2-default-state {
998 clk-pins { 998 clk-pins {
999 pins = "sdc2_clk"; 999 pins = "sdc2_clk";
1000 bias-disable; 1000 bias-disable;
1001 1001
1002 /* 1002 /*
1003 * It seems that mmc_ 1003 * It seems that mmc_test reports errors if drive
1004 * strength is not 16 1004 * strength is not 16 on clk, cmd, and data pins.
1005 */ 1005 */
1006 drive-strength = <16> 1006 drive-strength = <16>;
1007 }; 1007 };
1008 1008
1009 cmd-pins { 1009 cmd-pins {
1010 pins = "sdc2_cmd"; 1010 pins = "sdc2_cmd";
1011 bias-pull-up; 1011 bias-pull-up;
1012 drive-strength = <10> 1012 drive-strength = <10>;
1013 }; 1013 };
1014 1014
1015 data-pins { 1015 data-pins {
1016 pins = "sdc2_data"; 1016 pins = "sdc2_data";
1017 bias-pull-up; 1017 bias-pull-up;
1018 drive-strength = <10> 1018 drive-strength = <10>;
1019 }; 1019 };
1020 }; 1020 };
1021 1021
1022 sdc2_card_det_n: sd-card-det-n-state 1022 sdc2_card_det_n: sd-card-det-n-state {
1023 pins = "gpio126"; 1023 pins = "gpio126";
1024 function = "gpio"; 1024 function = "gpio";
1025 bias-pull-up; 1025 bias-pull-up;
1026 }; 1026 };
1027 }; 1027 };
1028 1028
1029 &uart3 { 1029 &uart3 {
1030 label = "LS-UART0"; 1030 label = "LS-UART0";
1031 pinctrl-0 = <&qup_uart3_4pin>; 1031 pinctrl-0 = <&qup_uart3_4pin>;
1032 1032
1033 status = "disabled"; 1033 status = "disabled";
1034 }; 1034 };
1035 1035
1036 &uart6 { 1036 &uart6 {
1037 status = "okay"; 1037 status = "okay";
1038 1038
1039 pinctrl-0 = <&qup_uart6_4pin>; 1039 pinctrl-0 = <&qup_uart6_4pin>;
1040 1040
1041 bluetooth { 1041 bluetooth {
1042 compatible = "qcom,wcn3990-bt 1042 compatible = "qcom,wcn3990-bt";
1043 1043
1044 vddio-supply = <&vreg_s4a_1p8 1044 vddio-supply = <&vreg_s4a_1p8>;
1045 vddxo-supply = <&vreg_l7a_1p8 1045 vddxo-supply = <&vreg_l7a_1p8>;
1046 vddrf-supply = <&vreg_l17a_1p 1046 vddrf-supply = <&vreg_l17a_1p3>;
1047 vddch0-supply = <&vreg_l25a_3 1047 vddch0-supply = <&vreg_l25a_3p3>;
1048 max-speed = <3200000>; 1048 max-speed = <3200000>;
1049 }; 1049 };
1050 }; 1050 };
1051 1051
1052 &uart9 { 1052 &uart9 {
1053 label = "LS-UART1"; 1053 label = "LS-UART1";
1054 status = "okay"; 1054 status = "okay";
1055 }; 1055 };
1056 1056
1057 &usb_1 { 1057 &usb_1 {
1058 status = "okay"; 1058 status = "okay";
1059 }; 1059 };
1060 1060
1061 &usb_1_dwc3 { 1061 &usb_1_dwc3 {
1062 dr_mode = "peripheral"; 1062 dr_mode = "peripheral";
1063 }; 1063 };
1064 1064
1065 &usb_1_hsphy { 1065 &usb_1_hsphy {
1066 status = "okay"; 1066 status = "okay";
1067 1067
1068 vdd-supply = <&vreg_l1a_0p875>; 1068 vdd-supply = <&vreg_l1a_0p875>;
1069 vdda-pll-supply = <&vreg_l12a_1p8>; 1069 vdda-pll-supply = <&vreg_l12a_1p8>;
1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1071 1071
1072 qcom,imp-res-offset-value = <8>; 1072 qcom,imp-res-offset-value = <8>;
1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1074 qcom,preemphasis-level = <QUSB2_V2_PR 1074 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1075 qcom,preemphasis-width = <QUSB2_V2_PR 1075 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1076 }; 1076 };
1077 1077
1078 &usb_1_qmpphy { 1078 &usb_1_qmpphy {
1079 status = "okay"; 1079 status = "okay";
1080 1080
1081 vdda-phy-supply = <&vreg_l26a_1p2>; 1081 vdda-phy-supply = <&vreg_l26a_1p2>;
1082 vdda-pll-supply = <&vreg_l1a_0p875>; 1082 vdda-pll-supply = <&vreg_l1a_0p875>;
1083 }; 1083 };
1084 1084
1085 &usb_2 { 1085 &usb_2 {
1086 status = "okay"; 1086 status = "okay";
1087 }; 1087 };
1088 1088
1089 &usb_2_dwc3 { 1089 &usb_2_dwc3 {
1090 dr_mode = "host"; 1090 dr_mode = "host";
1091 }; 1091 };
1092 1092
1093 &usb_2_hsphy { 1093 &usb_2_hsphy {
1094 status = "okay"; 1094 status = "okay";
1095 1095
1096 vdd-supply = <&vreg_l1a_0p875>; 1096 vdd-supply = <&vreg_l1a_0p875>;
1097 vdda-pll-supply = <&vreg_l12a_1p8>; 1097 vdda-pll-supply = <&vreg_l12a_1p8>;
1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p 1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1099 1099
1100 qcom,imp-res-offset-value = <8>; 1100 qcom,imp-res-offset-value = <8>;
1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX 1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1102 }; 1102 };
1103 1103
1104 &usb_2_qmpphy { 1104 &usb_2_qmpphy {
1105 status = "okay"; 1105 status = "okay";
1106 1106
1107 vdda-phy-supply = <&vreg_l26a_1p2>; 1107 vdda-phy-supply = <&vreg_l26a_1p2>;
1108 vdda-pll-supply = <&vreg_l1a_0p875>; 1108 vdda-pll-supply = <&vreg_l1a_0p875>;
1109 }; 1109 };
1110 1110
1111 &ufs_mem_hc { 1111 &ufs_mem_hc {
1112 status = "okay"; 1112 status = "okay";
1113 1113
1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_ 1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1115 1115
1116 vcc-supply = <&vreg_l20a_2p95>; 1116 vcc-supply = <&vreg_l20a_2p95>;
1117 vcc-max-microamp = <800000>; 1117 vcc-max-microamp = <800000>;
1118 }; 1118 };
1119 1119
1120 &ufs_mem_phy { 1120 &ufs_mem_phy {
1121 status = "okay"; 1121 status = "okay";
1122 1122
1123 vdda-phy-supply = <&vreg_l1a_0p875>; 1123 vdda-phy-supply = <&vreg_l1a_0p875>;
1124 vdda-pll-supply = <&vreg_l26a_1p2>; 1124 vdda-pll-supply = <&vreg_l26a_1p2>;
1125 }; 1125 };
1126 1126
1127 &venus { 1127 &venus {
1128 status = "okay"; 1128 status = "okay";
1129 }; 1129 };
1130 1130
1131 &wcd9340 { 1131 &wcd9340 {
1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_H 1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1133 vdd-buck-supply = <&vreg_s4a_1p8>;
1134 vdd-buck-sido-supply = <&vreg_s4a_1p8 1134 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1135 vdd-tx-supply = <&vreg_s4a_1p8>;
1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1136 vdd-rx-supply = <&vreg_s4a_1p8>;
1137 vdd-io-supply = <&vreg_s4a_1p8>; 1137 vdd-io-supply = <&vreg_s4a_1p8>;
1138 1138
1139 swm: soundwire@c85 { 1139 swm: soundwire@c85 {
1140 left_spkr: speaker@0,1 { 1140 left_spkr: speaker@0,1 {
1141 compatible = "sdw1021 1141 compatible = "sdw10217201000";
1142 reg = <0 1>; 1142 reg = <0 1>;
1143 powerdown-gpios = <&w 1143 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1144 #thermal-sensor-cells 1144 #thermal-sensor-cells = <0>;
1145 sound-name-prefix = " 1145 sound-name-prefix = "SpkrLeft";
1146 #sound-dai-cells = <0 1146 #sound-dai-cells = <0>;
1147 }; 1147 };
1148 1148
1149 right_spkr: speaker@0,2 { 1149 right_spkr: speaker@0,2 {
1150 compatible = "sdw1021 1150 compatible = "sdw10217201000";
1151 powerdown-gpios = <&w 1151 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1152 reg = <0 2>; 1152 reg = <0 2>;
1153 #thermal-sensor-cells 1153 #thermal-sensor-cells = <0>;
1154 sound-name-prefix = " 1154 sound-name-prefix = "SpkrRight";
1155 #sound-dai-cells = <0 1155 #sound-dai-cells = <0>;
1156 }; 1156 };
1157 }; 1157 };
1158 }; 1158 };
1159 1159
1160 &wifi { 1160 &wifi {
1161 status = "okay"; 1161 status = "okay";
1162 1162
1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8 1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3> 1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3> 1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1167 1167
1168 qcom,snoc-host-cap-8bit-quirk; 1168 qcom,snoc-host-cap-8bit-quirk;
1169 qcom,ath10k-calibration-variant = "Th 1169 qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
1170 }; 1170 };
1171 1171
1172 /* PINCTRL - additions to nodes defined in sd 1172 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1173 &qup_spi2_default { 1173 &qup_spi2_default {
1174 drive-strength = <16>; 1174 drive-strength = <16>;
1175 }; 1175 };
1176 1176
1177 &qup_i2c10_default { 1177 &qup_i2c10_default {
1178 drive-strength = <2>; 1178 drive-strength = <2>;
1179 bias-disable; 1179 bias-disable;
1180 }; 1180 };
1181 1181
1182 &qup_uart9_rx { 1182 &qup_uart9_rx {
1183 drive-strength = <2>; 1183 drive-strength = <2>;
1184 bias-pull-up; 1184 bias-pull-up;
1185 }; 1185 };
1186 1186
1187 &qup_uart9_tx { 1187 &qup_uart9_tx {
1188 drive-strength = <2>; 1188 drive-strength = <2>;
1189 bias-disable; 1189 bias-disable;
1190 }; 1190 };
1191 1191
1192 /* PINCTRL - additions to nodes defined in sd 1192 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1193 &qup_spi0_default { 1193 &qup_spi0_default {
1194 drive-strength = <6>; 1194 drive-strength = <6>;
1195 bias-disable; 1195 bias-disable;
1196 }; 1196 };
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