1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * SDM845 MTP board device tree source 3 * SDM845 MTP board device tree source
4 * 4 *
5 * Copyright (c) 2018, The Linux Foundation. A 5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include "sdm845.dtsi" 11 #include "sdm845.dtsi"
12 #include "pm8998.dtsi" 12 #include "pm8998.dtsi"
13 #include "pmi8998.dtsi" 13 #include "pmi8998.dtsi"
14 14
15 / { 15 / {
16 model = "Qualcomm Technologies, Inc. S 16 model = "Qualcomm Technologies, Inc. SDM845 MTP";
17 compatible = "qcom,sdm845-mtp", "qcom, 17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset"; 18 chassis-type = "handset";
19 19
20 aliases { 20 aliases {
21 serial0 = &uart9; 21 serial0 = &uart9;
22 }; 22 };
23 23
24 chosen { 24 chosen {
25 stdout-path = "serial0:115200n 25 stdout-path = "serial0:115200n8";
26 }; 26 };
27 27
28 vph_pwr: vph-pwr-regulator { 28 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed" 29 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr"; 30 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <370 31 regulator-min-microvolt = <3700000>;
32 regulator-max-microvolt = <370 32 regulator-max-microvolt = <3700000>;
33 }; 33 };
34 34
35 /* 35 /*
36 * Apparently RPMh does not provide su 36 * Apparently RPMh does not provide support for PM8998 S4 because it
37 * is always-on; model it as a fixed r 37 * is always-on; model it as a fixed regulator.
38 */ 38 */
39 vreg_s4a_1p8: pm8998-smps4 { 39 vreg_s4a_1p8: pm8998-smps4 {
40 compatible = "regulator-fixed" 40 compatible = "regulator-fixed";
41 regulator-name = "vreg_s4a_1p8 41 regulator-name = "vreg_s4a_1p8";
42 42
43 regulator-min-microvolt = <180 43 regulator-min-microvolt = <1800000>;
44 regulator-max-microvolt = <180 44 regulator-max-microvolt = <1800000>;
45 45
46 regulator-always-on; 46 regulator-always-on;
47 regulator-boot-on; 47 regulator-boot-on;
48 48
49 vin-supply = <&vph_pwr>; 49 vin-supply = <&vph_pwr>;
50 }; 50 };
51 51
52 thermal-zones { 52 thermal-zones {
53 xo_thermal: xo-thermal { 53 xo_thermal: xo-thermal {
54 thermal-sensors = <&pm 54 thermal-sensors = <&pm8998_adc_tm 1>;
55 55
56 trips { 56 trips {
57 trip-point { 57 trip-point {
58 temper 58 temperature = <125000>;
59 hyster 59 hysteresis = <10000>;
60 type = 60 type = "passive";
61 }; 61 };
62 }; 62 };
63 }; 63 };
64 64
65 msm_thermal: msm-thermal { 65 msm_thermal: msm-thermal {
66 thermal-sensors = <&pm 66 thermal-sensors = <&pm8998_adc_tm 2>;
67 67
68 trips { 68 trips {
69 trip-point { 69 trip-point {
70 temper 70 temperature = <125000>;
71 hyster 71 hysteresis = <10000>;
72 type = 72 type = "passive";
73 }; 73 };
74 }; 74 };
75 }; 75 };
76 76
77 pa_thermal: pa-thermal { 77 pa_thermal: pa-thermal {
78 thermal-sensors = <&pm 78 thermal-sensors = <&pm8998_adc_tm 3>;
79 79
80 trips { 80 trips {
81 trip-point { 81 trip-point {
82 temper 82 temperature = <125000>;
83 hyster 83 hysteresis = <10000>;
84 type = 84 type = "passive";
85 }; 85 };
86 }; 86 };
87 }; 87 };
88 88
89 quiet_thermal: quiet-thermal { 89 quiet_thermal: quiet-thermal {
90 thermal-sensors = <&pm 90 thermal-sensors = <&pm8998_adc_tm 4>;
91 91
92 trips { 92 trips {
93 trip-point { 93 trip-point {
94 temper 94 temperature = <125000>;
95 hyster 95 hysteresis = <10000>;
96 type = 96 type = "passive";
97 }; 97 };
98 }; 98 };
99 }; 99 };
100 }; 100 };
101 }; 101 };
102 102
103 &adsp_pas { 103 &adsp_pas {
104 status = "okay"; 104 status = "okay";
105 firmware-name = "qcom/sdm845/adsp.mbn" 105 firmware-name = "qcom/sdm845/adsp.mbn";
106 }; 106 };
107 107
108 &apps_rsc { 108 &apps_rsc {
109 regulators-0 { 109 regulators-0 {
110 compatible = "qcom,pm8998-rpmh 110 compatible = "qcom,pm8998-rpmh-regulators";
111 qcom,pmic-id = "a"; 111 qcom,pmic-id = "a";
112 112
113 vdd-s1-supply = <&vph_pwr>; 113 vdd-s1-supply = <&vph_pwr>;
114 vdd-s2-supply = <&vph_pwr>; 114 vdd-s2-supply = <&vph_pwr>;
115 vdd-s3-supply = <&vph_pwr>; 115 vdd-s3-supply = <&vph_pwr>;
116 vdd-s4-supply = <&vph_pwr>; 116 vdd-s4-supply = <&vph_pwr>;
117 vdd-s5-supply = <&vph_pwr>; 117 vdd-s5-supply = <&vph_pwr>;
118 vdd-s6-supply = <&vph_pwr>; 118 vdd-s6-supply = <&vph_pwr>;
119 vdd-s7-supply = <&vph_pwr>; 119 vdd-s7-supply = <&vph_pwr>;
120 vdd-s8-supply = <&vph_pwr>; 120 vdd-s8-supply = <&vph_pwr>;
121 vdd-s9-supply = <&vph_pwr>; 121 vdd-s9-supply = <&vph_pwr>;
122 vdd-s10-supply = <&vph_pwr>; 122 vdd-s10-supply = <&vph_pwr>;
123 vdd-s11-supply = <&vph_pwr>; 123 vdd-s11-supply = <&vph_pwr>;
124 vdd-s12-supply = <&vph_pwr>; 124 vdd-s12-supply = <&vph_pwr>;
125 vdd-s13-supply = <&vph_pwr>; 125 vdd-s13-supply = <&vph_pwr>;
126 vdd-l1-l27-supply = <&vreg_s7a 126 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
127 vdd-l2-l8-l17-supply = <&vreg_ 127 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
128 vdd-l3-l11-supply = <&vreg_s7a 128 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
129 vdd-l4-l5-supply = <&vreg_s7a_ 129 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
130 vdd-l6-supply = <&vph_pwr>; 130 vdd-l6-supply = <&vph_pwr>;
131 vdd-l7-l12-l14-l15-supply = <& 131 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
132 vdd-l9-supply = <&vreg_bob>; 132 vdd-l9-supply = <&vreg_bob>;
133 vdd-l10-l23-l25-supply = <&vre 133 vdd-l10-l23-l25-supply = <&vreg_bob>;
134 vdd-l13-l19-l21-supply = <&vre 134 vdd-l13-l19-l21-supply = <&vreg_bob>;
135 vdd-l16-l28-supply = <&vreg_bo 135 vdd-l16-l28-supply = <&vreg_bob>;
136 vdd-l18-l22-supply = <&vreg_bo 136 vdd-l18-l22-supply = <&vreg_bob>;
137 vdd-l20-l24-supply = <&vreg_bo 137 vdd-l20-l24-supply = <&vreg_bob>;
138 vdd-l26-supply = <&vreg_s3a_1p 138 vdd-l26-supply = <&vreg_s3a_1p35>;
139 vin-lvs-1-2-supply = <&vreg_s4 139 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
140 140
141 vreg_s2a_1p125: smps2 { 141 vreg_s2a_1p125: smps2 {
142 regulator-min-microvol 142 regulator-min-microvolt = <1100000>;
143 regulator-max-microvol 143 regulator-max-microvolt = <1100000>;
144 }; 144 };
145 145
146 vreg_s3a_1p35: smps3 { 146 vreg_s3a_1p35: smps3 {
147 regulator-min-microvol 147 regulator-min-microvolt = <1352000>;
148 regulator-max-microvol 148 regulator-max-microvolt = <1352000>;
149 }; 149 };
150 150
151 vreg_s5a_2p04: smps5 { 151 vreg_s5a_2p04: smps5 {
152 regulator-min-microvol 152 regulator-min-microvolt = <1904000>;
153 regulator-max-microvol 153 regulator-max-microvolt = <2040000>;
154 }; 154 };
155 155
156 vreg_s7a_1p025: smps7 { 156 vreg_s7a_1p025: smps7 {
157 regulator-min-microvol 157 regulator-min-microvolt = <900000>;
158 regulator-max-microvol 158 regulator-max-microvolt = <1028000>;
159 }; 159 };
160 160
161 vdd_qusb_hs0: 161 vdd_qusb_hs0:
162 vdda_hp_pcie_core: 162 vdda_hp_pcie_core:
163 vdda_mipi_csi0_0p9: 163 vdda_mipi_csi0_0p9:
164 vdda_mipi_csi1_0p9: 164 vdda_mipi_csi1_0p9:
165 vdda_mipi_csi2_0p9: 165 vdda_mipi_csi2_0p9:
166 vdda_mipi_dsi0_pll: 166 vdda_mipi_dsi0_pll:
167 vdda_mipi_dsi1_pll: 167 vdda_mipi_dsi1_pll:
168 vdda_qlink_lv: 168 vdda_qlink_lv:
169 vdda_qlink_lv_ck: 169 vdda_qlink_lv_ck:
170 vdda_qrefs_0p875: 170 vdda_qrefs_0p875:
171 vdda_pcie_core: 171 vdda_pcie_core:
172 vdda_pll_cc_ebi01: 172 vdda_pll_cc_ebi01:
173 vdda_pll_cc_ebi23: 173 vdda_pll_cc_ebi23:
174 vdda_sp_sensor: 174 vdda_sp_sensor:
175 vdda_ufs1_core: 175 vdda_ufs1_core:
176 vdda_ufs2_core: 176 vdda_ufs2_core:
177 vdda_usb1_ss_core: 177 vdda_usb1_ss_core:
178 vdda_usb2_ss_core: 178 vdda_usb2_ss_core:
179 vreg_l1a_0p875: ldo1 { 179 vreg_l1a_0p875: ldo1 {
180 regulator-min-microvol 180 regulator-min-microvolt = <880000>;
181 regulator-max-microvol 181 regulator-max-microvolt = <880000>;
182 regulator-initial-mode 182 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
183 }; 183 };
184 184
185 vddpx_10: 185 vddpx_10:
186 vreg_l2a_1p2: ldo2 { 186 vreg_l2a_1p2: ldo2 {
187 regulator-min-microvol 187 regulator-min-microvolt = <1200000>;
188 regulator-max-microvol 188 regulator-max-microvolt = <1200000>;
189 regulator-initial-mode 189 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
190 regulator-always-on; 190 regulator-always-on;
191 }; 191 };
192 192
193 vreg_l3a_1p0: ldo3 { 193 vreg_l3a_1p0: ldo3 {
194 regulator-min-microvol 194 regulator-min-microvolt = <1000000>;
195 regulator-max-microvol 195 regulator-max-microvolt = <1000000>;
196 regulator-initial-mode 196 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
197 }; 197 };
198 198
199 vdd_wcss_cx: 199 vdd_wcss_cx:
200 vdd_wcss_mx: 200 vdd_wcss_mx:
201 vdda_wcss_pll: 201 vdda_wcss_pll:
202 vreg_l5a_0p8: ldo5 { 202 vreg_l5a_0p8: ldo5 {
203 regulator-min-microvol 203 regulator-min-microvolt = <800000>;
204 regulator-max-microvol 204 regulator-max-microvolt = <800000>;
205 regulator-initial-mode 205 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
206 }; 206 };
207 207
208 vddpx_13: 208 vddpx_13:
209 vreg_l6a_1p8: ldo6 { 209 vreg_l6a_1p8: ldo6 {
210 regulator-min-microvol 210 regulator-min-microvolt = <1856000>;
211 regulator-max-microvol 211 regulator-max-microvolt = <1856000>;
212 regulator-initial-mode 212 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
213 }; 213 };
214 214
215 vreg_l7a_1p8: ldo7 { 215 vreg_l7a_1p8: ldo7 {
216 regulator-min-microvol 216 regulator-min-microvolt = <1800000>;
217 regulator-max-microvol 217 regulator-max-microvolt = <1800000>;
218 regulator-initial-mode 218 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219 }; 219 };
220 220
221 vreg_l8a_1p2: ldo8 { 221 vreg_l8a_1p2: ldo8 {
222 regulator-min-microvol 222 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 223 regulator-max-microvolt = <1248000>;
224 regulator-initial-mode 224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 }; 225 };
226 226
227 vreg_l9a_1p8: ldo9 { 227 vreg_l9a_1p8: ldo9 {
228 regulator-min-microvol 228 regulator-min-microvolt = <1704000>;
229 regulator-max-microvol 229 regulator-max-microvolt = <2928000>;
230 regulator-initial-mode 230 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
231 }; 231 };
232 232
233 vreg_l10a_1p8: ldo10 { 233 vreg_l10a_1p8: ldo10 {
234 regulator-min-microvol 234 regulator-min-microvolt = <1704000>;
235 regulator-max-microvol 235 regulator-max-microvolt = <2928000>;
236 regulator-initial-mode 236 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
237 }; 237 };
238 238
239 vreg_l11a_1p0: ldo11 { 239 vreg_l11a_1p0: ldo11 {
240 regulator-min-microvol 240 regulator-min-microvolt = <1000000>;
241 regulator-max-microvol 241 regulator-max-microvolt = <1048000>;
242 regulator-initial-mode 242 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
243 }; 243 };
244 244
245 vdd_qfprom: 245 vdd_qfprom:
246 vdd_qfprom_sp: 246 vdd_qfprom_sp:
247 vdda_apc1_cs_1p8: 247 vdda_apc1_cs_1p8:
248 vdda_gfx_cs_1p8: 248 vdda_gfx_cs_1p8:
249 vdda_qrefs_1p8: 249 vdda_qrefs_1p8:
250 vdda_qusb_hs0_1p8: 250 vdda_qusb_hs0_1p8:
251 vddpx_11: 251 vddpx_11:
252 vreg_l12a_1p8: ldo12 { 252 vreg_l12a_1p8: ldo12 {
253 regulator-min-microvol 253 regulator-min-microvolt = <1800000>;
254 regulator-max-microvol 254 regulator-max-microvolt = <1800000>;
255 regulator-initial-mode 255 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
256 }; 256 };
257 257
258 vddpx_2: 258 vddpx_2:
259 vreg_l13a_2p95: ldo13 { 259 vreg_l13a_2p95: ldo13 {
260 regulator-min-microvol 260 regulator-min-microvolt = <1800000>;
261 regulator-max-microvol 261 regulator-max-microvolt = <2960000>;
262 regulator-initial-mode 262 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
263 }; 263 };
264 264
265 vreg_l14a_1p88: ldo14 { 265 vreg_l14a_1p88: ldo14 {
266 regulator-min-microvol 266 regulator-min-microvolt = <1800000>;
267 regulator-max-microvol 267 regulator-max-microvolt = <1800000>;
268 regulator-initial-mode 268 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269 }; 269 };
270 270
271 vreg_l15a_1p8: ldo15 { 271 vreg_l15a_1p8: ldo15 {
272 regulator-min-microvol 272 regulator-min-microvolt = <1800000>;
273 regulator-max-microvol 273 regulator-max-microvolt = <1800000>;
274 regulator-initial-mode 274 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
275 }; 275 };
276 276
277 vreg_l16a_2p7: ldo16 { 277 vreg_l16a_2p7: ldo16 {
278 regulator-min-microvol 278 regulator-min-microvolt = <2704000>;
279 regulator-max-microvol 279 regulator-max-microvolt = <2704000>;
280 regulator-initial-mode 280 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
281 }; 281 };
282 282
283 vreg_l17a_1p3: ldo17 { 283 vreg_l17a_1p3: ldo17 {
284 regulator-min-microvol 284 regulator-min-microvolt = <1304000>;
285 regulator-max-microvol 285 regulator-max-microvolt = <1304000>;
286 regulator-initial-mode 286 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287 }; 287 };
288 288
289 vreg_l18a_2p7: ldo18 { 289 vreg_l18a_2p7: ldo18 {
290 regulator-min-microvol 290 regulator-min-microvolt = <2704000>;
291 regulator-max-microvol 291 regulator-max-microvolt = <2960000>;
292 regulator-initial-mode 292 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
293 }; 293 };
294 294
295 vreg_l19a_3p0: ldo19 { 295 vreg_l19a_3p0: ldo19 {
296 regulator-min-microvol 296 regulator-min-microvolt = <2856000>;
297 regulator-max-microvol 297 regulator-max-microvolt = <3104000>;
298 regulator-initial-mode 298 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
299 }; 299 };
300 300
301 vreg_l20a_2p95: ldo20 { 301 vreg_l20a_2p95: ldo20 {
302 regulator-min-microvol 302 regulator-min-microvolt = <2704000>;
303 regulator-max-microvol 303 regulator-max-microvolt = <2960000>;
304 regulator-initial-mode 304 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305 }; 305 };
306 306
307 vreg_l21a_2p95: ldo21 { 307 vreg_l21a_2p95: ldo21 {
308 regulator-min-microvol 308 regulator-min-microvolt = <2704000>;
309 regulator-max-microvol 309 regulator-max-microvolt = <2960000>;
310 regulator-initial-mode 310 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
311 }; 311 };
312 312
313 vreg_l22a_2p85: ldo22 { 313 vreg_l22a_2p85: ldo22 {
314 regulator-min-microvol 314 regulator-min-microvolt = <2864000>;
315 regulator-max-microvol 315 regulator-max-microvolt = <3312000>;
316 regulator-initial-mode 316 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
317 }; 317 };
318 318
319 vreg_l23a_3p3: ldo23 { 319 vreg_l23a_3p3: ldo23 {
320 regulator-min-microvol 320 regulator-min-microvolt = <3000000>;
321 regulator-max-microvol 321 regulator-max-microvolt = <3312000>;
322 regulator-initial-mode 322 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
323 }; 323 };
324 324
325 vdda_qusb_hs0_3p1: 325 vdda_qusb_hs0_3p1:
326 vreg_l24a_3p075: ldo24 { 326 vreg_l24a_3p075: ldo24 {
327 regulator-min-microvol 327 regulator-min-microvolt = <3088000>;
328 regulator-max-microvol 328 regulator-max-microvolt = <3088000>;
329 regulator-initial-mode 329 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
330 }; 330 };
331 331
332 vreg_l25a_3p3: ldo25 { 332 vreg_l25a_3p3: ldo25 {
333 regulator-min-microvol 333 regulator-min-microvolt = <3300000>;
334 regulator-max-microvol 334 regulator-max-microvolt = <3312000>;
335 regulator-initial-mode 335 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
336 }; 336 };
337 337
338 vdda_hp_pcie_1p2: 338 vdda_hp_pcie_1p2:
339 vdda_hv_ebi0: 339 vdda_hv_ebi0:
340 vdda_hv_ebi1: 340 vdda_hv_ebi1:
341 vdda_hv_ebi2: 341 vdda_hv_ebi2:
342 vdda_hv_ebi3: 342 vdda_hv_ebi3:
343 vdda_mipi_csi_1p25: 343 vdda_mipi_csi_1p25:
344 vdda_mipi_dsi0_1p2: 344 vdda_mipi_dsi0_1p2:
345 vdda_mipi_dsi1_1p2: 345 vdda_mipi_dsi1_1p2:
346 vdda_pcie_1p2: 346 vdda_pcie_1p2:
347 vdda_ufs1_1p2: 347 vdda_ufs1_1p2:
348 vdda_ufs2_1p2: 348 vdda_ufs2_1p2:
349 vdda_usb1_ss_1p2: 349 vdda_usb1_ss_1p2:
350 vdda_usb2_ss_1p2: 350 vdda_usb2_ss_1p2:
351 vreg_l26a_1p2: ldo26 { 351 vreg_l26a_1p2: ldo26 {
352 regulator-min-microvol 352 regulator-min-microvolt = <1200000>;
353 regulator-max-microvol 353 regulator-max-microvolt = <1200000>;
354 regulator-initial-mode 354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 355 };
356 356
357 vreg_l28a_3p0: ldo28 { 357 vreg_l28a_3p0: ldo28 {
358 regulator-min-microvol 358 regulator-min-microvolt = <2856000>;
359 regulator-max-microvol 359 regulator-max-microvolt = <3008000>;
360 regulator-initial-mode 360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 361 };
362 362
363 vreg_lvs1a_1p8: lvs1 { 363 vreg_lvs1a_1p8: lvs1 {
364 regulator-min-microvol 364 regulator-min-microvolt = <1800000>;
365 regulator-max-microvol 365 regulator-max-microvolt = <1800000>;
366 }; 366 };
367 367
368 vreg_lvs2a_1p8: lvs2 { 368 vreg_lvs2a_1p8: lvs2 {
369 regulator-min-microvol 369 regulator-min-microvolt = <1800000>;
370 regulator-max-microvol 370 regulator-max-microvolt = <1800000>;
371 }; 371 };
372 }; 372 };
373 373
374 regulators-1 { 374 regulators-1 {
375 compatible = "qcom,pmi8998-rpm 375 compatible = "qcom,pmi8998-rpmh-regulators";
376 qcom,pmic-id = "b"; 376 qcom,pmic-id = "b";
377 377
378 vdd-bob-supply = <&vph_pwr>; 378 vdd-bob-supply = <&vph_pwr>;
379 379
380 vreg_bob: bob { 380 vreg_bob: bob {
381 regulator-min-microvol 381 regulator-min-microvolt = <3312000>;
382 regulator-max-microvol 382 regulator-max-microvolt = <3600000>;
383 regulator-initial-mode 383 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
384 regulator-allow-bypass 384 regulator-allow-bypass;
385 }; 385 };
386 }; 386 };
387 387
388 regulators-2 { 388 regulators-2 {
389 compatible = "qcom,pm8005-rpmh 389 compatible = "qcom,pm8005-rpmh-regulators";
390 qcom,pmic-id = "c"; 390 qcom,pmic-id = "c";
391 391
392 vdd-s1-supply = <&vph_pwr>; 392 vdd-s1-supply = <&vph_pwr>;
393 vdd-s2-supply = <&vph_pwr>; 393 vdd-s2-supply = <&vph_pwr>;
394 vdd-s3-supply = <&vph_pwr>; 394 vdd-s3-supply = <&vph_pwr>;
395 vdd-s4-supply = <&vph_pwr>; 395 vdd-s4-supply = <&vph_pwr>;
396 396
397 vreg_s3c_0p6: smps3 { 397 vreg_s3c_0p6: smps3 {
398 regulator-min-microvol 398 regulator-min-microvolt = <600000>;
399 regulator-max-microvol 399 regulator-max-microvolt = <600000>;
400 }; 400 };
401 }; 401 };
402 }; 402 };
403 403
404 &cdsp_pas { 404 &cdsp_pas {
405 status = "okay"; 405 status = "okay";
406 firmware-name = "qcom/sdm845/cdsp.mbn" 406 firmware-name = "qcom/sdm845/cdsp.mbn";
407 }; 407 };
408 408
409 &gcc { 409 &gcc {
410 protected-clocks = <GCC_QSPI_CORE_CLK> 410 protected-clocks = <GCC_QSPI_CORE_CLK>,
411 <GCC_QSPI_CORE_CLK_ 411 <GCC_QSPI_CORE_CLK_SRC>,
412 <GCC_QSPI_CNOC_PERI 412 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
413 <GCC_LPASS_Q6_AXI_C 413 <GCC_LPASS_Q6_AXI_CLK>,
414 <GCC_LPASS_SWAY_CLK 414 <GCC_LPASS_SWAY_CLK>;
415 }; 415 };
416 416
417 &gmu { 417 &gmu {
418 status = "okay"; 418 status = "okay";
419 }; 419 };
420 420
421 &gpu { 421 &gpu {
422 status = "okay"; 422 status = "okay";
423 423
424 zap-shader { 424 zap-shader {
425 memory-region = <&gpu_mem>; 425 memory-region = <&gpu_mem>;
426 firmware-name = "qcom/sdm845/a 426 firmware-name = "qcom/sdm845/a630_zap.mbn";
427 }; 427 };
428 }; 428 };
429 429
430 &i2c10 { 430 &i2c10 {
431 status = "okay"; 431 status = "okay";
432 clock-frequency = <400000>; 432 clock-frequency = <400000>;
433 }; 433 };
434 434
435 &ipa { 435 &ipa {
436 qcom,gsi-loader = "self"; 436 qcom,gsi-loader = "self";
437 memory-region = <&ipa_fw_mem>; 437 memory-region = <&ipa_fw_mem>;
438 status = "okay"; 438 status = "okay";
439 }; 439 };
440 440
441 &mdss { 441 &mdss {
442 status = "okay"; 442 status = "okay";
443 }; 443 };
444 444
445 &mdss_dsi0 { 445 &mdss_dsi0 {
446 status = "okay"; 446 status = "okay";
447 vdda-supply = <&vdda_mipi_dsi0_1p2>; 447 vdda-supply = <&vdda_mipi_dsi0_1p2>;
448 448
449 qcom,dual-dsi-mode; 449 qcom,dual-dsi-mode;
450 qcom,master-dsi; 450 qcom,master-dsi;
451 451
452 ports { 452 ports {
453 port@1 { 453 port@1 {
454 endpoint { 454 endpoint {
455 remote-endpoin 455 remote-endpoint = <&truly_in_0>;
456 data-lanes = < 456 data-lanes = <0 1 2 3>;
457 }; 457 };
458 }; 458 };
459 }; 459 };
460 460
461 panel@0 { 461 panel@0 {
462 compatible = "truly,nt35597-2K 462 compatible = "truly,nt35597-2K-display";
463 reg = <0>; 463 reg = <0>;
464 vdda-supply = <&vreg_l14a_1p88 464 vdda-supply = <&vreg_l14a_1p88>;
465 465
466 reset-gpios = <&tlmm 6 GPIO_AC 466 reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
467 mode-gpios = <&tlmm 52 GPIO_AC 467 mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
468 468
469 ports { 469 ports {
470 #address-cells = <1>; 470 #address-cells = <1>;
471 #size-cells = <0>; 471 #size-cells = <0>;
472 472
473 port@0 { 473 port@0 {
474 reg = <0>; 474 reg = <0>;
475 truly_in_0: en 475 truly_in_0: endpoint {
476 remote 476 remote-endpoint = <&mdss_dsi0_out>;
477 }; 477 };
478 }; 478 };
479 479
480 port@1 { 480 port@1 {
481 reg = <1>; 481 reg = <1>;
482 truly_in_1: en 482 truly_in_1: endpoint {
483 remote 483 remote-endpoint = <&mdss_dsi1_out>;
484 }; 484 };
485 }; 485 };
486 }; 486 };
487 }; 487 };
488 }; 488 };
489 489
490 &mdss_dsi0_phy { 490 &mdss_dsi0_phy {
491 status = "okay"; 491 status = "okay";
492 vdds-supply = <&vdda_mipi_dsi0_pll>; 492 vdds-supply = <&vdda_mipi_dsi0_pll>;
493 }; 493 };
494 494
495 &mdss_dsi1 { 495 &mdss_dsi1 {
496 status = "okay"; 496 status = "okay";
497 vdda-supply = <&vdda_mipi_dsi1_1p2>; 497 vdda-supply = <&vdda_mipi_dsi1_1p2>;
498 498
499 qcom,dual-dsi-mode; 499 qcom,dual-dsi-mode;
500 500
501 /* DSI1 is slave, so use DSI0 clocks * 501 /* DSI1 is slave, so use DSI0 clocks */
502 assigned-clock-parents = <&mdss_dsi0_p 502 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
503 503
504 ports { 504 ports {
505 port@1 { 505 port@1 {
506 endpoint { 506 endpoint {
507 remote-endpoin 507 remote-endpoint = <&truly_in_1>;
508 data-lanes = < 508 data-lanes = <0 1 2 3>;
509 }; 509 };
510 }; 510 };
511 }; 511 };
512 }; 512 };
513 513
514 &mdss_dsi1_phy { 514 &mdss_dsi1_phy {
515 status = "okay"; 515 status = "okay";
516 vdds-supply = <&vdda_mipi_dsi1_pll>; 516 vdds-supply = <&vdda_mipi_dsi1_pll>;
517 }; 517 };
518 518
519 &mss_pil { 519 &mss_pil {
520 status = "okay"; 520 status = "okay";
521 firmware-name = "qcom/sdm845/mba.mbn", 521 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
522 }; 522 };
523 523
524 &pcie0 { 524 &pcie0 {
525 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO 525 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
526 526
527 pinctrl-0 = <&pcie0_default_state>; 527 pinctrl-0 = <&pcie0_default_state>;
528 pinctrl-names = "default"; 528 pinctrl-names = "default";
529 529
530 status = "okay"; 530 status = "okay";
531 }; 531 };
532 532
533 &pcie0_phy { 533 &pcie0_phy {
534 vdda-phy-supply = <&vreg_l1a_0p875>; 534 vdda-phy-supply = <&vreg_l1a_0p875>;
535 vdda-pll-supply = <&vreg_l26a_1p2>; 535 vdda-pll-supply = <&vreg_l26a_1p2>;
536 536
537 status = "okay"; 537 status = "okay";
538 }; 538 };
539 539
540 &pcie1 { 540 &pcie1 {
541 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L 541 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
542 542
543 pinctrl-names = "default"; 543 pinctrl-names = "default";
544 pinctrl-0 = <&pcie1_default_state>; 544 pinctrl-0 = <&pcie1_default_state>;
545 545
546 status = "okay"; 546 status = "okay";
547 }; 547 };
548 548
549 &pcie1_phy { 549 &pcie1_phy {
550 status = "okay"; 550 status = "okay";
551 551
552 vdda-phy-supply = <&vreg_l1a_0p875>; 552 vdda-phy-supply = <&vreg_l1a_0p875>;
553 vdda-pll-supply = <&vreg_l26a_1p2>; 553 vdda-pll-supply = <&vreg_l26a_1p2>;
554 }; 554 };
555 555
556 &pm8998_adc { 556 &pm8998_adc {
557 channel@4c { 557 channel@4c {
558 reg = <ADC5_XO_THERM_100K_PU>; 558 reg = <ADC5_XO_THERM_100K_PU>;
559 label = "xo_therm"; 559 label = "xo_therm";
560 qcom,ratiometric; 560 qcom,ratiometric;
561 qcom,hw-settle-time = <200>; 561 qcom,hw-settle-time = <200>;
562 }; 562 };
563 563
564 channel@4d { 564 channel@4d {
565 reg = <ADC5_AMUX_THM1_100K_PU> 565 reg = <ADC5_AMUX_THM1_100K_PU>;
566 label = "msm_therm"; 566 label = "msm_therm";
567 qcom,ratiometric; 567 qcom,ratiometric;
568 qcom,hw-settle-time = <200>; 568 qcom,hw-settle-time = <200>;
569 }; 569 };
570 570
571 channel@4f { 571 channel@4f {
572 reg = <ADC5_AMUX_THM3_100K_PU> 572 reg = <ADC5_AMUX_THM3_100K_PU>;
573 label = "pa_therm1"; 573 label = "pa_therm1";
574 qcom,ratiometric; 574 qcom,ratiometric;
575 qcom,hw-settle-time = <200>; 575 qcom,hw-settle-time = <200>;
576 }; 576 };
577 577
578 channel@51 { 578 channel@51 {
579 reg = <ADC5_AMUX_THM5_100K_PU> 579 reg = <ADC5_AMUX_THM5_100K_PU>;
580 label = "quiet_therm"; 580 label = "quiet_therm";
581 qcom,ratiometric; 581 qcom,ratiometric;
582 qcom,hw-settle-time = <200>; 582 qcom,hw-settle-time = <200>;
583 }; 583 };
584 584
585 channel@83 { 585 channel@83 {
586 reg = <ADC5_VPH_PWR>; 586 reg = <ADC5_VPH_PWR>;
587 label = "vph_pwr"; 587 label = "vph_pwr";
588 qcom,ratiometric; 588 qcom,ratiometric;
589 qcom,hw-settle-time = <200>; 589 qcom,hw-settle-time = <200>;
590 }; 590 };
591 591
592 channel@85 { 592 channel@85 {
593 reg = <ADC5_VCOIN>; 593 reg = <ADC5_VCOIN>;
594 label = "vcoin"; 594 label = "vcoin";
595 qcom,ratiometric; 595 qcom,ratiometric;
596 qcom,hw-settle-time = <200>; 596 qcom,hw-settle-time = <200>;
597 }; 597 };
598 }; 598 };
599 599
600 &pm8998_adc_tm { 600 &pm8998_adc_tm {
601 status = "okay"; 601 status = "okay";
602 602
603 xo-thermistor@1 { 603 xo-thermistor@1 {
604 reg = <1>; 604 reg = <1>;
605 io-channels = <&pm8998_adc ADC 605 io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>;
606 qcom,ratiometric; 606 qcom,ratiometric;
607 qcom,hw-settle-time-us = <200> 607 qcom,hw-settle-time-us = <200>;
608 }; 608 };
609 609
610 msm-thermistor@2 { 610 msm-thermistor@2 {
611 reg = <2>; 611 reg = <2>;
612 io-channels = <&pm8998_adc ADC 612 io-channels = <&pm8998_adc ADC5_AMUX_THM1_100K_PU>;
613 qcom,ratiometric; 613 qcom,ratiometric;
614 qcom,hw-settle-time-us = <200> 614 qcom,hw-settle-time-us = <200>;
615 }; 615 };
616 616
617 pa-thermistor@3 { 617 pa-thermistor@3 {
618 reg = <3>; 618 reg = <3>;
619 io-channels = <&pm8998_adc ADC 619 io-channels = <&pm8998_adc ADC5_AMUX_THM3_100K_PU>;
620 qcom,ratiometric; 620 qcom,ratiometric;
621 qcom,hw-settle-time-us = <200> 621 qcom,hw-settle-time-us = <200>;
622 }; 622 };
623 623
624 quiet-thermistor@4 { 624 quiet-thermistor@4 {
625 reg = <4>; 625 reg = <4>;
626 io-channels = <&pm8998_adc ADC 626 io-channels = <&pm8998_adc ADC5_AMUX_THM5_100K_PU>;
627 qcom,ratiometric; 627 qcom,ratiometric;
628 qcom,hw-settle-time-us = <200> 628 qcom,hw-settle-time-us = <200>;
629 }; 629 };
630 }; 630 };
631 631
632 &pm8998_resin { 632 &pm8998_resin {
633 linux,code = <KEY_VOLUMEDOWN>; 633 linux,code = <KEY_VOLUMEDOWN>;
634 status = "okay"; 634 status = "okay";
635 }; 635 };
636 636
637 &qupv3_id_1 { 637 &qupv3_id_1 {
638 status = "okay"; 638 status = "okay";
639 }; 639 };
640 640
641 &sdhc_2 { 641 &sdhc_2 {
642 status = "okay"; 642 status = "okay";
643 643
644 pinctrl-names = "default"; 644 pinctrl-names = "default";
645 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2 645 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>;
646 646
647 vmmc-supply = <&vreg_l21a_2p95>; 647 vmmc-supply = <&vreg_l21a_2p95>;
648 vqmmc-supply = <&vddpx_2>; 648 vqmmc-supply = <&vddpx_2>;
649 649
650 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 650 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
651 }; 651 };
652 652
653 &tlmm { 653 &tlmm {
654 pcie0_default_state: pcie0-default-sta 654 pcie0_default_state: pcie0-default-state {
655 clkreq-pins { 655 clkreq-pins {
656 pins = "gpio36"; 656 pins = "gpio36";
657 function = "pci_e0"; 657 function = "pci_e0";
658 bias-pull-up; 658 bias-pull-up;
659 }; 659 };
660 660
661 perst-n-pins { 661 perst-n-pins {
662 pins = "gpio35"; 662 pins = "gpio35";
663 function = "gpio"; 663 function = "gpio";
664 drive-strength = <2>; 664 drive-strength = <2>;
665 bias-pull-down; 665 bias-pull-down;
666 }; 666 };
667 667
668 wake-n-pins { 668 wake-n-pins {
669 pins = "gpio37"; 669 pins = "gpio37";
670 function = "gpio"; 670 function = "gpio";
671 drive-strength = <2>; 671 drive-strength = <2>;
672 bias-pull-up; 672 bias-pull-up;
673 }; 673 };
674 }; 674 };
675 675
676 pcie1_default_state: pcie1-default-sta 676 pcie1_default_state: pcie1-default-state {
677 clkreq-pins { 677 clkreq-pins {
678 pins = "gpio103"; 678 pins = "gpio103";
679 function = "pci_e1"; 679 function = "pci_e1";
680 bias-pull-up; 680 bias-pull-up;
681 }; 681 };
682 682
683 perst-n-pins { 683 perst-n-pins {
684 pins = "gpio102"; 684 pins = "gpio102";
685 function = "gpio"; 685 function = "gpio";
686 drive-strength = <16>; 686 drive-strength = <16>;
687 bias-pull-down; 687 bias-pull-down;
688 }; 688 };
689 689
690 wake-n-pins { 690 wake-n-pins {
691 pins = "gpio104"; 691 pins = "gpio104";
692 function = "gpio"; 692 function = "gpio";
693 drive-strength = <2>; 693 drive-strength = <2>;
694 bias-pull-up; 694 bias-pull-up;
695 }; 695 };
696 }; 696 };
697 }; 697 };
698 698
699 &uart9 { 699 &uart9 {
700 status = "okay"; 700 status = "okay";
701 }; 701 };
702 702
703 &ufs_mem_hc { 703 &ufs_mem_hc {
704 status = "okay"; 704 status = "okay";
705 705
706 reset-gpios = <&tlmm 150 GPIO_ACTIVE_L 706 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
707 707
708 vcc-supply = <&vreg_l20a_2p95>; 708 vcc-supply = <&vreg_l20a_2p95>;
709 vcc-max-microamp = <600000>; 709 vcc-max-microamp = <600000>;
710 }; 710 };
711 711
712 &ufs_mem_phy { 712 &ufs_mem_phy {
713 status = "okay"; 713 status = "okay";
714 714
715 vdda-phy-supply = <&vdda_ufs1_core>; 715 vdda-phy-supply = <&vdda_ufs1_core>;
716 vdda-pll-supply = <&vdda_ufs1_1p2>; 716 vdda-pll-supply = <&vdda_ufs1_1p2>;
717 }; 717 };
718 718
719 &usb_1 { 719 &usb_1 {
720 status = "okay"; 720 status = "okay";
721 }; 721 };
722 722
723 &usb_1_dwc3 { 723 &usb_1_dwc3 {
724 /* Until we have Type C hooked up we'l 724 /* Until we have Type C hooked up we'll force this as peripheral. */
725 dr_mode = "peripheral"; 725 dr_mode = "peripheral";
726 }; 726 };
727 727
728 &usb_1_hsphy { 728 &usb_1_hsphy {
729 status = "okay"; 729 status = "okay";
730 730
731 vdd-supply = <&vdda_usb1_ss_core>; 731 vdd-supply = <&vdda_usb1_ss_core>;
732 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 732 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
733 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 733 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
734 734
735 qcom,imp-res-offset-value = <8>; 735 qcom,imp-res-offset-value = <8>;
736 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 736 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
737 qcom,preemphasis-level = <QUSB2_V2_PRE 737 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
738 qcom,preemphasis-width = <QUSB2_V2_PRE 738 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
739 }; 739 };
740 740
741 &usb_1_qmpphy { 741 &usb_1_qmpphy {
742 status = "okay"; 742 status = "okay";
743 743
744 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 744 vdda-phy-supply = <&vdda_usb1_ss_1p2>;
745 vdda-pll-supply = <&vdda_usb1_ss_core> 745 vdda-pll-supply = <&vdda_usb1_ss_core>;
746 }; 746 };
747 747
748 &usb_2 { 748 &usb_2 {
749 status = "okay"; 749 status = "okay";
750 }; 750 };
751 751
752 &usb_2_dwc3 { 752 &usb_2_dwc3 {
753 /* 753 /*
754 * Though the USB block on SDM845 can 754 * Though the USB block on SDM845 can support host, there's no vbus
755 * signal for this port on MTP. Thus 755 * signal for this port on MTP. Thus (unless you have a non-compliant
756 * hub that works without vbus) the on 756 * hub that works without vbus) the only sensible thing is to force
757 * peripheral mode. 757 * peripheral mode.
758 */ 758 */
759 dr_mode = "peripheral"; 759 dr_mode = "peripheral";
760 }; 760 };
761 761
762 &usb_2_hsphy { 762 &usb_2_hsphy {
763 status = "okay"; 763 status = "okay";
764 764
765 vdd-supply = <&vdda_usb2_ss_core>; 765 vdd-supply = <&vdda_usb2_ss_core>;
766 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 766 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
767 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 767 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
768 768
769 qcom,imp-res-offset-value = <8>; 769 qcom,imp-res-offset-value = <8>;
770 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 770 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
771 }; 771 };
772 772
773 &usb_2_qmpphy { 773 &usb_2_qmpphy {
774 status = "okay"; 774 status = "okay";
775 775
776 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 776 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
777 vdda-pll-supply = <&vdda_usb2_ss_core> 777 vdda-pll-supply = <&vdda_usb2_ss_core>;
778 }; 778 };
779 779
780 &venus { 780 &venus {
781 status = "okay"; 781 status = "okay";
782 }; 782 };
783 783
784 &wifi { 784 &wifi {
785 status = "okay"; 785 status = "okay";
786 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8> 786 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
787 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 787 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
788 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 788 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
789 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 789 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
790 790
791 qcom,snoc-host-cap-8bit-quirk; 791 qcom,snoc-host-cap-8bit-quirk;
792 qcom,ath10k-calibration-variant = "Qua 792 qcom,ath10k-calibration-variant = "Qualcomm_sdm845mtp";
793 }; 793 };
794 794
795 /* PINCTRL - additions to nodes defined in sdm 795 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
796 796
797 &qup_i2c10_default { 797 &qup_i2c10_default {
798 drive-strength = <2>; 798 drive-strength = <2>;
799 bias-disable; 799 bias-disable;
800 }; 800 };
801 801
802 &qup_uart9_rx { 802 &qup_uart9_rx {
803 drive-strength = <2>; 803 drive-strength = <2>;
804 bias-pull-up; 804 bias-pull-up;
805 }; 805 };
806 806
807 &qup_uart9_tx { 807 &qup_uart9_tx {
808 drive-strength = <2>; 808 drive-strength = <2>;
809 bias-disable; 809 bias-disable;
810 }; 810 };
811 811
812 &tlmm { 812 &tlmm {
813 gpio-reserved-ranges = <0 4>, <81 4>; 813 gpio-reserved-ranges = <0 4>, <81 4>;
814 814
815 sdc2_clk: sdc2-clk-state { 815 sdc2_clk: sdc2-clk-state {
816 pins = "sdc2_clk"; 816 pins = "sdc2_clk";
817 bias-disable; 817 bias-disable;
818 818
819 /* 819 /*
820 * It seems that mmc_test repo 820 * It seems that mmc_test reports errors if drive
821 * strength is not 16 on clk, 821 * strength is not 16 on clk, cmd, and data pins.
822 */ 822 */
823 drive-strength = <16>; 823 drive-strength = <16>;
824 }; 824 };
825 825
826 sdc2_cmd: sdc2-cmd-state { 826 sdc2_cmd: sdc2-cmd-state {
827 pins = "sdc2_cmd"; 827 pins = "sdc2_cmd";
828 bias-pull-up; 828 bias-pull-up;
829 drive-strength = <16>; 829 drive-strength = <16>;
830 }; 830 };
831 831
832 sdc2_data: sdc2-data-state { 832 sdc2_data: sdc2-data-state {
833 pins = "sdc2_data"; 833 pins = "sdc2_data";
834 bias-pull-up; 834 bias-pull-up;
835 drive-strength = <16>; 835 drive-strength = <16>;
836 }; 836 };
837 837
838 sd_card_det_n: sd-card-det-n-state { 838 sd_card_det_n: sd-card-det-n-state {
839 pins = "gpio126"; 839 pins = "gpio126";
840 function = "gpio"; 840 function = "gpio";
841 bias-pull-up; 841 bias-pull-up;
842 }; 842 };
843 }; 843 };
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