1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * SDM845 MTP board device tree source 3 * SDM845 MTP board device tree source
4 * 4 *
5 * Copyright (c) 2018, The Linux Foundation. A 5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
>> 10 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regu 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include "sdm845.dtsi" 12 #include "sdm845.dtsi"
12 #include "pm8998.dtsi" <<
13 #include "pmi8998.dtsi" <<
14 13
15 / { 14 / {
16 model = "Qualcomm Technologies, Inc. S 15 model = "Qualcomm Technologies, Inc. SDM845 MTP";
17 compatible = "qcom,sdm845-mtp", "qcom, !! 16 compatible = "qcom,sdm845-mtp";
18 chassis-type = "handset"; <<
19 17
20 aliases { 18 aliases {
21 serial0 = &uart9; 19 serial0 = &uart9;
22 }; 20 };
23 21
24 chosen { 22 chosen {
25 stdout-path = "serial0:115200n 23 stdout-path = "serial0:115200n8";
26 }; 24 };
27 25
28 vph_pwr: vph-pwr-regulator { 26 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed" 27 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr"; 28 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <370 29 regulator-min-microvolt = <3700000>;
32 regulator-max-microvolt = <370 30 regulator-max-microvolt = <3700000>;
33 }; 31 };
34 32
35 /* 33 /*
36 * Apparently RPMh does not provide su 34 * Apparently RPMh does not provide support for PM8998 S4 because it
37 * is always-on; model it as a fixed r 35 * is always-on; model it as a fixed regulator.
38 */ 36 */
39 vreg_s4a_1p8: pm8998-smps4 { 37 vreg_s4a_1p8: pm8998-smps4 {
40 compatible = "regulator-fixed" 38 compatible = "regulator-fixed";
41 regulator-name = "vreg_s4a_1p8 39 regulator-name = "vreg_s4a_1p8";
42 40
43 regulator-min-microvolt = <180 41 regulator-min-microvolt = <1800000>;
44 regulator-max-microvolt = <180 42 regulator-max-microvolt = <1800000>;
45 43
46 regulator-always-on; 44 regulator-always-on;
47 regulator-boot-on; 45 regulator-boot-on;
48 46
49 vin-supply = <&vph_pwr>; 47 vin-supply = <&vph_pwr>;
50 }; 48 };
51 <<
52 thermal-zones { <<
53 xo_thermal: xo-thermal { <<
54 thermal-sensors = <&pm <<
55 <<
56 trips { <<
57 trip-point { <<
58 temper <<
59 hyster <<
60 type = <<
61 }; <<
62 }; <<
63 }; <<
64 <<
65 msm_thermal: msm-thermal { <<
66 thermal-sensors = <&pm <<
67 <<
68 trips { <<
69 trip-point { <<
70 temper <<
71 hyster <<
72 type = <<
73 }; <<
74 }; <<
75 }; <<
76 <<
77 pa_thermal: pa-thermal { <<
78 thermal-sensors = <&pm <<
79 <<
80 trips { <<
81 trip-point { <<
82 temper <<
83 hyster <<
84 type = <<
85 }; <<
86 }; <<
87 }; <<
88 <<
89 quiet_thermal: quiet-thermal { <<
90 thermal-sensors = <&pm <<
91 <<
92 trips { <<
93 trip-point { <<
94 temper <<
95 hyster <<
96 type = <<
97 }; <<
98 }; <<
99 }; <<
100 }; <<
101 }; <<
102 <<
103 &adsp_pas { <<
104 status = "okay"; <<
105 firmware-name = "qcom/sdm845/adsp.mbn" <<
106 }; 49 };
107 50
108 &apps_rsc { 51 &apps_rsc {
109 regulators-0 { !! 52 pm8998-rpmh-regulators {
110 compatible = "qcom,pm8998-rpmh 53 compatible = "qcom,pm8998-rpmh-regulators";
111 qcom,pmic-id = "a"; 54 qcom,pmic-id = "a";
112 55
113 vdd-s1-supply = <&vph_pwr>; 56 vdd-s1-supply = <&vph_pwr>;
114 vdd-s2-supply = <&vph_pwr>; 57 vdd-s2-supply = <&vph_pwr>;
115 vdd-s3-supply = <&vph_pwr>; 58 vdd-s3-supply = <&vph_pwr>;
116 vdd-s4-supply = <&vph_pwr>; 59 vdd-s4-supply = <&vph_pwr>;
117 vdd-s5-supply = <&vph_pwr>; 60 vdd-s5-supply = <&vph_pwr>;
118 vdd-s6-supply = <&vph_pwr>; 61 vdd-s6-supply = <&vph_pwr>;
119 vdd-s7-supply = <&vph_pwr>; 62 vdd-s7-supply = <&vph_pwr>;
120 vdd-s8-supply = <&vph_pwr>; 63 vdd-s8-supply = <&vph_pwr>;
121 vdd-s9-supply = <&vph_pwr>; 64 vdd-s9-supply = <&vph_pwr>;
122 vdd-s10-supply = <&vph_pwr>; 65 vdd-s10-supply = <&vph_pwr>;
123 vdd-s11-supply = <&vph_pwr>; 66 vdd-s11-supply = <&vph_pwr>;
124 vdd-s12-supply = <&vph_pwr>; 67 vdd-s12-supply = <&vph_pwr>;
125 vdd-s13-supply = <&vph_pwr>; 68 vdd-s13-supply = <&vph_pwr>;
126 vdd-l1-l27-supply = <&vreg_s7a 69 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
127 vdd-l2-l8-l17-supply = <&vreg_ 70 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
128 vdd-l3-l11-supply = <&vreg_s7a 71 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
129 vdd-l4-l5-supply = <&vreg_s7a_ 72 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
130 vdd-l6-supply = <&vph_pwr>; 73 vdd-l6-supply = <&vph_pwr>;
131 vdd-l7-l12-l14-l15-supply = <& 74 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
132 vdd-l9-supply = <&vreg_bob>; 75 vdd-l9-supply = <&vreg_bob>;
133 vdd-l10-l23-l25-supply = <&vre 76 vdd-l10-l23-l25-supply = <&vreg_bob>;
134 vdd-l13-l19-l21-supply = <&vre 77 vdd-l13-l19-l21-supply = <&vreg_bob>;
135 vdd-l16-l28-supply = <&vreg_bo 78 vdd-l16-l28-supply = <&vreg_bob>;
136 vdd-l18-l22-supply = <&vreg_bo 79 vdd-l18-l22-supply = <&vreg_bob>;
137 vdd-l20-l24-supply = <&vreg_bo 80 vdd-l20-l24-supply = <&vreg_bob>;
138 vdd-l26-supply = <&vreg_s3a_1p 81 vdd-l26-supply = <&vreg_s3a_1p35>;
139 vin-lvs-1-2-supply = <&vreg_s4 82 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
140 83
141 vreg_s2a_1p125: smps2 { 84 vreg_s2a_1p125: smps2 {
142 regulator-min-microvol 85 regulator-min-microvolt = <1100000>;
143 regulator-max-microvol 86 regulator-max-microvolt = <1100000>;
144 }; 87 };
145 88
146 vreg_s3a_1p35: smps3 { 89 vreg_s3a_1p35: smps3 {
147 regulator-min-microvol 90 regulator-min-microvolt = <1352000>;
148 regulator-max-microvol 91 regulator-max-microvolt = <1352000>;
149 }; 92 };
150 93
151 vreg_s5a_2p04: smps5 { 94 vreg_s5a_2p04: smps5 {
152 regulator-min-microvol 95 regulator-min-microvolt = <1904000>;
153 regulator-max-microvol 96 regulator-max-microvolt = <2040000>;
154 }; 97 };
155 98
156 vreg_s7a_1p025: smps7 { 99 vreg_s7a_1p025: smps7 {
157 regulator-min-microvol 100 regulator-min-microvolt = <900000>;
158 regulator-max-microvol 101 regulator-max-microvolt = <1028000>;
159 }; 102 };
160 103
161 vdd_qusb_hs0: 104 vdd_qusb_hs0:
162 vdda_hp_pcie_core: 105 vdda_hp_pcie_core:
163 vdda_mipi_csi0_0p9: 106 vdda_mipi_csi0_0p9:
164 vdda_mipi_csi1_0p9: 107 vdda_mipi_csi1_0p9:
165 vdda_mipi_csi2_0p9: 108 vdda_mipi_csi2_0p9:
166 vdda_mipi_dsi0_pll: 109 vdda_mipi_dsi0_pll:
167 vdda_mipi_dsi1_pll: 110 vdda_mipi_dsi1_pll:
168 vdda_qlink_lv: 111 vdda_qlink_lv:
169 vdda_qlink_lv_ck: 112 vdda_qlink_lv_ck:
170 vdda_qrefs_0p875: 113 vdda_qrefs_0p875:
171 vdda_pcie_core: 114 vdda_pcie_core:
172 vdda_pll_cc_ebi01: 115 vdda_pll_cc_ebi01:
173 vdda_pll_cc_ebi23: 116 vdda_pll_cc_ebi23:
174 vdda_sp_sensor: 117 vdda_sp_sensor:
175 vdda_ufs1_core: 118 vdda_ufs1_core:
176 vdda_ufs2_core: 119 vdda_ufs2_core:
177 vdda_usb1_ss_core: 120 vdda_usb1_ss_core:
178 vdda_usb2_ss_core: 121 vdda_usb2_ss_core:
179 vreg_l1a_0p875: ldo1 { 122 vreg_l1a_0p875: ldo1 {
180 regulator-min-microvol 123 regulator-min-microvolt = <880000>;
181 regulator-max-microvol 124 regulator-max-microvolt = <880000>;
182 regulator-initial-mode 125 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
183 }; 126 };
184 127
185 vddpx_10: 128 vddpx_10:
186 vreg_l2a_1p2: ldo2 { 129 vreg_l2a_1p2: ldo2 {
187 regulator-min-microvol 130 regulator-min-microvolt = <1200000>;
188 regulator-max-microvol 131 regulator-max-microvolt = <1200000>;
189 regulator-initial-mode 132 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
190 regulator-always-on; 133 regulator-always-on;
191 }; 134 };
192 135
193 vreg_l3a_1p0: ldo3 { 136 vreg_l3a_1p0: ldo3 {
194 regulator-min-microvol 137 regulator-min-microvolt = <1000000>;
195 regulator-max-microvol 138 regulator-max-microvolt = <1000000>;
196 regulator-initial-mode 139 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
197 }; 140 };
198 141
199 vdd_wcss_cx: 142 vdd_wcss_cx:
200 vdd_wcss_mx: 143 vdd_wcss_mx:
201 vdda_wcss_pll: 144 vdda_wcss_pll:
202 vreg_l5a_0p8: ldo5 { 145 vreg_l5a_0p8: ldo5 {
203 regulator-min-microvol 146 regulator-min-microvolt = <800000>;
204 regulator-max-microvol 147 regulator-max-microvolt = <800000>;
205 regulator-initial-mode 148 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
206 }; 149 };
207 150
208 vddpx_13: 151 vddpx_13:
209 vreg_l6a_1p8: ldo6 { 152 vreg_l6a_1p8: ldo6 {
210 regulator-min-microvol 153 regulator-min-microvolt = <1856000>;
211 regulator-max-microvol 154 regulator-max-microvolt = <1856000>;
212 regulator-initial-mode 155 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
213 }; 156 };
214 157
215 vreg_l7a_1p8: ldo7 { 158 vreg_l7a_1p8: ldo7 {
216 regulator-min-microvol 159 regulator-min-microvolt = <1800000>;
217 regulator-max-microvol 160 regulator-max-microvolt = <1800000>;
218 regulator-initial-mode 161 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219 }; 162 };
220 163
221 vreg_l8a_1p2: ldo8 { 164 vreg_l8a_1p2: ldo8 {
222 regulator-min-microvol 165 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 166 regulator-max-microvolt = <1248000>;
224 regulator-initial-mode 167 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 }; 168 };
226 169
227 vreg_l9a_1p8: ldo9 { 170 vreg_l9a_1p8: ldo9 {
228 regulator-min-microvol 171 regulator-min-microvolt = <1704000>;
229 regulator-max-microvol 172 regulator-max-microvolt = <2928000>;
230 regulator-initial-mode 173 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
231 }; 174 };
232 175
233 vreg_l10a_1p8: ldo10 { 176 vreg_l10a_1p8: ldo10 {
234 regulator-min-microvol 177 regulator-min-microvolt = <1704000>;
235 regulator-max-microvol 178 regulator-max-microvolt = <2928000>;
236 regulator-initial-mode 179 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
237 }; 180 };
238 181
239 vreg_l11a_1p0: ldo11 { 182 vreg_l11a_1p0: ldo11 {
240 regulator-min-microvol 183 regulator-min-microvolt = <1000000>;
241 regulator-max-microvol 184 regulator-max-microvolt = <1048000>;
242 regulator-initial-mode 185 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
243 }; 186 };
244 187
245 vdd_qfprom: 188 vdd_qfprom:
246 vdd_qfprom_sp: 189 vdd_qfprom_sp:
247 vdda_apc1_cs_1p8: 190 vdda_apc1_cs_1p8:
248 vdda_gfx_cs_1p8: 191 vdda_gfx_cs_1p8:
249 vdda_qrefs_1p8: 192 vdda_qrefs_1p8:
250 vdda_qusb_hs0_1p8: 193 vdda_qusb_hs0_1p8:
251 vddpx_11: 194 vddpx_11:
252 vreg_l12a_1p8: ldo12 { 195 vreg_l12a_1p8: ldo12 {
253 regulator-min-microvol 196 regulator-min-microvolt = <1800000>;
254 regulator-max-microvol 197 regulator-max-microvolt = <1800000>;
255 regulator-initial-mode 198 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
256 }; 199 };
257 200
258 vddpx_2: 201 vddpx_2:
259 vreg_l13a_2p95: ldo13 { 202 vreg_l13a_2p95: ldo13 {
260 regulator-min-microvol 203 regulator-min-microvolt = <1800000>;
261 regulator-max-microvol 204 regulator-max-microvolt = <2960000>;
262 regulator-initial-mode 205 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
263 }; 206 };
264 207
265 vreg_l14a_1p88: ldo14 { 208 vreg_l14a_1p88: ldo14 {
266 regulator-min-microvol 209 regulator-min-microvolt = <1800000>;
267 regulator-max-microvol 210 regulator-max-microvolt = <1800000>;
268 regulator-initial-mode 211 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269 }; 212 };
270 213
271 vreg_l15a_1p8: ldo15 { 214 vreg_l15a_1p8: ldo15 {
272 regulator-min-microvol 215 regulator-min-microvolt = <1800000>;
273 regulator-max-microvol 216 regulator-max-microvolt = <1800000>;
274 regulator-initial-mode 217 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
275 }; 218 };
276 219
277 vreg_l16a_2p7: ldo16 { 220 vreg_l16a_2p7: ldo16 {
278 regulator-min-microvol 221 regulator-min-microvolt = <2704000>;
279 regulator-max-microvol 222 regulator-max-microvolt = <2704000>;
280 regulator-initial-mode 223 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
281 }; 224 };
282 225
283 vreg_l17a_1p3: ldo17 { 226 vreg_l17a_1p3: ldo17 {
284 regulator-min-microvol 227 regulator-min-microvolt = <1304000>;
285 regulator-max-microvol 228 regulator-max-microvolt = <1304000>;
286 regulator-initial-mode 229 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287 }; 230 };
288 231
289 vreg_l18a_2p7: ldo18 { 232 vreg_l18a_2p7: ldo18 {
290 regulator-min-microvol 233 regulator-min-microvolt = <2704000>;
291 regulator-max-microvol 234 regulator-max-microvolt = <2960000>;
292 regulator-initial-mode 235 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
293 }; 236 };
294 237
295 vreg_l19a_3p0: ldo19 { 238 vreg_l19a_3p0: ldo19 {
296 regulator-min-microvol 239 regulator-min-microvolt = <2856000>;
297 regulator-max-microvol 240 regulator-max-microvolt = <3104000>;
298 regulator-initial-mode 241 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
299 }; 242 };
300 243
301 vreg_l20a_2p95: ldo20 { 244 vreg_l20a_2p95: ldo20 {
302 regulator-min-microvol 245 regulator-min-microvolt = <2704000>;
303 regulator-max-microvol 246 regulator-max-microvolt = <2960000>;
304 regulator-initial-mode 247 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305 }; 248 };
306 249
307 vreg_l21a_2p95: ldo21 { 250 vreg_l21a_2p95: ldo21 {
308 regulator-min-microvol 251 regulator-min-microvolt = <2704000>;
309 regulator-max-microvol 252 regulator-max-microvolt = <2960000>;
310 regulator-initial-mode 253 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
311 }; 254 };
312 255
313 vreg_l22a_2p85: ldo22 { 256 vreg_l22a_2p85: ldo22 {
314 regulator-min-microvol 257 regulator-min-microvolt = <2864000>;
315 regulator-max-microvol 258 regulator-max-microvolt = <3312000>;
316 regulator-initial-mode 259 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
317 }; 260 };
318 261
319 vreg_l23a_3p3: ldo23 { 262 vreg_l23a_3p3: ldo23 {
320 regulator-min-microvol 263 regulator-min-microvolt = <3000000>;
321 regulator-max-microvol 264 regulator-max-microvolt = <3312000>;
322 regulator-initial-mode 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
323 }; 266 };
324 267
325 vdda_qusb_hs0_3p1: 268 vdda_qusb_hs0_3p1:
326 vreg_l24a_3p075: ldo24 { 269 vreg_l24a_3p075: ldo24 {
327 regulator-min-microvol 270 regulator-min-microvolt = <3088000>;
328 regulator-max-microvol 271 regulator-max-microvolt = <3088000>;
329 regulator-initial-mode 272 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
330 }; 273 };
331 274
332 vreg_l25a_3p3: ldo25 { 275 vreg_l25a_3p3: ldo25 {
333 regulator-min-microvol 276 regulator-min-microvolt = <3300000>;
334 regulator-max-microvol 277 regulator-max-microvolt = <3312000>;
335 regulator-initial-mode 278 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
336 }; 279 };
337 280
338 vdda_hp_pcie_1p2: 281 vdda_hp_pcie_1p2:
339 vdda_hv_ebi0: 282 vdda_hv_ebi0:
340 vdda_hv_ebi1: 283 vdda_hv_ebi1:
341 vdda_hv_ebi2: 284 vdda_hv_ebi2:
342 vdda_hv_ebi3: 285 vdda_hv_ebi3:
343 vdda_mipi_csi_1p25: 286 vdda_mipi_csi_1p25:
344 vdda_mipi_dsi0_1p2: 287 vdda_mipi_dsi0_1p2:
345 vdda_mipi_dsi1_1p2: 288 vdda_mipi_dsi1_1p2:
346 vdda_pcie_1p2: 289 vdda_pcie_1p2:
347 vdda_ufs1_1p2: 290 vdda_ufs1_1p2:
348 vdda_ufs2_1p2: 291 vdda_ufs2_1p2:
349 vdda_usb1_ss_1p2: 292 vdda_usb1_ss_1p2:
350 vdda_usb2_ss_1p2: 293 vdda_usb2_ss_1p2:
351 vreg_l26a_1p2: ldo26 { 294 vreg_l26a_1p2: ldo26 {
352 regulator-min-microvol 295 regulator-min-microvolt = <1200000>;
353 regulator-max-microvol 296 regulator-max-microvolt = <1200000>;
354 regulator-initial-mode 297 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 298 };
356 299
357 vreg_l28a_3p0: ldo28 { 300 vreg_l28a_3p0: ldo28 {
358 regulator-min-microvol 301 regulator-min-microvolt = <2856000>;
359 regulator-max-microvol 302 regulator-max-microvolt = <3008000>;
360 regulator-initial-mode 303 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 304 };
362 305
363 vreg_lvs1a_1p8: lvs1 { 306 vreg_lvs1a_1p8: lvs1 {
364 regulator-min-microvol 307 regulator-min-microvolt = <1800000>;
365 regulator-max-microvol 308 regulator-max-microvolt = <1800000>;
366 }; 309 };
367 310
368 vreg_lvs2a_1p8: lvs2 { 311 vreg_lvs2a_1p8: lvs2 {
369 regulator-min-microvol 312 regulator-min-microvolt = <1800000>;
370 regulator-max-microvol 313 regulator-max-microvolt = <1800000>;
371 }; 314 };
372 }; 315 };
373 316
374 regulators-1 { !! 317 pmi8998-rpmh-regulators {
375 compatible = "qcom,pmi8998-rpm 318 compatible = "qcom,pmi8998-rpmh-regulators";
376 qcom,pmic-id = "b"; 319 qcom,pmic-id = "b";
377 320
378 vdd-bob-supply = <&vph_pwr>; 321 vdd-bob-supply = <&vph_pwr>;
379 322
380 vreg_bob: bob { 323 vreg_bob: bob {
381 regulator-min-microvol 324 regulator-min-microvolt = <3312000>;
382 regulator-max-microvol 325 regulator-max-microvolt = <3600000>;
383 regulator-initial-mode 326 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
384 regulator-allow-bypass 327 regulator-allow-bypass;
385 }; 328 };
386 }; 329 };
387 330
388 regulators-2 { !! 331 pm8005-rpmh-regulators {
389 compatible = "qcom,pm8005-rpmh 332 compatible = "qcom,pm8005-rpmh-regulators";
390 qcom,pmic-id = "c"; 333 qcom,pmic-id = "c";
391 334
392 vdd-s1-supply = <&vph_pwr>; 335 vdd-s1-supply = <&vph_pwr>;
393 vdd-s2-supply = <&vph_pwr>; 336 vdd-s2-supply = <&vph_pwr>;
394 vdd-s3-supply = <&vph_pwr>; 337 vdd-s3-supply = <&vph_pwr>;
395 vdd-s4-supply = <&vph_pwr>; 338 vdd-s4-supply = <&vph_pwr>;
396 339
397 vreg_s3c_0p6: smps3 { 340 vreg_s3c_0p6: smps3 {
398 regulator-min-microvol 341 regulator-min-microvolt = <600000>;
399 regulator-max-microvol 342 regulator-max-microvolt = <600000>;
400 }; 343 };
401 }; 344 };
402 }; 345 };
403 346
404 &cdsp_pas { <<
405 status = "okay"; <<
406 firmware-name = "qcom/sdm845/cdsp.mbn" <<
407 }; <<
408 <<
409 &gcc { 347 &gcc {
410 protected-clocks = <GCC_QSPI_CORE_CLK> 348 protected-clocks = <GCC_QSPI_CORE_CLK>,
411 <GCC_QSPI_CORE_CLK_ 349 <GCC_QSPI_CORE_CLK_SRC>,
412 <GCC_QSPI_CNOC_PERI 350 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
413 <GCC_LPASS_Q6_AXI_C 351 <GCC_LPASS_Q6_AXI_CLK>,
414 <GCC_LPASS_SWAY_CLK 352 <GCC_LPASS_SWAY_CLK>;
415 }; 353 };
416 354
417 &gmu { <<
418 status = "okay"; <<
419 }; <<
420 <<
421 &gpu { <<
422 status = "okay"; <<
423 <<
424 zap-shader { <<
425 memory-region = <&gpu_mem>; <<
426 firmware-name = "qcom/sdm845/a <<
427 }; <<
428 }; <<
429 <<
430 &i2c10 { 355 &i2c10 {
431 status = "okay"; 356 status = "okay";
432 clock-frequency = <400000>; 357 clock-frequency = <400000>;
433 }; 358 };
434 359
435 &ipa { <<
436 qcom,gsi-loader = "self"; <<
437 memory-region = <&ipa_fw_mem>; <<
438 status = "okay"; <<
439 }; <<
440 <<
441 &mdss { <<
442 status = "okay"; <<
443 }; <<
444 <<
445 &mdss_dsi0 { <<
446 status = "okay"; <<
447 vdda-supply = <&vdda_mipi_dsi0_1p2>; <<
448 <<
449 qcom,dual-dsi-mode; <<
450 qcom,master-dsi; <<
451 <<
452 ports { <<
453 port@1 { <<
454 endpoint { <<
455 remote-endpoin <<
456 data-lanes = < <<
457 }; <<
458 }; <<
459 }; <<
460 <<
461 panel@0 { <<
462 compatible = "truly,nt35597-2K <<
463 reg = <0>; <<
464 vdda-supply = <&vreg_l14a_1p88 <<
465 <<
466 reset-gpios = <&tlmm 6 GPIO_AC <<
467 mode-gpios = <&tlmm 52 GPIO_AC <<
468 <<
469 ports { <<
470 #address-cells = <1>; <<
471 #size-cells = <0>; <<
472 <<
473 port@0 { <<
474 reg = <0>; <<
475 truly_in_0: en <<
476 remote <<
477 }; <<
478 }; <<
479 <<
480 port@1 { <<
481 reg = <1>; <<
482 truly_in_1: en <<
483 remote <<
484 }; <<
485 }; <<
486 }; <<
487 }; <<
488 }; <<
489 <<
490 &mdss_dsi0_phy { <<
491 status = "okay"; <<
492 vdds-supply = <&vdda_mipi_dsi0_pll>; <<
493 }; <<
494 <<
495 &mdss_dsi1 { <<
496 status = "okay"; <<
497 vdda-supply = <&vdda_mipi_dsi1_1p2>; <<
498 <<
499 qcom,dual-dsi-mode; <<
500 <<
501 /* DSI1 is slave, so use DSI0 clocks * <<
502 assigned-clock-parents = <&mdss_dsi0_p <<
503 <<
504 ports { <<
505 port@1 { <<
506 endpoint { <<
507 remote-endpoin <<
508 data-lanes = < <<
509 }; <<
510 }; <<
511 }; <<
512 }; <<
513 <<
514 &mdss_dsi1_phy { <<
515 status = "okay"; <<
516 vdds-supply = <&vdda_mipi_dsi1_pll>; <<
517 }; <<
518 <<
519 &mss_pil { <<
520 status = "okay"; <<
521 firmware-name = "qcom/sdm845/mba.mbn", <<
522 }; <<
523 <<
524 &pcie0 { <<
525 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO <<
526 <<
527 pinctrl-0 = <&pcie0_default_state>; <<
528 pinctrl-names = "default"; <<
529 <<
530 status = "okay"; <<
531 }; <<
532 <<
533 &pcie0_phy { <<
534 vdda-phy-supply = <&vreg_l1a_0p875>; <<
535 vdda-pll-supply = <&vreg_l26a_1p2>; <<
536 <<
537 status = "okay"; <<
538 }; <<
539 <<
540 &pcie1 { <<
541 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L <<
542 <<
543 pinctrl-names = "default"; <<
544 pinctrl-0 = <&pcie1_default_state>; <<
545 <<
546 status = "okay"; <<
547 }; <<
548 <<
549 &pcie1_phy { <<
550 status = "okay"; <<
551 <<
552 vdda-phy-supply = <&vreg_l1a_0p875>; <<
553 vdda-pll-supply = <&vreg_l26a_1p2>; <<
554 }; <<
555 <<
556 &pm8998_adc { <<
557 channel@4c { <<
558 reg = <ADC5_XO_THERM_100K_PU>; <<
559 label = "xo_therm"; <<
560 qcom,ratiometric; <<
561 qcom,hw-settle-time = <200>; <<
562 }; <<
563 <<
564 channel@4d { <<
565 reg = <ADC5_AMUX_THM1_100K_PU> <<
566 label = "msm_therm"; <<
567 qcom,ratiometric; <<
568 qcom,hw-settle-time = <200>; <<
569 }; <<
570 <<
571 channel@4f { <<
572 reg = <ADC5_AMUX_THM3_100K_PU> <<
573 label = "pa_therm1"; <<
574 qcom,ratiometric; <<
575 qcom,hw-settle-time = <200>; <<
576 }; <<
577 <<
578 channel@51 { <<
579 reg = <ADC5_AMUX_THM5_100K_PU> <<
580 label = "quiet_therm"; <<
581 qcom,ratiometric; <<
582 qcom,hw-settle-time = <200>; <<
583 }; <<
584 <<
585 channel@83 { <<
586 reg = <ADC5_VPH_PWR>; <<
587 label = "vph_pwr"; <<
588 qcom,ratiometric; <<
589 qcom,hw-settle-time = <200>; <<
590 }; <<
591 <<
592 channel@85 { <<
593 reg = <ADC5_VCOIN>; <<
594 label = "vcoin"; <<
595 qcom,ratiometric; <<
596 qcom,hw-settle-time = <200>; <<
597 }; <<
598 }; <<
599 <<
600 &pm8998_adc_tm { <<
601 status = "okay"; <<
602 <<
603 xo-thermistor@1 { <<
604 reg = <1>; <<
605 io-channels = <&pm8998_adc ADC <<
606 qcom,ratiometric; <<
607 qcom,hw-settle-time-us = <200> <<
608 }; <<
609 <<
610 msm-thermistor@2 { <<
611 reg = <2>; <<
612 io-channels = <&pm8998_adc ADC <<
613 qcom,ratiometric; <<
614 qcom,hw-settle-time-us = <200> <<
615 }; <<
616 <<
617 pa-thermistor@3 { <<
618 reg = <3>; <<
619 io-channels = <&pm8998_adc ADC <<
620 qcom,ratiometric; <<
621 qcom,hw-settle-time-us = <200> <<
622 }; <<
623 <<
624 quiet-thermistor@4 { <<
625 reg = <4>; <<
626 io-channels = <&pm8998_adc ADC <<
627 qcom,ratiometric; <<
628 qcom,hw-settle-time-us = <200> <<
629 }; <<
630 }; <<
631 <<
632 &pm8998_resin { <<
633 linux,code = <KEY_VOLUMEDOWN>; <<
634 status = "okay"; <<
635 }; <<
636 <<
637 &qupv3_id_1 { 360 &qupv3_id_1 {
638 status = "okay"; 361 status = "okay";
639 }; 362 };
640 363
641 &sdhc_2 { 364 &sdhc_2 {
642 status = "okay"; 365 status = "okay";
643 366
644 pinctrl-names = "default"; 367 pinctrl-names = "default";
645 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2 368 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>;
646 369
647 vmmc-supply = <&vreg_l21a_2p95>; 370 vmmc-supply = <&vreg_l21a_2p95>;
648 vqmmc-supply = <&vddpx_2>; 371 vqmmc-supply = <&vddpx_2>;
649 372
650 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 373 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
651 }; 374 };
652 375
653 &tlmm { <<
654 pcie0_default_state: pcie0-default-sta <<
655 clkreq-pins { <<
656 pins = "gpio36"; <<
657 function = "pci_e0"; <<
658 bias-pull-up; <<
659 }; <<
660 <<
661 perst-n-pins { <<
662 pins = "gpio35"; <<
663 function = "gpio"; <<
664 drive-strength = <2>; <<
665 bias-pull-down; <<
666 }; <<
667 <<
668 wake-n-pins { <<
669 pins = "gpio37"; <<
670 function = "gpio"; <<
671 drive-strength = <2>; <<
672 bias-pull-up; <<
673 }; <<
674 }; <<
675 <<
676 pcie1_default_state: pcie1-default-sta <<
677 clkreq-pins { <<
678 pins = "gpio103"; <<
679 function = "pci_e1"; <<
680 bias-pull-up; <<
681 }; <<
682 <<
683 perst-n-pins { <<
684 pins = "gpio102"; <<
685 function = "gpio"; <<
686 drive-strength = <16>; <<
687 bias-pull-down; <<
688 }; <<
689 <<
690 wake-n-pins { <<
691 pins = "gpio104"; <<
692 function = "gpio"; <<
693 drive-strength = <2>; <<
694 bias-pull-up; <<
695 }; <<
696 }; <<
697 }; <<
698 <<
699 &uart9 { 376 &uart9 {
700 status = "okay"; 377 status = "okay";
701 }; 378 };
702 379
703 &ufs_mem_hc { 380 &ufs_mem_hc {
704 status = "okay"; 381 status = "okay";
705 382
706 reset-gpios = <&tlmm 150 GPIO_ACTIVE_L <<
707 <<
708 vcc-supply = <&vreg_l20a_2p95>; 383 vcc-supply = <&vreg_l20a_2p95>;
709 vcc-max-microamp = <600000>; 384 vcc-max-microamp = <600000>;
710 }; 385 };
711 386
712 &ufs_mem_phy { 387 &ufs_mem_phy {
713 status = "okay"; 388 status = "okay";
714 389
715 vdda-phy-supply = <&vdda_ufs1_core>; 390 vdda-phy-supply = <&vdda_ufs1_core>;
716 vdda-pll-supply = <&vdda_ufs1_1p2>; 391 vdda-pll-supply = <&vdda_ufs1_1p2>;
717 }; 392 };
718 393
719 &usb_1 { 394 &usb_1 {
720 status = "okay"; 395 status = "okay";
721 }; 396 };
722 397
723 &usb_1_dwc3 { 398 &usb_1_dwc3 {
724 /* Until we have Type C hooked up we'l !! 399 /* Until we have Type C hooked up we'll force this as host. */
725 dr_mode = "peripheral"; !! 400 dr_mode = "host";
726 }; 401 };
727 402
728 &usb_1_hsphy { 403 &usb_1_hsphy {
729 status = "okay"; 404 status = "okay";
730 405
731 vdd-supply = <&vdda_usb1_ss_core>; 406 vdd-supply = <&vdda_usb1_ss_core>;
732 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 407 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
733 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 408 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
734 409
735 qcom,imp-res-offset-value = <8>; 410 qcom,imp-res-offset-value = <8>;
736 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 411 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
737 qcom,preemphasis-level = <QUSB2_V2_PRE 412 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
738 qcom,preemphasis-width = <QUSB2_V2_PRE 413 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
739 }; 414 };
740 415
741 &usb_1_qmpphy { 416 &usb_1_qmpphy {
742 status = "okay"; 417 status = "okay";
743 418
744 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 419 vdda-phy-supply = <&vdda_usb1_ss_1p2>;
745 vdda-pll-supply = <&vdda_usb1_ss_core> 420 vdda-pll-supply = <&vdda_usb1_ss_core>;
746 }; 421 };
747 422
748 &usb_2 { 423 &usb_2 {
749 status = "okay"; 424 status = "okay";
750 }; 425 };
751 426
752 &usb_2_dwc3 { 427 &usb_2_dwc3 {
753 /* 428 /*
754 * Though the USB block on SDM845 can 429 * Though the USB block on SDM845 can support host, there's no vbus
755 * signal for this port on MTP. Thus 430 * signal for this port on MTP. Thus (unless you have a non-compliant
756 * hub that works without vbus) the on 431 * hub that works without vbus) the only sensible thing is to force
757 * peripheral mode. 432 * peripheral mode.
758 */ 433 */
759 dr_mode = "peripheral"; 434 dr_mode = "peripheral";
760 }; 435 };
761 436
762 &usb_2_hsphy { 437 &usb_2_hsphy {
763 status = "okay"; 438 status = "okay";
764 439
765 vdd-supply = <&vdda_usb2_ss_core>; 440 vdd-supply = <&vdda_usb2_ss_core>;
766 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 441 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
767 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 442 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
768 443
769 qcom,imp-res-offset-value = <8>; 444 qcom,imp-res-offset-value = <8>;
770 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 445 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
771 }; 446 };
772 447
773 &usb_2_qmpphy { 448 &usb_2_qmpphy {
774 status = "okay"; 449 status = "okay";
775 450
776 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 451 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
777 vdda-pll-supply = <&vdda_usb2_ss_core> 452 vdda-pll-supply = <&vdda_usb2_ss_core>;
778 }; 453 };
779 454
780 &venus { <<
781 status = "okay"; <<
782 }; <<
783 <<
784 &wifi { 455 &wifi {
785 status = "okay"; 456 status = "okay";
786 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8> 457 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
787 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 458 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
788 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 459 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
789 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 460 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
790 <<
791 qcom,snoc-host-cap-8bit-quirk; <<
792 qcom,ath10k-calibration-variant = "Qua <<
793 }; 461 };
794 462
795 /* PINCTRL - additions to nodes defined in sdm 463 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
796 464
797 &qup_i2c10_default { 465 &qup_i2c10_default {
798 drive-strength = <2>; !! 466 pinconf {
799 bias-disable; !! 467 pins = "gpio55", "gpio56";
>> 468 drive-strength = <2>;
>> 469 bias-disable;
>> 470 };
800 }; 471 };
801 472
802 &qup_uart9_rx { !! 473 &qup_uart9_default {
803 drive-strength = <2>; !! 474 pinconf-tx {
804 bias-pull-up; !! 475 pins = "gpio4";
805 }; !! 476 drive-strength = <2>;
>> 477 bias-disable;
>> 478 };
806 479
807 &qup_uart9_tx { !! 480 pinconf-rx {
808 drive-strength = <2>; !! 481 pins = "gpio5";
809 bias-disable; !! 482 drive-strength = <2>;
>> 483 bias-pull-up;
>> 484 };
810 }; 485 };
811 486
812 &tlmm { 487 &tlmm {
813 gpio-reserved-ranges = <0 4>, <81 4>; 488 gpio-reserved-ranges = <0 4>, <81 4>;
814 489
815 sdc2_clk: sdc2-clk-state { !! 490 sdc2_clk: sdc2-clk {
816 pins = "sdc2_clk"; !! 491 pinconf {
817 bias-disable; !! 492 pins = "sdc2_clk";
818 !! 493 bias-disable;
819 /* !! 494
820 * It seems that mmc_test repo !! 495 /*
821 * strength is not 16 on clk, !! 496 * It seems that mmc_test reports errors if drive
822 */ !! 497 * strength is not 16 on clk, cmd, and data pins.
823 drive-strength = <16>; !! 498 */
>> 499 drive-strength = <16>;
>> 500 };
824 }; 501 };
825 502
826 sdc2_cmd: sdc2-cmd-state { !! 503 sdc2_cmd: sdc2-cmd {
827 pins = "sdc2_cmd"; !! 504 pinconf {
828 bias-pull-up; !! 505 pins = "sdc2_cmd";
829 drive-strength = <16>; !! 506 bias-pull-up;
>> 507 drive-strength = <16>;
>> 508 };
830 }; 509 };
831 510
832 sdc2_data: sdc2-data-state { !! 511 sdc2_data: sdc2-data {
833 pins = "sdc2_data"; !! 512 pinconf {
834 bias-pull-up; !! 513 pins = "sdc2_data";
835 drive-strength = <16>; !! 514 bias-pull-up;
>> 515 drive-strength = <16>;
>> 516 };
836 }; 517 };
837 518
838 sd_card_det_n: sd-card-det-n-state { !! 519 sd_card_det_n: sd-card-det-n {
839 pins = "gpio126"; !! 520 pinmux {
840 function = "gpio"; !! 521 pins = "gpio126";
841 bias-pull-up; !! 522 function = "gpio";
>> 523 };
>> 524
>> 525 pinconf {
>> 526 pins = "gpio126";
>> 527 bias-pull-up;
>> 528 };
842 }; 529 };
843 }; 530 };
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