1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * SDM845 MTP board device tree source 3 * SDM845 MTP board device tree source
4 * 4 *
5 * Copyright (c) 2018, The Linux Foundation. A 5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include "sdm845.dtsi" 11 #include "sdm845.dtsi"
12 #include "pm8998.dtsi" 12 #include "pm8998.dtsi"
13 #include "pmi8998.dtsi" 13 #include "pmi8998.dtsi"
14 14
15 / { 15 / {
16 model = "Qualcomm Technologies, Inc. S 16 model = "Qualcomm Technologies, Inc. SDM845 MTP";
17 compatible = "qcom,sdm845-mtp", "qcom, 17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset"; <<
19 18
20 aliases { 19 aliases {
21 serial0 = &uart9; 20 serial0 = &uart9;
22 }; 21 };
23 22
24 chosen { 23 chosen {
25 stdout-path = "serial0:115200n 24 stdout-path = "serial0:115200n8";
26 }; 25 };
27 26
28 vph_pwr: vph-pwr-regulator { 27 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed" 28 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr"; 29 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <370 30 regulator-min-microvolt = <3700000>;
32 regulator-max-microvolt = <370 31 regulator-max-microvolt = <3700000>;
33 }; 32 };
34 33
35 /* 34 /*
36 * Apparently RPMh does not provide su 35 * Apparently RPMh does not provide support for PM8998 S4 because it
37 * is always-on; model it as a fixed r 36 * is always-on; model it as a fixed regulator.
38 */ 37 */
39 vreg_s4a_1p8: pm8998-smps4 { 38 vreg_s4a_1p8: pm8998-smps4 {
40 compatible = "regulator-fixed" 39 compatible = "regulator-fixed";
41 regulator-name = "vreg_s4a_1p8 40 regulator-name = "vreg_s4a_1p8";
42 41
43 regulator-min-microvolt = <180 42 regulator-min-microvolt = <1800000>;
44 regulator-max-microvolt = <180 43 regulator-max-microvolt = <1800000>;
45 44
46 regulator-always-on; 45 regulator-always-on;
47 regulator-boot-on; 46 regulator-boot-on;
48 47
49 vin-supply = <&vph_pwr>; 48 vin-supply = <&vph_pwr>;
50 }; 49 };
51 50
52 thermal-zones { 51 thermal-zones {
53 xo_thermal: xo-thermal { 52 xo_thermal: xo-thermal {
>> 53 polling-delay-passive = <0>;
>> 54 polling-delay = <0>;
>> 55
54 thermal-sensors = <&pm 56 thermal-sensors = <&pm8998_adc_tm 1>;
55 57
56 trips { 58 trips {
57 trip-point { 59 trip-point {
58 temper 60 temperature = <125000>;
59 hyster 61 hysteresis = <10000>;
60 type = 62 type = "passive";
61 }; 63 };
62 }; 64 };
63 }; 65 };
64 66
65 msm_thermal: msm-thermal { 67 msm_thermal: msm-thermal {
>> 68 polling-delay-passive = <0>;
>> 69 polling-delay = <0>;
>> 70
66 thermal-sensors = <&pm 71 thermal-sensors = <&pm8998_adc_tm 2>;
67 72
68 trips { 73 trips {
69 trip-point { 74 trip-point {
70 temper 75 temperature = <125000>;
71 hyster 76 hysteresis = <10000>;
72 type = 77 type = "passive";
73 }; 78 };
74 }; 79 };
75 }; 80 };
76 81
77 pa_thermal: pa-thermal { 82 pa_thermal: pa-thermal {
>> 83 polling-delay-passive = <0>;
>> 84 polling-delay = <0>;
>> 85
78 thermal-sensors = <&pm 86 thermal-sensors = <&pm8998_adc_tm 3>;
79 87
80 trips { 88 trips {
81 trip-point { 89 trip-point {
82 temper 90 temperature = <125000>;
83 hyster 91 hysteresis = <10000>;
84 type = 92 type = "passive";
85 }; 93 };
86 }; 94 };
87 }; 95 };
88 96
89 quiet_thermal: quiet-thermal { 97 quiet_thermal: quiet-thermal {
>> 98 polling-delay-passive = <0>;
>> 99 polling-delay = <0>;
>> 100
90 thermal-sensors = <&pm 101 thermal-sensors = <&pm8998_adc_tm 4>;
91 102
92 trips { 103 trips {
93 trip-point { 104 trip-point {
94 temper 105 temperature = <125000>;
95 hyster 106 hysteresis = <10000>;
96 type = 107 type = "passive";
97 }; 108 };
98 }; 109 };
99 }; 110 };
100 }; 111 };
101 }; 112 };
102 113
103 &adsp_pas { 114 &adsp_pas {
104 status = "okay"; 115 status = "okay";
105 firmware-name = "qcom/sdm845/adsp.mbn" !! 116 firmware-name = "qcom/sdm845/adsp.mdt";
106 }; 117 };
107 118
108 &apps_rsc { 119 &apps_rsc {
109 regulators-0 { 120 regulators-0 {
110 compatible = "qcom,pm8998-rpmh 121 compatible = "qcom,pm8998-rpmh-regulators";
111 qcom,pmic-id = "a"; 122 qcom,pmic-id = "a";
112 123
113 vdd-s1-supply = <&vph_pwr>; 124 vdd-s1-supply = <&vph_pwr>;
114 vdd-s2-supply = <&vph_pwr>; 125 vdd-s2-supply = <&vph_pwr>;
115 vdd-s3-supply = <&vph_pwr>; 126 vdd-s3-supply = <&vph_pwr>;
116 vdd-s4-supply = <&vph_pwr>; 127 vdd-s4-supply = <&vph_pwr>;
117 vdd-s5-supply = <&vph_pwr>; 128 vdd-s5-supply = <&vph_pwr>;
118 vdd-s6-supply = <&vph_pwr>; 129 vdd-s6-supply = <&vph_pwr>;
119 vdd-s7-supply = <&vph_pwr>; 130 vdd-s7-supply = <&vph_pwr>;
120 vdd-s8-supply = <&vph_pwr>; 131 vdd-s8-supply = <&vph_pwr>;
121 vdd-s9-supply = <&vph_pwr>; 132 vdd-s9-supply = <&vph_pwr>;
122 vdd-s10-supply = <&vph_pwr>; 133 vdd-s10-supply = <&vph_pwr>;
123 vdd-s11-supply = <&vph_pwr>; 134 vdd-s11-supply = <&vph_pwr>;
124 vdd-s12-supply = <&vph_pwr>; 135 vdd-s12-supply = <&vph_pwr>;
125 vdd-s13-supply = <&vph_pwr>; 136 vdd-s13-supply = <&vph_pwr>;
126 vdd-l1-l27-supply = <&vreg_s7a 137 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
127 vdd-l2-l8-l17-supply = <&vreg_ 138 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
128 vdd-l3-l11-supply = <&vreg_s7a 139 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
129 vdd-l4-l5-supply = <&vreg_s7a_ 140 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
130 vdd-l6-supply = <&vph_pwr>; 141 vdd-l6-supply = <&vph_pwr>;
131 vdd-l7-l12-l14-l15-supply = <& 142 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
132 vdd-l9-supply = <&vreg_bob>; 143 vdd-l9-supply = <&vreg_bob>;
133 vdd-l10-l23-l25-supply = <&vre 144 vdd-l10-l23-l25-supply = <&vreg_bob>;
134 vdd-l13-l19-l21-supply = <&vre 145 vdd-l13-l19-l21-supply = <&vreg_bob>;
135 vdd-l16-l28-supply = <&vreg_bo 146 vdd-l16-l28-supply = <&vreg_bob>;
136 vdd-l18-l22-supply = <&vreg_bo 147 vdd-l18-l22-supply = <&vreg_bob>;
137 vdd-l20-l24-supply = <&vreg_bo 148 vdd-l20-l24-supply = <&vreg_bob>;
138 vdd-l26-supply = <&vreg_s3a_1p 149 vdd-l26-supply = <&vreg_s3a_1p35>;
139 vin-lvs-1-2-supply = <&vreg_s4 150 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
140 151
141 vreg_s2a_1p125: smps2 { 152 vreg_s2a_1p125: smps2 {
142 regulator-min-microvol 153 regulator-min-microvolt = <1100000>;
143 regulator-max-microvol 154 regulator-max-microvolt = <1100000>;
144 }; 155 };
145 156
146 vreg_s3a_1p35: smps3 { 157 vreg_s3a_1p35: smps3 {
147 regulator-min-microvol 158 regulator-min-microvolt = <1352000>;
148 regulator-max-microvol 159 regulator-max-microvolt = <1352000>;
149 }; 160 };
150 161
151 vreg_s5a_2p04: smps5 { 162 vreg_s5a_2p04: smps5 {
152 regulator-min-microvol 163 regulator-min-microvolt = <1904000>;
153 regulator-max-microvol 164 regulator-max-microvolt = <2040000>;
154 }; 165 };
155 166
156 vreg_s7a_1p025: smps7 { 167 vreg_s7a_1p025: smps7 {
157 regulator-min-microvol 168 regulator-min-microvolt = <900000>;
158 regulator-max-microvol 169 regulator-max-microvolt = <1028000>;
159 }; 170 };
160 171
161 vdd_qusb_hs0: 172 vdd_qusb_hs0:
162 vdda_hp_pcie_core: 173 vdda_hp_pcie_core:
163 vdda_mipi_csi0_0p9: 174 vdda_mipi_csi0_0p9:
164 vdda_mipi_csi1_0p9: 175 vdda_mipi_csi1_0p9:
165 vdda_mipi_csi2_0p9: 176 vdda_mipi_csi2_0p9:
166 vdda_mipi_dsi0_pll: 177 vdda_mipi_dsi0_pll:
167 vdda_mipi_dsi1_pll: 178 vdda_mipi_dsi1_pll:
168 vdda_qlink_lv: 179 vdda_qlink_lv:
169 vdda_qlink_lv_ck: 180 vdda_qlink_lv_ck:
170 vdda_qrefs_0p875: 181 vdda_qrefs_0p875:
171 vdda_pcie_core: 182 vdda_pcie_core:
172 vdda_pll_cc_ebi01: 183 vdda_pll_cc_ebi01:
173 vdda_pll_cc_ebi23: 184 vdda_pll_cc_ebi23:
174 vdda_sp_sensor: 185 vdda_sp_sensor:
175 vdda_ufs1_core: 186 vdda_ufs1_core:
176 vdda_ufs2_core: 187 vdda_ufs2_core:
177 vdda_usb1_ss_core: 188 vdda_usb1_ss_core:
178 vdda_usb2_ss_core: 189 vdda_usb2_ss_core:
179 vreg_l1a_0p875: ldo1 { 190 vreg_l1a_0p875: ldo1 {
180 regulator-min-microvol 191 regulator-min-microvolt = <880000>;
181 regulator-max-microvol 192 regulator-max-microvolt = <880000>;
182 regulator-initial-mode 193 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
183 }; 194 };
184 195
185 vddpx_10: 196 vddpx_10:
186 vreg_l2a_1p2: ldo2 { 197 vreg_l2a_1p2: ldo2 {
187 regulator-min-microvol 198 regulator-min-microvolt = <1200000>;
188 regulator-max-microvol 199 regulator-max-microvolt = <1200000>;
189 regulator-initial-mode 200 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
190 regulator-always-on; 201 regulator-always-on;
191 }; 202 };
192 203
193 vreg_l3a_1p0: ldo3 { 204 vreg_l3a_1p0: ldo3 {
194 regulator-min-microvol 205 regulator-min-microvolt = <1000000>;
195 regulator-max-microvol 206 regulator-max-microvolt = <1000000>;
196 regulator-initial-mode 207 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
197 }; 208 };
198 209
199 vdd_wcss_cx: 210 vdd_wcss_cx:
200 vdd_wcss_mx: 211 vdd_wcss_mx:
201 vdda_wcss_pll: 212 vdda_wcss_pll:
202 vreg_l5a_0p8: ldo5 { 213 vreg_l5a_0p8: ldo5 {
203 regulator-min-microvol 214 regulator-min-microvolt = <800000>;
204 regulator-max-microvol 215 regulator-max-microvolt = <800000>;
205 regulator-initial-mode 216 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
206 }; 217 };
207 218
208 vddpx_13: 219 vddpx_13:
209 vreg_l6a_1p8: ldo6 { 220 vreg_l6a_1p8: ldo6 {
210 regulator-min-microvol 221 regulator-min-microvolt = <1856000>;
211 regulator-max-microvol 222 regulator-max-microvolt = <1856000>;
212 regulator-initial-mode 223 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
213 }; 224 };
214 225
215 vreg_l7a_1p8: ldo7 { 226 vreg_l7a_1p8: ldo7 {
216 regulator-min-microvol 227 regulator-min-microvolt = <1800000>;
217 regulator-max-microvol 228 regulator-max-microvolt = <1800000>;
218 regulator-initial-mode 229 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219 }; 230 };
220 231
221 vreg_l8a_1p2: ldo8 { 232 vreg_l8a_1p2: ldo8 {
222 regulator-min-microvol 233 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 234 regulator-max-microvolt = <1248000>;
224 regulator-initial-mode 235 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 }; 236 };
226 237
227 vreg_l9a_1p8: ldo9 { 238 vreg_l9a_1p8: ldo9 {
228 regulator-min-microvol 239 regulator-min-microvolt = <1704000>;
229 regulator-max-microvol 240 regulator-max-microvolt = <2928000>;
230 regulator-initial-mode 241 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
231 }; 242 };
232 243
233 vreg_l10a_1p8: ldo10 { 244 vreg_l10a_1p8: ldo10 {
234 regulator-min-microvol 245 regulator-min-microvolt = <1704000>;
235 regulator-max-microvol 246 regulator-max-microvolt = <2928000>;
236 regulator-initial-mode 247 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
237 }; 248 };
238 249
239 vreg_l11a_1p0: ldo11 { 250 vreg_l11a_1p0: ldo11 {
240 regulator-min-microvol 251 regulator-min-microvolt = <1000000>;
241 regulator-max-microvol 252 regulator-max-microvolt = <1048000>;
242 regulator-initial-mode 253 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
243 }; 254 };
244 255
245 vdd_qfprom: 256 vdd_qfprom:
246 vdd_qfprom_sp: 257 vdd_qfprom_sp:
247 vdda_apc1_cs_1p8: 258 vdda_apc1_cs_1p8:
248 vdda_gfx_cs_1p8: 259 vdda_gfx_cs_1p8:
249 vdda_qrefs_1p8: 260 vdda_qrefs_1p8:
250 vdda_qusb_hs0_1p8: 261 vdda_qusb_hs0_1p8:
251 vddpx_11: 262 vddpx_11:
252 vreg_l12a_1p8: ldo12 { 263 vreg_l12a_1p8: ldo12 {
253 regulator-min-microvol 264 regulator-min-microvolt = <1800000>;
254 regulator-max-microvol 265 regulator-max-microvolt = <1800000>;
255 regulator-initial-mode 266 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
256 }; 267 };
257 268
258 vddpx_2: 269 vddpx_2:
259 vreg_l13a_2p95: ldo13 { 270 vreg_l13a_2p95: ldo13 {
260 regulator-min-microvol 271 regulator-min-microvolt = <1800000>;
261 regulator-max-microvol 272 regulator-max-microvolt = <2960000>;
262 regulator-initial-mode 273 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
263 }; 274 };
264 275
265 vreg_l14a_1p88: ldo14 { 276 vreg_l14a_1p88: ldo14 {
266 regulator-min-microvol 277 regulator-min-microvolt = <1800000>;
267 regulator-max-microvol 278 regulator-max-microvolt = <1800000>;
268 regulator-initial-mode 279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269 }; 280 };
270 281
271 vreg_l15a_1p8: ldo15 { 282 vreg_l15a_1p8: ldo15 {
272 regulator-min-microvol 283 regulator-min-microvolt = <1800000>;
273 regulator-max-microvol 284 regulator-max-microvolt = <1800000>;
274 regulator-initial-mode 285 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
275 }; 286 };
276 287
277 vreg_l16a_2p7: ldo16 { 288 vreg_l16a_2p7: ldo16 {
278 regulator-min-microvol 289 regulator-min-microvolt = <2704000>;
279 regulator-max-microvol 290 regulator-max-microvolt = <2704000>;
280 regulator-initial-mode 291 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
281 }; 292 };
282 293
283 vreg_l17a_1p3: ldo17 { 294 vreg_l17a_1p3: ldo17 {
284 regulator-min-microvol 295 regulator-min-microvolt = <1304000>;
285 regulator-max-microvol 296 regulator-max-microvolt = <1304000>;
286 regulator-initial-mode 297 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287 }; 298 };
288 299
289 vreg_l18a_2p7: ldo18 { 300 vreg_l18a_2p7: ldo18 {
290 regulator-min-microvol 301 regulator-min-microvolt = <2704000>;
291 regulator-max-microvol 302 regulator-max-microvolt = <2960000>;
292 regulator-initial-mode 303 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
293 }; 304 };
294 305
295 vreg_l19a_3p0: ldo19 { 306 vreg_l19a_3p0: ldo19 {
296 regulator-min-microvol 307 regulator-min-microvolt = <2856000>;
297 regulator-max-microvol 308 regulator-max-microvolt = <3104000>;
298 regulator-initial-mode 309 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
299 }; 310 };
300 311
301 vreg_l20a_2p95: ldo20 { 312 vreg_l20a_2p95: ldo20 {
302 regulator-min-microvol 313 regulator-min-microvolt = <2704000>;
303 regulator-max-microvol 314 regulator-max-microvolt = <2960000>;
304 regulator-initial-mode 315 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305 }; 316 };
306 317
307 vreg_l21a_2p95: ldo21 { 318 vreg_l21a_2p95: ldo21 {
308 regulator-min-microvol 319 regulator-min-microvolt = <2704000>;
309 regulator-max-microvol 320 regulator-max-microvolt = <2960000>;
310 regulator-initial-mode 321 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
311 }; 322 };
312 323
313 vreg_l22a_2p85: ldo22 { 324 vreg_l22a_2p85: ldo22 {
314 regulator-min-microvol 325 regulator-min-microvolt = <2864000>;
315 regulator-max-microvol 326 regulator-max-microvolt = <3312000>;
316 regulator-initial-mode 327 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
317 }; 328 };
318 329
319 vreg_l23a_3p3: ldo23 { 330 vreg_l23a_3p3: ldo23 {
320 regulator-min-microvol 331 regulator-min-microvolt = <3000000>;
321 regulator-max-microvol 332 regulator-max-microvolt = <3312000>;
322 regulator-initial-mode 333 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
323 }; 334 };
324 335
325 vdda_qusb_hs0_3p1: 336 vdda_qusb_hs0_3p1:
326 vreg_l24a_3p075: ldo24 { 337 vreg_l24a_3p075: ldo24 {
327 regulator-min-microvol 338 regulator-min-microvolt = <3088000>;
328 regulator-max-microvol 339 regulator-max-microvolt = <3088000>;
329 regulator-initial-mode 340 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
330 }; 341 };
331 342
332 vreg_l25a_3p3: ldo25 { 343 vreg_l25a_3p3: ldo25 {
333 regulator-min-microvol 344 regulator-min-microvolt = <3300000>;
334 regulator-max-microvol 345 regulator-max-microvolt = <3312000>;
335 regulator-initial-mode 346 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
336 }; 347 };
337 348
338 vdda_hp_pcie_1p2: 349 vdda_hp_pcie_1p2:
339 vdda_hv_ebi0: 350 vdda_hv_ebi0:
340 vdda_hv_ebi1: 351 vdda_hv_ebi1:
341 vdda_hv_ebi2: 352 vdda_hv_ebi2:
342 vdda_hv_ebi3: 353 vdda_hv_ebi3:
343 vdda_mipi_csi_1p25: 354 vdda_mipi_csi_1p25:
344 vdda_mipi_dsi0_1p2: 355 vdda_mipi_dsi0_1p2:
345 vdda_mipi_dsi1_1p2: 356 vdda_mipi_dsi1_1p2:
346 vdda_pcie_1p2: 357 vdda_pcie_1p2:
347 vdda_ufs1_1p2: 358 vdda_ufs1_1p2:
348 vdda_ufs2_1p2: 359 vdda_ufs2_1p2:
349 vdda_usb1_ss_1p2: 360 vdda_usb1_ss_1p2:
350 vdda_usb2_ss_1p2: 361 vdda_usb2_ss_1p2:
351 vreg_l26a_1p2: ldo26 { 362 vreg_l26a_1p2: ldo26 {
352 regulator-min-microvol 363 regulator-min-microvolt = <1200000>;
353 regulator-max-microvol 364 regulator-max-microvolt = <1200000>;
354 regulator-initial-mode 365 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 366 };
356 367
357 vreg_l28a_3p0: ldo28 { 368 vreg_l28a_3p0: ldo28 {
358 regulator-min-microvol 369 regulator-min-microvolt = <2856000>;
359 regulator-max-microvol 370 regulator-max-microvolt = <3008000>;
360 regulator-initial-mode 371 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 372 };
362 373
363 vreg_lvs1a_1p8: lvs1 { 374 vreg_lvs1a_1p8: lvs1 {
364 regulator-min-microvol 375 regulator-min-microvolt = <1800000>;
365 regulator-max-microvol 376 regulator-max-microvolt = <1800000>;
366 }; 377 };
367 378
368 vreg_lvs2a_1p8: lvs2 { 379 vreg_lvs2a_1p8: lvs2 {
369 regulator-min-microvol 380 regulator-min-microvolt = <1800000>;
370 regulator-max-microvol 381 regulator-max-microvolt = <1800000>;
371 }; 382 };
372 }; 383 };
373 384
374 regulators-1 { 385 regulators-1 {
375 compatible = "qcom,pmi8998-rpm 386 compatible = "qcom,pmi8998-rpmh-regulators";
376 qcom,pmic-id = "b"; 387 qcom,pmic-id = "b";
377 388
378 vdd-bob-supply = <&vph_pwr>; 389 vdd-bob-supply = <&vph_pwr>;
379 390
380 vreg_bob: bob { 391 vreg_bob: bob {
381 regulator-min-microvol 392 regulator-min-microvolt = <3312000>;
382 regulator-max-microvol 393 regulator-max-microvolt = <3600000>;
383 regulator-initial-mode 394 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
384 regulator-allow-bypass 395 regulator-allow-bypass;
385 }; 396 };
386 }; 397 };
387 398
388 regulators-2 { 399 regulators-2 {
389 compatible = "qcom,pm8005-rpmh 400 compatible = "qcom,pm8005-rpmh-regulators";
390 qcom,pmic-id = "c"; 401 qcom,pmic-id = "c";
391 402
392 vdd-s1-supply = <&vph_pwr>; 403 vdd-s1-supply = <&vph_pwr>;
393 vdd-s2-supply = <&vph_pwr>; 404 vdd-s2-supply = <&vph_pwr>;
394 vdd-s3-supply = <&vph_pwr>; 405 vdd-s3-supply = <&vph_pwr>;
395 vdd-s4-supply = <&vph_pwr>; 406 vdd-s4-supply = <&vph_pwr>;
396 407
397 vreg_s3c_0p6: smps3 { 408 vreg_s3c_0p6: smps3 {
398 regulator-min-microvol 409 regulator-min-microvolt = <600000>;
399 regulator-max-microvol 410 regulator-max-microvolt = <600000>;
400 }; 411 };
401 }; 412 };
402 }; 413 };
403 414
404 &cdsp_pas { 415 &cdsp_pas {
405 status = "okay"; 416 status = "okay";
406 firmware-name = "qcom/sdm845/cdsp.mbn" !! 417 firmware-name = "qcom/sdm845/cdsp.mdt";
407 }; <<
408 <<
409 &gcc { <<
410 protected-clocks = <GCC_QSPI_CORE_CLK> <<
411 <GCC_QSPI_CORE_CLK_ <<
412 <GCC_QSPI_CNOC_PERI <<
413 <GCC_LPASS_Q6_AXI_C <<
414 <GCC_LPASS_SWAY_CLK <<
415 }; <<
416 <<
417 &gmu { <<
418 status = "okay"; <<
419 }; <<
420 <<
421 &gpu { <<
422 status = "okay"; <<
423 <<
424 zap-shader { <<
425 memory-region = <&gpu_mem>; <<
426 firmware-name = "qcom/sdm845/a <<
427 }; <<
428 }; <<
429 <<
430 &i2c10 { <<
431 status = "okay"; <<
432 clock-frequency = <400000>; <<
433 }; 418 };
434 419
435 &ipa { !! 420 &dsi0 {
436 qcom,gsi-loader = "self"; <<
437 memory-region = <&ipa_fw_mem>; <<
438 status = "okay"; <<
439 }; <<
440 <<
441 &mdss { <<
442 status = "okay"; <<
443 }; <<
444 <<
445 &mdss_dsi0 { <<
446 status = "okay"; 421 status = "okay";
447 vdda-supply = <&vdda_mipi_dsi0_1p2>; 422 vdda-supply = <&vdda_mipi_dsi0_1p2>;
448 423
449 qcom,dual-dsi-mode; 424 qcom,dual-dsi-mode;
450 qcom,master-dsi; 425 qcom,master-dsi;
451 426
452 ports { 427 ports {
453 port@1 { 428 port@1 {
454 endpoint { 429 endpoint {
455 remote-endpoin 430 remote-endpoint = <&truly_in_0>;
456 data-lanes = < 431 data-lanes = <0 1 2 3>;
457 }; 432 };
458 }; 433 };
459 }; 434 };
460 435
461 panel@0 { 436 panel@0 {
462 compatible = "truly,nt35597-2K 437 compatible = "truly,nt35597-2K-display";
463 reg = <0>; 438 reg = <0>;
464 vdda-supply = <&vreg_l14a_1p88 439 vdda-supply = <&vreg_l14a_1p88>;
465 440
466 reset-gpios = <&tlmm 6 GPIO_AC 441 reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
467 mode-gpios = <&tlmm 52 GPIO_AC 442 mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
468 443
469 ports { 444 ports {
470 #address-cells = <1>; 445 #address-cells = <1>;
471 #size-cells = <0>; 446 #size-cells = <0>;
472 447
473 port@0 { 448 port@0 {
474 reg = <0>; 449 reg = <0>;
475 truly_in_0: en 450 truly_in_0: endpoint {
476 remote !! 451 remote-endpoint = <&dsi0_out>;
477 }; 452 };
478 }; 453 };
479 454
480 port@1 { 455 port@1 {
481 reg = <1>; 456 reg = <1>;
482 truly_in_1: en 457 truly_in_1: endpoint {
483 remote !! 458 remote-endpoint = <&dsi1_out>;
484 }; 459 };
485 }; 460 };
486 }; 461 };
487 }; 462 };
488 }; 463 };
489 464
490 &mdss_dsi0_phy { !! 465 &dsi0_phy {
491 status = "okay"; 466 status = "okay";
492 vdds-supply = <&vdda_mipi_dsi0_pll>; 467 vdds-supply = <&vdda_mipi_dsi0_pll>;
493 }; 468 };
494 469
495 &mdss_dsi1 { !! 470 &dsi1 {
496 status = "okay"; 471 status = "okay";
497 vdda-supply = <&vdda_mipi_dsi1_1p2>; 472 vdda-supply = <&vdda_mipi_dsi1_1p2>;
498 473
499 qcom,dual-dsi-mode; 474 qcom,dual-dsi-mode;
500 475
501 /* DSI1 is slave, so use DSI0 clocks * 476 /* DSI1 is slave, so use DSI0 clocks */
502 assigned-clock-parents = <&mdss_dsi0_p !! 477 assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
503 478
504 ports { 479 ports {
505 port@1 { 480 port@1 {
506 endpoint { 481 endpoint {
507 remote-endpoin 482 remote-endpoint = <&truly_in_1>;
508 data-lanes = < 483 data-lanes = <0 1 2 3>;
509 }; 484 };
510 }; 485 };
511 }; 486 };
512 }; 487 };
513 488
514 &mdss_dsi1_phy { !! 489 &dsi1_phy {
515 status = "okay"; 490 status = "okay";
516 vdds-supply = <&vdda_mipi_dsi1_pll>; 491 vdds-supply = <&vdda_mipi_dsi1_pll>;
517 }; 492 };
518 493
519 &mss_pil { !! 494 &gcc {
>> 495 protected-clocks = <GCC_QSPI_CORE_CLK>,
>> 496 <GCC_QSPI_CORE_CLK_SRC>,
>> 497 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
>> 498 <GCC_LPASS_Q6_AXI_CLK>,
>> 499 <GCC_LPASS_SWAY_CLK>;
>> 500 };
>> 501
>> 502 &gmu {
520 status = "okay"; 503 status = "okay";
521 firmware-name = "qcom/sdm845/mba.mbn", <<
522 }; 504 };
523 505
524 &pcie0 { !! 506 &gpu {
525 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO !! 507 status = "okay";
526 508
527 pinctrl-0 = <&pcie0_default_state>; !! 509 zap-shader {
528 pinctrl-names = "default"; !! 510 memory-region = <&gpu_mem>;
>> 511 firmware-name = "qcom/sdm845/a630_zap.mbn";
>> 512 };
>> 513 };
529 514
>> 515 &i2c10 {
530 status = "okay"; 516 status = "okay";
>> 517 clock-frequency = <400000>;
531 }; 518 };
532 519
533 &pcie0_phy { !! 520 &ipa {
534 vdda-phy-supply = <&vreg_l1a_0p875>; !! 521 qcom,gsi-loader = "self";
535 vdda-pll-supply = <&vreg_l26a_1p2>; !! 522 memory-region = <&ipa_fw_mem>;
536 <<
537 status = "okay"; 523 status = "okay";
538 }; 524 };
539 525
540 &pcie1 { !! 526 &mdss {
541 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L <<
542 <<
543 pinctrl-names = "default"; <<
544 pinctrl-0 = <&pcie1_default_state>; <<
545 <<
546 status = "okay"; 527 status = "okay";
547 }; 528 };
548 529
549 &pcie1_phy { !! 530 &mss_pil {
550 status = "okay"; 531 status = "okay";
551 !! 532 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
552 vdda-phy-supply = <&vreg_l1a_0p875>; <<
553 vdda-pll-supply = <&vreg_l26a_1p2>; <<
554 }; 533 };
555 534
556 &pm8998_adc { 535 &pm8998_adc {
557 channel@4c { !! 536 adc-chan@4c {
558 reg = <ADC5_XO_THERM_100K_PU>; 537 reg = <ADC5_XO_THERM_100K_PU>;
559 label = "xo_therm"; 538 label = "xo_therm";
560 qcom,ratiometric; 539 qcom,ratiometric;
561 qcom,hw-settle-time = <200>; 540 qcom,hw-settle-time = <200>;
562 }; 541 };
563 542
564 channel@4d { !! 543 adc-chan@4d {
565 reg = <ADC5_AMUX_THM1_100K_PU> 544 reg = <ADC5_AMUX_THM1_100K_PU>;
566 label = "msm_therm"; 545 label = "msm_therm";
567 qcom,ratiometric; 546 qcom,ratiometric;
568 qcom,hw-settle-time = <200>; 547 qcom,hw-settle-time = <200>;
569 }; 548 };
570 549
571 channel@4f { !! 550 adc-chan@4f {
572 reg = <ADC5_AMUX_THM3_100K_PU> 551 reg = <ADC5_AMUX_THM3_100K_PU>;
573 label = "pa_therm1"; 552 label = "pa_therm1";
574 qcom,ratiometric; 553 qcom,ratiometric;
575 qcom,hw-settle-time = <200>; 554 qcom,hw-settle-time = <200>;
576 }; 555 };
577 556
578 channel@51 { !! 557 adc-chan@51 {
579 reg = <ADC5_AMUX_THM5_100K_PU> 558 reg = <ADC5_AMUX_THM5_100K_PU>;
580 label = "quiet_therm"; 559 label = "quiet_therm";
581 qcom,ratiometric; 560 qcom,ratiometric;
582 qcom,hw-settle-time = <200>; 561 qcom,hw-settle-time = <200>;
583 }; 562 };
584 563
585 channel@83 { !! 564 adc-chan@83 {
586 reg = <ADC5_VPH_PWR>; 565 reg = <ADC5_VPH_PWR>;
587 label = "vph_pwr"; 566 label = "vph_pwr";
588 qcom,ratiometric; 567 qcom,ratiometric;
589 qcom,hw-settle-time = <200>; 568 qcom,hw-settle-time = <200>;
590 }; 569 };
591 570
592 channel@85 { !! 571 adc-chan@85 {
593 reg = <ADC5_VCOIN>; 572 reg = <ADC5_VCOIN>;
594 label = "vcoin"; 573 label = "vcoin";
595 qcom,ratiometric; 574 qcom,ratiometric;
596 qcom,hw-settle-time = <200>; 575 qcom,hw-settle-time = <200>;
597 }; 576 };
598 }; 577 };
599 578
600 &pm8998_adc_tm { 579 &pm8998_adc_tm {
601 status = "okay"; 580 status = "okay";
602 581
603 xo-thermistor@1 { 582 xo-thermistor@1 {
604 reg = <1>; 583 reg = <1>;
605 io-channels = <&pm8998_adc ADC 584 io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>;
606 qcom,ratiometric; 585 qcom,ratiometric;
607 qcom,hw-settle-time-us = <200> 586 qcom,hw-settle-time-us = <200>;
608 }; 587 };
609 588
610 msm-thermistor@2 { 589 msm-thermistor@2 {
611 reg = <2>; 590 reg = <2>;
612 io-channels = <&pm8998_adc ADC 591 io-channels = <&pm8998_adc ADC5_AMUX_THM1_100K_PU>;
613 qcom,ratiometric; 592 qcom,ratiometric;
614 qcom,hw-settle-time-us = <200> 593 qcom,hw-settle-time-us = <200>;
615 }; 594 };
616 595
617 pa-thermistor@3 { 596 pa-thermistor@3 {
618 reg = <3>; 597 reg = <3>;
619 io-channels = <&pm8998_adc ADC 598 io-channels = <&pm8998_adc ADC5_AMUX_THM3_100K_PU>;
620 qcom,ratiometric; 599 qcom,ratiometric;
621 qcom,hw-settle-time-us = <200> 600 qcom,hw-settle-time-us = <200>;
622 }; 601 };
623 602
624 quiet-thermistor@4 { 603 quiet-thermistor@4 {
625 reg = <4>; 604 reg = <4>;
626 io-channels = <&pm8998_adc ADC 605 io-channels = <&pm8998_adc ADC5_AMUX_THM5_100K_PU>;
627 qcom,ratiometric; 606 qcom,ratiometric;
628 qcom,hw-settle-time-us = <200> 607 qcom,hw-settle-time-us = <200>;
629 }; 608 };
630 }; 609 };
631 610
632 &pm8998_resin { <<
633 linux,code = <KEY_VOLUMEDOWN>; <<
634 status = "okay"; <<
635 }; <<
636 <<
637 &qupv3_id_1 { 611 &qupv3_id_1 {
638 status = "okay"; 612 status = "okay";
639 }; 613 };
640 614
641 &sdhc_2 { 615 &sdhc_2 {
642 status = "okay"; 616 status = "okay";
643 617
644 pinctrl-names = "default"; 618 pinctrl-names = "default";
645 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2 619 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>;
646 620
647 vmmc-supply = <&vreg_l21a_2p95>; 621 vmmc-supply = <&vreg_l21a_2p95>;
648 vqmmc-supply = <&vddpx_2>; 622 vqmmc-supply = <&vddpx_2>;
649 623
650 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 624 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
651 }; 625 };
652 626
653 &tlmm { <<
654 pcie0_default_state: pcie0-default-sta <<
655 clkreq-pins { <<
656 pins = "gpio36"; <<
657 function = "pci_e0"; <<
658 bias-pull-up; <<
659 }; <<
660 <<
661 perst-n-pins { <<
662 pins = "gpio35"; <<
663 function = "gpio"; <<
664 drive-strength = <2>; <<
665 bias-pull-down; <<
666 }; <<
667 <<
668 wake-n-pins { <<
669 pins = "gpio37"; <<
670 function = "gpio"; <<
671 drive-strength = <2>; <<
672 bias-pull-up; <<
673 }; <<
674 }; <<
675 <<
676 pcie1_default_state: pcie1-default-sta <<
677 clkreq-pins { <<
678 pins = "gpio103"; <<
679 function = "pci_e1"; <<
680 bias-pull-up; <<
681 }; <<
682 <<
683 perst-n-pins { <<
684 pins = "gpio102"; <<
685 function = "gpio"; <<
686 drive-strength = <16>; <<
687 bias-pull-down; <<
688 }; <<
689 <<
690 wake-n-pins { <<
691 pins = "gpio104"; <<
692 function = "gpio"; <<
693 drive-strength = <2>; <<
694 bias-pull-up; <<
695 }; <<
696 }; <<
697 }; <<
698 <<
699 &uart9 { 627 &uart9 {
700 status = "okay"; 628 status = "okay";
701 }; 629 };
702 630
703 &ufs_mem_hc { 631 &ufs_mem_hc {
704 status = "okay"; 632 status = "okay";
705 633
706 reset-gpios = <&tlmm 150 GPIO_ACTIVE_L 634 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
707 635
708 vcc-supply = <&vreg_l20a_2p95>; 636 vcc-supply = <&vreg_l20a_2p95>;
709 vcc-max-microamp = <600000>; 637 vcc-max-microamp = <600000>;
710 }; 638 };
711 639
712 &ufs_mem_phy { 640 &ufs_mem_phy {
713 status = "okay"; 641 status = "okay";
714 642
715 vdda-phy-supply = <&vdda_ufs1_core>; 643 vdda-phy-supply = <&vdda_ufs1_core>;
716 vdda-pll-supply = <&vdda_ufs1_1p2>; 644 vdda-pll-supply = <&vdda_ufs1_1p2>;
717 }; 645 };
718 646
719 &usb_1 { 647 &usb_1 {
720 status = "okay"; 648 status = "okay";
721 }; 649 };
722 650
723 &usb_1_dwc3 { 651 &usb_1_dwc3 {
724 /* Until we have Type C hooked up we'l 652 /* Until we have Type C hooked up we'll force this as peripheral. */
725 dr_mode = "peripheral"; 653 dr_mode = "peripheral";
726 }; 654 };
727 655
728 &usb_1_hsphy { 656 &usb_1_hsphy {
729 status = "okay"; 657 status = "okay";
730 658
731 vdd-supply = <&vdda_usb1_ss_core>; 659 vdd-supply = <&vdda_usb1_ss_core>;
732 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 660 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
733 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 661 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
734 662
735 qcom,imp-res-offset-value = <8>; 663 qcom,imp-res-offset-value = <8>;
736 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 664 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
737 qcom,preemphasis-level = <QUSB2_V2_PRE 665 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
738 qcom,preemphasis-width = <QUSB2_V2_PRE 666 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
739 }; 667 };
740 668
741 &usb_1_qmpphy { 669 &usb_1_qmpphy {
742 status = "okay"; 670 status = "okay";
743 671
744 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 672 vdda-phy-supply = <&vdda_usb1_ss_1p2>;
745 vdda-pll-supply = <&vdda_usb1_ss_core> 673 vdda-pll-supply = <&vdda_usb1_ss_core>;
746 }; 674 };
747 675
748 &usb_2 { 676 &usb_2 {
749 status = "okay"; 677 status = "okay";
750 }; 678 };
751 679
752 &usb_2_dwc3 { 680 &usb_2_dwc3 {
753 /* 681 /*
754 * Though the USB block on SDM845 can 682 * Though the USB block on SDM845 can support host, there's no vbus
755 * signal for this port on MTP. Thus 683 * signal for this port on MTP. Thus (unless you have a non-compliant
756 * hub that works without vbus) the on 684 * hub that works without vbus) the only sensible thing is to force
757 * peripheral mode. 685 * peripheral mode.
758 */ 686 */
759 dr_mode = "peripheral"; 687 dr_mode = "peripheral";
760 }; 688 };
761 689
762 &usb_2_hsphy { 690 &usb_2_hsphy {
763 status = "okay"; 691 status = "okay";
764 692
765 vdd-supply = <&vdda_usb2_ss_core>; 693 vdd-supply = <&vdda_usb2_ss_core>;
766 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 694 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
767 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 695 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
768 696
769 qcom,imp-res-offset-value = <8>; 697 qcom,imp-res-offset-value = <8>;
770 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 698 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
771 }; 699 };
772 700
773 &usb_2_qmpphy { 701 &usb_2_qmpphy {
774 status = "okay"; 702 status = "okay";
775 703
776 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 704 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
777 vdda-pll-supply = <&vdda_usb2_ss_core> 705 vdda-pll-supply = <&vdda_usb2_ss_core>;
778 }; 706 };
779 707
780 &venus { 708 &venus {
781 status = "okay"; 709 status = "okay";
782 }; 710 };
783 711
784 &wifi { 712 &wifi {
785 status = "okay"; 713 status = "okay";
786 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8> 714 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
787 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 715 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
788 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 716 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
789 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 717 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
790 <<
791 qcom,snoc-host-cap-8bit-quirk; <<
792 qcom,ath10k-calibration-variant = "Qua <<
793 }; 718 };
794 719
795 /* PINCTRL - additions to nodes defined in sdm 720 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
796 721
797 &qup_i2c10_default { 722 &qup_i2c10_default {
798 drive-strength = <2>; 723 drive-strength = <2>;
799 bias-disable; 724 bias-disable;
800 }; 725 };
801 726
802 &qup_uart9_rx { 727 &qup_uart9_rx {
803 drive-strength = <2>; 728 drive-strength = <2>;
804 bias-pull-up; 729 bias-pull-up;
805 }; 730 };
806 731
807 &qup_uart9_tx { 732 &qup_uart9_tx {
808 drive-strength = <2>; 733 drive-strength = <2>;
809 bias-disable; 734 bias-disable;
810 }; 735 };
811 736
812 &tlmm { 737 &tlmm {
813 gpio-reserved-ranges = <0 4>, <81 4>; 738 gpio-reserved-ranges = <0 4>, <81 4>;
814 739
815 sdc2_clk: sdc2-clk-state { 740 sdc2_clk: sdc2-clk-state {
816 pins = "sdc2_clk"; 741 pins = "sdc2_clk";
817 bias-disable; 742 bias-disable;
818 743
819 /* 744 /*
820 * It seems that mmc_test repo 745 * It seems that mmc_test reports errors if drive
821 * strength is not 16 on clk, 746 * strength is not 16 on clk, cmd, and data pins.
822 */ 747 */
823 drive-strength = <16>; 748 drive-strength = <16>;
824 }; 749 };
825 750
826 sdc2_cmd: sdc2-cmd-state { 751 sdc2_cmd: sdc2-cmd-state {
827 pins = "sdc2_cmd"; 752 pins = "sdc2_cmd";
828 bias-pull-up; 753 bias-pull-up;
829 drive-strength = <16>; 754 drive-strength = <16>;
830 }; 755 };
831 756
832 sdc2_data: sdc2-data-state { 757 sdc2_data: sdc2-data-state {
833 pins = "sdc2_data"; 758 pins = "sdc2_data";
834 bias-pull-up; 759 bias-pull-up;
835 drive-strength = <16>; 760 drive-strength = <16>;
836 }; 761 };
837 762
838 sd_card_det_n: sd-card-det-n-state { 763 sd_card_det_n: sd-card-det-n-state {
839 pins = "gpio126"; 764 pins = "gpio126";
840 function = "gpio"; 765 function = "gpio";
841 bias-pull-up; 766 bias-pull-up;
842 }; 767 };
843 }; 768 };
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