1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * SDM845 MTP board device tree source 3 * SDM845 MTP board device tree source
4 * 4 *
5 * Copyright (c) 2018, The Linux Foundation. A 5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include <dt-bindings/regulator/qcom,rpmh-regu 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include "sdm845.dtsi" 11 #include "sdm845.dtsi"
12 #include "pm8998.dtsi" 12 #include "pm8998.dtsi"
13 #include "pmi8998.dtsi" 13 #include "pmi8998.dtsi"
14 14
15 / { 15 / {
16 model = "Qualcomm Technologies, Inc. S 16 model = "Qualcomm Technologies, Inc. SDM845 MTP";
17 compatible = "qcom,sdm845-mtp", "qcom, 17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset"; 18 chassis-type = "handset";
19 19
20 aliases { 20 aliases {
21 serial0 = &uart9; 21 serial0 = &uart9;
22 }; 22 };
23 23
24 chosen { 24 chosen {
25 stdout-path = "serial0:115200n 25 stdout-path = "serial0:115200n8";
26 }; 26 };
27 27
28 vph_pwr: vph-pwr-regulator { 28 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed" 29 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr"; 30 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <370 31 regulator-min-microvolt = <3700000>;
32 regulator-max-microvolt = <370 32 regulator-max-microvolt = <3700000>;
33 }; 33 };
34 34
35 /* 35 /*
36 * Apparently RPMh does not provide su 36 * Apparently RPMh does not provide support for PM8998 S4 because it
37 * is always-on; model it as a fixed r 37 * is always-on; model it as a fixed regulator.
38 */ 38 */
39 vreg_s4a_1p8: pm8998-smps4 { 39 vreg_s4a_1p8: pm8998-smps4 {
40 compatible = "regulator-fixed" 40 compatible = "regulator-fixed";
41 regulator-name = "vreg_s4a_1p8 41 regulator-name = "vreg_s4a_1p8";
42 42
43 regulator-min-microvolt = <180 43 regulator-min-microvolt = <1800000>;
44 regulator-max-microvolt = <180 44 regulator-max-microvolt = <1800000>;
45 45
46 regulator-always-on; 46 regulator-always-on;
47 regulator-boot-on; 47 regulator-boot-on;
48 48
49 vin-supply = <&vph_pwr>; 49 vin-supply = <&vph_pwr>;
50 }; 50 };
51 51
52 thermal-zones { 52 thermal-zones {
53 xo_thermal: xo-thermal { 53 xo_thermal: xo-thermal {
>> 54 polling-delay-passive = <0>;
>> 55 polling-delay = <0>;
>> 56
54 thermal-sensors = <&pm 57 thermal-sensors = <&pm8998_adc_tm 1>;
55 58
56 trips { 59 trips {
57 trip-point { 60 trip-point {
58 temper 61 temperature = <125000>;
59 hyster 62 hysteresis = <10000>;
60 type = 63 type = "passive";
61 }; 64 };
62 }; 65 };
63 }; 66 };
64 67
65 msm_thermal: msm-thermal { 68 msm_thermal: msm-thermal {
>> 69 polling-delay-passive = <0>;
>> 70 polling-delay = <0>;
>> 71
66 thermal-sensors = <&pm 72 thermal-sensors = <&pm8998_adc_tm 2>;
67 73
68 trips { 74 trips {
69 trip-point { 75 trip-point {
70 temper 76 temperature = <125000>;
71 hyster 77 hysteresis = <10000>;
72 type = 78 type = "passive";
73 }; 79 };
74 }; 80 };
75 }; 81 };
76 82
77 pa_thermal: pa-thermal { 83 pa_thermal: pa-thermal {
>> 84 polling-delay-passive = <0>;
>> 85 polling-delay = <0>;
>> 86
78 thermal-sensors = <&pm 87 thermal-sensors = <&pm8998_adc_tm 3>;
79 88
80 trips { 89 trips {
81 trip-point { 90 trip-point {
82 temper 91 temperature = <125000>;
83 hyster 92 hysteresis = <10000>;
84 type = 93 type = "passive";
85 }; 94 };
86 }; 95 };
87 }; 96 };
88 97
89 quiet_thermal: quiet-thermal { 98 quiet_thermal: quiet-thermal {
>> 99 polling-delay-passive = <0>;
>> 100 polling-delay = <0>;
>> 101
90 thermal-sensors = <&pm 102 thermal-sensors = <&pm8998_adc_tm 4>;
91 103
92 trips { 104 trips {
93 trip-point { 105 trip-point {
94 temper 106 temperature = <125000>;
95 hyster 107 hysteresis = <10000>;
96 type = 108 type = "passive";
97 }; 109 };
98 }; 110 };
99 }; 111 };
100 }; 112 };
101 }; 113 };
102 114
103 &adsp_pas { 115 &adsp_pas {
104 status = "okay"; 116 status = "okay";
105 firmware-name = "qcom/sdm845/adsp.mbn" 117 firmware-name = "qcom/sdm845/adsp.mbn";
106 }; 118 };
107 119
108 &apps_rsc { 120 &apps_rsc {
109 regulators-0 { 121 regulators-0 {
110 compatible = "qcom,pm8998-rpmh 122 compatible = "qcom,pm8998-rpmh-regulators";
111 qcom,pmic-id = "a"; 123 qcom,pmic-id = "a";
112 124
113 vdd-s1-supply = <&vph_pwr>; 125 vdd-s1-supply = <&vph_pwr>;
114 vdd-s2-supply = <&vph_pwr>; 126 vdd-s2-supply = <&vph_pwr>;
115 vdd-s3-supply = <&vph_pwr>; 127 vdd-s3-supply = <&vph_pwr>;
116 vdd-s4-supply = <&vph_pwr>; 128 vdd-s4-supply = <&vph_pwr>;
117 vdd-s5-supply = <&vph_pwr>; 129 vdd-s5-supply = <&vph_pwr>;
118 vdd-s6-supply = <&vph_pwr>; 130 vdd-s6-supply = <&vph_pwr>;
119 vdd-s7-supply = <&vph_pwr>; 131 vdd-s7-supply = <&vph_pwr>;
120 vdd-s8-supply = <&vph_pwr>; 132 vdd-s8-supply = <&vph_pwr>;
121 vdd-s9-supply = <&vph_pwr>; 133 vdd-s9-supply = <&vph_pwr>;
122 vdd-s10-supply = <&vph_pwr>; 134 vdd-s10-supply = <&vph_pwr>;
123 vdd-s11-supply = <&vph_pwr>; 135 vdd-s11-supply = <&vph_pwr>;
124 vdd-s12-supply = <&vph_pwr>; 136 vdd-s12-supply = <&vph_pwr>;
125 vdd-s13-supply = <&vph_pwr>; 137 vdd-s13-supply = <&vph_pwr>;
126 vdd-l1-l27-supply = <&vreg_s7a 138 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
127 vdd-l2-l8-l17-supply = <&vreg_ 139 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
128 vdd-l3-l11-supply = <&vreg_s7a 140 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
129 vdd-l4-l5-supply = <&vreg_s7a_ 141 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
130 vdd-l6-supply = <&vph_pwr>; 142 vdd-l6-supply = <&vph_pwr>;
131 vdd-l7-l12-l14-l15-supply = <& 143 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
132 vdd-l9-supply = <&vreg_bob>; 144 vdd-l9-supply = <&vreg_bob>;
133 vdd-l10-l23-l25-supply = <&vre 145 vdd-l10-l23-l25-supply = <&vreg_bob>;
134 vdd-l13-l19-l21-supply = <&vre 146 vdd-l13-l19-l21-supply = <&vreg_bob>;
135 vdd-l16-l28-supply = <&vreg_bo 147 vdd-l16-l28-supply = <&vreg_bob>;
136 vdd-l18-l22-supply = <&vreg_bo 148 vdd-l18-l22-supply = <&vreg_bob>;
137 vdd-l20-l24-supply = <&vreg_bo 149 vdd-l20-l24-supply = <&vreg_bob>;
138 vdd-l26-supply = <&vreg_s3a_1p 150 vdd-l26-supply = <&vreg_s3a_1p35>;
139 vin-lvs-1-2-supply = <&vreg_s4 151 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
140 152
141 vreg_s2a_1p125: smps2 { 153 vreg_s2a_1p125: smps2 {
142 regulator-min-microvol 154 regulator-min-microvolt = <1100000>;
143 regulator-max-microvol 155 regulator-max-microvolt = <1100000>;
144 }; 156 };
145 157
146 vreg_s3a_1p35: smps3 { 158 vreg_s3a_1p35: smps3 {
147 regulator-min-microvol 159 regulator-min-microvolt = <1352000>;
148 regulator-max-microvol 160 regulator-max-microvolt = <1352000>;
149 }; 161 };
150 162
151 vreg_s5a_2p04: smps5 { 163 vreg_s5a_2p04: smps5 {
152 regulator-min-microvol 164 regulator-min-microvolt = <1904000>;
153 regulator-max-microvol 165 regulator-max-microvolt = <2040000>;
154 }; 166 };
155 167
156 vreg_s7a_1p025: smps7 { 168 vreg_s7a_1p025: smps7 {
157 regulator-min-microvol 169 regulator-min-microvolt = <900000>;
158 regulator-max-microvol 170 regulator-max-microvolt = <1028000>;
159 }; 171 };
160 172
161 vdd_qusb_hs0: 173 vdd_qusb_hs0:
162 vdda_hp_pcie_core: 174 vdda_hp_pcie_core:
163 vdda_mipi_csi0_0p9: 175 vdda_mipi_csi0_0p9:
164 vdda_mipi_csi1_0p9: 176 vdda_mipi_csi1_0p9:
165 vdda_mipi_csi2_0p9: 177 vdda_mipi_csi2_0p9:
166 vdda_mipi_dsi0_pll: 178 vdda_mipi_dsi0_pll:
167 vdda_mipi_dsi1_pll: 179 vdda_mipi_dsi1_pll:
168 vdda_qlink_lv: 180 vdda_qlink_lv:
169 vdda_qlink_lv_ck: 181 vdda_qlink_lv_ck:
170 vdda_qrefs_0p875: 182 vdda_qrefs_0p875:
171 vdda_pcie_core: 183 vdda_pcie_core:
172 vdda_pll_cc_ebi01: 184 vdda_pll_cc_ebi01:
173 vdda_pll_cc_ebi23: 185 vdda_pll_cc_ebi23:
174 vdda_sp_sensor: 186 vdda_sp_sensor:
175 vdda_ufs1_core: 187 vdda_ufs1_core:
176 vdda_ufs2_core: 188 vdda_ufs2_core:
177 vdda_usb1_ss_core: 189 vdda_usb1_ss_core:
178 vdda_usb2_ss_core: 190 vdda_usb2_ss_core:
179 vreg_l1a_0p875: ldo1 { 191 vreg_l1a_0p875: ldo1 {
180 regulator-min-microvol 192 regulator-min-microvolt = <880000>;
181 regulator-max-microvol 193 regulator-max-microvolt = <880000>;
182 regulator-initial-mode 194 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
183 }; 195 };
184 196
185 vddpx_10: 197 vddpx_10:
186 vreg_l2a_1p2: ldo2 { 198 vreg_l2a_1p2: ldo2 {
187 regulator-min-microvol 199 regulator-min-microvolt = <1200000>;
188 regulator-max-microvol 200 regulator-max-microvolt = <1200000>;
189 regulator-initial-mode 201 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
190 regulator-always-on; 202 regulator-always-on;
191 }; 203 };
192 204
193 vreg_l3a_1p0: ldo3 { 205 vreg_l3a_1p0: ldo3 {
194 regulator-min-microvol 206 regulator-min-microvolt = <1000000>;
195 regulator-max-microvol 207 regulator-max-microvolt = <1000000>;
196 regulator-initial-mode 208 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
197 }; 209 };
198 210
199 vdd_wcss_cx: 211 vdd_wcss_cx:
200 vdd_wcss_mx: 212 vdd_wcss_mx:
201 vdda_wcss_pll: 213 vdda_wcss_pll:
202 vreg_l5a_0p8: ldo5 { 214 vreg_l5a_0p8: ldo5 {
203 regulator-min-microvol 215 regulator-min-microvolt = <800000>;
204 regulator-max-microvol 216 regulator-max-microvolt = <800000>;
205 regulator-initial-mode 217 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
206 }; 218 };
207 219
208 vddpx_13: 220 vddpx_13:
209 vreg_l6a_1p8: ldo6 { 221 vreg_l6a_1p8: ldo6 {
210 regulator-min-microvol 222 regulator-min-microvolt = <1856000>;
211 regulator-max-microvol 223 regulator-max-microvolt = <1856000>;
212 regulator-initial-mode 224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
213 }; 225 };
214 226
215 vreg_l7a_1p8: ldo7 { 227 vreg_l7a_1p8: ldo7 {
216 regulator-min-microvol 228 regulator-min-microvolt = <1800000>;
217 regulator-max-microvol 229 regulator-max-microvolt = <1800000>;
218 regulator-initial-mode 230 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219 }; 231 };
220 232
221 vreg_l8a_1p2: ldo8 { 233 vreg_l8a_1p2: ldo8 {
222 regulator-min-microvol 234 regulator-min-microvolt = <1200000>;
223 regulator-max-microvol 235 regulator-max-microvolt = <1248000>;
224 regulator-initial-mode 236 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 }; 237 };
226 238
227 vreg_l9a_1p8: ldo9 { 239 vreg_l9a_1p8: ldo9 {
228 regulator-min-microvol 240 regulator-min-microvolt = <1704000>;
229 regulator-max-microvol 241 regulator-max-microvolt = <2928000>;
230 regulator-initial-mode 242 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
231 }; 243 };
232 244
233 vreg_l10a_1p8: ldo10 { 245 vreg_l10a_1p8: ldo10 {
234 regulator-min-microvol 246 regulator-min-microvolt = <1704000>;
235 regulator-max-microvol 247 regulator-max-microvolt = <2928000>;
236 regulator-initial-mode 248 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
237 }; 249 };
238 250
239 vreg_l11a_1p0: ldo11 { 251 vreg_l11a_1p0: ldo11 {
240 regulator-min-microvol 252 regulator-min-microvolt = <1000000>;
241 regulator-max-microvol 253 regulator-max-microvolt = <1048000>;
242 regulator-initial-mode 254 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
243 }; 255 };
244 256
245 vdd_qfprom: 257 vdd_qfprom:
246 vdd_qfprom_sp: 258 vdd_qfprom_sp:
247 vdda_apc1_cs_1p8: 259 vdda_apc1_cs_1p8:
248 vdda_gfx_cs_1p8: 260 vdda_gfx_cs_1p8:
249 vdda_qrefs_1p8: 261 vdda_qrefs_1p8:
250 vdda_qusb_hs0_1p8: 262 vdda_qusb_hs0_1p8:
251 vddpx_11: 263 vddpx_11:
252 vreg_l12a_1p8: ldo12 { 264 vreg_l12a_1p8: ldo12 {
253 regulator-min-microvol 265 regulator-min-microvolt = <1800000>;
254 regulator-max-microvol 266 regulator-max-microvolt = <1800000>;
255 regulator-initial-mode 267 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
256 }; 268 };
257 269
258 vddpx_2: 270 vddpx_2:
259 vreg_l13a_2p95: ldo13 { 271 vreg_l13a_2p95: ldo13 {
260 regulator-min-microvol 272 regulator-min-microvolt = <1800000>;
261 regulator-max-microvol 273 regulator-max-microvolt = <2960000>;
262 regulator-initial-mode 274 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
263 }; 275 };
264 276
265 vreg_l14a_1p88: ldo14 { 277 vreg_l14a_1p88: ldo14 {
266 regulator-min-microvol 278 regulator-min-microvolt = <1800000>;
267 regulator-max-microvol 279 regulator-max-microvolt = <1800000>;
268 regulator-initial-mode 280 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269 }; 281 };
270 282
271 vreg_l15a_1p8: ldo15 { 283 vreg_l15a_1p8: ldo15 {
272 regulator-min-microvol 284 regulator-min-microvolt = <1800000>;
273 regulator-max-microvol 285 regulator-max-microvolt = <1800000>;
274 regulator-initial-mode 286 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
275 }; 287 };
276 288
277 vreg_l16a_2p7: ldo16 { 289 vreg_l16a_2p7: ldo16 {
278 regulator-min-microvol 290 regulator-min-microvolt = <2704000>;
279 regulator-max-microvol 291 regulator-max-microvolt = <2704000>;
280 regulator-initial-mode 292 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
281 }; 293 };
282 294
283 vreg_l17a_1p3: ldo17 { 295 vreg_l17a_1p3: ldo17 {
284 regulator-min-microvol 296 regulator-min-microvolt = <1304000>;
285 regulator-max-microvol 297 regulator-max-microvolt = <1304000>;
286 regulator-initial-mode 298 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287 }; 299 };
288 300
289 vreg_l18a_2p7: ldo18 { 301 vreg_l18a_2p7: ldo18 {
290 regulator-min-microvol 302 regulator-min-microvolt = <2704000>;
291 regulator-max-microvol 303 regulator-max-microvolt = <2960000>;
292 regulator-initial-mode 304 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
293 }; 305 };
294 306
295 vreg_l19a_3p0: ldo19 { 307 vreg_l19a_3p0: ldo19 {
296 regulator-min-microvol 308 regulator-min-microvolt = <2856000>;
297 regulator-max-microvol 309 regulator-max-microvolt = <3104000>;
298 regulator-initial-mode 310 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
299 }; 311 };
300 312
301 vreg_l20a_2p95: ldo20 { 313 vreg_l20a_2p95: ldo20 {
302 regulator-min-microvol 314 regulator-min-microvolt = <2704000>;
303 regulator-max-microvol 315 regulator-max-microvolt = <2960000>;
304 regulator-initial-mode 316 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305 }; 317 };
306 318
307 vreg_l21a_2p95: ldo21 { 319 vreg_l21a_2p95: ldo21 {
308 regulator-min-microvol 320 regulator-min-microvolt = <2704000>;
309 regulator-max-microvol 321 regulator-max-microvolt = <2960000>;
310 regulator-initial-mode 322 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
311 }; 323 };
312 324
313 vreg_l22a_2p85: ldo22 { 325 vreg_l22a_2p85: ldo22 {
314 regulator-min-microvol 326 regulator-min-microvolt = <2864000>;
315 regulator-max-microvol 327 regulator-max-microvolt = <3312000>;
316 regulator-initial-mode 328 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
317 }; 329 };
318 330
319 vreg_l23a_3p3: ldo23 { 331 vreg_l23a_3p3: ldo23 {
320 regulator-min-microvol 332 regulator-min-microvolt = <3000000>;
321 regulator-max-microvol 333 regulator-max-microvolt = <3312000>;
322 regulator-initial-mode 334 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
323 }; 335 };
324 336
325 vdda_qusb_hs0_3p1: 337 vdda_qusb_hs0_3p1:
326 vreg_l24a_3p075: ldo24 { 338 vreg_l24a_3p075: ldo24 {
327 regulator-min-microvol 339 regulator-min-microvolt = <3088000>;
328 regulator-max-microvol 340 regulator-max-microvolt = <3088000>;
329 regulator-initial-mode 341 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
330 }; 342 };
331 343
332 vreg_l25a_3p3: ldo25 { 344 vreg_l25a_3p3: ldo25 {
333 regulator-min-microvol 345 regulator-min-microvolt = <3300000>;
334 regulator-max-microvol 346 regulator-max-microvolt = <3312000>;
335 regulator-initial-mode 347 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
336 }; 348 };
337 349
338 vdda_hp_pcie_1p2: 350 vdda_hp_pcie_1p2:
339 vdda_hv_ebi0: 351 vdda_hv_ebi0:
340 vdda_hv_ebi1: 352 vdda_hv_ebi1:
341 vdda_hv_ebi2: 353 vdda_hv_ebi2:
342 vdda_hv_ebi3: 354 vdda_hv_ebi3:
343 vdda_mipi_csi_1p25: 355 vdda_mipi_csi_1p25:
344 vdda_mipi_dsi0_1p2: 356 vdda_mipi_dsi0_1p2:
345 vdda_mipi_dsi1_1p2: 357 vdda_mipi_dsi1_1p2:
346 vdda_pcie_1p2: 358 vdda_pcie_1p2:
347 vdda_ufs1_1p2: 359 vdda_ufs1_1p2:
348 vdda_ufs2_1p2: 360 vdda_ufs2_1p2:
349 vdda_usb1_ss_1p2: 361 vdda_usb1_ss_1p2:
350 vdda_usb2_ss_1p2: 362 vdda_usb2_ss_1p2:
351 vreg_l26a_1p2: ldo26 { 363 vreg_l26a_1p2: ldo26 {
352 regulator-min-microvol 364 regulator-min-microvolt = <1200000>;
353 regulator-max-microvol 365 regulator-max-microvolt = <1200000>;
354 regulator-initial-mode 366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 367 };
356 368
357 vreg_l28a_3p0: ldo28 { 369 vreg_l28a_3p0: ldo28 {
358 regulator-min-microvol 370 regulator-min-microvolt = <2856000>;
359 regulator-max-microvol 371 regulator-max-microvolt = <3008000>;
360 regulator-initial-mode 372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 373 };
362 374
363 vreg_lvs1a_1p8: lvs1 { 375 vreg_lvs1a_1p8: lvs1 {
364 regulator-min-microvol 376 regulator-min-microvolt = <1800000>;
365 regulator-max-microvol 377 regulator-max-microvolt = <1800000>;
366 }; 378 };
367 379
368 vreg_lvs2a_1p8: lvs2 { 380 vreg_lvs2a_1p8: lvs2 {
369 regulator-min-microvol 381 regulator-min-microvolt = <1800000>;
370 regulator-max-microvol 382 regulator-max-microvolt = <1800000>;
371 }; 383 };
372 }; 384 };
373 385
374 regulators-1 { 386 regulators-1 {
375 compatible = "qcom,pmi8998-rpm 387 compatible = "qcom,pmi8998-rpmh-regulators";
376 qcom,pmic-id = "b"; 388 qcom,pmic-id = "b";
377 389
378 vdd-bob-supply = <&vph_pwr>; 390 vdd-bob-supply = <&vph_pwr>;
379 391
380 vreg_bob: bob { 392 vreg_bob: bob {
381 regulator-min-microvol 393 regulator-min-microvolt = <3312000>;
382 regulator-max-microvol 394 regulator-max-microvolt = <3600000>;
383 regulator-initial-mode 395 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
384 regulator-allow-bypass 396 regulator-allow-bypass;
385 }; 397 };
386 }; 398 };
387 399
388 regulators-2 { 400 regulators-2 {
389 compatible = "qcom,pm8005-rpmh 401 compatible = "qcom,pm8005-rpmh-regulators";
390 qcom,pmic-id = "c"; 402 qcom,pmic-id = "c";
391 403
392 vdd-s1-supply = <&vph_pwr>; 404 vdd-s1-supply = <&vph_pwr>;
393 vdd-s2-supply = <&vph_pwr>; 405 vdd-s2-supply = <&vph_pwr>;
394 vdd-s3-supply = <&vph_pwr>; 406 vdd-s3-supply = <&vph_pwr>;
395 vdd-s4-supply = <&vph_pwr>; 407 vdd-s4-supply = <&vph_pwr>;
396 408
397 vreg_s3c_0p6: smps3 { 409 vreg_s3c_0p6: smps3 {
398 regulator-min-microvol 410 regulator-min-microvolt = <600000>;
399 regulator-max-microvol 411 regulator-max-microvolt = <600000>;
400 }; 412 };
401 }; 413 };
402 }; 414 };
403 415
404 &cdsp_pas { 416 &cdsp_pas {
405 status = "okay"; 417 status = "okay";
406 firmware-name = "qcom/sdm845/cdsp.mbn" 418 firmware-name = "qcom/sdm845/cdsp.mbn";
407 }; 419 };
408 420
409 &gcc { 421 &gcc {
410 protected-clocks = <GCC_QSPI_CORE_CLK> 422 protected-clocks = <GCC_QSPI_CORE_CLK>,
411 <GCC_QSPI_CORE_CLK_ 423 <GCC_QSPI_CORE_CLK_SRC>,
412 <GCC_QSPI_CNOC_PERI 424 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
413 <GCC_LPASS_Q6_AXI_C 425 <GCC_LPASS_Q6_AXI_CLK>,
414 <GCC_LPASS_SWAY_CLK 426 <GCC_LPASS_SWAY_CLK>;
415 }; 427 };
416 428
417 &gmu { 429 &gmu {
418 status = "okay"; 430 status = "okay";
419 }; 431 };
420 432
421 &gpu { 433 &gpu {
422 status = "okay"; 434 status = "okay";
423 435
424 zap-shader { 436 zap-shader {
425 memory-region = <&gpu_mem>; 437 memory-region = <&gpu_mem>;
426 firmware-name = "qcom/sdm845/a 438 firmware-name = "qcom/sdm845/a630_zap.mbn";
427 }; 439 };
428 }; 440 };
429 441
430 &i2c10 { 442 &i2c10 {
431 status = "okay"; 443 status = "okay";
432 clock-frequency = <400000>; 444 clock-frequency = <400000>;
433 }; 445 };
434 446
435 &ipa { 447 &ipa {
436 qcom,gsi-loader = "self"; 448 qcom,gsi-loader = "self";
437 memory-region = <&ipa_fw_mem>; 449 memory-region = <&ipa_fw_mem>;
438 status = "okay"; 450 status = "okay";
439 }; 451 };
440 452
441 &mdss { 453 &mdss {
442 status = "okay"; 454 status = "okay";
443 }; 455 };
444 456
445 &mdss_dsi0 { 457 &mdss_dsi0 {
446 status = "okay"; 458 status = "okay";
447 vdda-supply = <&vdda_mipi_dsi0_1p2>; 459 vdda-supply = <&vdda_mipi_dsi0_1p2>;
448 460
449 qcom,dual-dsi-mode; 461 qcom,dual-dsi-mode;
450 qcom,master-dsi; 462 qcom,master-dsi;
451 463
452 ports { 464 ports {
453 port@1 { 465 port@1 {
454 endpoint { 466 endpoint {
455 remote-endpoin 467 remote-endpoint = <&truly_in_0>;
456 data-lanes = < 468 data-lanes = <0 1 2 3>;
457 }; 469 };
458 }; 470 };
459 }; 471 };
460 472
461 panel@0 { 473 panel@0 {
462 compatible = "truly,nt35597-2K 474 compatible = "truly,nt35597-2K-display";
463 reg = <0>; 475 reg = <0>;
464 vdda-supply = <&vreg_l14a_1p88 476 vdda-supply = <&vreg_l14a_1p88>;
465 477
466 reset-gpios = <&tlmm 6 GPIO_AC 478 reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
467 mode-gpios = <&tlmm 52 GPIO_AC 479 mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
468 480
469 ports { 481 ports {
470 #address-cells = <1>; 482 #address-cells = <1>;
471 #size-cells = <0>; 483 #size-cells = <0>;
472 484
473 port@0 { 485 port@0 {
474 reg = <0>; 486 reg = <0>;
475 truly_in_0: en 487 truly_in_0: endpoint {
476 remote 488 remote-endpoint = <&mdss_dsi0_out>;
477 }; 489 };
478 }; 490 };
479 491
480 port@1 { 492 port@1 {
481 reg = <1>; 493 reg = <1>;
482 truly_in_1: en 494 truly_in_1: endpoint {
483 remote 495 remote-endpoint = <&mdss_dsi1_out>;
484 }; 496 };
485 }; 497 };
486 }; 498 };
487 }; 499 };
488 }; 500 };
489 501
490 &mdss_dsi0_phy { 502 &mdss_dsi0_phy {
491 status = "okay"; 503 status = "okay";
492 vdds-supply = <&vdda_mipi_dsi0_pll>; 504 vdds-supply = <&vdda_mipi_dsi0_pll>;
493 }; 505 };
494 506
495 &mdss_dsi1 { 507 &mdss_dsi1 {
496 status = "okay"; 508 status = "okay";
497 vdda-supply = <&vdda_mipi_dsi1_1p2>; 509 vdda-supply = <&vdda_mipi_dsi1_1p2>;
498 510
499 qcom,dual-dsi-mode; 511 qcom,dual-dsi-mode;
500 512
501 /* DSI1 is slave, so use DSI0 clocks * 513 /* DSI1 is slave, so use DSI0 clocks */
502 assigned-clock-parents = <&mdss_dsi0_p 514 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
503 515
504 ports { 516 ports {
505 port@1 { 517 port@1 {
506 endpoint { 518 endpoint {
507 remote-endpoin 519 remote-endpoint = <&truly_in_1>;
508 data-lanes = < 520 data-lanes = <0 1 2 3>;
509 }; 521 };
510 }; 522 };
511 }; 523 };
512 }; 524 };
513 525
514 &mdss_dsi1_phy { 526 &mdss_dsi1_phy {
515 status = "okay"; 527 status = "okay";
516 vdds-supply = <&vdda_mipi_dsi1_pll>; 528 vdds-supply = <&vdda_mipi_dsi1_pll>;
517 }; 529 };
518 530
519 &mss_pil { 531 &mss_pil {
520 status = "okay"; 532 status = "okay";
521 firmware-name = "qcom/sdm845/mba.mbn", 533 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
522 }; 534 };
523 535
524 &pcie0 { 536 &pcie0 {
525 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LO 537 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
526 538
527 pinctrl-0 = <&pcie0_default_state>; 539 pinctrl-0 = <&pcie0_default_state>;
528 pinctrl-names = "default"; 540 pinctrl-names = "default";
529 541
530 status = "okay"; 542 status = "okay";
531 }; 543 };
532 544
533 &pcie0_phy { 545 &pcie0_phy {
534 vdda-phy-supply = <&vreg_l1a_0p875>; 546 vdda-phy-supply = <&vreg_l1a_0p875>;
535 vdda-pll-supply = <&vreg_l26a_1p2>; 547 vdda-pll-supply = <&vreg_l26a_1p2>;
536 548
537 status = "okay"; 549 status = "okay";
538 }; 550 };
539 551
540 &pcie1 { 552 &pcie1 {
541 perst-gpios = <&tlmm 102 GPIO_ACTIVE_L 553 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
542 554
543 pinctrl-names = "default"; 555 pinctrl-names = "default";
544 pinctrl-0 = <&pcie1_default_state>; 556 pinctrl-0 = <&pcie1_default_state>;
545 557
546 status = "okay"; 558 status = "okay";
547 }; 559 };
548 560
549 &pcie1_phy { 561 &pcie1_phy {
550 status = "okay"; 562 status = "okay";
551 563
552 vdda-phy-supply = <&vreg_l1a_0p875>; 564 vdda-phy-supply = <&vreg_l1a_0p875>;
553 vdda-pll-supply = <&vreg_l26a_1p2>; 565 vdda-pll-supply = <&vreg_l26a_1p2>;
554 }; 566 };
555 567
556 &pm8998_adc { 568 &pm8998_adc {
557 channel@4c { 569 channel@4c {
558 reg = <ADC5_XO_THERM_100K_PU>; 570 reg = <ADC5_XO_THERM_100K_PU>;
559 label = "xo_therm"; 571 label = "xo_therm";
560 qcom,ratiometric; 572 qcom,ratiometric;
561 qcom,hw-settle-time = <200>; 573 qcom,hw-settle-time = <200>;
562 }; 574 };
563 575
564 channel@4d { 576 channel@4d {
565 reg = <ADC5_AMUX_THM1_100K_PU> 577 reg = <ADC5_AMUX_THM1_100K_PU>;
566 label = "msm_therm"; 578 label = "msm_therm";
567 qcom,ratiometric; 579 qcom,ratiometric;
568 qcom,hw-settle-time = <200>; 580 qcom,hw-settle-time = <200>;
569 }; 581 };
570 582
571 channel@4f { 583 channel@4f {
572 reg = <ADC5_AMUX_THM3_100K_PU> 584 reg = <ADC5_AMUX_THM3_100K_PU>;
573 label = "pa_therm1"; 585 label = "pa_therm1";
574 qcom,ratiometric; 586 qcom,ratiometric;
575 qcom,hw-settle-time = <200>; 587 qcom,hw-settle-time = <200>;
576 }; 588 };
577 589
578 channel@51 { 590 channel@51 {
579 reg = <ADC5_AMUX_THM5_100K_PU> 591 reg = <ADC5_AMUX_THM5_100K_PU>;
580 label = "quiet_therm"; 592 label = "quiet_therm";
581 qcom,ratiometric; 593 qcom,ratiometric;
582 qcom,hw-settle-time = <200>; 594 qcom,hw-settle-time = <200>;
583 }; 595 };
584 596
585 channel@83 { 597 channel@83 {
586 reg = <ADC5_VPH_PWR>; 598 reg = <ADC5_VPH_PWR>;
587 label = "vph_pwr"; 599 label = "vph_pwr";
588 qcom,ratiometric; 600 qcom,ratiometric;
589 qcom,hw-settle-time = <200>; 601 qcom,hw-settle-time = <200>;
590 }; 602 };
591 603
592 channel@85 { 604 channel@85 {
593 reg = <ADC5_VCOIN>; 605 reg = <ADC5_VCOIN>;
594 label = "vcoin"; 606 label = "vcoin";
595 qcom,ratiometric; 607 qcom,ratiometric;
596 qcom,hw-settle-time = <200>; 608 qcom,hw-settle-time = <200>;
597 }; 609 };
598 }; 610 };
599 611
600 &pm8998_adc_tm { 612 &pm8998_adc_tm {
601 status = "okay"; 613 status = "okay";
602 614
603 xo-thermistor@1 { 615 xo-thermistor@1 {
604 reg = <1>; 616 reg = <1>;
605 io-channels = <&pm8998_adc ADC 617 io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>;
606 qcom,ratiometric; 618 qcom,ratiometric;
607 qcom,hw-settle-time-us = <200> 619 qcom,hw-settle-time-us = <200>;
608 }; 620 };
609 621
610 msm-thermistor@2 { 622 msm-thermistor@2 {
611 reg = <2>; 623 reg = <2>;
612 io-channels = <&pm8998_adc ADC 624 io-channels = <&pm8998_adc ADC5_AMUX_THM1_100K_PU>;
613 qcom,ratiometric; 625 qcom,ratiometric;
614 qcom,hw-settle-time-us = <200> 626 qcom,hw-settle-time-us = <200>;
615 }; 627 };
616 628
617 pa-thermistor@3 { 629 pa-thermistor@3 {
618 reg = <3>; 630 reg = <3>;
619 io-channels = <&pm8998_adc ADC 631 io-channels = <&pm8998_adc ADC5_AMUX_THM3_100K_PU>;
620 qcom,ratiometric; 632 qcom,ratiometric;
621 qcom,hw-settle-time-us = <200> 633 qcom,hw-settle-time-us = <200>;
622 }; 634 };
623 635
624 quiet-thermistor@4 { 636 quiet-thermistor@4 {
625 reg = <4>; 637 reg = <4>;
626 io-channels = <&pm8998_adc ADC 638 io-channels = <&pm8998_adc ADC5_AMUX_THM5_100K_PU>;
627 qcom,ratiometric; 639 qcom,ratiometric;
628 qcom,hw-settle-time-us = <200> 640 qcom,hw-settle-time-us = <200>;
629 }; 641 };
630 }; 642 };
631 643
632 &pm8998_resin { 644 &pm8998_resin {
633 linux,code = <KEY_VOLUMEDOWN>; 645 linux,code = <KEY_VOLUMEDOWN>;
634 status = "okay"; 646 status = "okay";
635 }; 647 };
636 648
637 &qupv3_id_1 { 649 &qupv3_id_1 {
638 status = "okay"; 650 status = "okay";
639 }; 651 };
640 652
641 &sdhc_2 { 653 &sdhc_2 {
642 status = "okay"; 654 status = "okay";
643 655
644 pinctrl-names = "default"; 656 pinctrl-names = "default";
645 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2 657 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>;
646 658
647 vmmc-supply = <&vreg_l21a_2p95>; 659 vmmc-supply = <&vreg_l21a_2p95>;
648 vqmmc-supply = <&vddpx_2>; 660 vqmmc-supply = <&vddpx_2>;
649 661
650 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW> 662 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
651 }; 663 };
652 664
653 &tlmm { 665 &tlmm {
654 pcie0_default_state: pcie0-default-sta 666 pcie0_default_state: pcie0-default-state {
655 clkreq-pins { 667 clkreq-pins {
656 pins = "gpio36"; 668 pins = "gpio36";
657 function = "pci_e0"; 669 function = "pci_e0";
658 bias-pull-up; 670 bias-pull-up;
659 }; 671 };
660 672
661 perst-n-pins { 673 perst-n-pins {
662 pins = "gpio35"; 674 pins = "gpio35";
663 function = "gpio"; 675 function = "gpio";
664 drive-strength = <2>; 676 drive-strength = <2>;
665 bias-pull-down; 677 bias-pull-down;
666 }; 678 };
667 679
668 wake-n-pins { 680 wake-n-pins {
669 pins = "gpio37"; 681 pins = "gpio37";
670 function = "gpio"; 682 function = "gpio";
671 drive-strength = <2>; 683 drive-strength = <2>;
672 bias-pull-up; 684 bias-pull-up;
673 }; 685 };
674 }; 686 };
675 687
676 pcie1_default_state: pcie1-default-sta 688 pcie1_default_state: pcie1-default-state {
677 clkreq-pins { 689 clkreq-pins {
678 pins = "gpio103"; 690 pins = "gpio103";
679 function = "pci_e1"; 691 function = "pci_e1";
680 bias-pull-up; 692 bias-pull-up;
681 }; 693 };
682 694
683 perst-n-pins { 695 perst-n-pins {
684 pins = "gpio102"; 696 pins = "gpio102";
685 function = "gpio"; 697 function = "gpio";
686 drive-strength = <16>; 698 drive-strength = <16>;
687 bias-pull-down; 699 bias-pull-down;
688 }; 700 };
689 701
690 wake-n-pins { 702 wake-n-pins {
691 pins = "gpio104"; 703 pins = "gpio104";
692 function = "gpio"; 704 function = "gpio";
693 drive-strength = <2>; 705 drive-strength = <2>;
694 bias-pull-up; 706 bias-pull-up;
695 }; 707 };
696 }; 708 };
697 }; 709 };
698 710
699 &uart9 { 711 &uart9 {
700 status = "okay"; 712 status = "okay";
701 }; 713 };
702 714
703 &ufs_mem_hc { 715 &ufs_mem_hc {
704 status = "okay"; 716 status = "okay";
705 717
706 reset-gpios = <&tlmm 150 GPIO_ACTIVE_L 718 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
707 719
708 vcc-supply = <&vreg_l20a_2p95>; 720 vcc-supply = <&vreg_l20a_2p95>;
709 vcc-max-microamp = <600000>; 721 vcc-max-microamp = <600000>;
710 }; 722 };
711 723
712 &ufs_mem_phy { 724 &ufs_mem_phy {
713 status = "okay"; 725 status = "okay";
714 726
715 vdda-phy-supply = <&vdda_ufs1_core>; 727 vdda-phy-supply = <&vdda_ufs1_core>;
716 vdda-pll-supply = <&vdda_ufs1_1p2>; 728 vdda-pll-supply = <&vdda_ufs1_1p2>;
717 }; 729 };
718 730
719 &usb_1 { 731 &usb_1 {
720 status = "okay"; 732 status = "okay";
721 }; 733 };
722 734
723 &usb_1_dwc3 { 735 &usb_1_dwc3 {
724 /* Until we have Type C hooked up we'l 736 /* Until we have Type C hooked up we'll force this as peripheral. */
725 dr_mode = "peripheral"; 737 dr_mode = "peripheral";
726 }; 738 };
727 739
728 &usb_1_hsphy { 740 &usb_1_hsphy {
729 status = "okay"; 741 status = "okay";
730 742
731 vdd-supply = <&vdda_usb1_ss_core>; 743 vdd-supply = <&vdda_usb1_ss_core>;
732 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 744 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
733 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 745 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
734 746
735 qcom,imp-res-offset-value = <8>; 747 qcom,imp-res-offset-value = <8>;
736 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 748 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
737 qcom,preemphasis-level = <QUSB2_V2_PRE 749 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
738 qcom,preemphasis-width = <QUSB2_V2_PRE 750 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
739 }; 751 };
740 752
741 &usb_1_qmpphy { 753 &usb_1_qmpphy {
742 status = "okay"; 754 status = "okay";
743 755
744 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 756 vdda-phy-supply = <&vdda_usb1_ss_1p2>;
745 vdda-pll-supply = <&vdda_usb1_ss_core> 757 vdda-pll-supply = <&vdda_usb1_ss_core>;
746 }; 758 };
747 759
748 &usb_2 { 760 &usb_2 {
749 status = "okay"; 761 status = "okay";
750 }; 762 };
751 763
752 &usb_2_dwc3 { 764 &usb_2_dwc3 {
753 /* 765 /*
754 * Though the USB block on SDM845 can 766 * Though the USB block on SDM845 can support host, there's no vbus
755 * signal for this port on MTP. Thus 767 * signal for this port on MTP. Thus (unless you have a non-compliant
756 * hub that works without vbus) the on 768 * hub that works without vbus) the only sensible thing is to force
757 * peripheral mode. 769 * peripheral mode.
758 */ 770 */
759 dr_mode = "peripheral"; 771 dr_mode = "peripheral";
760 }; 772 };
761 773
762 &usb_2_hsphy { 774 &usb_2_hsphy {
763 status = "okay"; 775 status = "okay";
764 776
765 vdd-supply = <&vdda_usb2_ss_core>; 777 vdd-supply = <&vdda_usb2_ss_core>;
766 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 778 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
767 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 779 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
768 780
769 qcom,imp-res-offset-value = <8>; 781 qcom,imp-res-offset-value = <8>;
770 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 782 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
771 }; 783 };
772 784
773 &usb_2_qmpphy { 785 &usb_2_qmpphy {
774 status = "okay"; 786 status = "okay";
775 787
776 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 788 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
777 vdda-pll-supply = <&vdda_usb2_ss_core> 789 vdda-pll-supply = <&vdda_usb2_ss_core>;
778 }; 790 };
779 791
780 &venus { 792 &venus {
781 status = "okay"; 793 status = "okay";
782 }; 794 };
783 795
784 &wifi { 796 &wifi {
785 status = "okay"; 797 status = "okay";
786 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8> 798 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
787 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 799 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
788 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 800 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
789 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 801 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
790 802
791 qcom,snoc-host-cap-8bit-quirk; 803 qcom,snoc-host-cap-8bit-quirk;
792 qcom,ath10k-calibration-variant = "Qua 804 qcom,ath10k-calibration-variant = "Qualcomm_sdm845mtp";
793 }; 805 };
794 806
795 /* PINCTRL - additions to nodes defined in sdm 807 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
796 808
797 &qup_i2c10_default { 809 &qup_i2c10_default {
798 drive-strength = <2>; 810 drive-strength = <2>;
799 bias-disable; 811 bias-disable;
800 }; 812 };
801 813
802 &qup_uart9_rx { 814 &qup_uart9_rx {
803 drive-strength = <2>; 815 drive-strength = <2>;
804 bias-pull-up; 816 bias-pull-up;
805 }; 817 };
806 818
807 &qup_uart9_tx { 819 &qup_uart9_tx {
808 drive-strength = <2>; 820 drive-strength = <2>;
809 bias-disable; 821 bias-disable;
810 }; 822 };
811 823
812 &tlmm { 824 &tlmm {
813 gpio-reserved-ranges = <0 4>, <81 4>; 825 gpio-reserved-ranges = <0 4>, <81 4>;
814 826
815 sdc2_clk: sdc2-clk-state { 827 sdc2_clk: sdc2-clk-state {
816 pins = "sdc2_clk"; 828 pins = "sdc2_clk";
817 bias-disable; 829 bias-disable;
818 830
819 /* 831 /*
820 * It seems that mmc_test repo 832 * It seems that mmc_test reports errors if drive
821 * strength is not 16 on clk, 833 * strength is not 16 on clk, cmd, and data pins.
822 */ 834 */
823 drive-strength = <16>; 835 drive-strength = <16>;
824 }; 836 };
825 837
826 sdc2_cmd: sdc2-cmd-state { 838 sdc2_cmd: sdc2-cmd-state {
827 pins = "sdc2_cmd"; 839 pins = "sdc2_cmd";
828 bias-pull-up; 840 bias-pull-up;
829 drive-strength = <16>; 841 drive-strength = <16>;
830 }; 842 };
831 843
832 sdc2_data: sdc2-data-state { 844 sdc2_data: sdc2-data-state {
833 pins = "sdc2_data"; 845 pins = "sdc2_data";
834 bias-pull-up; 846 bias-pull-up;
835 drive-strength = <16>; 847 drive-strength = <16>;
836 }; 848 };
837 849
838 sd_card_det_n: sd-card-det-n-state { 850 sd_card_det_n: sd-card-det-n-state {
839 pins = "gpio126"; 851 pins = "gpio126";
840 function = "gpio"; 852 function = "gpio";
841 bias-pull-up; 853 bias-pull-up;
842 }; 854 };
843 }; 855 };
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