~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm64/qcom/sdm845.dtsi

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/qcom/sdm845.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/qcom/sdm845.dtsi (Version policy-sample)


  1 // SPDX-License-Identifier: GPL-2.0               
  2 /*                                                
  3  * SDM845 SoC device tree source                  
  4  *                                                
  5  * Copyright (c) 2018, The Linux Foundation. A    
  6  */                                               
  7                                                   
  8 #include <dt-bindings/clock/qcom,camcc-sdm845.    
  9 #include <dt-bindings/clock/qcom,dispcc-sdm845    
 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>    
 11 #include <dt-bindings/clock/qcom,gpucc-sdm845.    
 12 #include <dt-bindings/clock/qcom,lpass-sdm845.    
 13 #include <dt-bindings/clock/qcom,rpmh.h>          
 14 #include <dt-bindings/clock/qcom,videocc-sdm84    
 15 #include <dt-bindings/dma/qcom-gpi.h>             
 16 #include <dt-bindings/firmware/qcom,scm.h>        
 17 #include <dt-bindings/gpio/gpio.h>                
 18 #include <dt-bindings/interconnect/qcom,icc.h>    
 19 #include <dt-bindings/interconnect/qcom,osm-l3    
 20 #include <dt-bindings/interconnect/qcom,sdm845    
 21 #include <dt-bindings/interrupt-controller/arm    
 22 #include <dt-bindings/phy/phy-qcom-qmp.h>         
 23 #include <dt-bindings/phy/phy-qcom-qusb2.h>       
 24 #include <dt-bindings/power/qcom-rpmpd.h>         
 25 #include <dt-bindings/reset/qcom,sdm845-aoss.h    
 26 #include <dt-bindings/reset/qcom,sdm845-pdc.h>    
 27 #include <dt-bindings/soc/qcom,apr.h>             
 28 #include <dt-bindings/soc/qcom,rpmh-rsc.h>        
 29 #include <dt-bindings/clock/qcom,gcc-sdm845.h>    
 30 #include <dt-bindings/thermal/thermal.h>          
 31                                                   
 32 / {                                               
 33         interrupt-parent = <&intc>;               
 34                                                   
 35         #address-cells = <2>;                     
 36         #size-cells = <2>;                        
 37                                                   
 38         aliases {                                 
 39                 i2c0 = &i2c0;                     
 40                 i2c1 = &i2c1;                     
 41                 i2c2 = &i2c2;                     
 42                 i2c3 = &i2c3;                     
 43                 i2c4 = &i2c4;                     
 44                 i2c5 = &i2c5;                     
 45                 i2c6 = &i2c6;                     
 46                 i2c7 = &i2c7;                     
 47                 i2c8 = &i2c8;                     
 48                 i2c9 = &i2c9;                     
 49                 i2c10 = &i2c10;                   
 50                 i2c11 = &i2c11;                   
 51                 i2c12 = &i2c12;                   
 52                 i2c13 = &i2c13;                   
 53                 i2c14 = &i2c14;                   
 54                 i2c15 = &i2c15;                   
 55                 spi0 = &spi0;                     
 56                 spi1 = &spi1;                     
 57                 spi2 = &spi2;                     
 58                 spi3 = &spi3;                     
 59                 spi4 = &spi4;                     
 60                 spi5 = &spi5;                     
 61                 spi6 = &spi6;                     
 62                 spi7 = &spi7;                     
 63                 spi8 = &spi8;                     
 64                 spi9 = &spi9;                     
 65                 spi10 = &spi10;                   
 66                 spi11 = &spi11;                   
 67                 spi12 = &spi12;                   
 68                 spi13 = &spi13;                   
 69                 spi14 = &spi14;                   
 70                 spi15 = &spi15;                   
 71         };                                        
 72                                                   
 73         chosen { };                               
 74                                                   
 75         clocks {                                  
 76                 xo_board: xo-board {              
 77                         compatible = "fixed-cl    
 78                         #clock-cells = <0>;       
 79                         clock-frequency = <384    
 80                         clock-output-names = "    
 81                 };                                
 82                                                   
 83                 sleep_clk: sleep-clk {            
 84                         compatible = "fixed-cl    
 85                         #clock-cells = <0>;       
 86                         clock-frequency = <327    
 87                 };                                
 88         };                                        
 89                                                   
 90         cpus: cpus {                              
 91                 #address-cells = <2>;             
 92                 #size-cells = <0>;                
 93                                                   
 94                 CPU0: cpu@0 {                     
 95                         device_type = "cpu";      
 96                         compatible = "qcom,kry    
 97                         reg = <0x0 0x0>;          
 98                         clocks = <&cpufreq_hw     
 99                         enable-method = "psci"    
100                         capacity-dmips-mhz = <    
101                         dynamic-power-coeffici    
102                         qcom,freq-domain = <&c    
103                         operating-points-v2 =     
104                         interconnects = <&glad    
105                                         <&osm_    
106                         power-domains = <&CPU_    
107                         power-domain-names = "    
108                         #cooling-cells = <2>;     
109                         next-level-cache = <&L    
110                         L2_0: l2-cache {          
111                                 compatible = "    
112                                 cache-level =     
113                                 cache-unified;    
114                                 next-level-cac    
115                                 L3_0: l3-cache    
116                                         compat    
117                                         cache-    
118                                         cache-    
119                                 };                
120                         };                        
121                 };                                
122                                                   
123                 CPU1: cpu@100 {                   
124                         device_type = "cpu";      
125                         compatible = "qcom,kry    
126                         reg = <0x0 0x100>;        
127                         clocks = <&cpufreq_hw     
128                         enable-method = "psci"    
129                         capacity-dmips-mhz = <    
130                         dynamic-power-coeffici    
131                         qcom,freq-domain = <&c    
132                         operating-points-v2 =     
133                         interconnects = <&glad    
134                                         <&osm_    
135                         power-domains = <&CPU_    
136                         power-domain-names = "    
137                         #cooling-cells = <2>;     
138                         next-level-cache = <&L    
139                         L2_100: l2-cache {        
140                                 compatible = "    
141                                 cache-level =     
142                                 cache-unified;    
143                                 next-level-cac    
144                         };                        
145                 };                                
146                                                   
147                 CPU2: cpu@200 {                   
148                         device_type = "cpu";      
149                         compatible = "qcom,kry    
150                         reg = <0x0 0x200>;        
151                         clocks = <&cpufreq_hw     
152                         enable-method = "psci"    
153                         capacity-dmips-mhz = <    
154                         dynamic-power-coeffici    
155                         qcom,freq-domain = <&c    
156                         operating-points-v2 =     
157                         interconnects = <&glad    
158                                         <&osm_    
159                         power-domains = <&CPU_    
160                         power-domain-names = "    
161                         #cooling-cells = <2>;     
162                         next-level-cache = <&L    
163                         L2_200: l2-cache {        
164                                 compatible = "    
165                                 cache-level =     
166                                 cache-unified;    
167                                 next-level-cac    
168                         };                        
169                 };                                
170                                                   
171                 CPU3: cpu@300 {                   
172                         device_type = "cpu";      
173                         compatible = "qcom,kry    
174                         reg = <0x0 0x300>;        
175                         clocks = <&cpufreq_hw     
176                         enable-method = "psci"    
177                         capacity-dmips-mhz = <    
178                         dynamic-power-coeffici    
179                         qcom,freq-domain = <&c    
180                         operating-points-v2 =     
181                         interconnects = <&glad    
182                                         <&osm_    
183                         #cooling-cells = <2>;     
184                         power-domains = <&CPU_    
185                         power-domain-names = "    
186                         next-level-cache = <&L    
187                         L2_300: l2-cache {        
188                                 compatible = "    
189                                 cache-level =     
190                                 cache-unified;    
191                                 next-level-cac    
192                         };                        
193                 };                                
194                                                   
195                 CPU4: cpu@400 {                   
196                         device_type = "cpu";      
197                         compatible = "qcom,kry    
198                         reg = <0x0 0x400>;        
199                         clocks = <&cpufreq_hw     
200                         enable-method = "psci"    
201                         capacity-dmips-mhz = <    
202                         dynamic-power-coeffici    
203                         qcom,freq-domain = <&c    
204                         operating-points-v2 =     
205                         interconnects = <&glad    
206                                         <&osm_    
207                         power-domains = <&CPU_    
208                         power-domain-names = "    
209                         #cooling-cells = <2>;     
210                         next-level-cache = <&L    
211                         L2_400: l2-cache {        
212                                 compatible = "    
213                                 cache-level =     
214                                 cache-unified;    
215                                 next-level-cac    
216                         };                        
217                 };                                
218                                                   
219                 CPU5: cpu@500 {                   
220                         device_type = "cpu";      
221                         compatible = "qcom,kry    
222                         reg = <0x0 0x500>;        
223                         clocks = <&cpufreq_hw     
224                         enable-method = "psci"    
225                         capacity-dmips-mhz = <    
226                         dynamic-power-coeffici    
227                         qcom,freq-domain = <&c    
228                         operating-points-v2 =     
229                         interconnects = <&glad    
230                                         <&osm_    
231                         power-domains = <&CPU_    
232                         power-domain-names = "    
233                         #cooling-cells = <2>;     
234                         next-level-cache = <&L    
235                         L2_500: l2-cache {        
236                                 compatible = "    
237                                 cache-level =     
238                                 cache-unified;    
239                                 next-level-cac    
240                         };                        
241                 };                                
242                                                   
243                 CPU6: cpu@600 {                   
244                         device_type = "cpu";      
245                         compatible = "qcom,kry    
246                         reg = <0x0 0x600>;        
247                         clocks = <&cpufreq_hw     
248                         enable-method = "psci"    
249                         capacity-dmips-mhz = <    
250                         dynamic-power-coeffici    
251                         qcom,freq-domain = <&c    
252                         operating-points-v2 =     
253                         interconnects = <&glad    
254                                         <&osm_    
255                         power-domains = <&CPU_    
256                         power-domain-names = "    
257                         #cooling-cells = <2>;     
258                         next-level-cache = <&L    
259                         L2_600: l2-cache {        
260                                 compatible = "    
261                                 cache-level =     
262                                 cache-unified;    
263                                 next-level-cac    
264                         };                        
265                 };                                
266                                                   
267                 CPU7: cpu@700 {                   
268                         device_type = "cpu";      
269                         compatible = "qcom,kry    
270                         reg = <0x0 0x700>;        
271                         clocks = <&cpufreq_hw     
272                         enable-method = "psci"    
273                         capacity-dmips-mhz = <    
274                         dynamic-power-coeffici    
275                         qcom,freq-domain = <&c    
276                         operating-points-v2 =     
277                         interconnects = <&glad    
278                                         <&osm_    
279                         power-domains = <&CPU_    
280                         power-domain-names = "    
281                         #cooling-cells = <2>;     
282                         next-level-cache = <&L    
283                         L2_700: l2-cache {        
284                                 compatible = "    
285                                 cache-level =     
286                                 cache-unified;    
287                                 next-level-cac    
288                         };                        
289                 };                                
290                                                   
291                 cpu-map {                         
292                         cluster0 {                
293                                 core0 {           
294                                         cpu =     
295                                 };                
296                                                   
297                                 core1 {           
298                                         cpu =     
299                                 };                
300                                                   
301                                 core2 {           
302                                         cpu =     
303                                 };                
304                                                   
305                                 core3 {           
306                                         cpu =     
307                                 };                
308                                                   
309                                 core4 {           
310                                         cpu =     
311                                 };                
312                                                   
313                                 core5 {           
314                                         cpu =     
315                                 };                
316                                                   
317                                 core6 {           
318                                         cpu =     
319                                 };                
320                                                   
321                                 core7 {           
322                                         cpu =     
323                                 };                
324                         };                        
325                 };                                
326                                                   
327                 cpu_idle_states: idle-states {    
328                         entry-method = "psci";    
329                                                   
330                         LITTLE_CPU_SLEEP_0: cp    
331                                 compatible = "    
332                                 idle-state-nam    
333                                 arm,psci-suspe    
334                                 entry-latency-    
335                                 exit-latency-u    
336                                 min-residency-    
337                                 local-timer-st    
338                         };                        
339                                                   
340                         BIG_CPU_SLEEP_0: cpu-s    
341                                 compatible = "    
342                                 idle-state-nam    
343                                 arm,psci-suspe    
344                                 entry-latency-    
345                                 exit-latency-u    
346                                 min-residency-    
347                                 local-timer-st    
348                         };                        
349                 };                                
350                                                   
351                 domain-idle-states {              
352                         CLUSTER_SLEEP_0: clust    
353                                 compatible = "    
354                                 arm,psci-suspe    
355                                 entry-latency-    
356                                 exit-latency-u    
357                                 min-residency-    
358                         };                        
359                 };                                
360         };                                        
361                                                   
362         firmware {                                
363                 scm {                             
364                         compatible = "qcom,scm    
365                 };                                
366         };                                        
367                                                   
368         memory@80000000 {                         
369                 device_type = "memory";           
370                 /* We expect the bootloader to    
371                 reg = <0 0x80000000 0 0>;         
372         };                                        
373                                                   
374         cpu0_opp_table: opp-table-cpu0 {          
375                 compatible = "operating-points    
376                 opp-shared;                       
377                                                   
378                 cpu0_opp1: opp-300000000 {        
379                         opp-hz = /bits/ 64 <30    
380                         opp-peak-kBps = <80000    
381                 };                                
382                                                   
383                 cpu0_opp2: opp-403200000 {        
384                         opp-hz = /bits/ 64 <40    
385                         opp-peak-kBps = <80000    
386                 };                                
387                                                   
388                 cpu0_opp3: opp-480000000 {        
389                         opp-hz = /bits/ 64 <48    
390                         opp-peak-kBps = <80000    
391                 };                                
392                                                   
393                 cpu0_opp4: opp-576000000 {        
394                         opp-hz = /bits/ 64 <57    
395                         opp-peak-kBps = <80000    
396                 };                                
397                                                   
398                 cpu0_opp5: opp-652800000 {        
399                         opp-hz = /bits/ 64 <65    
400                         opp-peak-kBps = <80000    
401                 };                                
402                                                   
403                 cpu0_opp6: opp-748800000 {        
404                         opp-hz = /bits/ 64 <74    
405                         opp-peak-kBps = <18040    
406                 };                                
407                                                   
408                 cpu0_opp7: opp-825600000 {        
409                         opp-hz = /bits/ 64 <82    
410                         opp-peak-kBps = <18040    
411                 };                                
412                                                   
413                 cpu0_opp8: opp-902400000 {        
414                         opp-hz = /bits/ 64 <90    
415                         opp-peak-kBps = <18040    
416                 };                                
417                                                   
418                 cpu0_opp9: opp-979200000 {        
419                         opp-hz = /bits/ 64 <97    
420                         opp-peak-kBps = <18040    
421                 };                                
422                                                   
423                 cpu0_opp10: opp-1056000000 {      
424                         opp-hz = /bits/ 64 <10    
425                         opp-peak-kBps = <18040    
426                 };                                
427                                                   
428                 cpu0_opp11: opp-1132800000 {      
429                         opp-hz = /bits/ 64 <11    
430                         opp-peak-kBps = <21880    
431                 };                                
432                                                   
433                 cpu0_opp12: opp-1228800000 {      
434                         opp-hz = /bits/ 64 <12    
435                         opp-peak-kBps = <21880    
436                 };                                
437                                                   
438                 cpu0_opp13: opp-1324800000 {      
439                         opp-hz = /bits/ 64 <13    
440                         opp-peak-kBps = <21880    
441                 };                                
442                                                   
443                 cpu0_opp14: opp-1420800000 {      
444                         opp-hz = /bits/ 64 <14    
445                         opp-peak-kBps = <30720    
446                 };                                
447                                                   
448                 cpu0_opp15: opp-1516800000 {      
449                         opp-hz = /bits/ 64 <15    
450                         opp-peak-kBps = <30720    
451                 };                                
452                                                   
453                 cpu0_opp16: opp-1612800000 {      
454                         opp-hz = /bits/ 64 <16    
455                         opp-peak-kBps = <40680    
456                 };                                
457                                                   
458                 cpu0_opp17: opp-1689600000 {      
459                         opp-hz = /bits/ 64 <16    
460                         opp-peak-kBps = <40680    
461                 };                                
462                                                   
463                 cpu0_opp18: opp-1766400000 {      
464                         opp-hz = /bits/ 64 <17    
465                         opp-peak-kBps = <40680    
466                 };                                
467         };                                        
468                                                   
469         cpu4_opp_table: opp-table-cpu4 {          
470                 compatible = "operating-points    
471                 opp-shared;                       
472                                                   
473                 cpu4_opp1: opp-300000000 {        
474                         opp-hz = /bits/ 64 <30    
475                         opp-peak-kBps = <80000    
476                 };                                
477                                                   
478                 cpu4_opp2: opp-403200000 {        
479                         opp-hz = /bits/ 64 <40    
480                         opp-peak-kBps = <80000    
481                 };                                
482                                                   
483                 cpu4_opp3: opp-480000000 {        
484                         opp-hz = /bits/ 64 <48    
485                         opp-peak-kBps = <18040    
486                 };                                
487                                                   
488                 cpu4_opp4: opp-576000000 {        
489                         opp-hz = /bits/ 64 <57    
490                         opp-peak-kBps = <18040    
491                 };                                
492                                                   
493                 cpu4_opp5: opp-652800000 {        
494                         opp-hz = /bits/ 64 <65    
495                         opp-peak-kBps = <18040    
496                 };                                
497                                                   
498                 cpu4_opp6: opp-748800000 {        
499                         opp-hz = /bits/ 64 <74    
500                         opp-peak-kBps = <18040    
501                 };                                
502                                                   
503                 cpu4_opp7: opp-825600000 {        
504                         opp-hz = /bits/ 64 <82    
505                         opp-peak-kBps = <21880    
506                 };                                
507                                                   
508                 cpu4_opp8: opp-902400000 {        
509                         opp-hz = /bits/ 64 <90    
510                         opp-peak-kBps = <21880    
511                 };                                
512                                                   
513                 cpu4_opp9: opp-979200000 {        
514                         opp-hz = /bits/ 64 <97    
515                         opp-peak-kBps = <21880    
516                 };                                
517                                                   
518                 cpu4_opp10: opp-1056000000 {      
519                         opp-hz = /bits/ 64 <10    
520                         opp-peak-kBps = <30720    
521                 };                                
522                                                   
523                 cpu4_opp11: opp-1132800000 {      
524                         opp-hz = /bits/ 64 <11    
525                         opp-peak-kBps = <30720    
526                 };                                
527                                                   
528                 cpu4_opp12: opp-1209600000 {      
529                         opp-hz = /bits/ 64 <12    
530                         opp-peak-kBps = <40680    
531                 };                                
532                                                   
533                 cpu4_opp13: opp-1286400000 {      
534                         opp-hz = /bits/ 64 <12    
535                         opp-peak-kBps = <40680    
536                 };                                
537                                                   
538                 cpu4_opp14: opp-1363200000 {      
539                         opp-hz = /bits/ 64 <13    
540                         opp-peak-kBps = <40680    
541                 };                                
542                                                   
543                 cpu4_opp15: opp-1459200000 {      
544                         opp-hz = /bits/ 64 <14    
545                         opp-peak-kBps = <40680    
546                 };                                
547                                                   
548                 cpu4_opp16: opp-1536000000 {      
549                         opp-hz = /bits/ 64 <15    
550                         opp-peak-kBps = <54120    
551                 };                                
552                                                   
553                 cpu4_opp17: opp-1612800000 {      
554                         opp-hz = /bits/ 64 <16    
555                         opp-peak-kBps = <54120    
556                 };                                
557                                                   
558                 cpu4_opp18: opp-1689600000 {      
559                         opp-hz = /bits/ 64 <16    
560                         opp-peak-kBps = <54120    
561                 };                                
562                                                   
563                 cpu4_opp19: opp-1766400000 {      
564                         opp-hz = /bits/ 64 <17    
565                         opp-peak-kBps = <62200    
566                 };                                
567                                                   
568                 cpu4_opp20: opp-1843200000 {      
569                         opp-hz = /bits/ 64 <18    
570                         opp-peak-kBps = <62200    
571                 };                                
572                                                   
573                 cpu4_opp21: opp-1920000000 {      
574                         opp-hz = /bits/ 64 <19    
575                         opp-peak-kBps = <72160    
576                 };                                
577                                                   
578                 cpu4_opp22: opp-1996800000 {      
579                         opp-hz = /bits/ 64 <19    
580                         opp-peak-kBps = <72160    
581                 };                                
582                                                   
583                 cpu4_opp23: opp-2092800000 {      
584                         opp-hz = /bits/ 64 <20    
585                         opp-peak-kBps = <72160    
586                 };                                
587                                                   
588                 cpu4_opp24: opp-2169600000 {      
589                         opp-hz = /bits/ 64 <21    
590                         opp-peak-kBps = <72160    
591                 };                                
592                                                   
593                 cpu4_opp25: opp-2246400000 {      
594                         opp-hz = /bits/ 64 <22    
595                         opp-peak-kBps = <72160    
596                 };                                
597                                                   
598                 cpu4_opp26: opp-2323200000 {      
599                         opp-hz = /bits/ 64 <23    
600                         opp-peak-kBps = <72160    
601                 };                                
602                                                   
603                 cpu4_opp27: opp-2400000000 {      
604                         opp-hz = /bits/ 64 <24    
605                         opp-peak-kBps = <72160    
606                 };                                
607                                                   
608                 cpu4_opp28: opp-2476800000 {      
609                         opp-hz = /bits/ 64 <24    
610                         opp-peak-kBps = <72160    
611                 };                                
612                                                   
613                 cpu4_opp29: opp-2553600000 {      
614                         opp-hz = /bits/ 64 <25    
615                         opp-peak-kBps = <72160    
616                 };                                
617                                                   
618                 cpu4_opp30: opp-2649600000 {      
619                         opp-hz = /bits/ 64 <26    
620                         opp-peak-kBps = <72160    
621                 };                                
622                                                   
623                 cpu4_opp31: opp-2745600000 {      
624                         opp-hz = /bits/ 64 <27    
625                         opp-peak-kBps = <72160    
626                 };                                
627                                                   
628                 cpu4_opp32: opp-2803200000 {      
629                         opp-hz = /bits/ 64 <28    
630                         opp-peak-kBps = <72160    
631                 };                                
632         };                                        
633                                                   
634         dsi_opp_table: opp-table-dsi {            
635                 compatible = "operating-points    
636                                                   
637                 opp-19200000 {                    
638                         opp-hz = /bits/ 64 <19    
639                         required-opps = <&rpmh    
640                 };                                
641                                                   
642                 opp-180000000 {                   
643                         opp-hz = /bits/ 64 <18    
644                         required-opps = <&rpmh    
645                 };                                
646                                                   
647                 opp-275000000 {                   
648                         opp-hz = /bits/ 64 <27    
649                         required-opps = <&rpmh    
650                 };                                
651                                                   
652                 opp-328580000 {                   
653                         opp-hz = /bits/ 64 <32    
654                         required-opps = <&rpmh    
655                 };                                
656                                                   
657                 opp-358000000 {                   
658                         opp-hz = /bits/ 64 <35    
659                         required-opps = <&rpmh    
660                 };                                
661         };                                        
662                                                   
663         qspi_opp_table: opp-table-qspi {          
664                 compatible = "operating-points    
665                                                   
666                 opp-19200000 {                    
667                         opp-hz = /bits/ 64 <19    
668                         required-opps = <&rpmh    
669                 };                                
670                                                   
671                 opp-100000000 {                   
672                         opp-hz = /bits/ 64 <10    
673                         required-opps = <&rpmh    
674                 };                                
675                                                   
676                 opp-150000000 {                   
677                         opp-hz = /bits/ 64 <15    
678                         required-opps = <&rpmh    
679                 };                                
680                                                   
681                 opp-300000000 {                   
682                         opp-hz = /bits/ 64 <30    
683                         required-opps = <&rpmh    
684                 };                                
685         };                                        
686                                                   
687         qup_opp_table: opp-table-qup {            
688                 compatible = "operating-points    
689                                                   
690                 opp-50000000 {                    
691                         opp-hz = /bits/ 64 <50    
692                         required-opps = <&rpmh    
693                 };                                
694                                                   
695                 opp-75000000 {                    
696                         opp-hz = /bits/ 64 <75    
697                         required-opps = <&rpmh    
698                 };                                
699                                                   
700                 opp-100000000 {                   
701                         opp-hz = /bits/ 64 <10    
702                         required-opps = <&rpmh    
703                 };                                
704                                                   
705                 opp-128000000 {                   
706                         opp-hz = /bits/ 64 <12    
707                         required-opps = <&rpmh    
708                 };                                
709         };                                        
710                                                   
711         pmu {                                     
712                 compatible = "arm,armv8-pmuv3"    
713                 interrupts = <GIC_PPI 5 IRQ_TY    
714         };                                        
715                                                   
716         psci: psci {                              
717                 compatible = "arm,psci-1.0";      
718                 method = "smc";                   
719                                                   
720                 CPU_PD0: power-domain-cpu0 {      
721                         #power-domain-cells =     
722                         power-domains = <&CLUS    
723                         domain-idle-states = <    
724                 };                                
725                                                   
726                 CPU_PD1: power-domain-cpu1 {      
727                         #power-domain-cells =     
728                         power-domains = <&CLUS    
729                         domain-idle-states = <    
730                 };                                
731                                                   
732                 CPU_PD2: power-domain-cpu2 {      
733                         #power-domain-cells =     
734                         power-domains = <&CLUS    
735                         domain-idle-states = <    
736                 };                                
737                                                   
738                 CPU_PD3: power-domain-cpu3 {      
739                         #power-domain-cells =     
740                         power-domains = <&CLUS    
741                         domain-idle-states = <    
742                 };                                
743                                                   
744                 CPU_PD4: power-domain-cpu4 {      
745                         #power-domain-cells =     
746                         power-domains = <&CLUS    
747                         domain-idle-states = <    
748                 };                                
749                                                   
750                 CPU_PD5: power-domain-cpu5 {      
751                         #power-domain-cells =     
752                         power-domains = <&CLUS    
753                         domain-idle-states = <    
754                 };                                
755                                                   
756                 CPU_PD6: power-domain-cpu6 {      
757                         #power-domain-cells =     
758                         power-domains = <&CLUS    
759                         domain-idle-states = <    
760                 };                                
761                                                   
762                 CPU_PD7: power-domain-cpu7 {      
763                         #power-domain-cells =     
764                         power-domains = <&CLUS    
765                         domain-idle-states = <    
766                 };                                
767                                                   
768                 CLUSTER_PD: power-domain-clust    
769                         #power-domain-cells =     
770                         domain-idle-states = <    
771                 };                                
772         };                                        
773                                                   
774         reserved-memory {                         
775                 #address-cells = <2>;             
776                 #size-cells = <2>;                
777                 ranges;                           
778                                                   
779                 hyp_mem: hyp-mem@85700000 {       
780                         reg = <0 0x85700000 0     
781                         no-map;                   
782                 };                                
783                                                   
784                 xbl_mem: xbl-mem@85e00000 {       
785                         reg = <0 0x85e00000 0     
786                         no-map;                   
787                 };                                
788                                                   
789                 aop_mem: aop-mem@85fc0000 {       
790                         reg = <0 0x85fc0000 0     
791                         no-map;                   
792                 };                                
793                                                   
794                 aop_cmd_db_mem: aop-cmd-db-mem    
795                         compatible = "qcom,cmd    
796                         reg = <0x0 0x85fe0000     
797                         no-map;                   
798                 };                                
799                                                   
800                 smem@86000000 {                   
801                         compatible = "qcom,sme    
802                         reg = <0x0 0x86000000     
803                         no-map;                   
804                         hwlocks = <&tcsr_mutex    
805                 };                                
806                                                   
807                 tz_mem: tz@86200000 {             
808                         reg = <0 0x86200000 0     
809                         no-map;                   
810                 };                                
811                                                   
812                 rmtfs_mem: rmtfs@88f00000 {       
813                         compatible = "qcom,rmt    
814                         reg = <0 0x88f00000 0     
815                         no-map;                   
816                                                   
817                         qcom,client-id = <1>;     
818                         qcom,vmid = <QCOM_SCM_    
819                 };                                
820                                                   
821                 qseecom_mem: qseecom@8ab00000     
822                         reg = <0 0x8ab00000 0     
823                         no-map;                   
824                 };                                
825                                                   
826                 camera_mem: camera-mem@8bf0000    
827                         reg = <0 0x8bf00000 0     
828                         no-map;                   
829                 };                                
830                                                   
831                 ipa_fw_mem: ipa-fw@8c400000 {     
832                         reg = <0 0x8c400000 0     
833                         no-map;                   
834                 };                                
835                                                   
836                 ipa_gsi_mem: ipa-gsi@8c410000     
837                         reg = <0 0x8c410000 0     
838                         no-map;                   
839                 };                                
840                                                   
841                 gpu_mem: gpu@8c415000 {           
842                         reg = <0 0x8c415000 0     
843                         no-map;                   
844                 };                                
845                                                   
846                 adsp_mem: adsp@8c500000 {         
847                         reg = <0 0x8c500000 0     
848                         no-map;                   
849                 };                                
850                                                   
851                 wlan_msa_mem: wlan-msa@8df0000    
852                         reg = <0 0x8df00000 0     
853                         no-map;                   
854                 };                                
855                                                   
856                 mpss_region: mpss@8e000000 {      
857                         reg = <0 0x8e000000 0     
858                         no-map;                   
859                 };                                
860                                                   
861                 venus_mem: venus@95800000 {       
862                         reg = <0 0x95800000 0     
863                         no-map;                   
864                 };                                
865                                                   
866                 cdsp_mem: cdsp@95d00000 {         
867                         reg = <0 0x95d00000 0     
868                         no-map;                   
869                 };                                
870                                                   
871                 mba_region: mba@96500000 {        
872                         reg = <0 0x96500000 0     
873                         no-map;                   
874                 };                                
875                                                   
876                 slpi_mem: slpi@96700000 {         
877                         reg = <0 0x96700000 0     
878                         no-map;                   
879                 };                                
880                                                   
881                 spss_mem: spss@97b00000 {         
882                         reg = <0 0x97b00000 0     
883                         no-map;                   
884                 };                                
885                                                   
886                 mdata_mem: mpss-metadata {        
887                         alloc-ranges = <0 0xa0    
888                         size = <0 0x4000>;        
889                         no-map;                   
890                 };                                
891                                                   
892                 fastrpc_mem: fastrpc {            
893                         compatible = "shared-d    
894                         alloc-ranges = <0x0 0x    
895                         alignment = <0x0 0x400    
896                         size = <0x0 0x1000000>    
897                         reusable;                 
898                 };                                
899         };                                        
900                                                   
901         adsp_pas: remoteproc-adsp {               
902                 compatible = "qcom,sdm845-adsp    
903                                                   
904                 interrupts-extended = <&intc G    
905                                       <&adsp_s    
906                                       <&adsp_s    
907                                       <&adsp_s    
908                                       <&adsp_s    
909                 interrupt-names = "wdog", "fat    
910                                   "handover",     
911                                                   
912                 clocks = <&rpmhcc RPMH_CXO_CLK    
913                 clock-names = "xo";               
914                                                   
915                 memory-region = <&adsp_mem>;      
916                                                   
917                 qcom,qmp = <&aoss_qmp>;           
918                                                   
919                 qcom,smem-states = <&adsp_smp2    
920                 qcom,smem-state-names = "stop"    
921                                                   
922                 status = "disabled";              
923                                                   
924                 glink-edge {                      
925                         interrupts = <GIC_SPI     
926                         label = "lpass";          
927                         qcom,remote-pid = <2>;    
928                         mboxes = <&apss_shared    
929                                                   
930                         apr {                     
931                                 compatible = "    
932                                 qcom,glink-cha    
933                                 qcom,domain =     
934                                 #address-cells    
935                                 #size-cells =     
936                                 qcom,intents =    
937                                                   
938                                 service@3 {       
939                                         reg =     
940                                         compat    
941                                         qcom,p    
942                                 };                
943                                                   
944                                 q6afe: service    
945                                         compat    
946                                         reg =     
947                                         qcom,p    
948                                         q6afed    
949                                                   
950                                                   
951                                                   
952                                                   
953                                         };        
954                                 };                
955                                                   
956                                 q6asm: service    
957                                         compat    
958                                         reg =     
959                                         qcom,p    
960                                         q6asmd    
961                                                   
962                                                   
963                                                   
964                                                   
965                                                   
966                                         };        
967                                 };                
968                                                   
969                                 q6adm: service    
970                                         compat    
971                                         reg =     
972                                         qcom,p    
973                                         q6rout    
974                                                   
975                                                   
976                                         };        
977                                 };                
978                         };                        
979                                                   
980                         fastrpc {                 
981                                 compatible = "    
982                                 qcom,glink-cha    
983                                 label = "adsp"    
984                                 qcom,non-secur    
985                                 #address-cells    
986                                 #size-cells =     
987                                                   
988                                 compute-cb@3 {    
989                                         compat    
990                                         reg =     
991                                         iommus    
992                                 };                
993                                                   
994                                 compute-cb@4 {    
995                                         compat    
996                                         reg =     
997                                         iommus    
998                                 };                
999                         };                        
1000                 };                               
1001         };                                       
1002                                                  
1003         cdsp_pas: remoteproc-cdsp {              
1004                 compatible = "qcom,sdm845-cds    
1005                                                  
1006                 interrupts-extended = <&intc     
1007                                       <&cdsp_    
1008                                       <&cdsp_    
1009                                       <&cdsp_    
1010                                       <&cdsp_    
1011                 interrupt-names = "wdog", "fa    
1012                                   "handover",    
1013                                                  
1014                 clocks = <&rpmhcc RPMH_CXO_CL    
1015                 clock-names = "xo";              
1016                                                  
1017                 memory-region = <&cdsp_mem>;     
1018                                                  
1019                 qcom,qmp = <&aoss_qmp>;          
1020                                                  
1021                 qcom,smem-states = <&cdsp_smp    
1022                 qcom,smem-state-names = "stop    
1023                                                  
1024                 status = "disabled";             
1025                                                  
1026                 glink-edge {                     
1027                         interrupts = <GIC_SPI    
1028                         label = "turing";        
1029                         qcom,remote-pid = <5>    
1030                         mboxes = <&apss_share    
1031                         fastrpc {                
1032                                 compatible =     
1033                                 qcom,glink-ch    
1034                                 label = "cdsp    
1035                                 qcom,non-secu    
1036                                 #address-cell    
1037                                 #size-cells =    
1038                                                  
1039                                 compute-cb@1     
1040                                         compa    
1041                                         reg =    
1042                                         iommu    
1043                                 };               
1044                                                  
1045                                 compute-cb@2     
1046                                         compa    
1047                                         reg =    
1048                                         iommu    
1049                                 };               
1050                                                  
1051                                 compute-cb@3     
1052                                         compa    
1053                                         reg =    
1054                                         iommu    
1055                                 };               
1056                                                  
1057                                 compute-cb@4     
1058                                         compa    
1059                                         reg =    
1060                                         iommu    
1061                                 };               
1062                                                  
1063                                 compute-cb@5     
1064                                         compa    
1065                                         reg =    
1066                                         iommu    
1067                                 };               
1068                                                  
1069                                 compute-cb@6     
1070                                         compa    
1071                                         reg =    
1072                                         iommu    
1073                                 };               
1074                                                  
1075                                 compute-cb@7     
1076                                         compa    
1077                                         reg =    
1078                                         iommu    
1079                                 };               
1080                                                  
1081                                 compute-cb@8     
1082                                         compa    
1083                                         reg =    
1084                                         iommu    
1085                                 };               
1086                         };                       
1087                 };                               
1088         };                                       
1089                                                  
1090         smp2p-cdsp {                             
1091                 compatible = "qcom,smp2p";       
1092                 qcom,smem = <94>, <432>;         
1093                                                  
1094                 interrupts = <GIC_SPI 576 IRQ    
1095                                                  
1096                 mboxes = <&apss_shared 6>;       
1097                                                  
1098                 qcom,local-pid = <0>;            
1099                 qcom,remote-pid = <5>;           
1100                                                  
1101                 cdsp_smp2p_out: master-kernel    
1102                         qcom,entry-name = "ma    
1103                         #qcom,smem-state-cell    
1104                 };                               
1105                                                  
1106                 cdsp_smp2p_in: slave-kernel {    
1107                         qcom,entry-name = "sl    
1108                                                  
1109                         interrupt-controller;    
1110                         #interrupt-cells = <2    
1111                 };                               
1112         };                                       
1113                                                  
1114         smp2p-lpass {                            
1115                 compatible = "qcom,smp2p";       
1116                 qcom,smem = <443>, <429>;        
1117                                                  
1118                 interrupts = <GIC_SPI 158 IRQ    
1119                                                  
1120                 mboxes = <&apss_shared 10>;      
1121                                                  
1122                 qcom,local-pid = <0>;            
1123                 qcom,remote-pid = <2>;           
1124                                                  
1125                 adsp_smp2p_out: master-kernel    
1126                         qcom,entry-name = "ma    
1127                         #qcom,smem-state-cell    
1128                 };                               
1129                                                  
1130                 adsp_smp2p_in: slave-kernel {    
1131                         qcom,entry-name = "sl    
1132                                                  
1133                         interrupt-controller;    
1134                         #interrupt-cells = <2    
1135                 };                               
1136         };                                       
1137                                                  
1138         smp2p-mpss {                             
1139                 compatible = "qcom,smp2p";       
1140                 qcom,smem = <435>, <428>;        
1141                 interrupts = <GIC_SPI 451 IRQ    
1142                 mboxes = <&apss_shared 14>;      
1143                 qcom,local-pid = <0>;            
1144                 qcom,remote-pid = <1>;           
1145                                                  
1146                 modem_smp2p_out: master-kerne    
1147                         qcom,entry-name = "ma    
1148                         #qcom,smem-state-cell    
1149                 };                               
1150                                                  
1151                 modem_smp2p_in: slave-kernel     
1152                         qcom,entry-name = "sl    
1153                         interrupt-controller;    
1154                         #interrupt-cells = <2    
1155                 };                               
1156                                                  
1157                 ipa_smp2p_out: ipa-ap-to-mode    
1158                         qcom,entry-name = "ip    
1159                         #qcom,smem-state-cell    
1160                 };                               
1161                                                  
1162                 ipa_smp2p_in: ipa-modem-to-ap    
1163                         qcom,entry-name = "ip    
1164                         interrupt-controller;    
1165                         #interrupt-cells = <2    
1166                 };                               
1167         };                                       
1168                                                  
1169         smp2p-slpi {                             
1170                 compatible = "qcom,smp2p";       
1171                 qcom,smem = <481>, <430>;        
1172                 interrupts = <GIC_SPI 172 IRQ    
1173                 mboxes = <&apss_shared 26>;      
1174                 qcom,local-pid = <0>;            
1175                 qcom,remote-pid = <3>;           
1176                                                  
1177                 slpi_smp2p_out: master-kernel    
1178                         qcom,entry-name = "ma    
1179                         #qcom,smem-state-cell    
1180                 };                               
1181                                                  
1182                 slpi_smp2p_in: slave-kernel {    
1183                         qcom,entry-name = "sl    
1184                         interrupt-controller;    
1185                         #interrupt-cells = <2    
1186                 };                               
1187         };                                       
1188                                                  
1189         soc: soc@0 {                             
1190                 #address-cells = <2>;            
1191                 #size-cells = <2>;               
1192                 ranges = <0 0 0 0 0x10 0>;       
1193                 dma-ranges = <0 0 0 0 0x10 0>    
1194                 compatible = "simple-bus";       
1195                                                  
1196                 gcc: clock-controller@100000     
1197                         compatible = "qcom,gc    
1198                         reg = <0 0x00100000 0    
1199                         clocks = <&rpmhcc RPM    
1200                                  <&rpmhcc RPM    
1201                                  <&sleep_clk>    
1202                                  <&pcie0_phy>    
1203                                  <&pcie1_phy>    
1204                         clock-names = "bi_tcx    
1205                                       "bi_tcx    
1206                                       "sleep_    
1207                                       "pcie_0    
1208                                       "pcie_1    
1209                         #clock-cells = <1>;      
1210                         #reset-cells = <1>;      
1211                         #power-domain-cells =    
1212                         power-domains = <&rpm    
1213                 };                               
1214                                                  
1215                 qfprom@784000 {                  
1216                         compatible = "qcom,sd    
1217                         reg = <0 0x00784000 0    
1218                         #address-cells = <1>;    
1219                         #size-cells = <1>;       
1220                                                  
1221                         qusb2p_hstx_trim: hst    
1222                                 reg = <0x1eb     
1223                                 bits = <1 4>;    
1224                         };                       
1225                                                  
1226                         qusb2s_hstx_trim: hst    
1227                                 reg = <0x1eb     
1228                                 bits = <6 4>;    
1229                         };                       
1230                 };                               
1231                                                  
1232                 rng: rng@793000 {                
1233                         compatible = "qcom,pr    
1234                         reg = <0 0x00793000 0    
1235                         clocks = <&gcc GCC_PR    
1236                         clock-names = "core";    
1237                 };                               
1238                                                  
1239                 gpi_dma0: dma-controller@8000    
1240                         #dma-cells = <3>;        
1241                         compatible = "qcom,sd    
1242                         reg = <0 0x00800000 0    
1243                         interrupts = <GIC_SPI    
1244                                      <GIC_SPI    
1245                                      <GIC_SPI    
1246                                      <GIC_SPI    
1247                                      <GIC_SPI    
1248                                      <GIC_SPI    
1249                                      <GIC_SPI    
1250                                      <GIC_SPI    
1251                                      <GIC_SPI    
1252                                      <GIC_SPI    
1253                                      <GIC_SPI    
1254                                      <GIC_SPI    
1255                                      <GIC_SPI    
1256                         dma-channels = <13>;     
1257                         dma-channel-mask = <0    
1258                         iommus = <&apps_smmu     
1259                         status = "disabled";     
1260                 };                               
1261                                                  
1262                 qupv3_id_0: geniqup@8c0000 {     
1263                         compatible = "qcom,ge    
1264                         reg = <0 0x008c0000 0    
1265                         clock-names = "m-ahb"    
1266                         clocks = <&gcc GCC_QU    
1267                                  <&gcc GCC_QU    
1268                         iommus = <&apps_smmu     
1269                         #address-cells = <2>;    
1270                         #size-cells = <2>;       
1271                         ranges;                  
1272                         interconnects = <&agg    
1273                         interconnect-names =     
1274                         status = "disabled";     
1275                                                  
1276                         i2c0: i2c@880000 {       
1277                                 compatible =     
1278                                 reg = <0 0x00    
1279                                 clock-names =    
1280                                 clocks = <&gc    
1281                                 pinctrl-names    
1282                                 pinctrl-0 = <    
1283                                 interrupts =     
1284                                 #address-cell    
1285                                 #size-cells =    
1286                                 power-domains    
1287                                 operating-poi    
1288                                 interconnects    
1289                                                  
1290                                                  
1291                                 interconnect-    
1292                                 dmas = <&gpi_    
1293                                        <&gpi_    
1294                                 dma-names = "    
1295                                 status = "dis    
1296                         };                       
1297                                                  
1298                         spi0: spi@880000 {       
1299                                 compatible =     
1300                                 reg = <0 0x00    
1301                                 clock-names =    
1302                                 clocks = <&gc    
1303                                 pinctrl-names    
1304                                 pinctrl-0 = <    
1305                                 interrupts =     
1306                                 #address-cell    
1307                                 #size-cells =    
1308                                 interconnects    
1309                                                  
1310                                 interconnect-    
1311                                 dmas = <&gpi_    
1312                                        <&gpi_    
1313                                 dma-names = "    
1314                                 status = "dis    
1315                         };                       
1316                                                  
1317                         uart0: serial@880000     
1318                                 compatible =     
1319                                 reg = <0 0x00    
1320                                 clock-names =    
1321                                 clocks = <&gc    
1322                                 pinctrl-names    
1323                                 pinctrl-0 = <    
1324                                 interrupts =     
1325                                 power-domains    
1326                                 operating-poi    
1327                                 interconnects    
1328                                                  
1329                                 interconnect-    
1330                                 status = "dis    
1331                         };                       
1332                                                  
1333                         i2c1: i2c@884000 {       
1334                                 compatible =     
1335                                 reg = <0 0x00    
1336                                 clock-names =    
1337                                 clocks = <&gc    
1338                                 pinctrl-names    
1339                                 pinctrl-0 = <    
1340                                 interrupts =     
1341                                 #address-cell    
1342                                 #size-cells =    
1343                                 power-domains    
1344                                 operating-poi    
1345                                 interconnects    
1346                                                  
1347                                                  
1348                                 interconnect-    
1349                                 dmas = <&gpi_    
1350                                        <&gpi_    
1351                                 dma-names = "    
1352                                 status = "dis    
1353                         };                       
1354                                                  
1355                         spi1: spi@884000 {       
1356                                 compatible =     
1357                                 reg = <0 0x00    
1358                                 clock-names =    
1359                                 clocks = <&gc    
1360                                 pinctrl-names    
1361                                 pinctrl-0 = <    
1362                                 interrupts =     
1363                                 #address-cell    
1364                                 #size-cells =    
1365                                 interconnects    
1366                                                  
1367                                 interconnect-    
1368                                 dmas = <&gpi_    
1369                                        <&gpi_    
1370                                 dma-names = "    
1371                                 status = "dis    
1372                         };                       
1373                                                  
1374                         uart1: serial@884000     
1375                                 compatible =     
1376                                 reg = <0 0x00    
1377                                 clock-names =    
1378                                 clocks = <&gc    
1379                                 pinctrl-names    
1380                                 pinctrl-0 = <    
1381                                 interrupts =     
1382                                 power-domains    
1383                                 operating-poi    
1384                                 interconnects    
1385                                                  
1386                                 interconnect-    
1387                                 status = "dis    
1388                         };                       
1389                                                  
1390                         i2c2: i2c@888000 {       
1391                                 compatible =     
1392                                 reg = <0 0x00    
1393                                 clock-names =    
1394                                 clocks = <&gc    
1395                                 pinctrl-names    
1396                                 pinctrl-0 = <    
1397                                 interrupts =     
1398                                 #address-cell    
1399                                 #size-cells =    
1400                                 power-domains    
1401                                 operating-poi    
1402                                 interconnects    
1403                                                  
1404                                                  
1405                                 interconnect-    
1406                                 dmas = <&gpi_    
1407                                        <&gpi_    
1408                                 dma-names = "    
1409                                 status = "dis    
1410                         };                       
1411                                                  
1412                         spi2: spi@888000 {       
1413                                 compatible =     
1414                                 reg = <0 0x00    
1415                                 clock-names =    
1416                                 clocks = <&gc    
1417                                 pinctrl-names    
1418                                 pinctrl-0 = <    
1419                                 interrupts =     
1420                                 #address-cell    
1421                                 #size-cells =    
1422                                 interconnects    
1423                                                  
1424                                 interconnect-    
1425                                 dmas = <&gpi_    
1426                                        <&gpi_    
1427                                 dma-names = "    
1428                                 status = "dis    
1429                         };                       
1430                                                  
1431                         uart2: serial@888000     
1432                                 compatible =     
1433                                 reg = <0 0x00    
1434                                 clock-names =    
1435                                 clocks = <&gc    
1436                                 pinctrl-names    
1437                                 pinctrl-0 = <    
1438                                 interrupts =     
1439                                 power-domains    
1440                                 operating-poi    
1441                                 interconnects    
1442                                                  
1443                                 interconnect-    
1444                                 status = "dis    
1445                         };                       
1446                                                  
1447                         i2c3: i2c@88c000 {       
1448                                 compatible =     
1449                                 reg = <0 0x00    
1450                                 clock-names =    
1451                                 clocks = <&gc    
1452                                 pinctrl-names    
1453                                 pinctrl-0 = <    
1454                                 interrupts =     
1455                                 #address-cell    
1456                                 #size-cells =    
1457                                 power-domains    
1458                                 operating-poi    
1459                                 interconnects    
1460                                                  
1461                                                  
1462                                 interconnect-    
1463                                 dmas = <&gpi_    
1464                                        <&gpi_    
1465                                 dma-names = "    
1466                                 status = "dis    
1467                         };                       
1468                                                  
1469                         spi3: spi@88c000 {       
1470                                 compatible =     
1471                                 reg = <0 0x00    
1472                                 clock-names =    
1473                                 clocks = <&gc    
1474                                 pinctrl-names    
1475                                 pinctrl-0 = <    
1476                                 interrupts =     
1477                                 #address-cell    
1478                                 #size-cells =    
1479                                 interconnects    
1480                                                  
1481                                 interconnect-    
1482                                 dmas = <&gpi_    
1483                                        <&gpi_    
1484                                 dma-names = "    
1485                                 status = "dis    
1486                         };                       
1487                                                  
1488                         uart3: serial@88c000     
1489                                 compatible =     
1490                                 reg = <0 0x00    
1491                                 clock-names =    
1492                                 clocks = <&gc    
1493                                 pinctrl-names    
1494                                 pinctrl-0 = <    
1495                                 interrupts =     
1496                                 power-domains    
1497                                 operating-poi    
1498                                 interconnects    
1499                                                  
1500                                 interconnect-    
1501                                 status = "dis    
1502                         };                       
1503                                                  
1504                         i2c4: i2c@890000 {       
1505                                 compatible =     
1506                                 reg = <0 0x00    
1507                                 clock-names =    
1508                                 clocks = <&gc    
1509                                 pinctrl-names    
1510                                 pinctrl-0 = <    
1511                                 interrupts =     
1512                                 #address-cell    
1513                                 #size-cells =    
1514                                 power-domains    
1515                                 operating-poi    
1516                                 interconnects    
1517                                                  
1518                                                  
1519                                 interconnect-    
1520                                 dmas = <&gpi_    
1521                                        <&gpi_    
1522                                 dma-names = "    
1523                                 status = "dis    
1524                         };                       
1525                                                  
1526                         spi4: spi@890000 {       
1527                                 compatible =     
1528                                 reg = <0 0x00    
1529                                 clock-names =    
1530                                 clocks = <&gc    
1531                                 pinctrl-names    
1532                                 pinctrl-0 = <    
1533                                 interrupts =     
1534                                 #address-cell    
1535                                 #size-cells =    
1536                                 interconnects    
1537                                                  
1538                                 interconnect-    
1539                                 dmas = <&gpi_    
1540                                        <&gpi_    
1541                                 dma-names = "    
1542                                 status = "dis    
1543                         };                       
1544                                                  
1545                         uart4: serial@890000     
1546                                 compatible =     
1547                                 reg = <0 0x00    
1548                                 clock-names =    
1549                                 clocks = <&gc    
1550                                 pinctrl-names    
1551                                 pinctrl-0 = <    
1552                                 interrupts =     
1553                                 power-domains    
1554                                 operating-poi    
1555                                 interconnects    
1556                                                  
1557                                 interconnect-    
1558                                 status = "dis    
1559                         };                       
1560                                                  
1561                         i2c5: i2c@894000 {       
1562                                 compatible =     
1563                                 reg = <0 0x00    
1564                                 clock-names =    
1565                                 clocks = <&gc    
1566                                 pinctrl-names    
1567                                 pinctrl-0 = <    
1568                                 interrupts =     
1569                                 #address-cell    
1570                                 #size-cells =    
1571                                 power-domains    
1572                                 operating-poi    
1573                                 interconnects    
1574                                                  
1575                                                  
1576                                 interconnect-    
1577                                 dmas = <&gpi_    
1578                                        <&gpi_    
1579                                 dma-names = "    
1580                                 status = "dis    
1581                         };                       
1582                                                  
1583                         spi5: spi@894000 {       
1584                                 compatible =     
1585                                 reg = <0 0x00    
1586                                 clock-names =    
1587                                 clocks = <&gc    
1588                                 pinctrl-names    
1589                                 pinctrl-0 = <    
1590                                 interrupts =     
1591                                 #address-cell    
1592                                 #size-cells =    
1593                                 interconnects    
1594                                                  
1595                                 interconnect-    
1596                                 dmas = <&gpi_    
1597                                        <&gpi_    
1598                                 dma-names = "    
1599                                 status = "dis    
1600                         };                       
1601                                                  
1602                         uart5: serial@894000     
1603                                 compatible =     
1604                                 reg = <0 0x00    
1605                                 clock-names =    
1606                                 clocks = <&gc    
1607                                 pinctrl-names    
1608                                 pinctrl-0 = <    
1609                                 interrupts =     
1610                                 power-domains    
1611                                 operating-poi    
1612                                 interconnects    
1613                                                  
1614                                 interconnect-    
1615                                 status = "dis    
1616                         };                       
1617                                                  
1618                         i2c6: i2c@898000 {       
1619                                 compatible =     
1620                                 reg = <0 0x00    
1621                                 clock-names =    
1622                                 clocks = <&gc    
1623                                 pinctrl-names    
1624                                 pinctrl-0 = <    
1625                                 interrupts =     
1626                                 #address-cell    
1627                                 #size-cells =    
1628                                 power-domains    
1629                                 operating-poi    
1630                                 interconnects    
1631                                                  
1632                                                  
1633                                 interconnect-    
1634                                 dmas = <&gpi_    
1635                                        <&gpi_    
1636                                 dma-names = "    
1637                                 status = "dis    
1638                         };                       
1639                                                  
1640                         spi6: spi@898000 {       
1641                                 compatible =     
1642                                 reg = <0 0x00    
1643                                 clock-names =    
1644                                 clocks = <&gc    
1645                                 pinctrl-names    
1646                                 pinctrl-0 = <    
1647                                 interrupts =     
1648                                 #address-cell    
1649                                 #size-cells =    
1650                                 interconnects    
1651                                                  
1652                                 interconnect-    
1653                                 dmas = <&gpi_    
1654                                        <&gpi_    
1655                                 dma-names = "    
1656                                 status = "dis    
1657                         };                       
1658                                                  
1659                         uart6: serial@898000     
1660                                 compatible =     
1661                                 reg = <0 0x00    
1662                                 clock-names =    
1663                                 clocks = <&gc    
1664                                 pinctrl-names    
1665                                 pinctrl-0 = <    
1666                                 interrupts =     
1667                                 power-domains    
1668                                 operating-poi    
1669                                 interconnects    
1670                                                  
1671                                 interconnect-    
1672                                 status = "dis    
1673                         };                       
1674                                                  
1675                         i2c7: i2c@89c000 {       
1676                                 compatible =     
1677                                 reg = <0 0x00    
1678                                 clock-names =    
1679                                 clocks = <&gc    
1680                                 pinctrl-names    
1681                                 pinctrl-0 = <    
1682                                 interrupts =     
1683                                 #address-cell    
1684                                 #size-cells =    
1685                                 power-domains    
1686                                 operating-poi    
1687                                 status = "dis    
1688                         };                       
1689                                                  
1690                         spi7: spi@89c000 {       
1691                                 compatible =     
1692                                 reg = <0 0x00    
1693                                 clock-names =    
1694                                 clocks = <&gc    
1695                                 pinctrl-names    
1696                                 pinctrl-0 = <    
1697                                 interrupts =     
1698                                 #address-cell    
1699                                 #size-cells =    
1700                                 interconnects    
1701                                                  
1702                                 interconnect-    
1703                                 dmas = <&gpi_    
1704                                        <&gpi_    
1705                                 dma-names = "    
1706                                 status = "dis    
1707                         };                       
1708                                                  
1709                         uart7: serial@89c000     
1710                                 compatible =     
1711                                 reg = <0 0x00    
1712                                 clock-names =    
1713                                 clocks = <&gc    
1714                                 pinctrl-names    
1715                                 pinctrl-0 = <    
1716                                 interrupts =     
1717                                 power-domains    
1718                                 operating-poi    
1719                                 interconnects    
1720                                                  
1721                                 interconnect-    
1722                                 status = "dis    
1723                         };                       
1724                 };                               
1725                                                  
1726                 gpi_dma1: dma-controller@a000    
1727                         #dma-cells = <3>;        
1728                         compatible = "qcom,sd    
1729                         reg = <0 0x00a00000 0    
1730                         interrupts = <GIC_SPI    
1731                                      <GIC_SPI    
1732                                      <GIC_SPI    
1733                                      <GIC_SPI    
1734                                      <GIC_SPI    
1735                                      <GIC_SPI    
1736                                      <GIC_SPI    
1737                                      <GIC_SPI    
1738                                      <GIC_SPI    
1739                                      <GIC_SPI    
1740                                      <GIC_SPI    
1741                                      <GIC_SPI    
1742                                      <GIC_SPI    
1743                         dma-channels = <13>;     
1744                         dma-channel-mask = <0    
1745                         iommus = <&apps_smmu     
1746                         status = "disabled";     
1747                 };                               
1748                                                  
1749                 qupv3_id_1: geniqup@ac0000 {     
1750                         compatible = "qcom,ge    
1751                         reg = <0 0x00ac0000 0    
1752                         clock-names = "m-ahb"    
1753                         clocks = <&gcc GCC_QU    
1754                                  <&gcc GCC_QU    
1755                         iommus = <&apps_smmu     
1756                         #address-cells = <2>;    
1757                         #size-cells = <2>;       
1758                         ranges;                  
1759                         interconnects = <&agg    
1760                         interconnect-names =     
1761                         status = "disabled";     
1762                                                  
1763                         i2c8: i2c@a80000 {       
1764                                 compatible =     
1765                                 reg = <0 0x00    
1766                                 clock-names =    
1767                                 clocks = <&gc    
1768                                 pinctrl-names    
1769                                 pinctrl-0 = <    
1770                                 interrupts =     
1771                                 #address-cell    
1772                                 #size-cells =    
1773                                 power-domains    
1774                                 operating-poi    
1775                                 interconnects    
1776                                                  
1777                                                  
1778                                 interconnect-    
1779                                 dmas = <&gpi_    
1780                                        <&gpi_    
1781                                 dma-names = "    
1782                                 status = "dis    
1783                         };                       
1784                                                  
1785                         spi8: spi@a80000 {       
1786                                 compatible =     
1787                                 reg = <0 0x00    
1788                                 clock-names =    
1789                                 clocks = <&gc    
1790                                 pinctrl-names    
1791                                 pinctrl-0 = <    
1792                                 interrupts =     
1793                                 #address-cell    
1794                                 #size-cells =    
1795                                 interconnects    
1796                                                  
1797                                 interconnect-    
1798                                 dmas = <&gpi_    
1799                                        <&gpi_    
1800                                 dma-names = "    
1801                                 status = "dis    
1802                         };                       
1803                                                  
1804                         uart8: serial@a80000     
1805                                 compatible =     
1806                                 reg = <0 0x00    
1807                                 clock-names =    
1808                                 clocks = <&gc    
1809                                 pinctrl-names    
1810                                 pinctrl-0 = <    
1811                                 interrupts =     
1812                                 power-domains    
1813                                 operating-poi    
1814                                 interconnects    
1815                                                  
1816                                 interconnect-    
1817                                 status = "dis    
1818                         };                       
1819                                                  
1820                         i2c9: i2c@a84000 {       
1821                                 compatible =     
1822                                 reg = <0 0x00    
1823                                 clock-names =    
1824                                 clocks = <&gc    
1825                                 pinctrl-names    
1826                                 pinctrl-0 = <    
1827                                 interrupts =     
1828                                 #address-cell    
1829                                 #size-cells =    
1830                                 power-domains    
1831                                 operating-poi    
1832                                 interconnects    
1833                                                  
1834                                                  
1835                                 interconnect-    
1836                                 dmas = <&gpi_    
1837                                        <&gpi_    
1838                                 dma-names = "    
1839                                 status = "dis    
1840                         };                       
1841                                                  
1842                         spi9: spi@a84000 {       
1843                                 compatible =     
1844                                 reg = <0 0x00    
1845                                 clock-names =    
1846                                 clocks = <&gc    
1847                                 pinctrl-names    
1848                                 pinctrl-0 = <    
1849                                 interrupts =     
1850                                 #address-cell    
1851                                 #size-cells =    
1852                                 interconnects    
1853                                                  
1854                                 interconnect-    
1855                                 dmas = <&gpi_    
1856                                        <&gpi_    
1857                                 dma-names = "    
1858                                 status = "dis    
1859                         };                       
1860                                                  
1861                         uart9: serial@a84000     
1862                                 compatible =     
1863                                 reg = <0 0x00    
1864                                 clock-names =    
1865                                 clocks = <&gc    
1866                                 pinctrl-names    
1867                                 pinctrl-0 = <    
1868                                 interrupts =     
1869                                 power-domains    
1870                                 operating-poi    
1871                                 interconnects    
1872                                                  
1873                                 interconnect-    
1874                                 status = "dis    
1875                         };                       
1876                                                  
1877                         i2c10: i2c@a88000 {      
1878                                 compatible =     
1879                                 reg = <0 0x00    
1880                                 clock-names =    
1881                                 clocks = <&gc    
1882                                 pinctrl-names    
1883                                 pinctrl-0 = <    
1884                                 interrupts =     
1885                                 #address-cell    
1886                                 #size-cells =    
1887                                 power-domains    
1888                                 operating-poi    
1889                                 interconnects    
1890                                                  
1891                                                  
1892                                 interconnect-    
1893                                 dmas = <&gpi_    
1894                                        <&gpi_    
1895                                 dma-names = "    
1896                                 status = "dis    
1897                         };                       
1898                                                  
1899                         spi10: spi@a88000 {      
1900                                 compatible =     
1901                                 reg = <0 0x00    
1902                                 clock-names =    
1903                                 clocks = <&gc    
1904                                 pinctrl-names    
1905                                 pinctrl-0 = <    
1906                                 interrupts =     
1907                                 #address-cell    
1908                                 #size-cells =    
1909                                 interconnects    
1910                                                  
1911                                 interconnect-    
1912                                 dmas = <&gpi_    
1913                                        <&gpi_    
1914                                 dma-names = "    
1915                                 status = "dis    
1916                         };                       
1917                                                  
1918                         uart10: serial@a88000    
1919                                 compatible =     
1920                                 reg = <0 0x00    
1921                                 clock-names =    
1922                                 clocks = <&gc    
1923                                 pinctrl-names    
1924                                 pinctrl-0 = <    
1925                                 interrupts =     
1926                                 power-domains    
1927                                 operating-poi    
1928                                 interconnects    
1929                                                  
1930                                 interconnect-    
1931                                 status = "dis    
1932                         };                       
1933                                                  
1934                         i2c11: i2c@a8c000 {      
1935                                 compatible =     
1936                                 reg = <0 0x00    
1937                                 clock-names =    
1938                                 clocks = <&gc    
1939                                 pinctrl-names    
1940                                 pinctrl-0 = <    
1941                                 interrupts =     
1942                                 #address-cell    
1943                                 #size-cells =    
1944                                 power-domains    
1945                                 operating-poi    
1946                                 interconnects    
1947                                                  
1948                                                  
1949                                 interconnect-    
1950                                 dmas = <&gpi_    
1951                                        <&gpi_    
1952                                 dma-names = "    
1953                                 status = "dis    
1954                         };                       
1955                                                  
1956                         spi11: spi@a8c000 {      
1957                                 compatible =     
1958                                 reg = <0 0x00    
1959                                 clock-names =    
1960                                 clocks = <&gc    
1961                                 pinctrl-names    
1962                                 pinctrl-0 = <    
1963                                 interrupts =     
1964                                 #address-cell    
1965                                 #size-cells =    
1966                                 interconnects    
1967                                                  
1968                                 interconnect-    
1969                                 dmas = <&gpi_    
1970                                        <&gpi_    
1971                                 dma-names = "    
1972                                 status = "dis    
1973                         };                       
1974                                                  
1975                         uart11: serial@a8c000    
1976                                 compatible =     
1977                                 reg = <0 0x00    
1978                                 clock-names =    
1979                                 clocks = <&gc    
1980                                 pinctrl-names    
1981                                 pinctrl-0 = <    
1982                                 interrupts =     
1983                                 power-domains    
1984                                 operating-poi    
1985                                 interconnects    
1986                                                  
1987                                 interconnect-    
1988                                 status = "dis    
1989                         };                       
1990                                                  
1991                         i2c12: i2c@a90000 {      
1992                                 compatible =     
1993                                 reg = <0 0x00    
1994                                 clock-names =    
1995                                 clocks = <&gc    
1996                                 pinctrl-names    
1997                                 pinctrl-0 = <    
1998                                 interrupts =     
1999                                 #address-cell    
2000                                 #size-cells =    
2001                                 power-domains    
2002                                 operating-poi    
2003                                 interconnects    
2004                                                  
2005                                                  
2006                                 interconnect-    
2007                                 dmas = <&gpi_    
2008                                        <&gpi_    
2009                                 dma-names = "    
2010                                 status = "dis    
2011                         };                       
2012                                                  
2013                         spi12: spi@a90000 {      
2014                                 compatible =     
2015                                 reg = <0 0x00    
2016                                 clock-names =    
2017                                 clocks = <&gc    
2018                                 pinctrl-names    
2019                                 pinctrl-0 = <    
2020                                 interrupts =     
2021                                 #address-cell    
2022                                 #size-cells =    
2023                                 interconnects    
2024                                                  
2025                                 interconnect-    
2026                                 dmas = <&gpi_    
2027                                        <&gpi_    
2028                                 dma-names = "    
2029                                 status = "dis    
2030                         };                       
2031                                                  
2032                         uart12: serial@a90000    
2033                                 compatible =     
2034                                 reg = <0 0x00    
2035                                 clock-names =    
2036                                 clocks = <&gc    
2037                                 pinctrl-names    
2038                                 pinctrl-0 = <    
2039                                 interrupts =     
2040                                 power-domains    
2041                                 operating-poi    
2042                                 interconnects    
2043                                                  
2044                                 interconnect-    
2045                                 status = "dis    
2046                         };                       
2047                                                  
2048                         i2c13: i2c@a94000 {      
2049                                 compatible =     
2050                                 reg = <0 0x00    
2051                                 clock-names =    
2052                                 clocks = <&gc    
2053                                 pinctrl-names    
2054                                 pinctrl-0 = <    
2055                                 interrupts =     
2056                                 #address-cell    
2057                                 #size-cells =    
2058                                 power-domains    
2059                                 operating-poi    
2060                                 interconnects    
2061                                                  
2062                                                  
2063                                 interconnect-    
2064                                 dmas = <&gpi_    
2065                                        <&gpi_    
2066                                 dma-names = "    
2067                                 status = "dis    
2068                         };                       
2069                                                  
2070                         spi13: spi@a94000 {      
2071                                 compatible =     
2072                                 reg = <0 0x00    
2073                                 clock-names =    
2074                                 clocks = <&gc    
2075                                 pinctrl-names    
2076                                 pinctrl-0 = <    
2077                                 interrupts =     
2078                                 #address-cell    
2079                                 #size-cells =    
2080                                 interconnects    
2081                                                  
2082                                 interconnect-    
2083                                 dmas = <&gpi_    
2084                                        <&gpi_    
2085                                 dma-names = "    
2086                                 status = "dis    
2087                         };                       
2088                                                  
2089                         uart13: serial@a94000    
2090                                 compatible =     
2091                                 reg = <0 0x00    
2092                                 clock-names =    
2093                                 clocks = <&gc    
2094                                 pinctrl-names    
2095                                 pinctrl-0 = <    
2096                                 interrupts =     
2097                                 power-domains    
2098                                 operating-poi    
2099                                 interconnects    
2100                                                  
2101                                 interconnect-    
2102                                 status = "dis    
2103                         };                       
2104                                                  
2105                         i2c14: i2c@a98000 {      
2106                                 compatible =     
2107                                 reg = <0 0x00    
2108                                 clock-names =    
2109                                 clocks = <&gc    
2110                                 pinctrl-names    
2111                                 pinctrl-0 = <    
2112                                 interrupts =     
2113                                 #address-cell    
2114                                 #size-cells =    
2115                                 power-domains    
2116                                 operating-poi    
2117                                 interconnects    
2118                                                  
2119                                                  
2120                                 interconnect-    
2121                                 dmas = <&gpi_    
2122                                        <&gpi_    
2123                                 dma-names = "    
2124                                 status = "dis    
2125                         };                       
2126                                                  
2127                         spi14: spi@a98000 {      
2128                                 compatible =     
2129                                 reg = <0 0x00    
2130                                 clock-names =    
2131                                 clocks = <&gc    
2132                                 pinctrl-names    
2133                                 pinctrl-0 = <    
2134                                 interrupts =     
2135                                 #address-cell    
2136                                 #size-cells =    
2137                                 interconnects    
2138                                                  
2139                                 interconnect-    
2140                                 dmas = <&gpi_    
2141                                        <&gpi_    
2142                                 dma-names = "    
2143                                 status = "dis    
2144                         };                       
2145                                                  
2146                         uart14: serial@a98000    
2147                                 compatible =     
2148                                 reg = <0 0x00    
2149                                 clock-names =    
2150                                 clocks = <&gc    
2151                                 pinctrl-names    
2152                                 pinctrl-0 = <    
2153                                 interrupts =     
2154                                 power-domains    
2155                                 operating-poi    
2156                                 interconnects    
2157                                                  
2158                                 interconnect-    
2159                                 status = "dis    
2160                         };                       
2161                                                  
2162                         i2c15: i2c@a9c000 {      
2163                                 compatible =     
2164                                 reg = <0 0x00    
2165                                 clock-names =    
2166                                 clocks = <&gc    
2167                                 pinctrl-names    
2168                                 pinctrl-0 = <    
2169                                 interrupts =     
2170                                 #address-cell    
2171                                 #size-cells =    
2172                                 power-domains    
2173                                 operating-poi    
2174                                 status = "dis    
2175                                 interconnects    
2176                                                  
2177                                                  
2178                                 interconnect-    
2179                                 dmas = <&gpi_    
2180                                        <&gpi_    
2181                                 dma-names = "    
2182                         };                       
2183                                                  
2184                         spi15: spi@a9c000 {      
2185                                 compatible =     
2186                                 reg = <0 0x00    
2187                                 clock-names =    
2188                                 clocks = <&gc    
2189                                 pinctrl-names    
2190                                 pinctrl-0 = <    
2191                                 interrupts =     
2192                                 #address-cell    
2193                                 #size-cells =    
2194                                 interconnects    
2195                                                  
2196                                 interconnect-    
2197                                 dmas = <&gpi_    
2198                                        <&gpi_    
2199                                 dma-names = "    
2200                                 status = "dis    
2201                         };                       
2202                                                  
2203                         uart15: serial@a9c000    
2204                                 compatible =     
2205                                 reg = <0 0x00    
2206                                 clock-names =    
2207                                 clocks = <&gc    
2208                                 pinctrl-names    
2209                                 pinctrl-0 = <    
2210                                 interrupts =     
2211                                 power-domains    
2212                                 operating-poi    
2213                                 interconnects    
2214                                                  
2215                                 interconnect-    
2216                                 status = "dis    
2217                         };                       
2218                 };                               
2219                                                  
2220                 llcc: system-cache-controller    
2221                         compatible = "qcom,sd    
2222                         reg = <0 0x01100000 0    
2223                               <0 0x01200000 0    
2224                               <0 0x01300000 0    
2225                         reg-names = "llcc0_ba    
2226                                     "llcc3_ba    
2227                         interrupts = <GIC_SPI    
2228                 };                               
2229                                                  
2230                 dma@10a2000 {                    
2231                         compatible = "qcom,sd    
2232                         reg = <0x0 0x010a2000    
2233                               <0x0 0x010ae000    
2234                 };                               
2235                                                  
2236                 pmu@114a000 {                    
2237                         compatible = "qcom,sd    
2238                         reg = <0 0x0114a000 0    
2239                         interrupts = <GIC_SPI    
2240                         interconnects = <&mem    
2241                                                  
2242                         operating-points-v2 =    
2243                                                  
2244                         llcc_bwmon_opp_table:    
2245                                 compatible =     
2246                                                  
2247                                 /*               
2248                                  * The interc    
2249                                  * cpu4_opp_t    
2250                                  * interconne    
2251                                  * bandwidth     
2252                                  * bus width:    
2253                                  * kernel.       
2254                                  */              
2255                                 opp-0 {          
2256                                         opp-p    
2257                                 };               
2258                                 opp-1 {          
2259                                         opp-p    
2260                                 };               
2261                                 opp-2 {          
2262                                         opp-p    
2263                                 };               
2264                                 opp-3 {          
2265                                         opp-p    
2266                                 };               
2267                                 opp-4 {          
2268                                         opp-p    
2269                                 };               
2270                         };                       
2271                 };                               
2272                                                  
2273                 pmu@1436400 {                    
2274                         compatible = "qcom,sd    
2275                         reg = <0 0x01436400 0    
2276                         interrupts = <GIC_SPI    
2277                         interconnects = <&gla    
2278                                                  
2279                         operating-points-v2 =    
2280                                                  
2281                         cpu_bwmon_opp_table:     
2282                                 compatible =     
2283                                                  
2284                                 /*               
2285                                  * The interc    
2286                                  * cpu4_opp_t    
2287                                  * interconne    
2288                                  * from bandw    
2289                                  * (qcom,core    
2290                                  * from msm-4    
2291                                  */              
2292                                 opp-0 {          
2293                                         opp-p    
2294                                 };               
2295                                 opp-1 {          
2296                                         opp-p    
2297                                 };               
2298                                 opp-2 {          
2299                                         opp-p    
2300                                 };               
2301                                 opp-3 {          
2302                                         opp-p    
2303                                 };               
2304                                 opp-4 {          
2305                                         opp-p    
2306                                 };               
2307                         };                       
2308                 };                               
2309                                                  
2310                 pcie0: pcie@1c00000 {            
2311                         compatible = "qcom,pc    
2312                         reg = <0 0x01c00000 0    
2313                               <0 0x60000000 0    
2314                               <0 0x60000f20 0    
2315                               <0 0x60100000 0    
2316                               <0 0x01c07000 0    
2317                         reg-names = "parf", "    
2318                         device_type = "pci";     
2319                         linux,pci-domain = <0    
2320                         bus-range = <0x00 0xf    
2321                         num-lanes = <1>;         
2322                                                  
2323                         #address-cells = <3>;    
2324                         #size-cells = <2>;       
2325                                                  
2326                         ranges = <0x01000000     
2327                                  <0x02000000     
2328                                                  
2329                         interrupts = <GIC_SPI    
2330                         interrupt-names = "ms    
2331                         #interrupt-cells = <1    
2332                         interrupt-map-mask =     
2333                         interrupt-map = <0 0     
2334                                         <0 0     
2335                                         <0 0     
2336                                         <0 0     
2337                                                  
2338                         clocks = <&gcc GCC_PC    
2339                                  <&gcc GCC_PC    
2340                                  <&gcc GCC_PC    
2341                                  <&gcc GCC_PC    
2342                                  <&gcc GCC_PC    
2343                                  <&gcc GCC_PC    
2344                                  <&gcc GCC_AG    
2345                         clock-names = "pipe",    
2346                                       "aux",     
2347                                       "cfg",     
2348                                       "bus_ma    
2349                                       "bus_sl    
2350                                       "slave_    
2351                                       "tbu";     
2352                                                  
2353                         iommu-map = <0x0   &a    
2354                                     <0x100 &a    
2355                                     <0x200 &a    
2356                                     <0x300 &a    
2357                                     <0x400 &a    
2358                                     <0x500 &a    
2359                                     <0x600 &a    
2360                                     <0x700 &a    
2361                                     <0x800 &a    
2362                                     <0x900 &a    
2363                                     <0xa00 &a    
2364                                     <0xb00 &a    
2365                                     <0xc00 &a    
2366                                     <0xd00 &a    
2367                                     <0xe00 &a    
2368                                     <0xf00 &a    
2369                                                  
2370                         resets = <&gcc GCC_PC    
2371                         reset-names = "pci";     
2372                                                  
2373                         power-domains = <&gcc    
2374                                                  
2375                         phys = <&pcie0_phy>;     
2376                         phy-names = "pciephy"    
2377                                                  
2378                         status = "disabled";     
2379                                                  
2380                         pcie@0 {                 
2381                                 device_type =    
2382                                 reg = <0x0 0x    
2383                                 bus-range = <    
2384                                                  
2385                                 #address-cell    
2386                                 #size-cells =    
2387                                 ranges;          
2388                         };                       
2389                 };                               
2390                                                  
2391                 pcie0_phy: phy@1c06000 {         
2392                         compatible = "qcom,sd    
2393                         reg = <0 0x01c06000 0    
2394                         clocks = <&gcc GCC_PC    
2395                                  <&gcc GCC_PC    
2396                                  <&gcc GCC_PC    
2397                                  <&gcc GCC_PC    
2398                                  <&gcc GCC_PC    
2399                         clock-names = "aux",     
2400                                       "cfg_ah    
2401                                       "ref",     
2402                                       "refgen    
2403                                       "pipe";    
2404                                                  
2405                         clock-output-names =     
2406                         #clock-cells = <0>;      
2407                                                  
2408                         #phy-cells = <0>;        
2409                                                  
2410                         resets = <&gcc GCC_PC    
2411                         reset-names = "phy";     
2412                                                  
2413                         assigned-clocks = <&g    
2414                         assigned-clock-rates     
2415                                                  
2416                         status = "disabled";     
2417                 };                               
2418                                                  
2419                 pcie1: pcie@1c08000 {            
2420                         compatible = "qcom,pc    
2421                         reg = <0 0x01c08000 0    
2422                               <0 0x40000000 0    
2423                               <0 0x40000f20 0    
2424                               <0 0x40100000 0    
2425                               <0 0x01c0c000 0    
2426                         reg-names = "parf", "    
2427                         device_type = "pci";     
2428                         linux,pci-domain = <1    
2429                         bus-range = <0x00 0xf    
2430                         num-lanes = <1>;         
2431                                                  
2432                         #address-cells = <3>;    
2433                         #size-cells = <2>;       
2434                                                  
2435                         ranges = <0x01000000     
2436                                  <0x02000000     
2437                                                  
2438                         interrupts = <GIC_SPI    
2439                         interrupt-names = "ms    
2440                         #interrupt-cells = <1    
2441                         interrupt-map-mask =     
2442                         interrupt-map = <0 0     
2443                                         <0 0     
2444                                         <0 0     
2445                                         <0 0     
2446                                                  
2447                         clocks = <&gcc GCC_PC    
2448                                  <&gcc GCC_PC    
2449                                  <&gcc GCC_PC    
2450                                  <&gcc GCC_PC    
2451                                  <&gcc GCC_PC    
2452                                  <&gcc GCC_PC    
2453                                  <&gcc GCC_PC    
2454                                  <&gcc GCC_AG    
2455                         clock-names = "pipe",    
2456                                       "aux",     
2457                                       "cfg",     
2458                                       "bus_ma    
2459                                       "bus_sl    
2460                                       "slave_    
2461                                       "ref",     
2462                                       "tbu";     
2463                                                  
2464                         assigned-clocks = <&g    
2465                         assigned-clock-rates     
2466                                                  
2467                         iommu-map = <0x0   &a    
2468                                     <0x100 &a    
2469                                     <0x200 &a    
2470                                     <0x300 &a    
2471                                     <0x400 &a    
2472                                     <0x500 &a    
2473                                     <0x600 &a    
2474                                     <0x700 &a    
2475                                     <0x800 &a    
2476                                     <0x900 &a    
2477                                     <0xa00 &a    
2478                                     <0xb00 &a    
2479                                     <0xc00 &a    
2480                                     <0xd00 &a    
2481                                     <0xe00 &a    
2482                                     <0xf00 &a    
2483                                                  
2484                         resets = <&gcc GCC_PC    
2485                         reset-names = "pci";     
2486                                                  
2487                         power-domains = <&gcc    
2488                                                  
2489                         phys = <&pcie1_phy>;     
2490                         phy-names = "pciephy"    
2491                                                  
2492                         status = "disabled";     
2493                                                  
2494                         pcie@0 {                 
2495                                 device_type =    
2496                                 reg = <0x0 0x    
2497                                 bus-range = <    
2498                                                  
2499                                 #address-cell    
2500                                 #size-cells =    
2501                                 ranges;          
2502                         };                       
2503                 };                               
2504                                                  
2505                 pcie1_phy: phy@1c0a000 {         
2506                         compatible = "qcom,sd    
2507                         reg = <0 0x01c0a000 0    
2508                         clocks = <&gcc GCC_PC    
2509                                  <&gcc GCC_PC    
2510                                  <&gcc GCC_PC    
2511                                  <&gcc GCC_PC    
2512                                  <&gcc GCC_PC    
2513                         clock-names = "aux",     
2514                                       "cfg_ah    
2515                                       "ref",     
2516                                       "refgen    
2517                                       "pipe";    
2518                                                  
2519                         clock-output-names =     
2520                         #clock-cells = <0>;      
2521                                                  
2522                         #phy-cells = <0>;        
2523                                                  
2524                         resets = <&gcc GCC_PC    
2525                         reset-names = "phy";     
2526                                                  
2527                         assigned-clocks = <&g    
2528                         assigned-clock-rates     
2529                                                  
2530                         status = "disabled";     
2531                 };                               
2532                                                  
2533                 mem_noc: interconnect@1380000    
2534                         compatible = "qcom,sd    
2535                         reg = <0 0x01380000 0    
2536                         #interconnect-cells =    
2537                         qcom,bcm-voters = <&a    
2538                 };                               
2539                                                  
2540                 dc_noc: interconnect@14e0000     
2541                         compatible = "qcom,sd    
2542                         reg = <0 0x014e0000 0    
2543                         #interconnect-cells =    
2544                         qcom,bcm-voters = <&a    
2545                 };                               
2546                                                  
2547                 config_noc: interconnect@1500    
2548                         compatible = "qcom,sd    
2549                         reg = <0 0x01500000 0    
2550                         #interconnect-cells =    
2551                         qcom,bcm-voters = <&a    
2552                 };                               
2553                                                  
2554                 system_noc: interconnect@1620    
2555                         compatible = "qcom,sd    
2556                         reg = <0 0x01620000 0    
2557                         #interconnect-cells =    
2558                         qcom,bcm-voters = <&a    
2559                 };                               
2560                                                  
2561                 aggre1_noc: interconnect@16e0    
2562                         compatible = "qcom,sd    
2563                         reg = <0 0x016e0000 0    
2564                         #interconnect-cells =    
2565                         qcom,bcm-voters = <&a    
2566                 };                               
2567                                                  
2568                 aggre2_noc: interconnect@1700    
2569                         compatible = "qcom,sd    
2570                         reg = <0 0x01700000 0    
2571                         #interconnect-cells =    
2572                         qcom,bcm-voters = <&a    
2573                 };                               
2574                                                  
2575                 mmss_noc: interconnect@174000    
2576                         compatible = "qcom,sd    
2577                         reg = <0 0x01740000 0    
2578                         #interconnect-cells =    
2579                         qcom,bcm-voters = <&a    
2580                 };                               
2581                                                  
2582                 ufs_mem_hc: ufshc@1d84000 {      
2583                         compatible = "qcom,sd    
2584                                      "jedec,u    
2585                         reg = <0 0x01d84000 0    
2586                               <0 0x01d90000 0    
2587                         reg-names = "std", "i    
2588                         interrupts = <GIC_SPI    
2589                         phys = <&ufs_mem_phy>    
2590                         phy-names = "ufsphy";    
2591                         lanes-per-direction =    
2592                         power-domains = <&gcc    
2593                         #reset-cells = <1>;      
2594                         resets = <&gcc GCC_UF    
2595                         reset-names = "rst";     
2596                                                  
2597                         iommus = <&apps_smmu     
2598                                                  
2599                         clock-names =            
2600                                 "core_clk",      
2601                                 "bus_aggr_clk    
2602                                 "iface_clk",     
2603                                 "core_clk_uni    
2604                                 "ref_clk",       
2605                                 "tx_lane0_syn    
2606                                 "rx_lane0_syn    
2607                                 "rx_lane1_syn    
2608                                 "ice_core_clk    
2609                         clocks =                 
2610                                 <&gcc GCC_UFS    
2611                                 <&gcc GCC_AGG    
2612                                 <&gcc GCC_UFS    
2613                                 <&gcc GCC_UFS    
2614                                 <&rpmhcc RPMH    
2615                                 <&gcc GCC_UFS    
2616                                 <&gcc GCC_UFS    
2617                                 <&gcc GCC_UFS    
2618                                 <&gcc GCC_UFS    
2619                                                  
2620                         operating-points-v2 =    
2621                                                  
2622                         interconnects = <&agg    
2623                                         <&gla    
2624                         interconnect-names =     
2625                                                  
2626                         status = "disabled";     
2627                                                  
2628                         ufs_opp_table: opp-ta    
2629                                 compatible =     
2630                                                  
2631                                 opp-50000000     
2632                                         opp-h    
2633                                                  
2634                                                  
2635                                                  
2636                                                  
2637                                                  
2638                                                  
2639                                                  
2640                                                  
2641                                         requi    
2642                                 };               
2643                                                  
2644                                 opp-200000000    
2645                                         opp-h    
2646                                                  
2647                                                  
2648                                                  
2649                                                  
2650                                                  
2651                                                  
2652                                                  
2653                                                  
2654                                         requi    
2655                                 };               
2656                         };                       
2657                 };                               
2658                                                  
2659                 ufs_mem_phy: phy@1d87000 {       
2660                         compatible = "qcom,sd    
2661                         reg = <0 0x01d87000 0    
2662                                                  
2663                         clocks = <&rpmhcc RPM    
2664                                  <&gcc GCC_UF    
2665                                  <&gcc GCC_UF    
2666                         clock-names = "ref",     
2667                                       "ref_au    
2668                                       "qref";    
2669                                                  
2670                         power-domains = <&gcc    
2671                                                  
2672                         resets = <&ufs_mem_hc    
2673                         reset-names = "ufsphy    
2674                                                  
2675                         #phy-cells = <0>;        
2676                         status = "disabled";     
2677                 };                               
2678                                                  
2679                 cryptobam: dma-controller@1dc    
2680                         compatible = "qcom,ba    
2681                         reg = <0 0x01dc4000 0    
2682                         interrupts = <GIC_SPI    
2683                         clocks = <&rpmhcc RPM    
2684                         clock-names = "bam_cl    
2685                         #dma-cells = <1>;        
2686                         qcom,ee = <0>;           
2687                         qcom,controlled-remot    
2688                         iommus = <&apps_smmu     
2689                                  <&apps_smmu     
2690                                  <&apps_smmu     
2691                                  <&apps_smmu     
2692                 };                               
2693                                                  
2694                 crypto: crypto@1dfa000 {         
2695                         compatible = "qcom,cr    
2696                         reg = <0 0x01dfa000 0    
2697                         clocks = <&gcc GCC_CE    
2698                                  <&gcc GCC_CE    
2699                                  <&rpmhcc RPM    
2700                         clock-names = "iface"    
2701                         dmas = <&cryptobam 6>    
2702                         dma-names = "rx", "tx    
2703                         iommus = <&apps_smmu     
2704                                  <&apps_smmu     
2705                                  <&apps_smmu     
2706                                  <&apps_smmu     
2707                 };                               
2708                                                  
2709                 ipa: ipa@1e40000 {               
2710                         compatible = "qcom,sd    
2711                                                  
2712                         iommus = <&apps_smmu     
2713                                  <&apps_smmu     
2714                         reg = <0 0x01e40000 0    
2715                               <0 0x01e47000 0    
2716                               <0 0x01e04000 0    
2717                         reg-names = "ipa-reg"    
2718                                     "ipa-shar    
2719                                     "gsi";       
2720                                                  
2721                         interrupts-extended =    
2722                                                  
2723                                                  
2724                                                  
2725                         interrupt-names = "ip    
2726                                           "gs    
2727                                           "ip    
2728                                           "ip    
2729                                                  
2730                         clocks = <&rpmhcc RPM    
2731                         clock-names = "core";    
2732                                                  
2733                         interconnects = <&agg    
2734                                         <&agg    
2735                                         <&gla    
2736                         interconnect-names =     
2737                                                  
2738                                                  
2739                                                  
2740                         qcom,smem-states = <&    
2741                                            <&    
2742                         qcom,smem-state-names    
2743                                                  
2744                                                  
2745                         status = "disabled";     
2746                 };                               
2747                                                  
2748                 tcsr_mutex: hwlock@1f40000 {     
2749                         compatible = "qcom,tc    
2750                         reg = <0 0x01f40000 0    
2751                         #hwlock-cells = <1>;     
2752                 };                               
2753                                                  
2754                 tcsr_regs_1: syscon@1f60000 {    
2755                         compatible = "qcom,sd    
2756                         reg = <0 0x01f60000 0    
2757                 };                               
2758                                                  
2759                 tlmm: pinctrl@3400000 {          
2760                         compatible = "qcom,sd    
2761                         reg = <0 0x03400000 0    
2762                         interrupts = <GIC_SPI    
2763                         gpio-controller;         
2764                         #gpio-cells = <2>;       
2765                         interrupt-controller;    
2766                         #interrupt-cells = <2    
2767                         gpio-ranges = <&tlmm     
2768                         wakeup-parent = <&pdc    
2769                                                  
2770                         cci0_default: cci0-de    
2771                                 /* SDA, SCL *    
2772                                 pins = "gpio1    
2773                                 function = "c    
2774                                                  
2775                                 bias-pull-up;    
2776                                 drive-strengt    
2777                         };                       
2778                                                  
2779                         cci0_sleep: cci0-slee    
2780                                 /* SDA, SCL *    
2781                                 pins = "gpio1    
2782                                 function = "c    
2783                                                  
2784                                 drive-strengt    
2785                                 bias-pull-dow    
2786                         };                       
2787                                                  
2788                         cci1_default: cci1-de    
2789                                 /* SDA, SCL *    
2790                                 pins = "gpio1    
2791                                 function = "c    
2792                                                  
2793                                 bias-pull-up;    
2794                                 drive-strengt    
2795                         };                       
2796                                                  
2797                         cci1_sleep: cci1-slee    
2798                                 /* SDA, SCL *    
2799                                 pins = "gpio1    
2800                                 function = "c    
2801                                                  
2802                                 drive-strengt    
2803                                 bias-pull-dow    
2804                         };                       
2805                                                  
2806                         qspi_clk: qspi-clk-st    
2807                                 pins = "gpio9    
2808                                 function = "q    
2809                         };                       
2810                                                  
2811                         qspi_cs0: qspi-cs0-st    
2812                                 pins = "gpio9    
2813                                 function = "q    
2814                         };                       
2815                                                  
2816                         qspi_cs1: qspi-cs1-st    
2817                                 pins = "gpio8    
2818                                 function = "q    
2819                         };                       
2820                                                  
2821                         qspi_data0: qspi-data    
2822                                 pins = "gpio9    
2823                                 function = "q    
2824                         };                       
2825                                                  
2826                         qspi_data1: qspi-data    
2827                                 pins = "gpio9    
2828                                 function = "q    
2829                         };                       
2830                                                  
2831                         qspi_data23: qspi-dat    
2832                                 pins = "gpio9    
2833                                 function = "q    
2834                         };                       
2835                                                  
2836                         qup_i2c0_default: qup    
2837                                 pins = "gpio0    
2838                                 function = "q    
2839                         };                       
2840                                                  
2841                         qup_i2c1_default: qup    
2842                                 pins = "gpio1    
2843                                 function = "q    
2844                         };                       
2845                                                  
2846                         qup_i2c2_default: qup    
2847                                 pins = "gpio2    
2848                                 function = "q    
2849                         };                       
2850                                                  
2851                         qup_i2c3_default: qup    
2852                                 pins = "gpio4    
2853                                 function = "q    
2854                         };                       
2855                                                  
2856                         qup_i2c4_default: qup    
2857                                 pins = "gpio8    
2858                                 function = "q    
2859                         };                       
2860                                                  
2861                         qup_i2c5_default: qup    
2862                                 pins = "gpio8    
2863                                 function = "q    
2864                         };                       
2865                                                  
2866                         qup_i2c6_default: qup    
2867                                 pins = "gpio4    
2868                                 function = "q    
2869                         };                       
2870                                                  
2871                         qup_i2c7_default: qup    
2872                                 pins = "gpio9    
2873                                 function = "q    
2874                         };                       
2875                                                  
2876                         qup_i2c8_default: qup    
2877                                 pins = "gpio6    
2878                                 function = "q    
2879                         };                       
2880                                                  
2881                         qup_i2c9_default: qup    
2882                                 pins = "gpio6    
2883                                 function = "q    
2884                         };                       
2885                                                  
2886                         qup_i2c10_default: qu    
2887                                 pins = "gpio5    
2888                                 function = "q    
2889                         };                       
2890                                                  
2891                         qup_i2c11_default: qu    
2892                                 pins = "gpio3    
2893                                 function = "q    
2894                         };                       
2895                                                  
2896                         qup_i2c12_default: qu    
2897                                 pins = "gpio4    
2898                                 function = "q    
2899                         };                       
2900                                                  
2901                         qup_i2c13_default: qu    
2902                                 pins = "gpio1    
2903                                 function = "q    
2904                         };                       
2905                                                  
2906                         qup_i2c14_default: qu    
2907                                 pins = "gpio3    
2908                                 function = "q    
2909                         };                       
2910                                                  
2911                         qup_i2c15_default: qu    
2912                                 pins = "gpio8    
2913                                 function = "q    
2914                         };                       
2915                                                  
2916                         qup_spi0_default: qup    
2917                                 pins = "gpio0    
2918                                 function = "q    
2919                         };                       
2920                                                  
2921                         qup_spi1_default: qup    
2922                                 pins = "gpio1    
2923                                 function = "q    
2924                         };                       
2925                                                  
2926                         qup_spi2_default: qup    
2927                                 pins = "gpio2    
2928                                 function = "q    
2929                         };                       
2930                                                  
2931                         qup_spi3_default: qup    
2932                                 pins = "gpio4    
2933                                 function = "q    
2934                         };                       
2935                                                  
2936                         qup_spi4_default: qup    
2937                                 pins = "gpio8    
2938                                 function = "q    
2939                         };                       
2940                                                  
2941                         qup_spi5_default: qup    
2942                                 pins = "gpio8    
2943                                 function = "q    
2944                         };                       
2945                                                  
2946                         qup_spi6_default: qup    
2947                                 pins = "gpio4    
2948                                 function = "q    
2949                         };                       
2950                                                  
2951                         qup_spi7_default: qup    
2952                                 pins = "gpio9    
2953                                 function = "q    
2954                         };                       
2955                                                  
2956                         qup_spi8_default: qup    
2957                                 pins = "gpio6    
2958                                 function = "q    
2959                         };                       
2960                                                  
2961                         qup_spi9_default: qup    
2962                                 pins = "gpio6    
2963                                 function = "q    
2964                         };                       
2965                                                  
2966                         qup_spi10_default: qu    
2967                                 pins = "gpio5    
2968                                 function = "q    
2969                         };                       
2970                                                  
2971                         qup_spi11_default: qu    
2972                                 pins = "gpio3    
2973                                 function = "q    
2974                         };                       
2975                                                  
2976                         qup_spi12_default: qu    
2977                                 pins = "gpio4    
2978                                 function = "q    
2979                         };                       
2980                                                  
2981                         qup_spi13_default: qu    
2982                                 pins = "gpio1    
2983                                 function = "q    
2984                         };                       
2985                                                  
2986                         qup_spi14_default: qu    
2987                                 pins = "gpio3    
2988                                 function = "q    
2989                         };                       
2990                                                  
2991                         qup_spi15_default: qu    
2992                                 pins = "gpio8    
2993                                 function = "q    
2994                         };                       
2995                                                  
2996                         qup_uart0_default: qu    
2997                                 qup_uart0_tx:    
2998                                         pins     
2999                                         funct    
3000                                 };               
3001                                                  
3002                                 qup_uart0_rx:    
3003                                         pins     
3004                                         funct    
3005                                 };               
3006                         };                       
3007                                                  
3008                         qup_uart1_default: qu    
3009                                 qup_uart1_tx:    
3010                                         pins     
3011                                         funct    
3012                                 };               
3013                                                  
3014                                 qup_uart1_rx:    
3015                                         pins     
3016                                         funct    
3017                                 };               
3018                         };                       
3019                                                  
3020                         qup_uart2_default: qu    
3021                                 qup_uart2_tx:    
3022                                         pins     
3023                                         funct    
3024                                 };               
3025                                                  
3026                                 qup_uart2_rx:    
3027                                         pins     
3028                                         funct    
3029                                 };               
3030                         };                       
3031                                                  
3032                         qup_uart3_default: qu    
3033                                 qup_uart3_tx:    
3034                                         pins     
3035                                         funct    
3036                                 };               
3037                                                  
3038                                 qup_uart3_rx:    
3039                                         pins     
3040                                         funct    
3041                                 };               
3042                         };                       
3043                                                  
3044                         qup_uart3_4pin: qup-u    
3045                                 qup_uart3_4pi    
3046                                         pins     
3047                                         funct    
3048                                 };               
3049                                                  
3050                                 qup_uart3_4pi    
3051                                         pins     
3052                                         funct    
3053                                 };               
3054                                                  
3055                                 qup_uart3_4pi    
3056                                         pins     
3057                                         funct    
3058                                 };               
3059                         };                       
3060                                                  
3061                         qup_uart4_default: qu    
3062                                 qup_uart4_tx:    
3063                                         pins     
3064                                         funct    
3065                                 };               
3066                                                  
3067                                 qup_uart4_rx:    
3068                                         pins     
3069                                         funct    
3070                                 };               
3071                         };                       
3072                                                  
3073                         qup_uart5_default: qu    
3074                                 qup_uart5_tx:    
3075                                         pins     
3076                                         funct    
3077                                 };               
3078                                                  
3079                                 qup_uart5_rx:    
3080                                         pins     
3081                                         funct    
3082                                 };               
3083                         };                       
3084                                                  
3085                         qup_uart6_default: qu    
3086                                 qup_uart6_tx:    
3087                                         pins     
3088                                         funct    
3089                                 };               
3090                                                  
3091                                 qup_uart6_rx:    
3092                                         pins     
3093                                         funct    
3094                                 };               
3095                         };                       
3096                                                  
3097                         qup_uart6_4pin: qup-u    
3098                                 qup_uart6_4pi    
3099                                         pins     
3100                                         funct    
3101                                         bias-    
3102                                 };               
3103                                                  
3104                                 qup_uart6_4pi    
3105                                         pins     
3106                                         funct    
3107                                         drive    
3108                                         bias-    
3109                                 };               
3110                                                  
3111                                 qup_uart6_4pi    
3112                                         pins     
3113                                         funct    
3114                                         bias-    
3115                                 };               
3116                         };                       
3117                                                  
3118                         qup_uart7_default: qu    
3119                                 qup_uart7_tx:    
3120                                         pins     
3121                                         funct    
3122                                 };               
3123                                                  
3124                                 qup_uart7_rx:    
3125                                         pins     
3126                                         funct    
3127                                 };               
3128                         };                       
3129                                                  
3130                         qup_uart8_default: qu    
3131                                 qup_uart8_tx:    
3132                                         pins     
3133                                         funct    
3134                                 };               
3135                                                  
3136                                 qup_uart8_rx:    
3137                                         pins     
3138                                         funct    
3139                                 };               
3140                         };                       
3141                                                  
3142                         qup_uart9_default: qu    
3143                                 qup_uart9_tx:    
3144                                         pins     
3145                                         funct    
3146                                 };               
3147                                                  
3148                                 qup_uart9_rx:    
3149                                         pins     
3150                                         funct    
3151                                 };               
3152                         };                       
3153                                                  
3154                         qup_uart10_default: q    
3155                                 qup_uart10_tx    
3156                                         pins     
3157                                         funct    
3158                                 };               
3159                                                  
3160                                 qup_uart10_rx    
3161                                         pins     
3162                                         funct    
3163                                 };               
3164                         };                       
3165                                                  
3166                         qup_uart11_default: q    
3167                                 qup_uart11_tx    
3168                                         pins     
3169                                         funct    
3170                                 };               
3171                                                  
3172                                 qup_uart11_rx    
3173                                         pins     
3174                                         funct    
3175                                 };               
3176                         };                       
3177                                                  
3178                         qup_uart12_default: q    
3179                                 qup_uart12_tx    
3180                                         pins     
3181                                         funct    
3182                                 };               
3183                                                  
3184                                 qup_uart12_rx    
3185                                         pins     
3186                                         funct    
3187                                 };               
3188                         };                       
3189                                                  
3190                         qup_uart13_default: q    
3191                                 qup_uart13_tx    
3192                                         pins     
3193                                         funct    
3194                                 };               
3195                                                  
3196                                 qup_uart13_rx    
3197                                         pins     
3198                                         funct    
3199                                 };               
3200                         };                       
3201                                                  
3202                         qup_uart14_default: q    
3203                                 qup_uart14_tx    
3204                                         pins     
3205                                         funct    
3206                                 };               
3207                                                  
3208                                 qup_uart14_rx    
3209                                         pins     
3210                                         funct    
3211                                 };               
3212                         };                       
3213                                                  
3214                         qup_uart15_default: q    
3215                                 qup_uart15_tx    
3216                                         pins     
3217                                         funct    
3218                                 };               
3219                                                  
3220                                 qup_uart15_rx    
3221                                         pins     
3222                                         funct    
3223                                 };               
3224                         };                       
3225                                                  
3226                         quat_mi2s_sleep: quat    
3227                                 pins = "gpio5    
3228                                 function = "g    
3229                                 drive-strengt    
3230                                 bias-pull-dow    
3231                         };                       
3232                                                  
3233                         quat_mi2s_active: qua    
3234                                 pins = "gpio5    
3235                                 function = "q    
3236                                 drive-strengt    
3237                                 bias-disable;    
3238                                 output-high;     
3239                         };                       
3240                                                  
3241                         quat_mi2s_sd0_sleep:     
3242                                 pins = "gpio6    
3243                                 function = "g    
3244                                 drive-strengt    
3245                                 bias-pull-dow    
3246                         };                       
3247                                                  
3248                         quat_mi2s_sd0_active:    
3249                                 pins = "gpio6    
3250                                 function = "q    
3251                                 drive-strengt    
3252                                 bias-disable;    
3253                         };                       
3254                                                  
3255                         quat_mi2s_sd1_sleep:     
3256                                 pins = "gpio6    
3257                                 function = "g    
3258                                 drive-strengt    
3259                                 bias-pull-dow    
3260                         };                       
3261                                                  
3262                         quat_mi2s_sd1_active:    
3263                                 pins = "gpio6    
3264                                 function = "q    
3265                                 drive-strengt    
3266                                 bias-disable;    
3267                         };                       
3268                                                  
3269                         quat_mi2s_sd2_sleep:     
3270                                 pins = "gpio6    
3271                                 function = "g    
3272                                 drive-strengt    
3273                                 bias-pull-dow    
3274                         };                       
3275                                                  
3276                         quat_mi2s_sd2_active:    
3277                                 pins = "gpio6    
3278                                 function = "q    
3279                                 drive-strengt    
3280                                 bias-disable;    
3281                         };                       
3282                                                  
3283                         quat_mi2s_sd3_sleep:     
3284                                 pins = "gpio6    
3285                                 function = "g    
3286                                 drive-strengt    
3287                                 bias-pull-dow    
3288                         };                       
3289                                                  
3290                         quat_mi2s_sd3_active:    
3291                                 pins = "gpio6    
3292                                 function = "q    
3293                                 drive-strengt    
3294                                 bias-disable;    
3295                         };                       
3296                 };                               
3297                                                  
3298                 mss_pil: remoteproc@4080000 {    
3299                         compatible = "qcom,sd    
3300                         reg = <0 0x04080000 0    
3301                         reg-names = "qdsp6",     
3302                                                  
3303                         interrupts-extended =    
3304                                 <&intc GIC_SP    
3305                                 <&modem_smp2p    
3306                                 <&modem_smp2p    
3307                                 <&modem_smp2p    
3308                                 <&modem_smp2p    
3309                                 <&modem_smp2p    
3310                         interrupt-names = "wd    
3311                                           "ha    
3312                                           "sh    
3313                                                  
3314                         clocks = <&gcc GCC_MS    
3315                                  <&gcc GCC_MS    
3316                                  <&gcc GCC_BO    
3317                                  <&gcc GCC_MS    
3318                                  <&gcc GCC_MS    
3319                                  <&gcc GCC_MS    
3320                                  <&gcc GCC_PR    
3321                                  <&rpmhcc RPM    
3322                         clock-names = "iface"    
3323                                       "snoc_a    
3324                                                  
3325                         qcom,qmp = <&aoss_qmp    
3326                                                  
3327                         qcom,smem-states = <&    
3328                         qcom,smem-state-names    
3329                                                  
3330                         resets = <&aoss_reset    
3331                                  <&pdc_reset     
3332                         reset-names = "mss_re    
3333                                                  
3334                         qcom,halt-regs = <&tc    
3335                                                  
3336                         power-domains = <&rpm    
3337                                         <&rpm    
3338                                         <&rpm    
3339                         power-domain-names =     
3340                                                  
3341                         status = "disabled";     
3342                                                  
3343                         mba {                    
3344                                 memory-region    
3345                         };                       
3346                                                  
3347                         mpss {                   
3348                                 memory-region    
3349                         };                       
3350                                                  
3351                         metadata {               
3352                                 memory-region    
3353                         };                       
3354                                                  
3355                         glink-edge {             
3356                                 interrupts =     
3357                                 label = "mode    
3358                                 qcom,remote-p    
3359                                 mboxes = <&ap    
3360                         };                       
3361                 };                               
3362                                                  
3363                 gpucc: clock-controller@50900    
3364                         compatible = "qcom,sd    
3365                         reg = <0 0x05090000 0    
3366                         #clock-cells = <1>;      
3367                         #reset-cells = <1>;      
3368                         #power-domain-cells =    
3369                         clocks = <&rpmhcc RPM    
3370                                  <&gcc GCC_GP    
3371                                  <&gcc GCC_GP    
3372                         clock-names = "bi_tcx    
3373                                       "gcc_gp    
3374                                       "gcc_gp    
3375                 };                               
3376                                                  
3377                 slpi_pas: remoteproc@5c00000     
3378                         compatible = "qcom,sd    
3379                         reg = <0 0x5c00000 0     
3380                                                  
3381                         interrupts-extended =    
3382                                                  
3383                                                  
3384                                                  
3385                                                  
3386                         interrupt-names = "wd    
3387                                                  
3388                                                  
3389                         clocks = <&rpmhcc RPM    
3390                         clock-names = "xo";      
3391                                                  
3392                         qcom,qmp = <&aoss_qmp    
3393                                                  
3394                         power-domains = <&rpm    
3395                                         <&rpm    
3396                         power-domain-names =     
3397                                                  
3398                         memory-region = <&slp    
3399                                                  
3400                         qcom,smem-states = <&    
3401                         qcom,smem-state-names    
3402                                                  
3403                         status = "disabled";     
3404                                                  
3405                         glink-edge {             
3406                                 interrupts =     
3407                                 label = "dsps    
3408                                 qcom,remote-p    
3409                                 mboxes = <&ap    
3410                                                  
3411                                 fastrpc {        
3412                                         compa    
3413                                         qcom,    
3414                                         label    
3415                                         qcom,    
3416                                         qcom,    
3417                                                  
3418                                         memor    
3419                                         #addr    
3420                                         #size    
3421                                                  
3422                                         compu    
3423                                                  
3424                                                  
3425                                         };       
3426                                 };               
3427                         };                       
3428                 };                               
3429                                                  
3430                 stm@6002000 {                    
3431                         compatible = "arm,cor    
3432                         reg = <0 0x06002000 0    
3433                               <0 0x16280000 0    
3434                         reg-names = "stm-base    
3435                                                  
3436                         clocks = <&aoss_qmp>;    
3437                         clock-names = "apb_pc    
3438                                                  
3439                         out-ports {              
3440                                 port {           
3441                                         stm_o    
3442                                                  
3443                                                  
3444                                         };       
3445                                 };               
3446                         };                       
3447                 };                               
3448                                                  
3449                 funnel@6041000 {                 
3450                         compatible = "arm,cor    
3451                         reg = <0 0x06041000 0    
3452                                                  
3453                         clocks = <&aoss_qmp>;    
3454                         clock-names = "apb_pc    
3455                                                  
3456                         out-ports {              
3457                                 port {           
3458                                         funne    
3459                                                  
3460                                                  
3461                                         };       
3462                                 };               
3463                         };                       
3464                                                  
3465                         in-ports {               
3466                                 #address-cell    
3467                                 #size-cells =    
3468                                                  
3469                                 port@7 {         
3470                                         reg =    
3471                                         funne    
3472                                                  
3473                                         };       
3474                                 };               
3475                         };                       
3476                 };                               
3477                                                  
3478                 funnel@6043000 {                 
3479                         compatible = "arm,cor    
3480                         reg = <0 0x06043000 0    
3481                                                  
3482                         clocks = <&aoss_qmp>;    
3483                         clock-names = "apb_pc    
3484                                                  
3485                         out-ports {              
3486                                 port {           
3487                                         funne    
3488                                                  
3489                                                  
3490                                         };       
3491                                 };               
3492                         };                       
3493                                                  
3494                         in-ports {               
3495                                 #address-cell    
3496                                 #size-cells =    
3497                                                  
3498                                 port@5 {         
3499                                         reg =    
3500                                         funne    
3501                                                  
3502                                                  
3503                                         };       
3504                                 };               
3505                         };                       
3506                 };                               
3507                                                  
3508                 funnel@6045000 {                 
3509                         compatible = "arm,cor    
3510                         reg = <0 0x06045000 0    
3511                                                  
3512                         clocks = <&aoss_qmp>;    
3513                         clock-names = "apb_pc    
3514                                                  
3515                         out-ports {              
3516                                 port {           
3517                                         merge    
3518                                                  
3519                                         };       
3520                                 };               
3521                         };                       
3522                                                  
3523                         in-ports {               
3524                                 #address-cell    
3525                                 #size-cells =    
3526                                                  
3527                                 port@0 {         
3528                                         reg =    
3529                                         merge    
3530                                                  
3531                                                  
3532                                         };       
3533                                 };               
3534                                                  
3535                                 port@2 {         
3536                                         reg =    
3537                                         merge    
3538                                                  
3539                                                  
3540                                         };       
3541                                 };               
3542                         };                       
3543                 };                               
3544                                                  
3545                 replicator@6046000 {             
3546                         compatible = "arm,cor    
3547                         reg = <0 0x06046000 0    
3548                                                  
3549                         clocks = <&aoss_qmp>;    
3550                         clock-names = "apb_pc    
3551                                                  
3552                         out-ports {              
3553                                 port {           
3554                                         repli    
3555                                                  
3556                                         };       
3557                                 };               
3558                         };                       
3559                                                  
3560                         in-ports {               
3561                                 port {           
3562                                         repli    
3563                                                  
3564                                         };       
3565                                 };               
3566                         };                       
3567                 };                               
3568                                                  
3569                 etf@6047000 {                    
3570                         compatible = "arm,cor    
3571                         reg = <0 0x06047000 0    
3572                                                  
3573                         clocks = <&aoss_qmp>;    
3574                         clock-names = "apb_pc    
3575                                                  
3576                         out-ports {              
3577                                 port {           
3578                                         etf_o    
3579                                                  
3580                                                  
3581                                         };       
3582                                 };               
3583                         };                       
3584                                                  
3585                         in-ports {               
3586                                                  
3587                                 port {           
3588                                         etf_i    
3589                                                  
3590                                                  
3591                                         };       
3592                                 };               
3593                         };                       
3594                 };                               
3595                                                  
3596                 etr@6048000 {                    
3597                         compatible = "arm,cor    
3598                         reg = <0 0x06048000 0    
3599                                                  
3600                         clocks = <&aoss_qmp>;    
3601                         clock-names = "apb_pc    
3602                         arm,scatter-gather;      
3603                                                  
3604                         in-ports {               
3605                                 port {           
3606                                         etr_i    
3607                                                  
3608                                                  
3609                                         };       
3610                                 };               
3611                         };                       
3612                 };                               
3613                                                  
3614                 etm@7040000 {                    
3615                         compatible = "arm,cor    
3616                         reg = <0 0x07040000 0    
3617                                                  
3618                         cpu = <&CPU0>;           
3619                                                  
3620                         clocks = <&aoss_qmp>;    
3621                         clock-names = "apb_pc    
3622                         arm,coresight-loses-c    
3623                                                  
3624                         out-ports {              
3625                                 port {           
3626                                         etm0_    
3627                                                  
3628                                                  
3629                                         };       
3630                                 };               
3631                         };                       
3632                 };                               
3633                                                  
3634                 etm@7140000 {                    
3635                         compatible = "arm,cor    
3636                         reg = <0 0x07140000 0    
3637                                                  
3638                         cpu = <&CPU1>;           
3639                                                  
3640                         clocks = <&aoss_qmp>;    
3641                         clock-names = "apb_pc    
3642                         arm,coresight-loses-c    
3643                                                  
3644                         out-ports {              
3645                                 port {           
3646                                         etm1_    
3647                                                  
3648                                                  
3649                                         };       
3650                                 };               
3651                         };                       
3652                 };                               
3653                                                  
3654                 etm@7240000 {                    
3655                         compatible = "arm,cor    
3656                         reg = <0 0x07240000 0    
3657                                                  
3658                         cpu = <&CPU2>;           
3659                                                  
3660                         clocks = <&aoss_qmp>;    
3661                         clock-names = "apb_pc    
3662                         arm,coresight-loses-c    
3663                                                  
3664                         out-ports {              
3665                                 port {           
3666                                         etm2_    
3667                                                  
3668                                                  
3669                                         };       
3670                                 };               
3671                         };                       
3672                 };                               
3673                                                  
3674                 etm@7340000 {                    
3675                         compatible = "arm,cor    
3676                         reg = <0 0x07340000 0    
3677                                                  
3678                         cpu = <&CPU3>;           
3679                                                  
3680                         clocks = <&aoss_qmp>;    
3681                         clock-names = "apb_pc    
3682                         arm,coresight-loses-c    
3683                                                  
3684                         out-ports {              
3685                                 port {           
3686                                         etm3_    
3687                                                  
3688                                                  
3689                                         };       
3690                                 };               
3691                         };                       
3692                 };                               
3693                                                  
3694                 etm@7440000 {                    
3695                         compatible = "arm,cor    
3696                         reg = <0 0x07440000 0    
3697                                                  
3698                         cpu = <&CPU4>;           
3699                                                  
3700                         clocks = <&aoss_qmp>;    
3701                         clock-names = "apb_pc    
3702                         arm,coresight-loses-c    
3703                                                  
3704                         out-ports {              
3705                                 port {           
3706                                         etm4_    
3707                                                  
3708                                                  
3709                                         };       
3710                                 };               
3711                         };                       
3712                 };                               
3713                                                  
3714                 etm@7540000 {                    
3715                         compatible = "arm,cor    
3716                         reg = <0 0x07540000 0    
3717                                                  
3718                         cpu = <&CPU5>;           
3719                                                  
3720                         clocks = <&aoss_qmp>;    
3721                         clock-names = "apb_pc    
3722                         arm,coresight-loses-c    
3723                                                  
3724                         out-ports {              
3725                                 port {           
3726                                         etm5_    
3727                                                  
3728                                                  
3729                                         };       
3730                                 };               
3731                         };                       
3732                 };                               
3733                                                  
3734                 etm@7640000 {                    
3735                         compatible = "arm,cor    
3736                         reg = <0 0x07640000 0    
3737                                                  
3738                         cpu = <&CPU6>;           
3739                                                  
3740                         clocks = <&aoss_qmp>;    
3741                         clock-names = "apb_pc    
3742                         arm,coresight-loses-c    
3743                                                  
3744                         out-ports {              
3745                                 port {           
3746                                         etm6_    
3747                                                  
3748                                                  
3749                                         };       
3750                                 };               
3751                         };                       
3752                 };                               
3753                                                  
3754                 etm@7740000 {                    
3755                         compatible = "arm,cor    
3756                         reg = <0 0x07740000 0    
3757                                                  
3758                         cpu = <&CPU7>;           
3759                                                  
3760                         clocks = <&aoss_qmp>;    
3761                         clock-names = "apb_pc    
3762                         arm,coresight-loses-c    
3763                                                  
3764                         out-ports {              
3765                                 port {           
3766                                         etm7_    
3767                                                  
3768                                                  
3769                                         };       
3770                                 };               
3771                         };                       
3772                 };                               
3773                                                  
3774                 funnel@7800000 { /* APSS Funn    
3775                         compatible = "arm,cor    
3776                         reg = <0 0x07800000 0    
3777                                                  
3778                         clocks = <&aoss_qmp>;    
3779                         clock-names = "apb_pc    
3780                                                  
3781                         out-ports {              
3782                                 port {           
3783                                         apss_    
3784                                                  
3785                                                  
3786                                         };       
3787                                 };               
3788                         };                       
3789                                                  
3790                         in-ports {               
3791                                 #address-cell    
3792                                 #size-cells =    
3793                                                  
3794                                 port@0 {         
3795                                         reg =    
3796                                         apss_    
3797                                                  
3798                                                  
3799                                         };       
3800                                 };               
3801                                                  
3802                                 port@1 {         
3803                                         reg =    
3804                                         apss_    
3805                                                  
3806                                                  
3807                                         };       
3808                                 };               
3809                                                  
3810                                 port@2 {         
3811                                         reg =    
3812                                         apss_    
3813                                                  
3814                                                  
3815                                         };       
3816                                 };               
3817                                                  
3818                                 port@3 {         
3819                                         reg =    
3820                                         apss_    
3821                                                  
3822                                                  
3823                                         };       
3824                                 };               
3825                                                  
3826                                 port@4 {         
3827                                         reg =    
3828                                         apss_    
3829                                                  
3830                                                  
3831                                         };       
3832                                 };               
3833                                                  
3834                                 port@5 {         
3835                                         reg =    
3836                                         apss_    
3837                                                  
3838                                                  
3839                                         };       
3840                                 };               
3841                                                  
3842                                 port@6 {         
3843                                         reg =    
3844                                         apss_    
3845                                                  
3846                                                  
3847                                         };       
3848                                 };               
3849                                                  
3850                                 port@7 {         
3851                                         reg =    
3852                                         apss_    
3853                                                  
3854                                                  
3855                                         };       
3856                                 };               
3857                         };                       
3858                 };                               
3859                                                  
3860                 funnel@7810000 {                 
3861                         compatible = "arm,cor    
3862                         reg = <0 0x07810000 0    
3863                                                  
3864                         clocks = <&aoss_qmp>;    
3865                         clock-names = "apb_pc    
3866                                                  
3867                         out-ports {              
3868                                 port {           
3869                                         apss_    
3870                                                  
3871                                                  
3872                                         };       
3873                                 };               
3874                         };                       
3875                                                  
3876                         in-ports {               
3877                                 port {           
3878                                         apss_    
3879                                                  
3880                                                  
3881                                         };       
3882                                 };               
3883                         };                       
3884                 };                               
3885                                                  
3886                 sdhc_2: mmc@8804000 {            
3887                         compatible = "qcom,sd    
3888                         reg = <0 0x08804000 0    
3889                                                  
3890                         interrupts = <GIC_SPI    
3891                                      <GIC_SPI    
3892                         interrupt-names = "hc    
3893                                                  
3894                         clocks = <&gcc GCC_SD    
3895                                  <&gcc GCC_SD    
3896                                  <&rpmhcc RPM    
3897                         clock-names = "iface"    
3898                         iommus = <&apps_smmu     
3899                         power-domains = <&rpm    
3900                         operating-points-v2 =    
3901                                                  
3902                         status = "disabled";     
3903                                                  
3904                         sdhc2_opp_table: opp-    
3905                                 compatible =     
3906                                                  
3907                                 opp-9600000 {    
3908                                         opp-h    
3909                                         requi    
3910                                 };               
3911                                                  
3912                                 opp-19200000     
3913                                         opp-h    
3914                                         requi    
3915                                 };               
3916                                                  
3917                                 opp-100000000    
3918                                         opp-h    
3919                                         requi    
3920                                 };               
3921                                                  
3922                                 opp-201500000    
3923                                         opp-h    
3924                                         requi    
3925                                 };               
3926                         };                       
3927                 };                               
3928                                                  
3929                 qspi: spi@88df000 {              
3930                         compatible = "qcom,sd    
3931                         reg = <0 0x088df000 0    
3932                         iommus = <&apps_smmu     
3933                         #address-cells = <1>;    
3934                         #size-cells = <0>;       
3935                         interrupts = <GIC_SPI    
3936                         clocks = <&gcc GCC_QS    
3937                                  <&gcc GCC_QS    
3938                         clock-names = "iface"    
3939                         power-domains = <&rpm    
3940                         operating-points-v2 =    
3941                         status = "disabled";     
3942                 };                               
3943                                                  
3944                 slim: slim-ngd@171c0000 {        
3945                         compatible = "qcom,sl    
3946                         reg = <0 0x171c0000 0    
3947                         interrupts = <GIC_SPI    
3948                                                  
3949                         dmas = <&slimbam 3>,     
3950                         dma-names = "rx", "tx    
3951                                                  
3952                         iommus = <&apps_smmu     
3953                         #address-cells = <1>;    
3954                         #size-cells = <0>;       
3955                         status = "disabled";     
3956                 };                               
3957                                                  
3958                 lmh_cluster1: lmh@17d70800 {     
3959                         compatible = "qcom,sd    
3960                         reg = <0 0x17d70800 0    
3961                         interrupts = <GIC_SPI    
3962                         cpus = <&CPU4>;          
3963                         qcom,lmh-temp-arm-mil    
3964                         qcom,lmh-temp-low-mil    
3965                         qcom,lmh-temp-high-mi    
3966                         interrupt-controller;    
3967                         #interrupt-cells = <1    
3968                 };                               
3969                                                  
3970                 lmh_cluster0: lmh@17d78800 {     
3971                         compatible = "qcom,sd    
3972                         reg = <0 0x17d78800 0    
3973                         interrupts = <GIC_SPI    
3974                         cpus = <&CPU0>;          
3975                         qcom,lmh-temp-arm-mil    
3976                         qcom,lmh-temp-low-mil    
3977                         qcom,lmh-temp-high-mi    
3978                         interrupt-controller;    
3979                         #interrupt-cells = <1    
3980                 };                               
3981                                                  
3982                 usb_1_hsphy: phy@88e2000 {       
3983                         compatible = "qcom,sd    
3984                         reg = <0 0x088e2000 0    
3985                         status = "disabled";     
3986                         #phy-cells = <0>;        
3987                                                  
3988                         clocks = <&gcc GCC_US    
3989                                  <&rpmhcc RPM    
3990                         clock-names = "cfg_ah    
3991                                                  
3992                         resets = <&gcc GCC_QU    
3993                                                  
3994                         nvmem-cells = <&qusb2    
3995                 };                               
3996                                                  
3997                 usb_2_hsphy: phy@88e3000 {       
3998                         compatible = "qcom,sd    
3999                         reg = <0 0x088e3000 0    
4000                         status = "disabled";     
4001                         #phy-cells = <0>;        
4002                                                  
4003                         clocks = <&gcc GCC_US    
4004                                  <&rpmhcc RPM    
4005                         clock-names = "cfg_ah    
4006                                                  
4007                         resets = <&gcc GCC_QU    
4008                                                  
4009                         nvmem-cells = <&qusb2    
4010                 };                               
4011                                                  
4012                 usb_1_qmpphy: phy@88e8000 {      
4013                         compatible = "qcom,sd    
4014                         reg = <0 0x088e8000 0    
4015                         status = "disabled";     
4016                                                  
4017                         clocks = <&gcc GCC_US    
4018                                  <&gcc GCC_US    
4019                                  <&gcc GCC_US    
4020                                  <&gcc GCC_US    
4021                                  <&gcc GCC_US    
4022                         clock-names = "aux",     
4023                                       "ref",     
4024                                       "com_au    
4025                                       "usb3_p    
4026                                       "cfg_ah    
4027                                                  
4028                         resets = <&gcc GCC_US    
4029                                  <&gcc GCC_US    
4030                         reset-names = "phy",     
4031                                                  
4032                         #clock-cells = <1>;      
4033                         #phy-cells = <1>;        
4034                         orientation-switch;      
4035                                                  
4036                         ports {                  
4037                                 #address-cell    
4038                                 #size-cells =    
4039                                                  
4040                                 port@0 {         
4041                                         reg =    
4042                                                  
4043                                         usb_1    
4044                                         };       
4045                                 };               
4046                                                  
4047                                 port@1 {         
4048                                         reg =    
4049                                                  
4050                                         usb_1    
4051                                                  
4052                                         };       
4053                                 };               
4054                                                  
4055                                 port@2 {         
4056                                         reg =    
4057                                                  
4058                                         usb_1    
4059                                                  
4060                                         };       
4061                                 };               
4062                         };                       
4063                 };                               
4064                                                  
4065                 usb_2_qmpphy: phy@88eb000 {      
4066                         compatible = "qcom,sd    
4067                         reg = <0 0x088eb000 0    
4068                                                  
4069                         clocks = <&gcc GCC_US    
4070                                  <&gcc GCC_US    
4071                                  <&gcc GCC_US    
4072                                  <&gcc GCC_US    
4073                                  <&gcc GCC_US    
4074                         clock-names = "aux",     
4075                                       "cfg_ah    
4076                                       "ref",     
4077                                       "com_au    
4078                                       "pipe";    
4079                         clock-output-names =     
4080                         #clock-cells = <0>;      
4081                         #phy-cells = <0>;        
4082                                                  
4083                         resets = <&gcc GCC_US    
4084                                  <&gcc GCC_US    
4085                         reset-names = "phy",     
4086                                       "phy_ph    
4087                                                  
4088                         status = "disabled";     
4089                 };                               
4090                                                  
4091                 usb_1: usb@a6f8800 {             
4092                         compatible = "qcom,sd    
4093                         reg = <0 0x0a6f8800 0    
4094                         status = "disabled";     
4095                         #address-cells = <2>;    
4096                         #size-cells = <2>;       
4097                         ranges;                  
4098                         dma-ranges;              
4099                                                  
4100                         clocks = <&gcc GCC_CF    
4101                                  <&gcc GCC_US    
4102                                  <&gcc GCC_AG    
4103                                  <&gcc GCC_US    
4104                                  <&gcc GCC_US    
4105                         clock-names = "cfg_no    
4106                                       "core",    
4107                                       "iface"    
4108                                       "sleep"    
4109                                       "mock_u    
4110                                                  
4111                         assigned-clocks = <&g    
4112                                           <&g    
4113                         assigned-clock-rates     
4114                                                  
4115                         interrupts-extended =    
4116                                                  
4117                                                  
4118                                                  
4119                                                  
4120                         interrupt-names = "pw    
4121                                           "hs    
4122                                           "dp    
4123                                           "dm    
4124                                           "ss    
4125                                                  
4126                         power-domains = <&gcc    
4127                                                  
4128                         resets = <&gcc GCC_US    
4129                                                  
4130                         interconnects = <&agg    
4131                                         <&gla    
4132                         interconnect-names =     
4133                                                  
4134                         usb_1_dwc3: usb@a6000    
4135                                 compatible =     
4136                                 reg = <0 0x0a    
4137                                 interrupts =     
4138                                 iommus = <&ap    
4139                                 snps,dis_u2_s    
4140                                 snps,dis_enbl    
4141                                 snps,parkmode    
4142                                 phys = <&usb_    
4143                                 phy-names = "    
4144                                                  
4145                                 ports {          
4146                                         #addr    
4147                                         #size    
4148                                                  
4149                                         port@    
4150                                                  
4151                                                  
4152                                                  
4153                                                  
4154                                         };       
4155                                                  
4156                                         port@    
4157                                                  
4158                                                  
4159                                                  
4160                                                  
4161                                                  
4162                                         };       
4163                                 };               
4164                         };                       
4165                 };                               
4166                                                  
4167                 usb_2: usb@a8f8800 {             
4168                         compatible = "qcom,sd    
4169                         reg = <0 0x0a8f8800 0    
4170                         status = "disabled";     
4171                         #address-cells = <2>;    
4172                         #size-cells = <2>;       
4173                         ranges;                  
4174                         dma-ranges;              
4175                                                  
4176                         clocks = <&gcc GCC_CF    
4177                                  <&gcc GCC_US    
4178                                  <&gcc GCC_AG    
4179                                  <&gcc GCC_US    
4180                                  <&gcc GCC_US    
4181                         clock-names = "cfg_no    
4182                                       "core",    
4183                                       "iface"    
4184                                       "sleep"    
4185                                       "mock_u    
4186                                                  
4187                         assigned-clocks = <&g    
4188                                           <&g    
4189                         assigned-clock-rates     
4190                                                  
4191                         interrupts-extended =    
4192                                                  
4193                                                  
4194                                                  
4195                                                  
4196                         interrupt-names = "pw    
4197                                           "hs    
4198                                           "dp    
4199                                           "dm    
4200                                           "ss    
4201                                                  
4202                         power-domains = <&gcc    
4203                                                  
4204                         resets = <&gcc GCC_US    
4205                                                  
4206                         interconnects = <&agg    
4207                                         <&gla    
4208                         interconnect-names =     
4209                                                  
4210                         usb_2_dwc3: usb@a8000    
4211                                 compatible =     
4212                                 reg = <0 0x0a    
4213                                 interrupts =     
4214                                 iommus = <&ap    
4215                                 snps,dis_u2_s    
4216                                 snps,dis_enbl    
4217                                 snps,parkmode    
4218                                 phys = <&usb_    
4219                                 phy-names = "    
4220                         };                       
4221                 };                               
4222                                                  
4223                 venus: video-codec@aa00000 {     
4224                         compatible = "qcom,sd    
4225                         reg = <0 0x0aa00000 0    
4226                         interrupts = <GIC_SPI    
4227                         power-domains = <&vid    
4228                                         <&vid    
4229                                         <&vid    
4230                                         <&rpm    
4231                         power-domain-names =     
4232                         operating-points-v2 =    
4233                         clocks = <&videocc VI    
4234                                  <&videocc VI    
4235                                  <&videocc VI    
4236                                  <&videocc VI    
4237                                  <&videocc VI    
4238                                  <&videocc VI    
4239                                  <&videocc VI    
4240                         clock-names = "core",    
4241                                       "vcodec    
4242                                       "vcodec    
4243                         iommus = <&apps_smmu     
4244                                  <&apps_smmu     
4245                         memory-region = <&ven    
4246                         interconnects = <&mms    
4247                                         <&gla    
4248                         interconnect-names =     
4249                                                  
4250                         status = "disabled";     
4251                                                  
4252                         video-core0 {            
4253                                 compatible =     
4254                         };                       
4255                                                  
4256                         video-core1 {            
4257                                 compatible =     
4258                         };                       
4259                                                  
4260                         venus_opp_table: opp-    
4261                                 compatible =     
4262                                                  
4263                                 opp-100000000    
4264                                         opp-h    
4265                                         requi    
4266                                 };               
4267                                                  
4268                                 opp-200000000    
4269                                         opp-h    
4270                                         requi    
4271                                 };               
4272                                                  
4273                                 opp-320000000    
4274                                         opp-h    
4275                                         requi    
4276                                 };               
4277                                                  
4278                                 opp-380000000    
4279                                         opp-h    
4280                                         requi    
4281                                 };               
4282                                                  
4283                                 opp-444000000    
4284                                         opp-h    
4285                                         requi    
4286                                 };               
4287                                                  
4288                                 opp-533000097    
4289                                         opp-h    
4290                                         requi    
4291                                 };               
4292                         };                       
4293                 };                               
4294                                                  
4295                 videocc: clock-controller@ab0    
4296                         compatible = "qcom,sd    
4297                         reg = <0 0x0ab00000 0    
4298                         clocks = <&rpmhcc RPM    
4299                         clock-names = "bi_tcx    
4300                         #clock-cells = <1>;      
4301                         #power-domain-cells =    
4302                         #reset-cells = <1>;      
4303                 };                               
4304                                                  
4305                 camss: camss@acb3000 {           
4306                         compatible = "qcom,sd    
4307                                                  
4308                         reg = <0 0x0acb3000 0    
4309                                 <0 0x0acba000    
4310                                 <0 0x0acc8000    
4311                                 <0 0x0ac65000    
4312                                 <0 0x0ac66000    
4313                                 <0 0x0ac67000    
4314                                 <0 0x0ac68000    
4315                                 <0 0x0acaf000    
4316                                 <0 0x0acb6000    
4317                                 <0 0x0acc4000    
4318                         reg-names = "csid0",     
4319                                 "csid1",         
4320                                 "csid2",         
4321                                 "csiphy0",       
4322                                 "csiphy1",       
4323                                 "csiphy2",       
4324                                 "csiphy3",       
4325                                 "vfe0",          
4326                                 "vfe1",          
4327                                 "vfe_lite";      
4328                                                  
4329                         interrupts = <GIC_SPI    
4330                                 <GIC_SPI 466     
4331                                 <GIC_SPI 468     
4332                                 <GIC_SPI 477     
4333                                 <GIC_SPI 478     
4334                                 <GIC_SPI 479     
4335                                 <GIC_SPI 448     
4336                                 <GIC_SPI 465     
4337                                 <GIC_SPI 467     
4338                                 <GIC_SPI 469     
4339                         interrupt-names = "cs    
4340                                 "csid1",         
4341                                 "csid2",         
4342                                 "csiphy0",       
4343                                 "csiphy1",       
4344                                 "csiphy2",       
4345                                 "csiphy3",       
4346                                 "vfe0",          
4347                                 "vfe1",          
4348                                 "vfe_lite";      
4349                                                  
4350                         power-domains = <&clo    
4351                                 <&clock_camcc    
4352                                 <&clock_camcc    
4353                                                  
4354                         clocks = <&clock_camc    
4355                                 <&clock_camcc    
4356                                 <&clock_camcc    
4357                                 <&clock_camcc    
4358                                 <&clock_camcc    
4359                                 <&clock_camcc    
4360                                 <&clock_camcc    
4361                                 <&clock_camcc    
4362                                 <&clock_camcc    
4363                                 <&clock_camcc    
4364                                 <&clock_camcc    
4365                                 <&clock_camcc    
4366                                 <&clock_camcc    
4367                                 <&clock_camcc    
4368                                 <&clock_camcc    
4369                                 <&clock_camcc    
4370                                 <&clock_camcc    
4371                                 <&clock_camcc    
4372                                 <&clock_camcc    
4373                                 <&clock_camcc    
4374                                 <&clock_camcc    
4375                                 <&gcc GCC_CAM    
4376                                 <&gcc GCC_CAM    
4377                                 <&clock_camcc    
4378                                 <&clock_camcc    
4379                                 <&clock_camcc    
4380                                 <&clock_camcc    
4381                                 <&clock_camcc    
4382                                 <&clock_camcc    
4383                                 <&clock_camcc    
4384                                 <&clock_camcc    
4385                                 <&clock_camcc    
4386                                 <&clock_camcc    
4387                                 <&clock_camcc    
4388                                 <&clock_camcc    
4389                                 <&clock_camcc    
4390                         clock-names = "camnoc    
4391                                 "cpas_ahb",      
4392                                 "cphy_rx_src"    
4393                                 "csi0",          
4394                                 "csi0_src",      
4395                                 "csi1",          
4396                                 "csi1_src",      
4397                                 "csi2",          
4398                                 "csi2_src",      
4399                                 "csiphy0",       
4400                                 "csiphy0_time    
4401                                 "csiphy0_time    
4402                                 "csiphy1",       
4403                                 "csiphy1_time    
4404                                 "csiphy1_time    
4405                                 "csiphy2",       
4406                                 "csiphy2_time    
4407                                 "csiphy2_time    
4408                                 "csiphy3",       
4409                                 "csiphy3_time    
4410                                 "csiphy3_time    
4411                                 "gcc_camera_a    
4412                                 "gcc_camera_a    
4413                                 "slow_ahb_src    
4414                                 "soc_ahb",       
4415                                 "vfe0_axi",      
4416                                 "vfe0",          
4417                                 "vfe0_cphy_rx    
4418                                 "vfe0_src",      
4419                                 "vfe1_axi",      
4420                                 "vfe1",          
4421                                 "vfe1_cphy_rx    
4422                                 "vfe1_src",      
4423                                 "vfe_lite",      
4424                                 "vfe_lite_cph    
4425                                 "vfe_lite_src    
4426                                                  
4427                         iommus = <&apps_smmu     
4428                                  <&apps_smmu     
4429                                  <&apps_smmu     
4430                                  <&apps_smmu     
4431                                                  
4432                         status = "disabled";     
4433                                                  
4434                         ports {                  
4435                                 #address-cell    
4436                                 #size-cells =    
4437                                                  
4438                                 port@0 {         
4439                                         reg =    
4440                                 };               
4441                                                  
4442                                 port@1 {         
4443                                         reg =    
4444                                 };               
4445                                                  
4446                                 port@2 {         
4447                                         reg =    
4448                                 };               
4449                                                  
4450                                 port@3 {         
4451                                         reg =    
4452                                 };               
4453                         };                       
4454                 };                               
4455                                                  
4456                 cci: cci@ac4a000 {               
4457                         compatible = "qcom,sd    
4458                         #address-cells = <1>;    
4459                         #size-cells = <0>;       
4460                                                  
4461                         reg = <0 0x0ac4a000 0    
4462                         interrupts = <GIC_SPI    
4463                         power-domains = <&clo    
4464                                                  
4465                         clocks = <&clock_camc    
4466                                 <&clock_camcc    
4467                                 <&clock_camcc    
4468                                 <&clock_camcc    
4469                                 <&clock_camcc    
4470                                 <&clock_camcc    
4471                         clock-names = "camnoc    
4472                                 "soc_ahb",       
4473                                 "slow_ahb_src    
4474                                 "cpas_ahb",      
4475                                 "cci",           
4476                                 "cci_src";       
4477                                                  
4478                         assigned-clocks = <&c    
4479                                 <&clock_camcc    
4480                         assigned-clock-rates     
4481                                                  
4482                         pinctrl-names = "defa    
4483                         pinctrl-0 = <&cci0_de    
4484                         pinctrl-1 = <&cci0_sl    
4485                                                  
4486                         status = "disabled";     
4487                                                  
4488                         cci_i2c0: i2c-bus@0 {    
4489                                 reg = <0>;       
4490                                 clock-frequen    
4491                                 #address-cell    
4492                                 #size-cells =    
4493                         };                       
4494                                                  
4495                         cci_i2c1: i2c-bus@1 {    
4496                                 reg = <1>;       
4497                                 clock-frequen    
4498                                 #address-cell    
4499                                 #size-cells =    
4500                         };                       
4501                 };                               
4502                                                  
4503                 clock_camcc: clock-controller    
4504                         compatible = "qcom,sd    
4505                         reg = <0 0x0ad00000 0    
4506                         #clock-cells = <1>;      
4507                         #reset-cells = <1>;      
4508                         #power-domain-cells =    
4509                         clocks = <&rpmhcc RPM    
4510                         clock-names = "bi_tcx    
4511                 };                               
4512                                                  
4513                 mdss: display-subsystem@ae000    
4514                         compatible = "qcom,sd    
4515                         reg = <0 0x0ae00000 0    
4516                         reg-names = "mdss";      
4517                                                  
4518                         power-domains = <&dis    
4519                                                  
4520                         clocks = <&dispcc DIS    
4521                                  <&dispcc DIS    
4522                         clock-names = "iface"    
4523                                                  
4524                         interrupts = <GIC_SPI    
4525                         interrupt-controller;    
4526                         #interrupt-cells = <1    
4527                                                  
4528                         interconnects = <&mms    
4529                                         <&mms    
4530                         interconnect-names =     
4531                                                  
4532                         iommus = <&apps_smmu     
4533                                  <&apps_smmu     
4534                                                  
4535                         status = "disabled";     
4536                                                  
4537                         #address-cells = <2>;    
4538                         #size-cells = <2>;       
4539                         ranges;                  
4540                                                  
4541                         mdss_mdp: display-con    
4542                                 compatible =     
4543                                 reg = <0 0x0a    
4544                                       <0 0x0a    
4545                                 reg-names = "    
4546                                                  
4547                                 clocks = <&gc    
4548                                          <&di    
4549                                          <&di    
4550                                          <&di    
4551                                          <&di    
4552                                 clock-names =    
4553                                                  
4554                                 assigned-cloc    
4555                                 assigned-cloc    
4556                                 operating-poi    
4557                                 power-domains    
4558                                                  
4559                                 interrupt-par    
4560                                 interrupts =     
4561                                                  
4562                                 ports {          
4563                                         #addr    
4564                                         #size    
4565                                                  
4566                                         port@    
4567                                                  
4568                                                  
4569                                                  
4570                                                  
4571                                         };       
4572                                                  
4573                                         port@    
4574                                                  
4575                                                  
4576                                                  
4577                                                  
4578                                         };       
4579                                                  
4580                                         port@    
4581                                                  
4582                                                  
4583                                                  
4584                                                  
4585                                         };       
4586                                 };               
4587                                                  
4588                                 mdp_opp_table    
4589                                         compa    
4590                                                  
4591                                         opp-1    
4592                                                  
4593                                                  
4594                                         };       
4595                                                  
4596                                         opp-1    
4597                                                  
4598                                                  
4599                                         };       
4600                                                  
4601                                         opp-3    
4602                                                  
4603                                                  
4604                                         };       
4605                                                  
4606                                         opp-4    
4607                                                  
4608                                                  
4609                                         };       
4610                                 };               
4611                         };                       
4612                                                  
4613                         mdss_dp: displayport-    
4614                                 status = "dis    
4615                                 compatible =     
4616                                                  
4617                                 reg = <0 0x0a    
4618                                       <0 0x0a    
4619                                       <0 0x0a    
4620                                       <0 0x0a    
4621                                       <0 0x0a    
4622                                                  
4623                                 interrupt-par    
4624                                 interrupts =     
4625                                                  
4626                                 clocks = <&di    
4627                                          <&di    
4628                                          <&di    
4629                                          <&di    
4630                                          <&di    
4631                                 clock-names =    
4632                                                  
4633                                 assigned-cloc    
4634                                                  
4635                                 assigned-cloc    
4636                                                  
4637                                 phys = <&usb_    
4638                                 phy-names = "    
4639                                                  
4640                                 operating-poi    
4641                                 power-domains    
4642                                                  
4643                                 ports {          
4644                                         #addr    
4645                                         #size    
4646                                         port@    
4647                                                  
4648                                                  
4649                                                  
4650                                                  
4651                                         };       
4652                                                  
4653                                         port@    
4654                                                  
4655                                                  
4656                                                  
4657                                                  
4658                                         };       
4659                                 };               
4660                                                  
4661                                 dp_opp_table:    
4662                                         compa    
4663                                                  
4664                                         opp-1    
4665                                                  
4666                                                  
4667                                         };       
4668                                                  
4669                                         opp-2    
4670                                                  
4671                                                  
4672                                         };       
4673                                                  
4674                                         opp-5    
4675                                                  
4676                                                  
4677                                         };       
4678                                                  
4679                                         opp-8    
4680                                                  
4681                                                  
4682                                         };       
4683                                 };               
4684                         };                       
4685                                                  
4686                         mdss_dsi0: dsi@ae9400    
4687                                 compatible =     
4688                                                  
4689                                 reg = <0 0x0a    
4690                                 reg-names = "    
4691                                                  
4692                                 interrupt-par    
4693                                 interrupts =     
4694                                                  
4695                                 clocks = <&di    
4696                                          <&di    
4697                                          <&di    
4698                                          <&di    
4699                                          <&di    
4700                                          <&di    
4701                                 clock-names =    
4702                                                  
4703                                                  
4704                                                  
4705                                                  
4706                                                  
4707                                 assigned-cloc    
4708                                 assigned-cloc    
4709                                                  
4710                                 operating-poi    
4711                                 power-domains    
4712                                                  
4713                                 phys = <&mdss    
4714                                                  
4715                                 status = "dis    
4716                                                  
4717                                 #address-cell    
4718                                 #size-cells =    
4719                                                  
4720                                 ports {          
4721                                         #addr    
4722                                         #size    
4723                                                  
4724                                         port@    
4725                                                  
4726                                                  
4727                                                  
4728                                                  
4729                                         };       
4730                                                  
4731                                         port@    
4732                                                  
4733                                                  
4734                                                  
4735                                         };       
4736                                 };               
4737                         };                       
4738                                                  
4739                         mdss_dsi0_phy: phy@ae    
4740                                 compatible =     
4741                                 reg = <0 0x0a    
4742                                       <0 0x0a    
4743                                       <0 0x0a    
4744                                 reg-names = "    
4745                                             "    
4746                                             "    
4747                                                  
4748                                 #clock-cells     
4749                                 #phy-cells =     
4750                                                  
4751                                 clocks = <&di    
4752                                          <&rp    
4753                                 clock-names =    
4754                                                  
4755                                 status = "dis    
4756                         };                       
4757                                                  
4758                         mdss_dsi1: dsi@ae9600    
4759                                 compatible =     
4760                                                  
4761                                 reg = <0 0x0a    
4762                                 reg-names = "    
4763                                                  
4764                                 interrupt-par    
4765                                 interrupts =     
4766                                                  
4767                                 clocks = <&di    
4768                                          <&di    
4769                                          <&di    
4770                                          <&di    
4771                                          <&di    
4772                                          <&di    
4773                                 clock-names =    
4774                                                  
4775                                                  
4776                                                  
4777                                                  
4778                                                  
4779                                 assigned-cloc    
4780                                 assigned-cloc    
4781                                                  
4782                                 operating-poi    
4783                                 power-domains    
4784                                                  
4785                                 phys = <&mdss    
4786                                                  
4787                                 status = "dis    
4788                                                  
4789                                 #address-cell    
4790                                 #size-cells =    
4791                                                  
4792                                 ports {          
4793                                         #addr    
4794                                         #size    
4795                                                  
4796                                         port@    
4797                                                  
4798                                                  
4799                                                  
4800                                                  
4801                                         };       
4802                                                  
4803                                         port@    
4804                                                  
4805                                                  
4806                                                  
4807                                         };       
4808                                 };               
4809                         };                       
4810                                                  
4811                         mdss_dsi1_phy: phy@ae    
4812                                 compatible =     
4813                                 reg = <0 0x0a    
4814                                       <0 0x0a    
4815                                       <0 0x0a    
4816                                 reg-names = "    
4817                                             "    
4818                                             "    
4819                                                  
4820                                 #clock-cells     
4821                                 #phy-cells =     
4822                                                  
4823                                 clocks = <&di    
4824                                          <&rp    
4825                                 clock-names =    
4826                                                  
4827                                 status = "dis    
4828                         };                       
4829                 };                               
4830                                                  
4831                 gpu: gpu@5000000 {               
4832                         compatible = "qcom,ad    
4833                                                  
4834                         reg = <0 0x05000000 0    
4835                         reg-names = "kgsl_3d0    
4836                                                  
4837                         /*                       
4838                          * Look ma, no clocks    
4839                          * controlled entirel    
4840                          */                      
4841                                                  
4842                         interrupts = <GIC_SPI    
4843                                                  
4844                         iommus = <&adreno_smm    
4845                                                  
4846                         operating-points-v2 =    
4847                                                  
4848                         qcom,gmu = <&gmu>;       
4849                         #cooling-cells = <2>;    
4850                                                  
4851                         interconnects = <&mem    
4852                         interconnect-names =     
4853                                                  
4854                         status = "disabled";     
4855                                                  
4856                         gpu_opp_table: opp-ta    
4857                                 compatible =     
4858                                                  
4859                                 opp-710000000    
4860                                         opp-h    
4861                                         opp-l    
4862                                         opp-p    
4863                                 };               
4864                                                  
4865                                 opp-675000000    
4866                                         opp-h    
4867                                         opp-l    
4868                                         opp-p    
4869                                 };               
4870                                                  
4871                                 opp-596000000    
4872                                         opp-h    
4873                                         opp-l    
4874                                         opp-p    
4875                                 };               
4876                                                  
4877                                 opp-520000000    
4878                                         opp-h    
4879                                         opp-l    
4880                                         opp-p    
4881                                 };               
4882                                                  
4883                                 opp-414000000    
4884                                         opp-h    
4885                                         opp-l    
4886                                         opp-p    
4887                                 };               
4888                                                  
4889                                 opp-342000000    
4890                                         opp-h    
4891                                         opp-l    
4892                                         opp-p    
4893                                 };               
4894                                                  
4895                                 opp-257000000    
4896                                         opp-h    
4897                                         opp-l    
4898                                         opp-p    
4899                                 };               
4900                         };                       
4901                 };                               
4902                                                  
4903                 adreno_smmu: iommu@5040000 {     
4904                         compatible = "qcom,sd    
4905                         reg = <0 0x05040000 0    
4906                         #iommu-cells = <1>;      
4907                         #global-interrupts =     
4908                         interrupts = <GIC_SPI    
4909                                      <GIC_SPI    
4910                                      <GIC_SPI    
4911                                      <GIC_SPI    
4912                                      <GIC_SPI    
4913                                      <GIC_SPI    
4914                                      <GIC_SPI    
4915                                      <GIC_SPI    
4916                                      <GIC_SPI    
4917                                      <GIC_SPI    
4918                         clocks = <&gcc GCC_GP    
4919                                  <&gcc GCC_GP    
4920                         clock-names = "bus",     
4921                                                  
4922                         power-domains = <&gpu    
4923                 };                               
4924                                                  
4925                 gmu: gmu@506a000 {               
4926                         compatible = "qcom,ad    
4927                                                  
4928                         reg = <0 0x0506a000 0    
4929                               <0 0x0b280000 0    
4930                               <0 0x0b480000 0    
4931                         reg-names = "gmu", "g    
4932                                                  
4933                         interrupts = <GIC_SPI    
4934                                      <GIC_SPI    
4935                         interrupt-names = "hf    
4936                                                  
4937                         clocks = <&gpucc GPU_    
4938                                  <&gpucc GPU_    
4939                                  <&gcc GCC_DD    
4940                                  <&gcc GCC_GP    
4941                         clock-names = "gmu",     
4942                                                  
4943                         power-domains = <&gpu    
4944                                         <&gpu    
4945                         power-domain-names =     
4946                                                  
4947                         iommus = <&adreno_smm    
4948                                                  
4949                         operating-points-v2 =    
4950                                                  
4951                         status = "disabled";     
4952                                                  
4953                         gmu_opp_table: opp-ta    
4954                                 compatible =     
4955                                                  
4956                                 opp-400000000    
4957                                         opp-h    
4958                                         opp-l    
4959                                 };               
4960                                                  
4961                                 opp-200000000    
4962                                         opp-h    
4963                                         opp-l    
4964                                 };               
4965                         };                       
4966                 };                               
4967                                                  
4968                 dispcc: clock-controller@af00    
4969                         compatible = "qcom,sd    
4970                         reg = <0 0x0af00000 0    
4971                         clocks = <&rpmhcc RPM    
4972                                  <&gcc GCC_DI    
4973                                  <&gcc GCC_DI    
4974                                  <&mdss_dsi0_    
4975                                  <&mdss_dsi0_    
4976                                  <&mdss_dsi1_    
4977                                  <&mdss_dsi1_    
4978                                  <&usb_1_qmpp    
4979                                  <&usb_1_qmpp    
4980                         clock-names = "bi_tcx    
4981                                       "gcc_di    
4982                                       "gcc_di    
4983                                       "dsi0_p    
4984                                       "dsi0_p    
4985                                       "dsi1_p    
4986                                       "dsi1_p    
4987                                       "dp_lin    
4988                                       "dp_vco    
4989                         #clock-cells = <1>;      
4990                         #reset-cells = <1>;      
4991                         #power-domain-cells =    
4992                 };                               
4993                                                  
4994                 pdc_intc: interrupt-controlle    
4995                         compatible = "qcom,sd    
4996                         reg = <0 0x0b220000 0    
4997                         qcom,pdc-ranges = <0     
4998                         #interrupt-cells = <2    
4999                         interrupt-parent = <&    
5000                         interrupt-controller;    
5001                 };                               
5002                                                  
5003                 pdc_reset: reset-controller@b    
5004                         compatible = "qcom,sd    
5005                         reg = <0 0x0b2e0000 0    
5006                         #reset-cells = <1>;      
5007                 };                               
5008                                                  
5009                 tsens0: thermal-sensor@c26300    
5010                         compatible = "qcom,sd    
5011                         reg = <0 0x0c263000 0    
5012                               <0 0x0c222000 0    
5013                         #qcom,sensors = <13>;    
5014                         interrupts = <GIC_SPI    
5015                                      <GIC_SPI    
5016                         interrupt-names = "up    
5017                         #thermal-sensor-cells    
5018                 };                               
5019                                                  
5020                 tsens1: thermal-sensor@c26500    
5021                         compatible = "qcom,sd    
5022                         reg = <0 0x0c265000 0    
5023                               <0 0x0c223000 0    
5024                         #qcom,sensors = <8>;     
5025                         interrupts = <GIC_SPI    
5026                                      <GIC_SPI    
5027                         interrupt-names = "up    
5028                         #thermal-sensor-cells    
5029                 };                               
5030                                                  
5031                 aoss_reset: reset-controller@    
5032                         compatible = "qcom,sd    
5033                         reg = <0 0x0c2a0000 0    
5034                         #reset-cells = <1>;      
5035                 };                               
5036                                                  
5037                 aoss_qmp: power-management@c3    
5038                         compatible = "qcom,sd    
5039                         reg = <0 0x0c300000 0    
5040                         interrupts = <GIC_SPI    
5041                         mboxes = <&apss_share    
5042                                                  
5043                         #clock-cells = <0>;      
5044                                                  
5045                         cx_cdev: cx {            
5046                                 #cooling-cell    
5047                         };                       
5048                                                  
5049                         ebi_cdev: ebi {          
5050                                 #cooling-cell    
5051                         };                       
5052                 };                               
5053                                                  
5054                 sram@c3f0000 {                   
5055                         compatible = "qcom,sd    
5056                         reg = <0 0x0c3f0000 0    
5057                 };                               
5058                                                  
5059                 spmi_bus: spmi@c440000 {         
5060                         compatible = "qcom,sp    
5061                         reg = <0 0x0c440000 0    
5062                               <0 0x0c600000 0    
5063                               <0 0x0e600000 0    
5064                               <0 0x0e700000 0    
5065                               <0 0x0c40a000 0    
5066                         reg-names = "core", "    
5067                         interrupt-names = "pe    
5068                         interrupts = <GIC_SPI    
5069                         qcom,ee = <0>;           
5070                         qcom,channel = <0>;      
5071                         #address-cells = <2>;    
5072                         #size-cells = <0>;       
5073                         interrupt-controller;    
5074                         #interrupt-cells = <4    
5075                 };                               
5076                                                  
5077                 sram@146bf000 {                  
5078                         compatible = "qcom,sd    
5079                         reg = <0 0x146bf000 0    
5080                                                  
5081                         #address-cells = <1>;    
5082                         #size-cells = <1>;       
5083                                                  
5084                         ranges = <0 0 0x146bf    
5085                                                  
5086                         pil-reloc@94c {          
5087                                 compatible =     
5088                                 reg = <0x94c     
5089                         };                       
5090                 };                               
5091                                                  
5092                 apps_smmu: iommu@15000000 {      
5093                         compatible = "qcom,sd    
5094                         reg = <0 0x15000000 0    
5095                         #iommu-cells = <2>;      
5096                         #global-interrupts =     
5097                         interrupts = <GIC_SPI    
5098                                      <GIC_SPI    
5099                                      <GIC_SPI    
5100                                      <GIC_SPI    
5101                                      <GIC_SPI    
5102                                      <GIC_SPI    
5103                                      <GIC_SPI    
5104                                      <GIC_SPI    
5105                                      <GIC_SPI    
5106                                      <GIC_SPI    
5107                                      <GIC_SPI    
5108                                      <GIC_SPI    
5109                                      <GIC_SPI    
5110                                      <GIC_SPI    
5111                                      <GIC_SPI    
5112                                      <GIC_SPI    
5113                                      <GIC_SPI    
5114                                      <GIC_SPI    
5115                                      <GIC_SPI    
5116                                      <GIC_SPI    
5117                                      <GIC_SPI    
5118                                      <GIC_SPI    
5119                                      <GIC_SPI    
5120                                      <GIC_SPI    
5121                                      <GIC_SPI    
5122                                      <GIC_SPI    
5123                                      <GIC_SPI    
5124                                      <GIC_SPI    
5125                                      <GIC_SPI    
5126                                      <GIC_SPI    
5127                                      <GIC_SPI    
5128                                      <GIC_SPI    
5129                                      <GIC_SPI    
5130                                      <GIC_SPI    
5131                                      <GIC_SPI    
5132                                      <GIC_SPI    
5133                                      <GIC_SPI    
5134                                      <GIC_SPI    
5135                                      <GIC_SPI    
5136                                      <GIC_SPI    
5137                                      <GIC_SPI    
5138                                      <GIC_SPI    
5139                                      <GIC_SPI    
5140                                      <GIC_SPI    
5141                                      <GIC_SPI    
5142                                      <GIC_SPI    
5143                                      <GIC_SPI    
5144                                      <GIC_SPI    
5145                                      <GIC_SPI    
5146                                      <GIC_SPI    
5147                                      <GIC_SPI    
5148                                      <GIC_SPI    
5149                                      <GIC_SPI    
5150                                      <GIC_SPI    
5151                                      <GIC_SPI    
5152                                      <GIC_SPI    
5153                                      <GIC_SPI    
5154                                      <GIC_SPI    
5155                                      <GIC_SPI    
5156                                      <GIC_SPI    
5157                                      <GIC_SPI    
5158                                      <GIC_SPI    
5159                                      <GIC_SPI    
5160                                      <GIC_SPI    
5161                                      <GIC_SPI    
5162                 };                               
5163                                                  
5164                 anoc_1_tbu: tbu@150c5000 {       
5165                         compatible = "qcom,sd    
5166                         reg = <0x0 0x150c5000    
5167                         interconnects = <&sys    
5168                                          &con    
5169                         power-domains = <&gcc    
5170                         qcom,stream-id-range     
5171                 };                               
5172                                                  
5173                 anoc_2_tbu: tbu@150c9000 {       
5174                         compatible = "qcom,sd    
5175                         reg = <0x0 0x150c9000    
5176                         interconnects = <&sys    
5177                                          &con    
5178                         power-domains = <&gcc    
5179                         qcom,stream-id-range     
5180                 };                               
5181                                                  
5182                 mnoc_hf_0_tbu: tbu@150cd000 {    
5183                         compatible = "qcom,sd    
5184                         reg = <0x0 0x150cd000    
5185                         interconnects = <&mms    
5186                                          &mms    
5187                         power-domains = <&gcc    
5188                         qcom,stream-id-range     
5189                 };                               
5190                                                  
5191                 mnoc_hf_1_tbu: tbu@150d1000 {    
5192                         compatible = "qcom,sd    
5193                         reg = <0x0 0x150d1000    
5194                         interconnects = <&mms    
5195                                          &mms    
5196                         power-domains = <&gcc    
5197                         qcom,stream-id-range     
5198                 };                               
5199                                                  
5200                 mnoc_sf_0_tbu: tbu@150d5000 {    
5201                         compatible = "qcom,sd    
5202                         reg = <0x0 0x150d5000    
5203                         interconnects = <&mms    
5204                                          &mms    
5205                         power-domains = <&gcc    
5206                         qcom,stream-id-range     
5207                 };                               
5208                                                  
5209                 compute_dsp_tbu: tbu@150d9000    
5210                         compatible = "qcom,sd    
5211                         reg = <0x0 0x150d9000    
5212                         interconnects = <&sys    
5213                                          &con    
5214                         qcom,stream-id-range     
5215                 };                               
5216                                                  
5217                 adsp_tbu: tbu@150dd000 {         
5218                         compatible = "qcom,sd    
5219                         reg = <0x0 0x150dd000    
5220                         interconnects = <&sys    
5221                                          &con    
5222                         power-domains = <&gcc    
5223                         qcom,stream-id-range     
5224                 };                               
5225                                                  
5226                 anoc_1_pcie_tbu: tbu@150e1000    
5227                         compatible = "qcom,sd    
5228                         reg = <0x0 0x150e1000    
5229                         clocks = <&gcc GCC_AG    
5230                         interconnects = <&sys    
5231                                          &con    
5232                         power-domains = <&gcc    
5233                         qcom,stream-id-range     
5234                 };                               
5235                                                  
5236                 lpasscc: clock-controller@170    
5237                         compatible = "qcom,sd    
5238                         reg = <0 0x17014000 0    
5239                         reg-names = "cc", "qd    
5240                         #clock-cells = <1>;      
5241                         status = "disabled";     
5242                 };                               
5243                                                  
5244                 gladiator_noc: interconnect@1    
5245                         compatible = "qcom,sd    
5246                         reg = <0 0x17900000 0    
5247                         #interconnect-cells =    
5248                         qcom,bcm-voters = <&a    
5249                 };                               
5250                                                  
5251                 watchdog@17980000 {              
5252                         compatible = "qcom,ap    
5253                         reg = <0 0x17980000 0    
5254                         clocks = <&sleep_clk>    
5255                         interrupts = <GIC_SPI    
5256                 };                               
5257                                                  
5258                 apss_shared: mailbox@17990000    
5259                         compatible = "qcom,sd    
5260                         reg = <0 0x17990000 0    
5261                         #mbox-cells = <1>;       
5262                 };                               
5263                                                  
5264                 apps_rsc: rsc@179c0000 {         
5265                         label = "apps_rsc";      
5266                         compatible = "qcom,rp    
5267                         reg = <0 0x179c0000 0    
5268                               <0 0x179d0000 0    
5269                               <0 0x179e0000 0    
5270                         reg-names = "drv-0",     
5271                         interrupts = <GIC_SPI    
5272                                      <GIC_SPI    
5273                                      <GIC_SPI    
5274                         qcom,tcs-offset = <0x    
5275                         qcom,drv-id = <2>;       
5276                         qcom,tcs-config = <AC    
5277                                           <SL    
5278                                           <WA    
5279                                           <CO    
5280                         power-domains = <&CLU    
5281                                                  
5282                         apps_bcm_voter: bcm-v    
5283                                 compatible =     
5284                         };                       
5285                                                  
5286                         rpmhcc: clock-control    
5287                                 compatible =     
5288                                 #clock-cells     
5289                                 clock-names =    
5290                                 clocks = <&xo    
5291                         };                       
5292                                                  
5293                         rpmhpd: power-control    
5294                                 compatible =     
5295                                 #power-domain    
5296                                 operating-poi    
5297                                                  
5298                                 rpmhpd_opp_ta    
5299                                         compa    
5300                                                  
5301                                         rpmhp    
5302                                                  
5303                                         };       
5304                                                  
5305                                         rpmhp    
5306                                                  
5307                                         };       
5308                                                  
5309                                         rpmhp    
5310                                                  
5311                                         };       
5312                                                  
5313                                         rpmhp    
5314                                                  
5315                                         };       
5316                                                  
5317                                         rpmhp    
5318                                                  
5319                                         };       
5320                                                  
5321                                         rpmhp    
5322                                                  
5323                                         };       
5324                                                  
5325                                         rpmhp    
5326                                                  
5327                                         };       
5328                                                  
5329                                         rpmhp    
5330                                                  
5331                                         };       
5332                                                  
5333                                         rpmhp    
5334                                                  
5335                                         };       
5336                                                  
5337                                         rpmhp    
5338                                                  
5339                                         };       
5340                                 };               
5341                         };                       
5342                 };                               
5343                                                  
5344                 intc: interrupt-controller@17    
5345                         compatible = "arm,gic    
5346                         #address-cells = <2>;    
5347                         #size-cells = <2>;       
5348                         ranges;                  
5349                         #interrupt-cells = <3    
5350                         interrupt-controller;    
5351                         reg = <0 0x17a00000 0    
5352                               <0 0x17a60000 0    
5353                         interrupts = <GIC_PPI    
5354                                                  
5355                         msi-controller@17a400    
5356                                 compatible =     
5357                                 msi-controlle    
5358                                 #msi-cells =     
5359                                 reg = <0 0x17    
5360                                 status = "dis    
5361                         };                       
5362                 };                               
5363                                                  
5364                 slimbam: dma-controller@17184    
5365                         compatible = "qcom,ba    
5366                         qcom,controlled-remot    
5367                         reg = <0 0x17184000 0    
5368                         num-channels = <31>;     
5369                         interrupts = <GIC_SPI    
5370                         #dma-cells = <1>;        
5371                         qcom,ee = <1>;           
5372                         qcom,num-ees = <2>;      
5373                         iommus = <&apps_smmu     
5374                 };                               
5375                                                  
5376                 timer@17c90000 {                 
5377                         #address-cells = <1>;    
5378                         #size-cells = <1>;       
5379                         ranges = <0 0 0 0x200    
5380                         compatible = "arm,arm    
5381                         reg = <0 0x17c90000 0    
5382                                                  
5383                         frame@17ca0000 {         
5384                                 frame-number     
5385                                 interrupts =     
5386                                                  
5387                                 reg = <0x17ca    
5388                                       <0x17cb    
5389                         };                       
5390                                                  
5391                         frame@17cc0000 {         
5392                                 frame-number     
5393                                 interrupts =     
5394                                 reg = <0x17cc    
5395                                 status = "dis    
5396                         };                       
5397                                                  
5398                         frame@17cd0000 {         
5399                                 frame-number     
5400                                 interrupts =     
5401                                 reg = <0x17cd    
5402                                 status = "dis    
5403                         };                       
5404                                                  
5405                         frame@17ce0000 {         
5406                                 frame-number     
5407                                 interrupts =     
5408                                 reg = <0x17ce    
5409                                 status = "dis    
5410                         };                       
5411                                                  
5412                         frame@17cf0000 {         
5413                                 frame-number     
5414                                 interrupts =     
5415                                 reg = <0x17cf    
5416                                 status = "dis    
5417                         };                       
5418                                                  
5419                         frame@17d00000 {         
5420                                 frame-number     
5421                                 interrupts =     
5422                                 reg = <0x17d0    
5423                                 status = "dis    
5424                         };                       
5425                                                  
5426                         frame@17d10000 {         
5427                                 frame-number     
5428                                 interrupts =     
5429                                 reg = <0x17d1    
5430                                 status = "dis    
5431                         };                       
5432                 };                               
5433                                                  
5434                 osm_l3: interconnect@17d41000    
5435                         compatible = "qcom,sd    
5436                         reg = <0 0x17d41000 0    
5437                                                  
5438                         clocks = <&rpmhcc RPM    
5439                         clock-names = "xo", "    
5440                                                  
5441                         #interconnect-cells =    
5442                 };                               
5443                                                  
5444                 cpufreq_hw: cpufreq@17d43000     
5445                         compatible = "qcom,sd    
5446                         reg = <0 0x17d43000 0    
5447                         reg-names = "freq-dom    
5448                                                  
5449                         interrupts-extended =    
5450                                                  
5451                         clocks = <&rpmhcc RPM    
5452                         clock-names = "xo", "    
5453                                                  
5454                         #freq-domain-cells =     
5455                         #clock-cells = <1>;      
5456                 };                               
5457                                                  
5458                 wifi: wifi@18800000 {            
5459                         compatible = "qcom,wc    
5460                         status = "disabled";     
5461                         reg = <0 0x18800000 0    
5462                         reg-names = "membase"    
5463                         memory-region = <&wla    
5464                         clock-names = "cxo_re    
5465                         clocks = <&rpmhcc RPM    
5466                         interrupts =             
5467                                 <GIC_SPI 414     
5468                                 <GIC_SPI 415     
5469                                 <GIC_SPI 416     
5470                                 <GIC_SPI 417     
5471                                 <GIC_SPI 418     
5472                                 <GIC_SPI 419     
5473                                 <GIC_SPI 420     
5474                                 <GIC_SPI 421     
5475                                 <GIC_SPI 422     
5476                                 <GIC_SPI 423     
5477                                 <GIC_SPI 424     
5478                                 <GIC_SPI 425     
5479                         iommus = <&apps_smmu     
5480                 };                               
5481         };                                       
5482                                                  
5483         sound: sound {                           
5484         };                                       
5485                                                  
5486         thermal-zones {                          
5487                 cpu0-thermal {                   
5488                         polling-delay-passive    
5489                                                  
5490                         thermal-sensors = <&t    
5491                                                  
5492                         trips {                  
5493                                 cpu0_alert0:     
5494                                         tempe    
5495                                         hyste    
5496                                         type     
5497                                 };               
5498                                                  
5499                                 cpu0_alert1:     
5500                                         tempe    
5501                                         hyste    
5502                                         type     
5503                                 };               
5504                                                  
5505                                 cpu0_crit: cp    
5506                                         tempe    
5507                                         hyste    
5508                                         type     
5509                                 };               
5510                         };                       
5511                 };                               
5512                                                  
5513                 cpu1-thermal {                   
5514                         polling-delay-passive    
5515                                                  
5516                         thermal-sensors = <&t    
5517                                                  
5518                         trips {                  
5519                                 cpu1_alert0:     
5520                                         tempe    
5521                                         hyste    
5522                                         type     
5523                                 };               
5524                                                  
5525                                 cpu1_alert1:     
5526                                         tempe    
5527                                         hyste    
5528                                         type     
5529                                 };               
5530                                                  
5531                                 cpu1_crit: cp    
5532                                         tempe    
5533                                         hyste    
5534                                         type     
5535                                 };               
5536                         };                       
5537                 };                               
5538                                                  
5539                 cpu2-thermal {                   
5540                         polling-delay-passive    
5541                                                  
5542                         thermal-sensors = <&t    
5543                                                  
5544                         trips {                  
5545                                 cpu2_alert0:     
5546                                         tempe    
5547                                         hyste    
5548                                         type     
5549                                 };               
5550                                                  
5551                                 cpu2_alert1:     
5552                                         tempe    
5553                                         hyste    
5554                                         type     
5555                                 };               
5556                                                  
5557                                 cpu2_crit: cp    
5558                                         tempe    
5559                                         hyste    
5560                                         type     
5561                                 };               
5562                         };                       
5563                 };                               
5564                                                  
5565                 cpu3-thermal {                   
5566                         polling-delay-passive    
5567                                                  
5568                         thermal-sensors = <&t    
5569                                                  
5570                         trips {                  
5571                                 cpu3_alert0:     
5572                                         tempe    
5573                                         hyste    
5574                                         type     
5575                                 };               
5576                                                  
5577                                 cpu3_alert1:     
5578                                         tempe    
5579                                         hyste    
5580                                         type     
5581                                 };               
5582                                                  
5583                                 cpu3_crit: cp    
5584                                         tempe    
5585                                         hyste    
5586                                         type     
5587                                 };               
5588                         };                       
5589                 };                               
5590                                                  
5591                 cpu4-thermal {                   
5592                         polling-delay-passive    
5593                                                  
5594                         thermal-sensors = <&t    
5595                                                  
5596                         trips {                  
5597                                 cpu4_alert0:     
5598                                         tempe    
5599                                         hyste    
5600                                         type     
5601                                 };               
5602                                                  
5603                                 cpu4_alert1:     
5604                                         tempe    
5605                                         hyste    
5606                                         type     
5607                                 };               
5608                                                  
5609                                 cpu4_crit: cp    
5610                                         tempe    
5611                                         hyste    
5612                                         type     
5613                                 };               
5614                         };                       
5615                 };                               
5616                                                  
5617                 cpu5-thermal {                   
5618                         polling-delay-passive    
5619                                                  
5620                         thermal-sensors = <&t    
5621                                                  
5622                         trips {                  
5623                                 cpu5_alert0:     
5624                                         tempe    
5625                                         hyste    
5626                                         type     
5627                                 };               
5628                                                  
5629                                 cpu5_alert1:     
5630                                         tempe    
5631                                         hyste    
5632                                         type     
5633                                 };               
5634                                                  
5635                                 cpu5_crit: cp    
5636                                         tempe    
5637                                         hyste    
5638                                         type     
5639                                 };               
5640                         };                       
5641                 };                               
5642                                                  
5643                 cpu6-thermal {                   
5644                         polling-delay-passive    
5645                                                  
5646                         thermal-sensors = <&t    
5647                                                  
5648                         trips {                  
5649                                 cpu6_alert0:     
5650                                         tempe    
5651                                         hyste    
5652                                         type     
5653                                 };               
5654                                                  
5655                                 cpu6_alert1:     
5656                                         tempe    
5657                                         hyste    
5658                                         type     
5659                                 };               
5660                                                  
5661                                 cpu6_crit: cp    
5662                                         tempe    
5663                                         hyste    
5664                                         type     
5665                                 };               
5666                         };                       
5667                 };                               
5668                                                  
5669                 cpu7-thermal {                   
5670                         polling-delay-passive    
5671                                                  
5672                         thermal-sensors = <&t    
5673                                                  
5674                         trips {                  
5675                                 cpu7_alert0:     
5676                                         tempe    
5677                                         hyste    
5678                                         type     
5679                                 };               
5680                                                  
5681                                 cpu7_alert1:     
5682                                         tempe    
5683                                         hyste    
5684                                         type     
5685                                 };               
5686                                                  
5687                                 cpu7_crit: cp    
5688                                         tempe    
5689                                         hyste    
5690                                         type     
5691                                 };               
5692                         };                       
5693                 };                               
5694                                                  
5695                 aoss0-thermal {                  
5696                         polling-delay-passive    
5697                                                  
5698                         thermal-sensors = <&t    
5699                                                  
5700                         trips {                  
5701                                 aoss0_alert0:    
5702                                         tempe    
5703                                         hyste    
5704                                         type     
5705                                 };               
5706                         };                       
5707                 };                               
5708                                                  
5709                 cluster0-thermal {               
5710                         polling-delay-passive    
5711                                                  
5712                         thermal-sensors = <&t    
5713                                                  
5714                         trips {                  
5715                                 cluster0_aler    
5716                                         tempe    
5717                                         hyste    
5718                                         type     
5719                                 };               
5720                                 cluster0_crit    
5721                                         tempe    
5722                                         hyste    
5723                                         type     
5724                                 };               
5725                         };                       
5726                 };                               
5727                                                  
5728                 cluster1-thermal {               
5729                         polling-delay-passive    
5730                                                  
5731                         thermal-sensors = <&t    
5732                                                  
5733                         trips {                  
5734                                 cluster1_aler    
5735                                         tempe    
5736                                         hyste    
5737                                         type     
5738                                 };               
5739                                 cluster1_crit    
5740                                         tempe    
5741                                         hyste    
5742                                         type     
5743                                 };               
5744                         };                       
5745                 };                               
5746                                                  
5747                 gpu-top-thermal {                
5748                         polling-delay-passive    
5749                                                  
5750                         thermal-sensors = <&t    
5751                                                  
5752                         cooling-maps {           
5753                                 map0 {           
5754                                         trip     
5755                                         cooli    
5756                                 };               
5757                         };                       
5758                                                  
5759                         trips {                  
5760                                 gpu_top_alert    
5761                                         tempe    
5762                                         hyste    
5763                                         type     
5764                                 };               
5765                                                  
5766                                 trip-point1 {    
5767                                         tempe    
5768                                         hyste    
5769                                         type     
5770                                 };               
5771                                                  
5772                                 trip-point2 {    
5773                                         tempe    
5774                                         hyste    
5775                                         type     
5776                                 };               
5777                         };                       
5778                 };                               
5779                                                  
5780                 gpu-bottom-thermal {             
5781                         polling-delay-passive    
5782                                                  
5783                         thermal-sensors = <&t    
5784                                                  
5785                         cooling-maps {           
5786                                 map0 {           
5787                                         trip     
5788                                         cooli    
5789                                 };               
5790                         };                       
5791                                                  
5792                         trips {                  
5793                                 gpu_bottom_al    
5794                                         tempe    
5795                                         hyste    
5796                                         type     
5797                                 };               
5798                                                  
5799                                 trip-point1 {    
5800                                         tempe    
5801                                         hyste    
5802                                         type     
5803                                 };               
5804                                                  
5805                                 trip-point2 {    
5806                                         tempe    
5807                                         hyste    
5808                                         type     
5809                                 };               
5810                         };                       
5811                 };                               
5812                                                  
5813                 aoss1-thermal {                  
5814                         polling-delay-passive    
5815                                                  
5816                         thermal-sensors = <&t    
5817                                                  
5818                         trips {                  
5819                                 aoss1_alert0:    
5820                                         tempe    
5821                                         hyste    
5822                                         type     
5823                                 };               
5824                         };                       
5825                 };                               
5826                                                  
5827                 q6-modem-thermal {               
5828                         polling-delay-passive    
5829                                                  
5830                         thermal-sensors = <&t    
5831                                                  
5832                         trips {                  
5833                                 q6_modem_aler    
5834                                         tempe    
5835                                         hyste    
5836                                         type     
5837                                 };               
5838                         };                       
5839                 };                               
5840                                                  
5841                 mem-thermal {                    
5842                         polling-delay-passive    
5843                                                  
5844                         thermal-sensors = <&t    
5845                                                  
5846                         trips {                  
5847                                 mem_alert0: t    
5848                                         tempe    
5849                                         hyste    
5850                                         type     
5851                                 };               
5852                         };                       
5853                 };                               
5854                                                  
5855                 wlan-thermal {                   
5856                         polling-delay-passive    
5857                                                  
5858                         thermal-sensors = <&t    
5859                                                  
5860                         trips {                  
5861                                 wlan_alert0:     
5862                                         tempe    
5863                                         hyste    
5864                                         type     
5865                                 };               
5866                         };                       
5867                 };                               
5868                                                  
5869                 q6-hvx-thermal {                 
5870                         polling-delay-passive    
5871                                                  
5872                         thermal-sensors = <&t    
5873                                                  
5874                         trips {                  
5875                                 q6_hvx_alert0    
5876                                         tempe    
5877                                         hyste    
5878                                         type     
5879                                 };               
5880                         };                       
5881                 };                               
5882                                                  
5883                 camera-thermal {                 
5884                         polling-delay-passive    
5885                                                  
5886                         thermal-sensors = <&t    
5887                                                  
5888                         trips {                  
5889                                 camera_alert0    
5890                                         tempe    
5891                                         hyste    
5892                                         type     
5893                                 };               
5894                         };                       
5895                 };                               
5896                                                  
5897                 video-thermal {                  
5898                         polling-delay-passive    
5899                                                  
5900                         thermal-sensors = <&t    
5901                                                  
5902                         trips {                  
5903                                 video_alert0:    
5904                                         tempe    
5905                                         hyste    
5906                                         type     
5907                                 };               
5908                         };                       
5909                 };                               
5910                                                  
5911                 modem-thermal {                  
5912                         polling-delay-passive    
5913                                                  
5914                         thermal-sensors = <&t    
5915                                                  
5916                         trips {                  
5917                                 modem_alert0:    
5918                                         tempe    
5919                                         hyste    
5920                                         type     
5921                                 };               
5922                         };                       
5923                 };                               
5924         };                                       
5925                                                  
5926         timer {                                  
5927                 compatible = "arm,armv8-timer    
5928                 interrupts = <GIC_PPI 1 IRQ_T    
5929                              <GIC_PPI 2 IRQ_T    
5930                              <GIC_PPI 3 IRQ_T    
5931                              <GIC_PPI 0 IRQ_T    
5932         };                                       
5933 };                                               
                                                      

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

sflogo.php