1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Lenovo Yoga C630 3 * Lenovo Yoga C630
4 * 4 *
5 * Copyright (c) 2019, Linaro Ltd. 5 * Copyright (c) 2019, Linaro Ltd.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include <dt-bindings/input/gpio-keys.h> !! 10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h> <<
12 #include <dt-bindings/regulator/qcom,rpmh-regu 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h> 12 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h> 13 #include <dt-bindings/sound/qcom,q6asm.h>
15 #include "sdm850.dtsi" !! 14 #include "sdm845.dtsi"
16 #include "sdm845-wcd9340.dtsi" <<
17 #include "pm8998.dtsi" 15 #include "pm8998.dtsi"
18 16
19 /* <<
20 * Update following upstream (sdm845.dtsi) res <<
21 * memory mappings for firmware loading to suc <<
22 * and enable the IPA device. <<
23 */ <<
24 /delete-node/ &ipa_fw_mem; <<
25 /delete-node/ &ipa_gsi_mem; <<
26 /delete-node/ &gpu_mem; <<
27 /delete-node/ &adsp_mem; <<
28 /delete-node/ &wlan_msa_mem; <<
29 <<
30 / { 17 / {
31 model = "Lenovo Yoga C630"; 18 model = "Lenovo Yoga C630";
32 compatible = "lenovo,yoga-c630", "qcom 19 compatible = "lenovo,yoga-c630", "qcom,sdm845";
33 chassis-type = "convertible"; <<
34 20
35 aliases { 21 aliases {
36 serial0 = &uart9; !! 22 hsuart0 = &uart6;
37 serial1 = &uart6; <<
38 }; <<
39 <<
40 gpio-keys { <<
41 compatible = "gpio-keys"; <<
42 <<
43 pinctrl-names = "default"; <<
44 pinctrl-0 = <&lid_pin_active>, <<
45 <<
46 switch-lid { <<
47 gpios = <&tlmm 124 GPI <<
48 linux,input-type = <EV <<
49 linux,code = <SW_LID>; <<
50 wakeup-source; <<
51 wakeup-event-action = <<
52 }; <<
53 <<
54 switch-mode { <<
55 gpios = <&tlmm 95 GPIO <<
56 linux,input-type = <EV <<
57 linux,code = <SW_TABLE <<
58 }; <<
59 }; <<
60 <<
61 /* Reserved memory changes for IPA */ <<
62 reserved-memory { <<
63 wlan_msa_mem: memory@8c400000 <<
64 reg = <0 0x8c400000 0 <<
65 no-map; <<
66 }; <<
67 <<
68 gpu_mem: memory@8c515000 { <<
69 reg = <0 0x8c515000 0 <<
70 no-map; <<
71 }; <<
72 <<
73 ipa_fw_mem: memory@8c517000 { <<
74 reg = <0 0x8c517000 0 <<
75 no-map; <<
76 }; <<
77 <<
78 adsp_mem: memory@8c600000 { <<
79 reg = <0 0x8c600000 0 <<
80 no-map; <<
81 }; <<
82 }; <<
83 <<
84 sw_edp_1p2: edp-1p2-regulator { <<
85 compatible = "regulator-fixed" <<
86 regulator-name = "sw_edp_1p2"; <<
87 <<
88 regulator-min-microvolt = <120 <<
89 regulator-max-microvolt = <120 <<
90 <<
91 pinctrl-0 = <&sw_edp_1p2_en>; <<
92 pinctrl-names = "default"; <<
93 <<
94 gpio = <&pm8998_gpios 9 GPIO_A <<
95 enable-active-high; <<
96 <<
97 vin-supply = <&vreg_l2a_1p2>; <<
98 }; <<
99 <<
100 sn65dsi86_refclk: sn65dsi86-refclk { <<
101 compatible = "fixed-clock"; <<
102 #clock-cells = <0>; <<
103 <<
104 clock-frequency = <19200000>; <<
105 }; <<
106 <<
107 vph_pwr: regulator-vph-pwr { <<
108 compatible = "regulator-fixed" <<
109 regulator-name = "vph_pwr"; <<
110 regulator-min-microvolt = <370 <<
111 regulator-max-microvolt = <370 <<
112 }; <<
113 <<
114 vlcm_3v3: regulator-vlcm-3v3 { <<
115 compatible = "regulator-fixed" <<
116 regulator-name = "vlcm_3v3"; <<
117 <<
118 vin-supply = <&vph_pwr>; <<
119 regulator-min-microvolt = <330 <<
120 regulator-max-microvolt = <330 <<
121 <<
122 gpio = <&tlmm 88 GPIO_ACTIVE_H <<
123 enable-active-high; <<
124 }; <<
125 <<
126 backlight: backlight { <<
127 compatible = "pwm-backlight"; <<
128 pwms = <&sn65dsi86 1000000>; <<
129 enable-gpios = <&tlmm 11 GPIO_ <<
130 }; 23 };
131 }; 24 };
132 25
133 &adsp_pas { 26 &adsp_pas {
134 firmware-name = "qcom/sdm850/LENOVO/81 !! 27 firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
135 status = "okay"; 28 status = "okay";
136 }; 29 };
137 30
138 &apps_rsc { 31 &apps_rsc {
139 regulators-0 { !! 32 pm8998-rpmh-regulators {
140 compatible = "qcom,pm8998-rpmh 33 compatible = "qcom,pm8998-rpmh-regulators";
141 qcom,pmic-id = "a"; 34 qcom,pmic-id = "a";
142 35
143 vdd-l2-l8-l17-supply = <&vreg_ 36 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
144 vdd-l7-l12-l14-l15-supply = <& 37 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
145 38
146 vreg_s2a_1p125: smps2 { 39 vreg_s2a_1p125: smps2 {
147 }; 40 };
148 41
149 vreg_s3a_1p35: smps3 { 42 vreg_s3a_1p35: smps3 {
150 regulator-min-microvol 43 regulator-min-microvolt = <1352000>;
151 regulator-max-microvol 44 regulator-max-microvolt = <1352000>;
152 regulator-initial-mode 45 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153 }; 46 };
154 47
155 vreg_s4a_1p8: smps4 { 48 vreg_s4a_1p8: smps4 {
156 regulator-min-microvol 49 regulator-min-microvolt = <1800000>;
157 regulator-max-microvol 50 regulator-max-microvolt = <1800000>;
158 regulator-initial-mode 51 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
159 }; 52 };
160 53
161 vreg_s5a_2p04: smps5 { 54 vreg_s5a_2p04: smps5 {
162 regulator-min-microvol 55 regulator-min-microvolt = <2040000>;
163 regulator-max-microvol 56 regulator-max-microvolt = <2040000>;
164 regulator-initial-mode 57 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
165 }; 58 };
166 59
167 vreg_s7a_1p025: smps7 { 60 vreg_s7a_1p025: smps7 {
168 }; 61 };
169 62
170 vdd_qusb_hs0: 63 vdd_qusb_hs0:
171 vdda_hp_pcie_core: 64 vdda_hp_pcie_core:
172 vdda_mipi_csi0_0p9: 65 vdda_mipi_csi0_0p9:
173 vdda_mipi_csi1_0p9: 66 vdda_mipi_csi1_0p9:
174 vdda_mipi_csi2_0p9: 67 vdda_mipi_csi2_0p9:
175 vdda_mipi_dsi0_pll: 68 vdda_mipi_dsi0_pll:
176 vdda_mipi_dsi1_pll: 69 vdda_mipi_dsi1_pll:
177 vdda_qlink_lv: 70 vdda_qlink_lv:
178 vdda_qlink_lv_ck: 71 vdda_qlink_lv_ck:
179 vdda_qrefs_0p875: 72 vdda_qrefs_0p875:
180 vdda_pcie_core: 73 vdda_pcie_core:
181 vdda_pll_cc_ebi01: 74 vdda_pll_cc_ebi01:
182 vdda_pll_cc_ebi23: 75 vdda_pll_cc_ebi23:
183 vdda_sp_sensor: 76 vdda_sp_sensor:
184 vdda_ufs1_core: 77 vdda_ufs1_core:
185 vdda_ufs2_core: 78 vdda_ufs2_core:
186 vdda_usb1_ss_core: 79 vdda_usb1_ss_core:
187 vdda_usb2_ss_core: 80 vdda_usb2_ss_core:
188 vreg_l1a_0p875: ldo1 { 81 vreg_l1a_0p875: ldo1 {
189 regulator-min-microvol 82 regulator-min-microvolt = <880000>;
190 regulator-max-microvol 83 regulator-max-microvolt = <880000>;
191 regulator-initial-mode 84 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
192 }; 85 };
193 86
194 vddpx_10: 87 vddpx_10:
195 vreg_l2a_1p2: ldo2 { 88 vreg_l2a_1p2: ldo2 {
196 regulator-min-microvol 89 regulator-min-microvolt = <1200000>;
197 regulator-max-microvol 90 regulator-max-microvolt = <1200000>;
198 regulator-initial-mode 91 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199 regulator-always-on; 92 regulator-always-on;
200 }; 93 };
201 94
202 vreg_l3a_1p0: ldo3 { 95 vreg_l3a_1p0: ldo3 {
203 }; 96 };
204 97
205 vdd_wcss_cx: 98 vdd_wcss_cx:
206 vdd_wcss_mx: 99 vdd_wcss_mx:
207 vdda_wcss_pll: 100 vdda_wcss_pll:
208 vreg_l5a_0p8: ldo5 { 101 vreg_l5a_0p8: ldo5 {
209 regulator-min-microvol 102 regulator-min-microvolt = <800000>;
210 regulator-max-microvol 103 regulator-max-microvolt = <800000>;
211 regulator-initial-mode 104 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
212 }; 105 };
213 106
214 vddpx_13: 107 vddpx_13:
215 vreg_l6a_1p8: ldo6 { 108 vreg_l6a_1p8: ldo6 {
216 regulator-min-microvol 109 regulator-min-microvolt = <1800000>;
217 regulator-max-microvol 110 regulator-max-microvolt = <1800000>;
218 regulator-initial-mode 111 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219 }; 112 };
220 113
221 vreg_l7a_1p8: ldo7 { 114 vreg_l7a_1p8: ldo7 {
222 regulator-min-microvol 115 regulator-min-microvolt = <1800000>;
223 regulator-max-microvol 116 regulator-max-microvolt = <1800000>;
224 regulator-initial-mode 117 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 }; 118 };
226 119
227 vreg_l8a_1p2: ldo8 { 120 vreg_l8a_1p2: ldo8 {
228 }; 121 };
229 122
230 vreg_l9a_1p8: ldo9 { 123 vreg_l9a_1p8: ldo9 {
231 }; 124 };
232 125
233 vreg_l10a_1p8: ldo10 { 126 vreg_l10a_1p8: ldo10 {
234 }; 127 };
235 128
236 vreg_l11a_1p0: ldo11 { 129 vreg_l11a_1p0: ldo11 {
237 }; 130 };
238 131
239 vdd_qfprom: 132 vdd_qfprom:
240 vdd_qfprom_sp: 133 vdd_qfprom_sp:
241 vdda_apc1_cs_1p8: 134 vdda_apc1_cs_1p8:
242 vdda_gfx_cs_1p8: 135 vdda_gfx_cs_1p8:
243 vdda_qrefs_1p8: 136 vdda_qrefs_1p8:
244 vdda_qusb_hs0_1p8: 137 vdda_qusb_hs0_1p8:
245 vddpx_11: 138 vddpx_11:
246 vreg_l12a_1p8: ldo12 { 139 vreg_l12a_1p8: ldo12 {
247 regulator-min-microvol 140 regulator-min-microvolt = <1800000>;
248 regulator-max-microvol 141 regulator-max-microvolt = <1800000>;
249 regulator-initial-mode 142 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
250 }; 143 };
251 144
252 vddpx_2: 145 vddpx_2:
253 vreg_l13a_2p95: ldo13 { 146 vreg_l13a_2p95: ldo13 {
254 }; 147 };
255 148
256 vreg_l14a_1p88: ldo14 { 149 vreg_l14a_1p88: ldo14 {
257 regulator-min-microvol 150 regulator-min-microvolt = <1880000>;
258 regulator-max-microvol 151 regulator-max-microvolt = <1880000>;
259 regulator-initial-mode 152 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
260 regulator-always-on; 153 regulator-always-on;
261 }; 154 };
262 155
263 vreg_l15a_1p8: ldo15 { 156 vreg_l15a_1p8: ldo15 {
264 }; 157 };
265 158
266 vreg_l16a_2p7: ldo16 { 159 vreg_l16a_2p7: ldo16 {
267 }; 160 };
268 161
269 vreg_l17a_1p3: ldo17 { 162 vreg_l17a_1p3: ldo17 {
270 regulator-min-microvol 163 regulator-min-microvolt = <1304000>;
271 regulator-max-microvol 164 regulator-max-microvolt = <1304000>;
272 regulator-initial-mode 165 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273 }; 166 };
274 167
275 vreg_l18a_2p7: ldo18 { 168 vreg_l18a_2p7: ldo18 {
276 }; 169 };
277 170
278 vreg_l19a_3p0: ldo19 { 171 vreg_l19a_3p0: ldo19 {
279 regulator-min-microvol 172 regulator-min-microvolt = <3100000>;
280 regulator-max-microvol 173 regulator-max-microvolt = <3108000>;
281 regulator-initial-mode 174 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
282 }; 175 };
283 176
284 vreg_l20a_2p95: ldo20 { 177 vreg_l20a_2p95: ldo20 {
285 regulator-min-microvol 178 regulator-min-microvolt = <2960000>;
286 regulator-max-microvol 179 regulator-max-microvolt = <2960000>;
287 regulator-initial-mode 180 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
288 }; 181 };
289 182
290 vreg_l21a_2p95: ldo21 { 183 vreg_l21a_2p95: ldo21 {
291 }; 184 };
292 185
293 vreg_l22a_2p85: ldo22 { 186 vreg_l22a_2p85: ldo22 {
294 }; 187 };
295 188
296 vreg_l23a_3p3: ldo23 { 189 vreg_l23a_3p3: ldo23 {
297 regulator-min-microvol <<
298 regulator-max-microvol <<
299 regulator-initial-mode <<
300 }; 190 };
301 191
302 vdda_qusb_hs0_3p1: 192 vdda_qusb_hs0_3p1:
303 vreg_l24a_3p075: ldo24 { 193 vreg_l24a_3p075: ldo24 {
304 regulator-min-microvol 194 regulator-min-microvolt = <3075000>;
305 regulator-max-microvol 195 regulator-max-microvolt = <3083000>;
306 regulator-initial-mode 196 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
307 }; 197 };
308 198
309 vreg_l25a_3p3: ldo25 { 199 vreg_l25a_3p3: ldo25 {
310 regulator-min-microvol 200 regulator-min-microvolt = <3104000>;
311 regulator-max-microvol 201 regulator-max-microvolt = <3112000>;
312 regulator-initial-mode 202 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
313 }; 203 };
314 204
315 vdda_hp_pcie_1p2: 205 vdda_hp_pcie_1p2:
316 vdda_hv_ebi0: 206 vdda_hv_ebi0:
317 vdda_hv_ebi1: 207 vdda_hv_ebi1:
318 vdda_hv_ebi2: 208 vdda_hv_ebi2:
319 vdda_hv_ebi3: 209 vdda_hv_ebi3:
320 vdda_mipi_csi_1p25: 210 vdda_mipi_csi_1p25:
321 vdda_mipi_dsi0_1p2: 211 vdda_mipi_dsi0_1p2:
322 vdda_mipi_dsi1_1p2: 212 vdda_mipi_dsi1_1p2:
323 vdda_pcie_1p2: 213 vdda_pcie_1p2:
324 vdda_ufs1_1p2: 214 vdda_ufs1_1p2:
325 vdda_ufs2_1p2: 215 vdda_ufs2_1p2:
326 vdda_usb1_ss_1p2: 216 vdda_usb1_ss_1p2:
327 vdda_usb2_ss_1p2: 217 vdda_usb2_ss_1p2:
328 vreg_l26a_1p2: ldo26 { 218 vreg_l26a_1p2: ldo26 {
329 regulator-min-microvol 219 regulator-min-microvolt = <1200000>;
330 regulator-max-microvol 220 regulator-max-microvolt = <1208000>;
331 regulator-initial-mode 221 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332 }; 222 };
333 223
334 vreg_l28a_3p0: ldo28 { 224 vreg_l28a_3p0: ldo28 {
335 }; 225 };
336 226
337 vreg_lvs1a_1p8: lvs1 { 227 vreg_lvs1a_1p8: lvs1 {
338 }; 228 };
339 229
340 vreg_lvs2a_1p8: lvs2 { 230 vreg_lvs2a_1p8: lvs2 {
341 }; 231 };
342 }; 232 };
343 }; 233 };
344 234
>> 235 &apps_smmu {
>> 236 /* TODO: Figure out how to survive booting with this enabled */
>> 237 status = "disabled";
>> 238 };
>> 239
345 &cdsp_pas { 240 &cdsp_pas {
346 firmware-name = "qcom/sdm850/LENOVO/81 !! 241 firmware-name = "qcom/LENOVO/81JL/qccdsp850.mbn";
347 status = "okay"; 242 status = "okay";
348 }; 243 };
349 244
350 &gcc { 245 &gcc {
351 protected-clocks = <GCC_QSPI_CORE_CLK> 246 protected-clocks = <GCC_QSPI_CORE_CLK>,
352 <GCC_QSPI_CORE_CLK_ 247 <GCC_QSPI_CORE_CLK_SRC>,
353 <GCC_QSPI_CNOC_PERI 248 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
354 <GCC_LPASS_Q6_AXI_C 249 <GCC_LPASS_Q6_AXI_CLK>,
355 <GCC_LPASS_SWAY_CLK 250 <GCC_LPASS_SWAY_CLK>;
356 }; 251 };
357 252
358 &gmu { <<
359 status = "okay"; <<
360 }; <<
361 <<
362 &gpu { 253 &gpu {
363 status = "okay"; <<
364 zap-shader { 254 zap-shader {
365 memory-region = <&gpu_mem>; 255 memory-region = <&gpu_mem>;
366 firmware-name = "qcom/sdm850/L !! 256 firmware-name = "qcom/LENOVO/81JL/qcdxkmsuc850.mbn";
367 }; 257 };
368 }; 258 };
369 259
370 &i2c1 { 260 &i2c1 {
371 status = "okay"; 261 status = "okay";
372 clock-frequency = <400000>; 262 clock-frequency = <400000>;
373 <<
374 embedded-controller@70 { <<
375 compatible = "lenovo,yoga-c630 <<
376 reg = <0x70>; <<
377 <<
378 interrupts-extended = <&tlmm 2 <<
379 <<
380 pinctrl-names = "default"; <<
381 pinctrl-0 = <&ec_int_state>; <<
382 <<
383 #address-cells = <1>; <<
384 #size-cells = <0>; <<
385 <<
386 connector@0 { <<
387 compatible = "usb-c-co <<
388 reg = <0>; <<
389 power-role = "dual"; <<
390 data-role = "host"; <<
391 <<
392 ports { <<
393 #address-cells <<
394 #size-cells = <<
395 <<
396 port@0 { <<
397 reg = <<
398 <<
399 ucsi0_ <<
400 <<
401 }; <<
402 }; <<
403 <<
404 port@1 { <<
405 reg = <<
406 <<
407 ucsi0_ <<
408 <<
409 }; <<
410 }; <<
411 <<
412 port@2 { <<
413 reg = <<
414 <<
415 ucsi0_ <<
416 }; <<
417 }; <<
418 }; <<
419 }; <<
420 <<
421 connector@1 { <<
422 compatible = "usb-c-co <<
423 reg = <1>; <<
424 power-role = "dual"; <<
425 data-role = "host"; <<
426 <<
427 /* <<
428 * connected to the on <<
429 * handled by the cont <<
430 */ <<
431 }; <<
432 }; <<
433 }; 263 };
434 264
435 &i2c3 { 265 &i2c3 {
436 status = "okay"; 266 status = "okay";
437 clock-frequency = <400000>; 267 clock-frequency = <400000>;
438 /* Overwrite pinctrl-0 from sdm845.dts 268 /* Overwrite pinctrl-0 from sdm845.dtsi */
439 pinctrl-0 = <&qup_i2c3_default &i2c3_h 269 pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
440 270
441 tsel: hid@15 { 271 tsel: hid@15 {
442 compatible = "hid-over-i2c"; 272 compatible = "hid-over-i2c";
443 reg = <0x15>; 273 reg = <0x15>;
444 hid-descr-addr = <0x1>; 274 hid-descr-addr = <0x1>;
445 275
446 interrupts-extended = <&tlmm 3 276 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
447 }; 277 };
448 278
449 tsc2: hid@2c { 279 tsc2: hid@2c {
450 compatible = "hid-over-i2c"; 280 compatible = "hid-over-i2c";
451 reg = <0x2c>; 281 reg = <0x2c>;
452 hid-descr-addr = <0x20>; 282 hid-descr-addr = <0x20>;
453 283
454 interrupts-extended = <&tlmm 3 284 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
455 <<
456 wakeup-source; <<
457 }; 285 };
458 }; 286 };
459 287
460 &i2c5 { 288 &i2c5 {
461 status = "okay"; 289 status = "okay";
462 clock-frequency = <400000>; 290 clock-frequency = <400000>;
463 291
464 tsc1: hid@10 { 292 tsc1: hid@10 {
465 compatible = "hid-over-i2c"; 293 compatible = "hid-over-i2c";
466 reg = <0x10>; 294 reg = <0x10>;
467 hid-descr-addr = <0x1>; 295 hid-descr-addr = <0x1>;
468 296
469 interrupts-extended = <&tlmm 1 297 interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>;
470 298
471 pinctrl-names = "default"; 299 pinctrl-names = "default";
472 pinctrl-0 = <&i2c5_hid_active> 300 pinctrl-0 = <&i2c5_hid_active>;
473 <<
474 wakeup-source; <<
475 }; <<
476 }; <<
477 <<
478 &i2c10 { <<
479 status = "okay"; <<
480 clock-frequency = <400000>; <<
481 <<
482 sn65dsi86: bridge@2c { <<
483 compatible = "ti,sn65dsi86"; <<
484 reg = <0x2c>; <<
485 pinctrl-names = "default"; <<
486 pinctrl-0 = <&sn65dsi86_pin_ac <<
487 <<
488 enable-gpios = <&tlmm 96 GPIO_ <<
489 <<
490 vcca-supply = <&sw_edp_1p2>; <<
491 vcc-supply = <&sw_edp_1p2>; <<
492 vpll-supply = <&vreg_l14a_1p88 <<
493 vccio-supply = <&vreg_l14a_1p8 <<
494 <<
495 clocks = <&sn65dsi86_refclk>; <<
496 clock-names = "refclk"; <<
497 <<
498 no-hpd; <<
499 #pwm-cells = <1>; <<
500 <<
501 ports { <<
502 #address-cells = <1>; <<
503 #size-cells = <0>; <<
504 <<
505 port@0 { <<
506 reg = <0>; <<
507 sn65dsi86_in_a <<
508 remote <<
509 }; <<
510 }; <<
511 <<
512 port@1 { <<
513 reg = <1>; <<
514 sn65dsi86_out: <<
515 remote <<
516 }; <<
517 }; <<
518 }; <<
519 <<
520 aux-bus { <<
521 panel: panel { <<
522 compatible = " <<
523 backlight = <& <<
524 power-supply = <<
525 <<
526 port { <<
527 panel_ <<
528 <<
529 }; <<
530 }; <<
531 }; <<
532 }; <<
533 }; 301 };
534 }; 302 };
535 303
536 &i2c11 { 304 &i2c11 {
537 status = "okay"; 305 status = "okay";
538 clock-frequency = <400000>; 306 clock-frequency = <400000>;
539 307
540 ecsh: hid@5c { 308 ecsh: hid@5c {
541 compatible = "hid-over-i2c"; 309 compatible = "hid-over-i2c";
542 reg = <0x5c>; 310 reg = <0x5c>;
543 hid-descr-addr = <0x1>; 311 hid-descr-addr = <0x1>;
544 312
545 interrupts-extended = <&tlmm 9 313 interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
546 314
547 pinctrl-names = "default"; 315 pinctrl-names = "default";
548 pinctrl-0 = <&i2c11_hid_active 316 pinctrl-0 = <&i2c11_hid_active>;
549 <<
550 wakeup-source; <<
551 }; 317 };
552 }; 318 };
553 319
554 &ipa { !! 320 &mss_pil {
555 qcom,gsi-loader = "self"; !! 321 firmware-name = "qcom/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/LENOVO/81JL/qcdsp2850.mbn";
556 memory-region = <&ipa_fw_mem>; <<
557 firmware-name = "qcom/sdm850/LENOVO/81 <<
558 status = "okay"; <<
559 }; <<
560 <<
561 &mdss { <<
562 status = "okay"; <<
563 }; 322 };
564 323
565 &mdss_dsi0 { !! 324 &qup_i2c12_default {
566 status = "okay"; !! 325 pinmux {
567 vdda-supply = <&vreg_l26a_1p2>; !! 326 drive-strength = <2>;
568 !! 327 bias-disable;
569 ports { <<
570 port@1 { <<
571 endpoint { <<
572 remote-endpoin <<
573 data-lanes = < <<
574 }; <<
575 }; <<
576 }; 328 };
577 }; 329 };
578 330
579 &mdss_dsi0_phy { !! 331 &qup_uart6_default {
580 status = "okay"; !! 332 pinmux {
581 vdds-supply = <&vreg_l1a_0p875>; !! 333 pins = "gpio45", "gpio46", "gpio47", "gpio48";
582 }; !! 334 function = "qup6";
>> 335 };
583 336
584 &mss_pil { !! 337 cts {
585 status = "okay"; !! 338 pins = "gpio45";
586 firmware-name = "qcom/sdm850/LENOVO/81 !! 339 bias-pull-down;
587 }; !! 340 };
588 341
589 &pm8998_gpios { !! 342 rts-tx {
590 /* This pin is pulled down by a fixed !! 343 pins = "gpio46", "gpio47";
591 sw_edp_1p2_en: pm8998-gpio9-state { !! 344 drive-strength = <2>;
592 pins = "gpio9"; <<
593 function = "normal"; <<
594 bias-disable; 345 bias-disable;
595 qcom,drive-strength = <0>; <<
596 }; 346 };
597 }; <<
598 347
599 &qup_i2c10_default { !! 348 rx {
600 drive-strength = <2>; !! 349 pins = "gpio48";
601 bias-disable; !! 350 bias-pull-up;
602 }; !! 351 };
603 <<
604 &qup_i2c12_default { <<
605 drive-strength = <2>; <<
606 bias-disable; <<
607 }; 352 };
608 353
609 &qupv3_id_0 { 354 &qupv3_id_0 {
610 status = "okay"; 355 status = "okay";
611 }; 356 };
612 357
613 &qupv3_id_1 { 358 &qupv3_id_1 {
614 status = "okay"; 359 status = "okay";
615 }; 360 };
616 361
617 &q6asmdai { 362 &q6asmdai {
618 dai@0 { 363 dai@0 {
619 reg = <0>; 364 reg = <0>;
620 }; 365 };
621 366
622 dai@1 { 367 dai@1 {
623 reg = <1>; 368 reg = <1>;
624 }; 369 };
625 370
626 dai@2 { 371 dai@2 {
627 reg = <2>; 372 reg = <2>;
628 }; 373 };
629 }; 374 };
630 375
631 &sound { 376 &sound {
632 compatible = "lenovo,yoga-c630-sndcard !! 377 compatible = "qcom,db845c-sndcard";
633 model = "Lenovo-YOGA-C630-13Q50"; 378 model = "Lenovo-YOGA-C630-13Q50";
634 379
635 audio-routing = 380 audio-routing =
636 "RX_BIAS", "MCLK", 381 "RX_BIAS", "MCLK",
637 "AMIC2", "MIC BIAS2", 382 "AMIC2", "MIC BIAS2",
638 "SpkrLeft IN", "SPK1 OUT", 383 "SpkrLeft IN", "SPK1 OUT",
639 "SpkrRight IN", "SPK2 OUT", 384 "SpkrRight IN", "SPK2 OUT",
640 "MM_DL1", "MultiMedia1 Playba 385 "MM_DL1", "MultiMedia1 Playback",
641 "MM_DL3", "MultiMedia3 Playba 386 "MM_DL3", "MultiMedia3 Playback",
642 "MultiMedia2 Capture", "MM_UL2 387 "MultiMedia2 Capture", "MM_UL2";
643 388
644 mm1-dai-link { 389 mm1-dai-link {
645 link-name = "MultiMedia1"; 390 link-name = "MultiMedia1";
646 cpu { 391 cpu {
647 sound-dai = <&q6asmdai 392 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
648 }; 393 };
649 }; 394 };
650 395
651 mm2-dai-link { 396 mm2-dai-link {
652 link-name = "MultiMedia2"; 397 link-name = "MultiMedia2";
653 cpu { 398 cpu {
654 sound-dai = <&q6asmdai 399 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
655 }; 400 };
656 }; 401 };
657 402
658 mm3-dai-link { 403 mm3-dai-link {
659 link-name = "MultiMedia3"; 404 link-name = "MultiMedia3";
660 cpu { 405 cpu {
661 sound-dai = <&q6asmdai 406 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
662 }; 407 };
663 }; 408 };
664 409
665 slim-dai-link { 410 slim-dai-link {
666 link-name = "SLIM Playback"; 411 link-name = "SLIM Playback";
667 cpu { 412 cpu {
668 sound-dai = <&q6afedai 413 sound-dai = <&q6afedai SLIMBUS_0_RX>;
669 }; 414 };
670 415
671 platform { 416 platform {
672 sound-dai = <&q6routin 417 sound-dai = <&q6routing>;
673 }; 418 };
674 419
675 codec { 420 codec {
676 sound-dai = <&left_spk !! 421 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
677 }; 422 };
678 }; 423 };
679 424
680 slimcap-dai-link { 425 slimcap-dai-link {
681 link-name = "SLIM Capture"; 426 link-name = "SLIM Capture";
682 cpu { 427 cpu {
683 sound-dai = <&q6afedai 428 sound-dai = <&q6afedai SLIMBUS_0_TX>;
684 }; 429 };
685 430
686 platform { 431 platform {
687 sound-dai = <&q6routin 432 sound-dai = <&q6routing>;
688 }; 433 };
689 434
690 codec { 435 codec {
691 sound-dai = <&wcd9340 436 sound-dai = <&wcd9340 1>;
692 }; 437 };
693 }; 438 };
694 439
695 slim-wcd-dai-link { 440 slim-wcd-dai-link {
696 link-name = "SLIM WCD Playback 441 link-name = "SLIM WCD Playback";
697 cpu { 442 cpu {
698 sound-dai = <&q6afedai 443 sound-dai = <&q6afedai SLIMBUS_1_RX>;
699 }; 444 };
700 445
701 platform { 446 platform {
702 sound-dai = <&q6routin 447 sound-dai = <&q6routing>;
703 }; 448 };
704 449
705 codec { 450 codec {
706 sound-dai = <&wcd9340 !! 451 sound-dai = <&wcd9340 2>;
707 }; 452 };
708 }; 453 };
709 }; 454 };
710 455
711 &tlmm { 456 &tlmm {
712 gpio-reserved-ranges = <0 4>, <81 4>; 457 gpio-reserved-ranges = <0 4>, <81 4>;
713 458
714 sn65dsi86_pin_active: sn65dsi86-enable !! 459 i2c3_hid_active: i2c2-hid-active {
715 pins = "gpio96"; <<
716 function = "gpio"; <<
717 drive-strength = <2>; <<
718 bias-disable; <<
719 }; <<
720 <<
721 i2c3_hid_active: i2c2-hid-active-state <<
722 pins = "gpio37"; 460 pins = "gpio37";
723 function = "gpio"; 461 function = "gpio";
724 462
>> 463 input-enable;
725 bias-pull-up; 464 bias-pull-up;
726 drive-strength = <2>; 465 drive-strength = <2>;
727 }; 466 };
728 467
729 i2c5_hid_active: i2c5-hid-active-state !! 468 i2c5_hid_active: i2c5-hid-active {
730 pins = "gpio125"; 469 pins = "gpio125";
731 function = "gpio"; 470 function = "gpio";
732 471
>> 472 input-enable;
733 bias-pull-up; 473 bias-pull-up;
734 drive-strength = <2>; 474 drive-strength = <2>;
735 }; 475 };
736 476
737 i2c11_hid_active: i2c11-hid-active-sta !! 477 i2c11_hid_active: i2c11-hid-active {
738 pins = "gpio92"; 478 pins = "gpio92";
739 function = "gpio"; 479 function = "gpio";
740 480
>> 481 input-enable;
741 bias-pull-up; 482 bias-pull-up;
742 drive-strength = <2>; 483 drive-strength = <2>;
743 }; 484 };
744 485
745 lid_pin_active: lid-pin-state { !! 486 wcd_intr_default: wcd_intr_default {
746 pins = "gpio124"; !! 487 pins = "gpio54";
747 function = "gpio"; <<
748 <<
749 bias-disable; <<
750 }; <<
751 <<
752 mode_pin_active: mode-pin-state { <<
753 pins = "gpio95"; <<
754 function = "gpio"; 488 function = "gpio";
755 489
756 bias-disable; !! 490 input-enable;
757 }; !! 491 bias-pull-down;
758 !! 492 drive-strength = <2>;
759 ec_int_state: ec-int-state { <<
760 pins = "gpio20"; <<
761 function = "gpio"; <<
762 <<
763 bias-disable; <<
764 }; 493 };
765 }; 494 };
766 495
767 &uart6 { 496 &uart6 {
768 pinctrl-names = "default"; <<
769 pinctrl-0 = <&qup_uart6_4pin>; <<
770 status = "okay"; 497 status = "okay";
771 498
772 bluetooth { 499 bluetooth {
773 compatible = "qcom,wcn3990-bt" 500 compatible = "qcom,wcn3990-bt";
774 501
775 vddio-supply = <&vreg_s4a_1p8> 502 vddio-supply = <&vreg_s4a_1p8>;
776 vddxo-supply = <&vreg_l7a_1p8> 503 vddxo-supply = <&vreg_l7a_1p8>;
777 vddrf-supply = <&vreg_l17a_1p3 504 vddrf-supply = <&vreg_l17a_1p3>;
778 vddch0-supply = <&vreg_l25a_3p 505 vddch0-supply = <&vreg_l25a_3p3>;
779 vddch1-supply = <&vreg_l23a_3p <<
780 max-speed = <3200000>; 506 max-speed = <3200000>;
781 }; 507 };
782 }; 508 };
783 509
784 &uart9 { <<
785 status = "okay"; <<
786 }; <<
787 <<
788 &ufs_mem_hc { 510 &ufs_mem_hc {
789 status = "okay"; 511 status = "okay";
790 512
791 reset-gpios = <&tlmm 150 GPIO_ACTIVE_L 513 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
792 514
793 vcc-supply = <&vreg_l20a_2p95>; 515 vcc-supply = <&vreg_l20a_2p95>;
794 vcc-max-microamp = <600000>; 516 vcc-max-microamp = <600000>;
795 }; 517 };
796 518
797 &ufs_mem_phy { 519 &ufs_mem_phy {
798 status = "okay"; 520 status = "okay";
799 521
800 vdda-phy-supply = <&vdda_ufs1_core>; 522 vdda-phy-supply = <&vdda_ufs1_core>;
801 vdda-pll-supply = <&vdda_ufs1_1p2>; 523 vdda-pll-supply = <&vdda_ufs1_1p2>;
802 }; 524 };
803 525
804 &usb_1 { 526 &usb_1 {
805 status = "okay"; 527 status = "okay";
806 }; 528 };
807 529
808 &usb_1_dwc3 { 530 &usb_1_dwc3 {
809 dr_mode = "host"; 531 dr_mode = "host";
810 }; 532 };
811 533
812 &usb_1_dwc3_hs { <<
813 remote-endpoint = <&ucsi0_hs_in>; <<
814 }; <<
815 <<
816 &usb_1_hsphy { 534 &usb_1_hsphy {
817 status = "okay"; 535 status = "okay";
818 536
819 vdd-supply = <&vdda_usb1_ss_core>; 537 vdd-supply = <&vdda_usb1_ss_core>;
820 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 538 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
821 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 539 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
822 540
823 qcom,imp-res-offset-value = <8>; 541 qcom,imp-res-offset-value = <8>;
824 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 542 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
825 qcom,preemphasis-level = <QUSB2_V2_PRE 543 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
826 qcom,preemphasis-width = <QUSB2_V2_PRE 544 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
827 }; 545 };
828 546
829 &usb_1_qmpphy { 547 &usb_1_qmpphy {
830 status = "okay"; 548 status = "okay";
831 549
832 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 550 vdda-phy-supply = <&vdda_usb1_ss_1p2>;
833 vdda-pll-supply = <&vdda_usb1_ss_core> 551 vdda-pll-supply = <&vdda_usb1_ss_core>;
834 }; 552 };
835 553
836 &usb_1_qmpphy_out { <<
837 remote-endpoint = <&ucsi0_ss_in>; <<
838 }; <<
839 <<
840 &usb_2 { 554 &usb_2 {
841 status = "okay"; 555 status = "okay";
842 }; 556 };
843 557
844 &usb_2_dwc3 { 558 &usb_2_dwc3 {
845 dr_mode = "host"; 559 dr_mode = "host";
846 }; 560 };
847 561
848 &usb_2_hsphy { 562 &usb_2_hsphy {
849 status = "okay"; 563 status = "okay";
850 564
851 vdd-supply = <&vdda_usb2_ss_core>; 565 vdd-supply = <&vdda_usb2_ss_core>;
852 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 566 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
853 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 567 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
854 568
855 qcom,imp-res-offset-value = <8>; 569 qcom,imp-res-offset-value = <8>;
856 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 570 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
857 }; 571 };
858 572
859 &usb_2_qmpphy { 573 &usb_2_qmpphy {
860 status = "okay"; 574 status = "okay";
861 575
862 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 576 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
863 vdda-pll-supply = <&vdda_usb2_ss_core> 577 vdda-pll-supply = <&vdda_usb2_ss_core>;
864 }; 578 };
865 579
866 &venus { !! 580 &wcd9340{
867 firmware-name = "qcom/sdm850/LENOVO/81 !! 581 pinctrl-0 = <&wcd_intr_default>;
868 status = "okay"; !! 582 pinctrl-names = "default";
869 }; !! 583 clock-names = "extclk";
870 !! 584 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
871 &wcd9340 { !! 585 reset-gpios = <&tlmm 64 0>;
872 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HI <<
873 vdd-buck-supply = <&vreg_s4a_1p8>; 586 vdd-buck-supply = <&vreg_s4a_1p8>;
874 vdd-buck-sido-supply = <&vreg_s4a_1p8> 587 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
875 vdd-tx-supply = <&vreg_s4a_1p8>; 588 vdd-tx-supply = <&vreg_s4a_1p8>;
876 vdd-rx-supply = <&vreg_s4a_1p8>; 589 vdd-rx-supply = <&vreg_s4a_1p8>;
877 vdd-io-supply = <&vreg_s4a_1p8>; 590 vdd-io-supply = <&vreg_s4a_1p8>;
878 qcom,mbhc-buttons-vthreshold-microvolt <<
879 qcom,mbhc-headset-vthreshold-microvolt <<
880 qcom,mbhc-headphone-vthreshold-microvo <<
881 591
882 swm: soundwire@c85 { !! 592 swm: swm@c85 {
883 left_spkr: speaker@0,3 { !! 593 left_spkr: wsa8810-left{
884 compatible = "sdw10217 594 compatible = "sdw10217211000";
885 reg = <0 3>; 595 reg = <0 3>;
886 powerdown-gpios = <&wc !! 596 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
887 #thermal-sensor-cells 597 #thermal-sensor-cells = <0>;
888 sound-name-prefix = "S 598 sound-name-prefix = "SpkrLeft";
889 #sound-dai-cells = <0> 599 #sound-dai-cells = <0>;
890 }; 600 };
891 601
892 right_spkr: speaker@0,4 { !! 602 right_spkr: wsa8810-right{
893 compatible = "sdw10217 603 compatible = "sdw10217211000";
894 powerdown-gpios = <&wc !! 604 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
895 reg = <0 4>; 605 reg = <0 4>;
896 #thermal-sensor-cells 606 #thermal-sensor-cells = <0>;
897 sound-name-prefix = "S 607 sound-name-prefix = "SpkrRight";
898 #sound-dai-cells = <0> 608 #sound-dai-cells = <0>;
899 }; 609 };
900 }; 610 };
901 }; 611 };
902 612
903 &wifi { 613 &wifi {
904 status = "okay"; 614 status = "okay";
905 615
906 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8> 616 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
907 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 617 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
908 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 618 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
909 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 619 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
910 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; <<
911 620
912 qcom,snoc-host-cap-8bit-quirk; 621 qcom,snoc-host-cap-8bit-quirk;
913 qcom,ath10k-calibration-variant = "Len <<
914 }; <<
915 <<
916 &crypto { <<
917 /* FIXME: qce_start triggers an SError <<
918 status = "disabled"; <<
919 }; 622 };
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