1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Lenovo Yoga C630 3 * Lenovo Yoga C630
4 * 4 *
5 * Copyright (c) 2019, Linaro Ltd. 5 * Copyright (c) 2019, Linaro Ltd.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
>> 10 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/gpio-keys.h> 11 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regu 13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h> 14 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h> 15 #include <dt-bindings/sound/qcom,q6asm.h>
15 #include "sdm850.dtsi" !! 16 #include "sdm845.dtsi"
16 #include "sdm845-wcd9340.dtsi" <<
17 #include "pm8998.dtsi" 17 #include "pm8998.dtsi"
18 18
19 /* <<
20 * Update following upstream (sdm845.dtsi) res <<
21 * memory mappings for firmware loading to suc <<
22 * and enable the IPA device. <<
23 */ <<
24 /delete-node/ &ipa_fw_mem; <<
25 /delete-node/ &ipa_gsi_mem; <<
26 /delete-node/ &gpu_mem; <<
27 /delete-node/ &adsp_mem; <<
28 /delete-node/ &wlan_msa_mem; <<
29 <<
30 / { 19 / {
31 model = "Lenovo Yoga C630"; 20 model = "Lenovo Yoga C630";
32 compatible = "lenovo,yoga-c630", "qcom 21 compatible = "lenovo,yoga-c630", "qcom,sdm845";
33 chassis-type = "convertible"; <<
34 22
35 aliases { 23 aliases {
36 serial0 = &uart9; !! 24 hsuart0 = &uart6;
37 serial1 = &uart6; <<
38 }; 25 };
39 26
40 gpio-keys { 27 gpio-keys {
41 compatible = "gpio-keys"; 28 compatible = "gpio-keys";
42 29
43 pinctrl-names = "default"; 30 pinctrl-names = "default";
44 pinctrl-0 = <&lid_pin_active>, 31 pinctrl-0 = <&lid_pin_active>, <&mode_pin_active>;
45 32
46 switch-lid { !! 33 lid {
47 gpios = <&tlmm 124 GPI 34 gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;
48 linux,input-type = <EV 35 linux,input-type = <EV_SW>;
49 linux,code = <SW_LID>; 36 linux,code = <SW_LID>;
50 wakeup-source; 37 wakeup-source;
51 wakeup-event-action = 38 wakeup-event-action = <EV_ACT_DEASSERTED>;
52 }; 39 };
53 40
54 switch-mode { !! 41 mode {
55 gpios = <&tlmm 95 GPIO 42 gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
56 linux,input-type = <EV 43 linux,input-type = <EV_SW>;
57 linux,code = <SW_TABLE 44 linux,code = <SW_TABLET_MODE>;
58 }; 45 };
59 }; 46 };
60 47
61 /* Reserved memory changes for IPA */ !! 48 panel {
62 reserved-memory { !! 49 compatible = "boe,nv133fhm-n61";
63 wlan_msa_mem: memory@8c400000 !! 50 no-hpd;
64 reg = <0 0x8c400000 0 <<
65 no-map; <<
66 }; <<
67 <<
68 gpu_mem: memory@8c515000 { <<
69 reg = <0 0x8c515000 0 <<
70 no-map; <<
71 }; <<
72 <<
73 ipa_fw_mem: memory@8c517000 { <<
74 reg = <0 0x8c517000 0 <<
75 no-map; <<
76 }; <<
77 51
78 adsp_mem: memory@8c600000 { !! 52 ports {
79 reg = <0 0x8c600000 0 !! 53 port {
80 no-map; !! 54 panel_in_edp: endpoint {
>> 55 remote-endpoint = <&sn65dsi86_out>;
>> 56 };
>> 57 };
81 }; 58 };
82 }; 59 };
83 60
84 sw_edp_1p2: edp-1p2-regulator { <<
85 compatible = "regulator-fixed" <<
86 regulator-name = "sw_edp_1p2"; <<
87 <<
88 regulator-min-microvolt = <120 <<
89 regulator-max-microvolt = <120 <<
90 <<
91 pinctrl-0 = <&sw_edp_1p2_en>; <<
92 pinctrl-names = "default"; <<
93 <<
94 gpio = <&pm8998_gpios 9 GPIO_A <<
95 enable-active-high; <<
96 <<
97 vin-supply = <&vreg_l2a_1p2>; <<
98 }; <<
99 <<
100 sn65dsi86_refclk: sn65dsi86-refclk { 61 sn65dsi86_refclk: sn65dsi86-refclk {
101 compatible = "fixed-clock"; 62 compatible = "fixed-clock";
102 #clock-cells = <0>; 63 #clock-cells = <0>;
103 64
104 clock-frequency = <19200000>; 65 clock-frequency = <19200000>;
105 }; 66 };
106 <<
107 vph_pwr: regulator-vph-pwr { <<
108 compatible = "regulator-fixed" <<
109 regulator-name = "vph_pwr"; <<
110 regulator-min-microvolt = <370 <<
111 regulator-max-microvolt = <370 <<
112 }; <<
113 <<
114 vlcm_3v3: regulator-vlcm-3v3 { <<
115 compatible = "regulator-fixed" <<
116 regulator-name = "vlcm_3v3"; <<
117 <<
118 vin-supply = <&vph_pwr>; <<
119 regulator-min-microvolt = <330 <<
120 regulator-max-microvolt = <330 <<
121 <<
122 gpio = <&tlmm 88 GPIO_ACTIVE_H <<
123 enable-active-high; <<
124 }; <<
125 <<
126 backlight: backlight { <<
127 compatible = "pwm-backlight"; <<
128 pwms = <&sn65dsi86 1000000>; <<
129 enable-gpios = <&tlmm 11 GPIO_ <<
130 }; <<
131 }; 67 };
132 68
133 &adsp_pas { 69 &adsp_pas {
134 firmware-name = "qcom/sdm850/LENOVO/81 !! 70 firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
135 status = "okay"; 71 status = "okay";
136 }; 72 };
137 73
138 &apps_rsc { 74 &apps_rsc {
139 regulators-0 { !! 75 pm8998-rpmh-regulators {
140 compatible = "qcom,pm8998-rpmh 76 compatible = "qcom,pm8998-rpmh-regulators";
141 qcom,pmic-id = "a"; 77 qcom,pmic-id = "a";
142 78
143 vdd-l2-l8-l17-supply = <&vreg_ 79 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
144 vdd-l7-l12-l14-l15-supply = <& 80 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
145 81
146 vreg_s2a_1p125: smps2 { 82 vreg_s2a_1p125: smps2 {
147 }; 83 };
148 84
149 vreg_s3a_1p35: smps3 { 85 vreg_s3a_1p35: smps3 {
150 regulator-min-microvol 86 regulator-min-microvolt = <1352000>;
151 regulator-max-microvol 87 regulator-max-microvolt = <1352000>;
152 regulator-initial-mode 88 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153 }; 89 };
154 90
155 vreg_s4a_1p8: smps4 { 91 vreg_s4a_1p8: smps4 {
156 regulator-min-microvol 92 regulator-min-microvolt = <1800000>;
157 regulator-max-microvol 93 regulator-max-microvolt = <1800000>;
158 regulator-initial-mode 94 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
159 }; 95 };
160 96
161 vreg_s5a_2p04: smps5 { 97 vreg_s5a_2p04: smps5 {
162 regulator-min-microvol 98 regulator-min-microvolt = <2040000>;
163 regulator-max-microvol 99 regulator-max-microvolt = <2040000>;
164 regulator-initial-mode 100 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
165 }; 101 };
166 102
167 vreg_s7a_1p025: smps7 { 103 vreg_s7a_1p025: smps7 {
168 }; 104 };
169 105
170 vdd_qusb_hs0: 106 vdd_qusb_hs0:
171 vdda_hp_pcie_core: 107 vdda_hp_pcie_core:
172 vdda_mipi_csi0_0p9: 108 vdda_mipi_csi0_0p9:
173 vdda_mipi_csi1_0p9: 109 vdda_mipi_csi1_0p9:
174 vdda_mipi_csi2_0p9: 110 vdda_mipi_csi2_0p9:
175 vdda_mipi_dsi0_pll: 111 vdda_mipi_dsi0_pll:
176 vdda_mipi_dsi1_pll: 112 vdda_mipi_dsi1_pll:
177 vdda_qlink_lv: 113 vdda_qlink_lv:
178 vdda_qlink_lv_ck: 114 vdda_qlink_lv_ck:
179 vdda_qrefs_0p875: 115 vdda_qrefs_0p875:
180 vdda_pcie_core: 116 vdda_pcie_core:
181 vdda_pll_cc_ebi01: 117 vdda_pll_cc_ebi01:
182 vdda_pll_cc_ebi23: 118 vdda_pll_cc_ebi23:
183 vdda_sp_sensor: 119 vdda_sp_sensor:
184 vdda_ufs1_core: 120 vdda_ufs1_core:
185 vdda_ufs2_core: 121 vdda_ufs2_core:
186 vdda_usb1_ss_core: 122 vdda_usb1_ss_core:
187 vdda_usb2_ss_core: 123 vdda_usb2_ss_core:
188 vreg_l1a_0p875: ldo1 { 124 vreg_l1a_0p875: ldo1 {
189 regulator-min-microvol 125 regulator-min-microvolt = <880000>;
190 regulator-max-microvol 126 regulator-max-microvolt = <880000>;
191 regulator-initial-mode 127 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
192 }; 128 };
193 129
194 vddpx_10: 130 vddpx_10:
195 vreg_l2a_1p2: ldo2 { 131 vreg_l2a_1p2: ldo2 {
196 regulator-min-microvol 132 regulator-min-microvolt = <1200000>;
197 regulator-max-microvol 133 regulator-max-microvolt = <1200000>;
198 regulator-initial-mode 134 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199 regulator-always-on; 135 regulator-always-on;
200 }; 136 };
201 137
202 vreg_l3a_1p0: ldo3 { 138 vreg_l3a_1p0: ldo3 {
203 }; 139 };
204 140
205 vdd_wcss_cx: 141 vdd_wcss_cx:
206 vdd_wcss_mx: 142 vdd_wcss_mx:
207 vdda_wcss_pll: 143 vdda_wcss_pll:
208 vreg_l5a_0p8: ldo5 { 144 vreg_l5a_0p8: ldo5 {
209 regulator-min-microvol 145 regulator-min-microvolt = <800000>;
210 regulator-max-microvol 146 regulator-max-microvolt = <800000>;
211 regulator-initial-mode 147 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
212 }; 148 };
213 149
214 vddpx_13: 150 vddpx_13:
215 vreg_l6a_1p8: ldo6 { 151 vreg_l6a_1p8: ldo6 {
216 regulator-min-microvol 152 regulator-min-microvolt = <1800000>;
217 regulator-max-microvol 153 regulator-max-microvolt = <1800000>;
218 regulator-initial-mode 154 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219 }; 155 };
220 156
221 vreg_l7a_1p8: ldo7 { 157 vreg_l7a_1p8: ldo7 {
222 regulator-min-microvol 158 regulator-min-microvolt = <1800000>;
223 regulator-max-microvol 159 regulator-max-microvolt = <1800000>;
224 regulator-initial-mode 160 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 }; 161 };
226 162
227 vreg_l8a_1p2: ldo8 { 163 vreg_l8a_1p2: ldo8 {
228 }; 164 };
229 165
230 vreg_l9a_1p8: ldo9 { 166 vreg_l9a_1p8: ldo9 {
231 }; 167 };
232 168
233 vreg_l10a_1p8: ldo10 { 169 vreg_l10a_1p8: ldo10 {
234 }; 170 };
235 171
236 vreg_l11a_1p0: ldo11 { 172 vreg_l11a_1p0: ldo11 {
237 }; 173 };
238 174
239 vdd_qfprom: 175 vdd_qfprom:
240 vdd_qfprom_sp: 176 vdd_qfprom_sp:
241 vdda_apc1_cs_1p8: 177 vdda_apc1_cs_1p8:
242 vdda_gfx_cs_1p8: 178 vdda_gfx_cs_1p8:
243 vdda_qrefs_1p8: 179 vdda_qrefs_1p8:
244 vdda_qusb_hs0_1p8: 180 vdda_qusb_hs0_1p8:
245 vddpx_11: 181 vddpx_11:
246 vreg_l12a_1p8: ldo12 { 182 vreg_l12a_1p8: ldo12 {
247 regulator-min-microvol 183 regulator-min-microvolt = <1800000>;
248 regulator-max-microvol 184 regulator-max-microvolt = <1800000>;
249 regulator-initial-mode 185 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
250 }; 186 };
251 187
252 vddpx_2: 188 vddpx_2:
253 vreg_l13a_2p95: ldo13 { 189 vreg_l13a_2p95: ldo13 {
254 }; 190 };
255 191
256 vreg_l14a_1p88: ldo14 { 192 vreg_l14a_1p88: ldo14 {
257 regulator-min-microvol 193 regulator-min-microvolt = <1880000>;
258 regulator-max-microvol 194 regulator-max-microvolt = <1880000>;
259 regulator-initial-mode 195 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
260 regulator-always-on; 196 regulator-always-on;
261 }; 197 };
262 198
263 vreg_l15a_1p8: ldo15 { 199 vreg_l15a_1p8: ldo15 {
264 }; 200 };
265 201
266 vreg_l16a_2p7: ldo16 { 202 vreg_l16a_2p7: ldo16 {
267 }; 203 };
268 204
269 vreg_l17a_1p3: ldo17 { 205 vreg_l17a_1p3: ldo17 {
270 regulator-min-microvol 206 regulator-min-microvolt = <1304000>;
271 regulator-max-microvol 207 regulator-max-microvolt = <1304000>;
272 regulator-initial-mode 208 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273 }; 209 };
274 210
275 vreg_l18a_2p7: ldo18 { 211 vreg_l18a_2p7: ldo18 {
276 }; 212 };
277 213
278 vreg_l19a_3p0: ldo19 { 214 vreg_l19a_3p0: ldo19 {
279 regulator-min-microvol 215 regulator-min-microvolt = <3100000>;
280 regulator-max-microvol 216 regulator-max-microvolt = <3108000>;
281 regulator-initial-mode 217 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
282 }; 218 };
283 219
284 vreg_l20a_2p95: ldo20 { 220 vreg_l20a_2p95: ldo20 {
285 regulator-min-microvol 221 regulator-min-microvolt = <2960000>;
286 regulator-max-microvol 222 regulator-max-microvolt = <2960000>;
287 regulator-initial-mode 223 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
288 }; 224 };
289 225
290 vreg_l21a_2p95: ldo21 { 226 vreg_l21a_2p95: ldo21 {
291 }; 227 };
292 228
293 vreg_l22a_2p85: ldo22 { 229 vreg_l22a_2p85: ldo22 {
294 }; 230 };
295 231
296 vreg_l23a_3p3: ldo23 { 232 vreg_l23a_3p3: ldo23 {
297 regulator-min-microvol <<
298 regulator-max-microvol <<
299 regulator-initial-mode <<
300 }; 233 };
301 234
302 vdda_qusb_hs0_3p1: 235 vdda_qusb_hs0_3p1:
303 vreg_l24a_3p075: ldo24 { 236 vreg_l24a_3p075: ldo24 {
304 regulator-min-microvol 237 regulator-min-microvolt = <3075000>;
305 regulator-max-microvol 238 regulator-max-microvolt = <3083000>;
306 regulator-initial-mode 239 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
307 }; 240 };
308 241
309 vreg_l25a_3p3: ldo25 { 242 vreg_l25a_3p3: ldo25 {
310 regulator-min-microvol 243 regulator-min-microvolt = <3104000>;
311 regulator-max-microvol 244 regulator-max-microvolt = <3112000>;
312 regulator-initial-mode 245 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
313 }; 246 };
314 247
315 vdda_hp_pcie_1p2: 248 vdda_hp_pcie_1p2:
316 vdda_hv_ebi0: 249 vdda_hv_ebi0:
317 vdda_hv_ebi1: 250 vdda_hv_ebi1:
318 vdda_hv_ebi2: 251 vdda_hv_ebi2:
319 vdda_hv_ebi3: 252 vdda_hv_ebi3:
320 vdda_mipi_csi_1p25: 253 vdda_mipi_csi_1p25:
321 vdda_mipi_dsi0_1p2: 254 vdda_mipi_dsi0_1p2:
322 vdda_mipi_dsi1_1p2: 255 vdda_mipi_dsi1_1p2:
323 vdda_pcie_1p2: 256 vdda_pcie_1p2:
324 vdda_ufs1_1p2: 257 vdda_ufs1_1p2:
325 vdda_ufs2_1p2: 258 vdda_ufs2_1p2:
326 vdda_usb1_ss_1p2: 259 vdda_usb1_ss_1p2:
327 vdda_usb2_ss_1p2: 260 vdda_usb2_ss_1p2:
328 vreg_l26a_1p2: ldo26 { 261 vreg_l26a_1p2: ldo26 {
329 regulator-min-microvol 262 regulator-min-microvolt = <1200000>;
330 regulator-max-microvol 263 regulator-max-microvolt = <1208000>;
331 regulator-initial-mode 264 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332 }; 265 };
333 266
334 vreg_l28a_3p0: ldo28 { 267 vreg_l28a_3p0: ldo28 {
335 }; 268 };
336 269
337 vreg_lvs1a_1p8: lvs1 { 270 vreg_lvs1a_1p8: lvs1 {
338 }; 271 };
339 272
340 vreg_lvs2a_1p8: lvs2 { 273 vreg_lvs2a_1p8: lvs2 {
341 }; 274 };
342 }; 275 };
343 }; 276 };
344 277
345 &cdsp_pas { 278 &cdsp_pas {
346 firmware-name = "qcom/sdm850/LENOVO/81 !! 279 firmware-name = "qcom/LENOVO/81JL/qccdsp850.mbn";
>> 280 status = "okay";
>> 281 };
>> 282
>> 283 &dsi0 {
>> 284 status = "okay";
>> 285 vdda-supply = <&vreg_l26a_1p2>;
>> 286
>> 287 ports {
>> 288 port@1 {
>> 289 endpoint {
>> 290 remote-endpoint = <&sn65dsi86_in_a>;
>> 291 data-lanes = <0 1 2 3>;
>> 292 };
>> 293 };
>> 294 };
>> 295 };
>> 296
>> 297 &dsi0_phy {
347 status = "okay"; 298 status = "okay";
>> 299 vdds-supply = <&vreg_l1a_0p875>;
348 }; 300 };
349 301
350 &gcc { 302 &gcc {
351 protected-clocks = <GCC_QSPI_CORE_CLK> 303 protected-clocks = <GCC_QSPI_CORE_CLK>,
352 <GCC_QSPI_CORE_CLK_ 304 <GCC_QSPI_CORE_CLK_SRC>,
353 <GCC_QSPI_CNOC_PERI 305 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
354 <GCC_LPASS_Q6_AXI_C 306 <GCC_LPASS_Q6_AXI_CLK>,
355 <GCC_LPASS_SWAY_CLK 307 <GCC_LPASS_SWAY_CLK>;
356 }; 308 };
357 309
358 &gmu { <<
359 status = "okay"; <<
360 }; <<
361 <<
362 &gpu { 310 &gpu {
363 status = "okay"; <<
364 zap-shader { 311 zap-shader {
365 memory-region = <&gpu_mem>; 312 memory-region = <&gpu_mem>;
366 firmware-name = "qcom/sdm850/L !! 313 firmware-name = "qcom/LENOVO/81JL/qcdxkmsuc850.mbn";
367 }; 314 };
368 }; 315 };
369 316
370 &i2c1 { 317 &i2c1 {
371 status = "okay"; 318 status = "okay";
372 clock-frequency = <400000>; 319 clock-frequency = <400000>;
373 <<
374 embedded-controller@70 { <<
375 compatible = "lenovo,yoga-c630 <<
376 reg = <0x70>; <<
377 <<
378 interrupts-extended = <&tlmm 2 <<
379 <<
380 pinctrl-names = "default"; <<
381 pinctrl-0 = <&ec_int_state>; <<
382 <<
383 #address-cells = <1>; <<
384 #size-cells = <0>; <<
385 <<
386 connector@0 { <<
387 compatible = "usb-c-co <<
388 reg = <0>; <<
389 power-role = "dual"; <<
390 data-role = "host"; <<
391 <<
392 ports { <<
393 #address-cells <<
394 #size-cells = <<
395 <<
396 port@0 { <<
397 reg = <<
398 <<
399 ucsi0_ <<
400 <<
401 }; <<
402 }; <<
403 <<
404 port@1 { <<
405 reg = <<
406 <<
407 ucsi0_ <<
408 <<
409 }; <<
410 }; <<
411 <<
412 port@2 { <<
413 reg = <<
414 <<
415 ucsi0_ <<
416 }; <<
417 }; <<
418 }; <<
419 }; <<
420 <<
421 connector@1 { <<
422 compatible = "usb-c-co <<
423 reg = <1>; <<
424 power-role = "dual"; <<
425 data-role = "host"; <<
426 <<
427 /* <<
428 * connected to the on <<
429 * handled by the cont <<
430 */ <<
431 }; <<
432 }; <<
433 }; 320 };
434 321
435 &i2c3 { 322 &i2c3 {
436 status = "okay"; 323 status = "okay";
437 clock-frequency = <400000>; 324 clock-frequency = <400000>;
438 /* Overwrite pinctrl-0 from sdm845.dts 325 /* Overwrite pinctrl-0 from sdm845.dtsi */
439 pinctrl-0 = <&qup_i2c3_default &i2c3_h 326 pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
440 327
441 tsel: hid@15 { 328 tsel: hid@15 {
442 compatible = "hid-over-i2c"; 329 compatible = "hid-over-i2c";
443 reg = <0x15>; 330 reg = <0x15>;
444 hid-descr-addr = <0x1>; 331 hid-descr-addr = <0x1>;
445 332
446 interrupts-extended = <&tlmm 3 333 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
447 }; 334 };
448 335
449 tsc2: hid@2c { 336 tsc2: hid@2c {
450 compatible = "hid-over-i2c"; 337 compatible = "hid-over-i2c";
451 reg = <0x2c>; 338 reg = <0x2c>;
452 hid-descr-addr = <0x20>; 339 hid-descr-addr = <0x20>;
453 340
454 interrupts-extended = <&tlmm 3 341 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
455 <<
456 wakeup-source; <<
457 }; 342 };
458 }; 343 };
459 344
460 &i2c5 { 345 &i2c5 {
461 status = "okay"; 346 status = "okay";
462 clock-frequency = <400000>; 347 clock-frequency = <400000>;
463 348
464 tsc1: hid@10 { 349 tsc1: hid@10 {
465 compatible = "hid-over-i2c"; 350 compatible = "hid-over-i2c";
466 reg = <0x10>; 351 reg = <0x10>;
467 hid-descr-addr = <0x1>; 352 hid-descr-addr = <0x1>;
468 353
469 interrupts-extended = <&tlmm 1 354 interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>;
470 355
471 pinctrl-names = "default"; 356 pinctrl-names = "default";
472 pinctrl-0 = <&i2c5_hid_active> 357 pinctrl-0 = <&i2c5_hid_active>;
473 <<
474 wakeup-source; <<
475 }; 358 };
476 }; 359 };
477 360
478 &i2c10 { 361 &i2c10 {
479 status = "okay"; 362 status = "okay";
480 clock-frequency = <400000>; 363 clock-frequency = <400000>;
481 364
482 sn65dsi86: bridge@2c { 365 sn65dsi86: bridge@2c {
483 compatible = "ti,sn65dsi86"; 366 compatible = "ti,sn65dsi86";
484 reg = <0x2c>; 367 reg = <0x2c>;
485 pinctrl-names = "default"; 368 pinctrl-names = "default";
486 pinctrl-0 = <&sn65dsi86_pin_ac 369 pinctrl-0 = <&sn65dsi86_pin_active>;
487 370
488 enable-gpios = <&tlmm 96 GPIO_ 371 enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
489 372
490 vcca-supply = <&sw_edp_1p2>; <<
491 vcc-supply = <&sw_edp_1p2>; <<
492 vpll-supply = <&vreg_l14a_1p88 373 vpll-supply = <&vreg_l14a_1p88>;
493 vccio-supply = <&vreg_l14a_1p8 374 vccio-supply = <&vreg_l14a_1p88>;
494 375
495 clocks = <&sn65dsi86_refclk>; 376 clocks = <&sn65dsi86_refclk>;
496 clock-names = "refclk"; 377 clock-names = "refclk";
497 378
498 no-hpd; <<
499 #pwm-cells = <1>; <<
500 <<
501 ports { 379 ports {
502 #address-cells = <1>; 380 #address-cells = <1>;
503 #size-cells = <0>; 381 #size-cells = <0>;
504 382
505 port@0 { 383 port@0 {
506 reg = <0>; 384 reg = <0>;
507 sn65dsi86_in_a 385 sn65dsi86_in_a: endpoint {
508 remote !! 386 remote-endpoint = <&dsi0_out>;
509 }; 387 };
510 }; 388 };
511 389
512 port@1 { 390 port@1 {
513 reg = <1>; 391 reg = <1>;
514 sn65dsi86_out: 392 sn65dsi86_out: endpoint {
515 remote 393 remote-endpoint = <&panel_in_edp>;
516 }; 394 };
517 }; 395 };
518 }; 396 };
519 <<
520 aux-bus { <<
521 panel: panel { <<
522 compatible = " <<
523 backlight = <& <<
524 power-supply = <<
525 <<
526 port { <<
527 panel_ <<
528 <<
529 }; <<
530 }; <<
531 }; <<
532 }; <<
533 }; 397 };
534 }; 398 };
535 399
536 &i2c11 { 400 &i2c11 {
537 status = "okay"; 401 status = "okay";
538 clock-frequency = <400000>; 402 clock-frequency = <400000>;
539 403
540 ecsh: hid@5c { 404 ecsh: hid@5c {
541 compatible = "hid-over-i2c"; 405 compatible = "hid-over-i2c";
542 reg = <0x5c>; 406 reg = <0x5c>;
543 hid-descr-addr = <0x1>; 407 hid-descr-addr = <0x1>;
544 408
545 interrupts-extended = <&tlmm 9 409 interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
546 410
547 pinctrl-names = "default"; 411 pinctrl-names = "default";
548 pinctrl-0 = <&i2c11_hid_active 412 pinctrl-0 = <&i2c11_hid_active>;
549 <<
550 wakeup-source; <<
551 }; 413 };
552 }; 414 };
553 415
554 &ipa { <<
555 qcom,gsi-loader = "self"; <<
556 memory-region = <&ipa_fw_mem>; <<
557 firmware-name = "qcom/sdm850/LENOVO/81 <<
558 status = "okay"; <<
559 }; <<
560 <<
561 &mdss { 416 &mdss {
562 status = "okay"; 417 status = "okay";
563 }; 418 };
564 419
565 &mdss_dsi0 { !! 420 &mdss_mdp {
566 status = "okay"; 421 status = "okay";
567 vdda-supply = <&vreg_l26a_1p2>; <<
568 <<
569 ports { <<
570 port@1 { <<
571 endpoint { <<
572 remote-endpoin <<
573 data-lanes = < <<
574 }; <<
575 }; <<
576 }; <<
577 }; <<
578 <<
579 &mdss_dsi0_phy { <<
580 status = "okay"; <<
581 vdds-supply = <&vreg_l1a_0p875>; <<
582 }; 422 };
583 423
584 &mss_pil { 424 &mss_pil {
585 status = "okay"; !! 425 firmware-name = "qcom/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/LENOVO/81JL/qcdsp2850.mbn";
586 firmware-name = "qcom/sdm850/LENOVO/81 <<
587 }; 426 };
588 427
589 &pm8998_gpios { !! 428 &qup_i2c10_default {
590 /* This pin is pulled down by a fixed !! 429 pinconf {
591 sw_edp_1p2_en: pm8998-gpio9-state { !! 430 pins = "gpio55", "gpio56";
592 pins = "gpio9"; !! 431 drive-strength = <2>;
593 function = "normal"; <<
594 bias-disable; 432 bias-disable;
595 qcom,drive-strength = <0>; <<
596 }; 433 };
597 }; 434 };
598 435
599 &qup_i2c10_default { !! 436 &qup_i2c12_default {
600 drive-strength = <2>; 437 drive-strength = <2>;
601 bias-disable; 438 bias-disable;
602 }; 439 };
603 440
604 &qup_i2c12_default { !! 441 &qup_uart6_default {
605 drive-strength = <2>; !! 442 pinmux {
606 bias-disable; !! 443 pins = "gpio45", "gpio46", "gpio47", "gpio48";
>> 444 function = "qup6";
>> 445 };
>> 446
>> 447 cts {
>> 448 pins = "gpio45";
>> 449 bias-pull-down;
>> 450 };
>> 451
>> 452 rts-tx {
>> 453 pins = "gpio46", "gpio47";
>> 454 drive-strength = <2>;
>> 455 bias-disable;
>> 456 };
>> 457
>> 458 rx {
>> 459 pins = "gpio48";
>> 460 bias-pull-up;
>> 461 };
607 }; 462 };
608 463
609 &qupv3_id_0 { 464 &qupv3_id_0 {
610 status = "okay"; 465 status = "okay";
611 }; 466 };
612 467
613 &qupv3_id_1 { 468 &qupv3_id_1 {
614 status = "okay"; 469 status = "okay";
615 }; 470 };
616 471
617 &q6asmdai { 472 &q6asmdai {
618 dai@0 { 473 dai@0 {
619 reg = <0>; 474 reg = <0>;
620 }; 475 };
621 476
622 dai@1 { 477 dai@1 {
623 reg = <1>; 478 reg = <1>;
624 }; 479 };
625 <<
626 dai@2 { <<
627 reg = <2>; <<
628 }; <<
629 }; 480 };
630 481
631 &sound { 482 &sound {
632 compatible = "lenovo,yoga-c630-sndcard !! 483 compatible = "qcom,db845c-sndcard";
633 model = "Lenovo-YOGA-C630-13Q50"; 484 model = "Lenovo-YOGA-C630-13Q50";
634 485
635 audio-routing = 486 audio-routing =
636 "RX_BIAS", "MCLK", 487 "RX_BIAS", "MCLK",
637 "AMIC2", "MIC BIAS2", 488 "AMIC2", "MIC BIAS2",
638 "SpkrLeft IN", "SPK1 OUT", 489 "SpkrLeft IN", "SPK1 OUT",
639 "SpkrRight IN", "SPK2 OUT", 490 "SpkrRight IN", "SPK2 OUT",
640 "MM_DL1", "MultiMedia1 Playba 491 "MM_DL1", "MultiMedia1 Playback",
641 "MM_DL3", "MultiMedia3 Playba <<
642 "MultiMedia2 Capture", "MM_UL2 492 "MultiMedia2 Capture", "MM_UL2";
643 493
644 mm1-dai-link { 494 mm1-dai-link {
645 link-name = "MultiMedia1"; 495 link-name = "MultiMedia1";
646 cpu { 496 cpu {
647 sound-dai = <&q6asmdai 497 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
648 }; 498 };
649 }; 499 };
650 500
651 mm2-dai-link { 501 mm2-dai-link {
652 link-name = "MultiMedia2"; 502 link-name = "MultiMedia2";
653 cpu { 503 cpu {
654 sound-dai = <&q6asmdai 504 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
655 }; 505 };
656 }; 506 };
657 507
658 mm3-dai-link { <<
659 link-name = "MultiMedia3"; <<
660 cpu { <<
661 sound-dai = <&q6asmdai <<
662 }; <<
663 }; <<
664 <<
665 slim-dai-link { 508 slim-dai-link {
666 link-name = "SLIM Playback"; 509 link-name = "SLIM Playback";
667 cpu { 510 cpu {
668 sound-dai = <&q6afedai 511 sound-dai = <&q6afedai SLIMBUS_0_RX>;
669 }; 512 };
670 513
671 platform { 514 platform {
672 sound-dai = <&q6routin 515 sound-dai = <&q6routing>;
673 }; 516 };
674 517
675 codec { 518 codec {
676 sound-dai = <&left_spk !! 519 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
677 }; 520 };
678 }; 521 };
679 522
680 slimcap-dai-link { 523 slimcap-dai-link {
681 link-name = "SLIM Capture"; 524 link-name = "SLIM Capture";
682 cpu { 525 cpu {
683 sound-dai = <&q6afedai 526 sound-dai = <&q6afedai SLIMBUS_0_TX>;
684 }; 527 };
685 528
686 platform { 529 platform {
687 sound-dai = <&q6routin 530 sound-dai = <&q6routing>;
688 }; 531 };
689 532
690 codec { 533 codec {
691 sound-dai = <&wcd9340 534 sound-dai = <&wcd9340 1>;
692 }; 535 };
693 }; 536 };
694 <<
695 slim-wcd-dai-link { <<
696 link-name = "SLIM WCD Playback <<
697 cpu { <<
698 sound-dai = <&q6afedai <<
699 }; <<
700 <<
701 platform { <<
702 sound-dai = <&q6routin <<
703 }; <<
704 <<
705 codec { <<
706 sound-dai = <&wcd9340 <<
707 }; <<
708 }; <<
709 }; 537 };
710 538
711 &tlmm { 539 &tlmm {
712 gpio-reserved-ranges = <0 4>, <81 4>; 540 gpio-reserved-ranges = <0 4>, <81 4>;
713 541
714 sn65dsi86_pin_active: sn65dsi86-enable !! 542 sn65dsi86_pin_active: sn65dsi86-enable {
715 pins = "gpio96"; 543 pins = "gpio96";
716 function = "gpio"; <<
717 drive-strength = <2>; 544 drive-strength = <2>;
718 bias-disable; 545 bias-disable;
719 }; 546 };
720 547
721 i2c3_hid_active: i2c2-hid-active-state !! 548 i2c3_hid_active: i2c2-hid-active {
722 pins = "gpio37"; 549 pins = "gpio37";
723 function = "gpio"; 550 function = "gpio";
724 551
>> 552 input-enable;
725 bias-pull-up; 553 bias-pull-up;
726 drive-strength = <2>; 554 drive-strength = <2>;
727 }; 555 };
728 556
729 i2c5_hid_active: i2c5-hid-active-state !! 557 i2c5_hid_active: i2c5-hid-active {
730 pins = "gpio125"; 558 pins = "gpio125";
731 function = "gpio"; 559 function = "gpio";
732 560
>> 561 input-enable;
733 bias-pull-up; 562 bias-pull-up;
734 drive-strength = <2>; 563 drive-strength = <2>;
735 }; 564 };
736 565
737 i2c11_hid_active: i2c11-hid-active-sta !! 566 i2c11_hid_active: i2c11-hid-active {
738 pins = "gpio92"; 567 pins = "gpio92";
739 function = "gpio"; 568 function = "gpio";
740 569
>> 570 input-enable;
741 bias-pull-up; 571 bias-pull-up;
742 drive-strength = <2>; 572 drive-strength = <2>;
743 }; 573 };
744 574
745 lid_pin_active: lid-pin-state { !! 575 wcd_intr_default: wcd_intr_default {
746 pins = "gpio124"; !! 576 pins = "gpio54";
747 function = "gpio"; 577 function = "gpio";
748 578
749 bias-disable; !! 579 input-enable;
>> 580 bias-pull-down;
>> 581 drive-strength = <2>;
750 }; 582 };
751 583
752 mode_pin_active: mode-pin-state { !! 584 lid_pin_active: lid-pin {
753 pins = "gpio95"; !! 585 pins = "gpio124";
754 function = "gpio"; 586 function = "gpio";
755 587
>> 588 input-enable;
756 bias-disable; 589 bias-disable;
757 }; 590 };
758 591
759 ec_int_state: ec-int-state { !! 592 mode_pin_active: mode-pin {
760 pins = "gpio20"; !! 593 pins = "gpio95";
761 function = "gpio"; 594 function = "gpio";
762 595
>> 596 input-enable;
763 bias-disable; 597 bias-disable;
764 }; 598 };
765 }; 599 };
766 600
767 &uart6 { 601 &uart6 {
768 pinctrl-names = "default"; <<
769 pinctrl-0 = <&qup_uart6_4pin>; <<
770 status = "okay"; 602 status = "okay";
771 603
772 bluetooth { 604 bluetooth {
773 compatible = "qcom,wcn3990-bt" 605 compatible = "qcom,wcn3990-bt";
774 606
775 vddio-supply = <&vreg_s4a_1p8> 607 vddio-supply = <&vreg_s4a_1p8>;
776 vddxo-supply = <&vreg_l7a_1p8> 608 vddxo-supply = <&vreg_l7a_1p8>;
777 vddrf-supply = <&vreg_l17a_1p3 609 vddrf-supply = <&vreg_l17a_1p3>;
778 vddch0-supply = <&vreg_l25a_3p 610 vddch0-supply = <&vreg_l25a_3p3>;
779 vddch1-supply = <&vreg_l23a_3p <<
780 max-speed = <3200000>; 611 max-speed = <3200000>;
781 }; 612 };
782 }; 613 };
783 614
784 &uart9 { <<
785 status = "okay"; <<
786 }; <<
787 <<
788 &ufs_mem_hc { 615 &ufs_mem_hc {
789 status = "okay"; 616 status = "okay";
790 617
791 reset-gpios = <&tlmm 150 GPIO_ACTIVE_L 618 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
792 619
793 vcc-supply = <&vreg_l20a_2p95>; 620 vcc-supply = <&vreg_l20a_2p95>;
794 vcc-max-microamp = <600000>; 621 vcc-max-microamp = <600000>;
795 }; 622 };
796 623
797 &ufs_mem_phy { 624 &ufs_mem_phy {
798 status = "okay"; 625 status = "okay";
799 626
800 vdda-phy-supply = <&vdda_ufs1_core>; 627 vdda-phy-supply = <&vdda_ufs1_core>;
801 vdda-pll-supply = <&vdda_ufs1_1p2>; 628 vdda-pll-supply = <&vdda_ufs1_1p2>;
802 }; 629 };
803 630
804 &usb_1 { 631 &usb_1 {
805 status = "okay"; 632 status = "okay";
806 }; 633 };
807 634
808 &usb_1_dwc3 { 635 &usb_1_dwc3 {
809 dr_mode = "host"; 636 dr_mode = "host";
810 }; 637 };
811 638
812 &usb_1_dwc3_hs { <<
813 remote-endpoint = <&ucsi0_hs_in>; <<
814 }; <<
815 <<
816 &usb_1_hsphy { 639 &usb_1_hsphy {
817 status = "okay"; 640 status = "okay";
818 641
819 vdd-supply = <&vdda_usb1_ss_core>; 642 vdd-supply = <&vdda_usb1_ss_core>;
820 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 643 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
821 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 644 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
822 645
823 qcom,imp-res-offset-value = <8>; 646 qcom,imp-res-offset-value = <8>;
824 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 647 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
825 qcom,preemphasis-level = <QUSB2_V2_PRE 648 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
826 qcom,preemphasis-width = <QUSB2_V2_PRE 649 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
827 }; 650 };
828 651
829 &usb_1_qmpphy { 652 &usb_1_qmpphy {
830 status = "okay"; 653 status = "okay";
831 654
832 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 655 vdda-phy-supply = <&vdda_usb1_ss_1p2>;
833 vdda-pll-supply = <&vdda_usb1_ss_core> 656 vdda-pll-supply = <&vdda_usb1_ss_core>;
834 }; 657 };
835 658
836 &usb_1_qmpphy_out { <<
837 remote-endpoint = <&ucsi0_ss_in>; <<
838 }; <<
839 <<
840 &usb_2 { 659 &usb_2 {
841 status = "okay"; 660 status = "okay";
842 }; 661 };
843 662
844 &usb_2_dwc3 { 663 &usb_2_dwc3 {
845 dr_mode = "host"; 664 dr_mode = "host";
846 }; 665 };
847 666
848 &usb_2_hsphy { 667 &usb_2_hsphy {
849 status = "okay"; 668 status = "okay";
850 669
851 vdd-supply = <&vdda_usb2_ss_core>; 670 vdd-supply = <&vdda_usb2_ss_core>;
852 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 671 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
853 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 672 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
854 673
855 qcom,imp-res-offset-value = <8>; 674 qcom,imp-res-offset-value = <8>;
856 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 675 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
857 }; 676 };
858 677
859 &usb_2_qmpphy { 678 &usb_2_qmpphy {
860 status = "okay"; 679 status = "okay";
861 680
862 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 681 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
863 vdda-pll-supply = <&vdda_usb2_ss_core> 682 vdda-pll-supply = <&vdda_usb2_ss_core>;
864 }; 683 };
865 684
866 &venus { !! 685 &wcd9340{
867 firmware-name = "qcom/sdm850/LENOVO/81 !! 686 pinctrl-0 = <&wcd_intr_default>;
868 status = "okay"; !! 687 pinctrl-names = "default";
869 }; !! 688 clock-names = "extclk";
870 !! 689 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
871 &wcd9340 { !! 690 reset-gpios = <&tlmm 64 0>;
872 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HI <<
873 vdd-buck-supply = <&vreg_s4a_1p8>; 691 vdd-buck-supply = <&vreg_s4a_1p8>;
874 vdd-buck-sido-supply = <&vreg_s4a_1p8> 692 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
875 vdd-tx-supply = <&vreg_s4a_1p8>; 693 vdd-tx-supply = <&vreg_s4a_1p8>;
876 vdd-rx-supply = <&vreg_s4a_1p8>; 694 vdd-rx-supply = <&vreg_s4a_1p8>;
877 vdd-io-supply = <&vreg_s4a_1p8>; 695 vdd-io-supply = <&vreg_s4a_1p8>;
878 qcom,mbhc-buttons-vthreshold-microvolt <<
879 qcom,mbhc-headset-vthreshold-microvolt <<
880 qcom,mbhc-headphone-vthreshold-microvo <<
881 696
882 swm: soundwire@c85 { !! 697 swm: swm@c85 {
883 left_spkr: speaker@0,3 { !! 698 left_spkr: wsa8810-left{
884 compatible = "sdw10217 699 compatible = "sdw10217211000";
885 reg = <0 3>; 700 reg = <0 3>;
886 powerdown-gpios = <&wc !! 701 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
887 #thermal-sensor-cells 702 #thermal-sensor-cells = <0>;
888 sound-name-prefix = "S 703 sound-name-prefix = "SpkrLeft";
889 #sound-dai-cells = <0> 704 #sound-dai-cells = <0>;
890 }; 705 };
891 706
892 right_spkr: speaker@0,4 { !! 707 right_spkr: wsa8810-right{
893 compatible = "sdw10217 708 compatible = "sdw10217211000";
894 powerdown-gpios = <&wc !! 709 powerdown-gpios = <&wcdgpio 3 GPIO_ACTIVE_HIGH>;
895 reg = <0 4>; 710 reg = <0 4>;
896 #thermal-sensor-cells 711 #thermal-sensor-cells = <0>;
897 sound-name-prefix = "S 712 sound-name-prefix = "SpkrRight";
898 #sound-dai-cells = <0> 713 #sound-dai-cells = <0>;
899 }; 714 };
900 }; 715 };
901 }; 716 };
902 717
903 &wifi { 718 &wifi {
904 status = "okay"; 719 status = "okay";
905 720
906 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8> 721 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
907 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 722 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
908 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 723 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
909 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 724 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
910 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; <<
911 725
912 qcom,snoc-host-cap-8bit-quirk; 726 qcom,snoc-host-cap-8bit-quirk;
913 qcom,ath10k-calibration-variant = "Len <<
914 }; <<
915 <<
916 &crypto { <<
917 /* FIXME: qce_start triggers an SError <<
918 status = "disabled"; <<
919 }; 727 };
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