1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Lenovo Yoga C630 3 * Lenovo Yoga C630
4 * 4 *
5 * Copyright (c) 2019, Linaro Ltd. 5 * Copyright (c) 2019, Linaro Ltd.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regu 12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h> 13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h> 14 #include <dt-bindings/sound/qcom,q6asm.h>
15 #include "sdm850.dtsi" 15 #include "sdm850.dtsi"
16 #include "sdm845-wcd9340.dtsi" <<
17 #include "pm8998.dtsi" 16 #include "pm8998.dtsi"
18 17
19 /* 18 /*
20 * Update following upstream (sdm845.dtsi) res 19 * Update following upstream (sdm845.dtsi) reserved
21 * memory mappings for firmware loading to suc 20 * memory mappings for firmware loading to succeed
22 * and enable the IPA device. 21 * and enable the IPA device.
23 */ 22 */
24 /delete-node/ &ipa_fw_mem; 23 /delete-node/ &ipa_fw_mem;
25 /delete-node/ &ipa_gsi_mem; 24 /delete-node/ &ipa_gsi_mem;
26 /delete-node/ &gpu_mem; 25 /delete-node/ &gpu_mem;
27 /delete-node/ &adsp_mem; 26 /delete-node/ &adsp_mem;
28 /delete-node/ &wlan_msa_mem; 27 /delete-node/ &wlan_msa_mem;
29 28
30 / { 29 / {
31 model = "Lenovo Yoga C630"; 30 model = "Lenovo Yoga C630";
32 compatible = "lenovo,yoga-c630", "qcom 31 compatible = "lenovo,yoga-c630", "qcom,sdm845";
33 chassis-type = "convertible"; 32 chassis-type = "convertible";
34 33
35 aliases { 34 aliases {
36 serial0 = &uart9; !! 35 hsuart0 = &uart6;
37 serial1 = &uart6; <<
38 }; 36 };
39 37
40 gpio-keys { 38 gpio-keys {
41 compatible = "gpio-keys"; 39 compatible = "gpio-keys";
42 40
43 pinctrl-names = "default"; 41 pinctrl-names = "default";
44 pinctrl-0 = <&lid_pin_active>, 42 pinctrl-0 = <&lid_pin_active>, <&mode_pin_active>;
45 43
46 switch-lid { !! 44 lid {
47 gpios = <&tlmm 124 GPI 45 gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;
48 linux,input-type = <EV 46 linux,input-type = <EV_SW>;
49 linux,code = <SW_LID>; 47 linux,code = <SW_LID>;
50 wakeup-source; 48 wakeup-source;
51 wakeup-event-action = 49 wakeup-event-action = <EV_ACT_DEASSERTED>;
52 }; 50 };
53 51
54 switch-mode { !! 52 mode {
55 gpios = <&tlmm 95 GPIO 53 gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
56 linux,input-type = <EV 54 linux,input-type = <EV_SW>;
57 linux,code = <SW_TABLE 55 linux,code = <SW_TABLET_MODE>;
58 }; 56 };
59 }; 57 };
60 58
>> 59 panel {
>> 60 compatible = "boe,nv133fhm-n61";
>> 61 no-hpd;
>> 62
>> 63 ports {
>> 64 port {
>> 65 panel_in_edp: endpoint {
>> 66 remote-endpoint = <&sn65dsi86_out>;
>> 67 };
>> 68 };
>> 69 };
>> 70 };
>> 71
61 /* Reserved memory changes for IPA */ 72 /* Reserved memory changes for IPA */
62 reserved-memory { 73 reserved-memory {
63 wlan_msa_mem: memory@8c400000 74 wlan_msa_mem: memory@8c400000 {
64 reg = <0 0x8c400000 0 75 reg = <0 0x8c400000 0 0x100000>;
65 no-map; 76 no-map;
66 }; 77 };
67 78
68 gpu_mem: memory@8c515000 { 79 gpu_mem: memory@8c515000 {
69 reg = <0 0x8c515000 0 80 reg = <0 0x8c515000 0 0x2000>;
70 no-map; 81 no-map;
71 }; 82 };
72 83
73 ipa_fw_mem: memory@8c517000 { 84 ipa_fw_mem: memory@8c517000 {
74 reg = <0 0x8c517000 0 85 reg = <0 0x8c517000 0 0x5a000>;
75 no-map; 86 no-map;
76 }; 87 };
77 88
78 adsp_mem: memory@8c600000 { 89 adsp_mem: memory@8c600000 {
79 reg = <0 0x8c600000 0 90 reg = <0 0x8c600000 0 0x1a00000>;
80 no-map; 91 no-map;
81 }; 92 };
82 }; 93 };
83 94
84 sw_edp_1p2: edp-1p2-regulator { <<
85 compatible = "regulator-fixed" <<
86 regulator-name = "sw_edp_1p2"; <<
87 <<
88 regulator-min-microvolt = <120 <<
89 regulator-max-microvolt = <120 <<
90 <<
91 pinctrl-0 = <&sw_edp_1p2_en>; <<
92 pinctrl-names = "default"; <<
93 <<
94 gpio = <&pm8998_gpios 9 GPIO_A <<
95 enable-active-high; <<
96 <<
97 vin-supply = <&vreg_l2a_1p2>; <<
98 }; <<
99 <<
100 sn65dsi86_refclk: sn65dsi86-refclk { 95 sn65dsi86_refclk: sn65dsi86-refclk {
101 compatible = "fixed-clock"; 96 compatible = "fixed-clock";
102 #clock-cells = <0>; 97 #clock-cells = <0>;
103 98
104 clock-frequency = <19200000>; 99 clock-frequency = <19200000>;
105 }; 100 };
106 <<
107 vph_pwr: regulator-vph-pwr { <<
108 compatible = "regulator-fixed" <<
109 regulator-name = "vph_pwr"; <<
110 regulator-min-microvolt = <370 <<
111 regulator-max-microvolt = <370 <<
112 }; <<
113 <<
114 vlcm_3v3: regulator-vlcm-3v3 { <<
115 compatible = "regulator-fixed" <<
116 regulator-name = "vlcm_3v3"; <<
117 <<
118 vin-supply = <&vph_pwr>; <<
119 regulator-min-microvolt = <330 <<
120 regulator-max-microvolt = <330 <<
121 <<
122 gpio = <&tlmm 88 GPIO_ACTIVE_H <<
123 enable-active-high; <<
124 }; <<
125 <<
126 backlight: backlight { <<
127 compatible = "pwm-backlight"; <<
128 pwms = <&sn65dsi86 1000000>; <<
129 enable-gpios = <&tlmm 11 GPIO_ <<
130 }; <<
131 }; 101 };
132 102
133 &adsp_pas { 103 &adsp_pas {
134 firmware-name = "qcom/sdm850/LENOVO/81 !! 104 firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
135 status = "okay"; 105 status = "okay";
136 }; 106 };
137 107
138 &apps_rsc { 108 &apps_rsc {
139 regulators-0 { !! 109 pm8998-rpmh-regulators {
140 compatible = "qcom,pm8998-rpmh 110 compatible = "qcom,pm8998-rpmh-regulators";
141 qcom,pmic-id = "a"; 111 qcom,pmic-id = "a";
142 112
143 vdd-l2-l8-l17-supply = <&vreg_ 113 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
144 vdd-l7-l12-l14-l15-supply = <& 114 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
145 115
146 vreg_s2a_1p125: smps2 { 116 vreg_s2a_1p125: smps2 {
147 }; 117 };
148 118
149 vreg_s3a_1p35: smps3 { 119 vreg_s3a_1p35: smps3 {
150 regulator-min-microvol 120 regulator-min-microvolt = <1352000>;
151 regulator-max-microvol 121 regulator-max-microvolt = <1352000>;
152 regulator-initial-mode 122 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153 }; 123 };
154 124
155 vreg_s4a_1p8: smps4 { 125 vreg_s4a_1p8: smps4 {
156 regulator-min-microvol 126 regulator-min-microvolt = <1800000>;
157 regulator-max-microvol 127 regulator-max-microvolt = <1800000>;
158 regulator-initial-mode 128 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
159 }; 129 };
160 130
161 vreg_s5a_2p04: smps5 { 131 vreg_s5a_2p04: smps5 {
162 regulator-min-microvol 132 regulator-min-microvolt = <2040000>;
163 regulator-max-microvol 133 regulator-max-microvolt = <2040000>;
164 regulator-initial-mode 134 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
165 }; 135 };
166 136
167 vreg_s7a_1p025: smps7 { 137 vreg_s7a_1p025: smps7 {
168 }; 138 };
169 139
170 vdd_qusb_hs0: 140 vdd_qusb_hs0:
171 vdda_hp_pcie_core: 141 vdda_hp_pcie_core:
172 vdda_mipi_csi0_0p9: 142 vdda_mipi_csi0_0p9:
173 vdda_mipi_csi1_0p9: 143 vdda_mipi_csi1_0p9:
174 vdda_mipi_csi2_0p9: 144 vdda_mipi_csi2_0p9:
175 vdda_mipi_dsi0_pll: 145 vdda_mipi_dsi0_pll:
176 vdda_mipi_dsi1_pll: 146 vdda_mipi_dsi1_pll:
177 vdda_qlink_lv: 147 vdda_qlink_lv:
178 vdda_qlink_lv_ck: 148 vdda_qlink_lv_ck:
179 vdda_qrefs_0p875: 149 vdda_qrefs_0p875:
180 vdda_pcie_core: 150 vdda_pcie_core:
181 vdda_pll_cc_ebi01: 151 vdda_pll_cc_ebi01:
182 vdda_pll_cc_ebi23: 152 vdda_pll_cc_ebi23:
183 vdda_sp_sensor: 153 vdda_sp_sensor:
184 vdda_ufs1_core: 154 vdda_ufs1_core:
185 vdda_ufs2_core: 155 vdda_ufs2_core:
186 vdda_usb1_ss_core: 156 vdda_usb1_ss_core:
187 vdda_usb2_ss_core: 157 vdda_usb2_ss_core:
188 vreg_l1a_0p875: ldo1 { 158 vreg_l1a_0p875: ldo1 {
189 regulator-min-microvol 159 regulator-min-microvolt = <880000>;
190 regulator-max-microvol 160 regulator-max-microvolt = <880000>;
191 regulator-initial-mode 161 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
192 }; 162 };
193 163
194 vddpx_10: 164 vddpx_10:
195 vreg_l2a_1p2: ldo2 { 165 vreg_l2a_1p2: ldo2 {
196 regulator-min-microvol 166 regulator-min-microvolt = <1200000>;
197 regulator-max-microvol 167 regulator-max-microvolt = <1200000>;
198 regulator-initial-mode 168 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199 regulator-always-on; 169 regulator-always-on;
200 }; 170 };
201 171
202 vreg_l3a_1p0: ldo3 { 172 vreg_l3a_1p0: ldo3 {
203 }; 173 };
204 174
205 vdd_wcss_cx: 175 vdd_wcss_cx:
206 vdd_wcss_mx: 176 vdd_wcss_mx:
207 vdda_wcss_pll: 177 vdda_wcss_pll:
208 vreg_l5a_0p8: ldo5 { 178 vreg_l5a_0p8: ldo5 {
209 regulator-min-microvol 179 regulator-min-microvolt = <800000>;
210 regulator-max-microvol 180 regulator-max-microvolt = <800000>;
211 regulator-initial-mode 181 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
212 }; 182 };
213 183
214 vddpx_13: 184 vddpx_13:
215 vreg_l6a_1p8: ldo6 { 185 vreg_l6a_1p8: ldo6 {
216 regulator-min-microvol 186 regulator-min-microvolt = <1800000>;
217 regulator-max-microvol 187 regulator-max-microvolt = <1800000>;
218 regulator-initial-mode 188 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219 }; 189 };
220 190
221 vreg_l7a_1p8: ldo7 { 191 vreg_l7a_1p8: ldo7 {
222 regulator-min-microvol 192 regulator-min-microvolt = <1800000>;
223 regulator-max-microvol 193 regulator-max-microvolt = <1800000>;
224 regulator-initial-mode 194 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 }; 195 };
226 196
227 vreg_l8a_1p2: ldo8 { 197 vreg_l8a_1p2: ldo8 {
228 }; 198 };
229 199
230 vreg_l9a_1p8: ldo9 { 200 vreg_l9a_1p8: ldo9 {
231 }; 201 };
232 202
233 vreg_l10a_1p8: ldo10 { 203 vreg_l10a_1p8: ldo10 {
234 }; 204 };
235 205
236 vreg_l11a_1p0: ldo11 { 206 vreg_l11a_1p0: ldo11 {
237 }; 207 };
238 208
239 vdd_qfprom: 209 vdd_qfprom:
240 vdd_qfprom_sp: 210 vdd_qfprom_sp:
241 vdda_apc1_cs_1p8: 211 vdda_apc1_cs_1p8:
242 vdda_gfx_cs_1p8: 212 vdda_gfx_cs_1p8:
243 vdda_qrefs_1p8: 213 vdda_qrefs_1p8:
244 vdda_qusb_hs0_1p8: 214 vdda_qusb_hs0_1p8:
245 vddpx_11: 215 vddpx_11:
246 vreg_l12a_1p8: ldo12 { 216 vreg_l12a_1p8: ldo12 {
247 regulator-min-microvol 217 regulator-min-microvolt = <1800000>;
248 regulator-max-microvol 218 regulator-max-microvolt = <1800000>;
249 regulator-initial-mode 219 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
250 }; 220 };
251 221
252 vddpx_2: 222 vddpx_2:
253 vreg_l13a_2p95: ldo13 { 223 vreg_l13a_2p95: ldo13 {
254 }; 224 };
255 225
256 vreg_l14a_1p88: ldo14 { 226 vreg_l14a_1p88: ldo14 {
257 regulator-min-microvol 227 regulator-min-microvolt = <1880000>;
258 regulator-max-microvol 228 regulator-max-microvolt = <1880000>;
259 regulator-initial-mode 229 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
260 regulator-always-on; 230 regulator-always-on;
261 }; 231 };
262 232
263 vreg_l15a_1p8: ldo15 { 233 vreg_l15a_1p8: ldo15 {
264 }; 234 };
265 235
266 vreg_l16a_2p7: ldo16 { 236 vreg_l16a_2p7: ldo16 {
267 }; 237 };
268 238
269 vreg_l17a_1p3: ldo17 { 239 vreg_l17a_1p3: ldo17 {
270 regulator-min-microvol 240 regulator-min-microvolt = <1304000>;
271 regulator-max-microvol 241 regulator-max-microvolt = <1304000>;
272 regulator-initial-mode 242 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273 }; 243 };
274 244
275 vreg_l18a_2p7: ldo18 { 245 vreg_l18a_2p7: ldo18 {
276 }; 246 };
277 247
278 vreg_l19a_3p0: ldo19 { 248 vreg_l19a_3p0: ldo19 {
279 regulator-min-microvol 249 regulator-min-microvolt = <3100000>;
280 regulator-max-microvol 250 regulator-max-microvolt = <3108000>;
281 regulator-initial-mode 251 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
282 }; 252 };
283 253
284 vreg_l20a_2p95: ldo20 { 254 vreg_l20a_2p95: ldo20 {
285 regulator-min-microvol 255 regulator-min-microvolt = <2960000>;
286 regulator-max-microvol 256 regulator-max-microvolt = <2960000>;
287 regulator-initial-mode 257 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
288 }; 258 };
289 259
290 vreg_l21a_2p95: ldo21 { 260 vreg_l21a_2p95: ldo21 {
291 }; 261 };
292 262
293 vreg_l22a_2p85: ldo22 { 263 vreg_l22a_2p85: ldo22 {
294 }; 264 };
295 265
296 vreg_l23a_3p3: ldo23 { 266 vreg_l23a_3p3: ldo23 {
297 regulator-min-microvol 267 regulator-min-microvolt = <3300000>;
298 regulator-max-microvol 268 regulator-max-microvolt = <3312000>;
299 regulator-initial-mode 269 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
300 }; 270 };
301 271
302 vdda_qusb_hs0_3p1: 272 vdda_qusb_hs0_3p1:
303 vreg_l24a_3p075: ldo24 { 273 vreg_l24a_3p075: ldo24 {
304 regulator-min-microvol 274 regulator-min-microvolt = <3075000>;
305 regulator-max-microvol 275 regulator-max-microvolt = <3083000>;
306 regulator-initial-mode 276 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
307 }; 277 };
308 278
309 vreg_l25a_3p3: ldo25 { 279 vreg_l25a_3p3: ldo25 {
310 regulator-min-microvol 280 regulator-min-microvolt = <3104000>;
311 regulator-max-microvol 281 regulator-max-microvolt = <3112000>;
312 regulator-initial-mode 282 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
313 }; 283 };
314 284
315 vdda_hp_pcie_1p2: 285 vdda_hp_pcie_1p2:
316 vdda_hv_ebi0: 286 vdda_hv_ebi0:
317 vdda_hv_ebi1: 287 vdda_hv_ebi1:
318 vdda_hv_ebi2: 288 vdda_hv_ebi2:
319 vdda_hv_ebi3: 289 vdda_hv_ebi3:
320 vdda_mipi_csi_1p25: 290 vdda_mipi_csi_1p25:
321 vdda_mipi_dsi0_1p2: 291 vdda_mipi_dsi0_1p2:
322 vdda_mipi_dsi1_1p2: 292 vdda_mipi_dsi1_1p2:
323 vdda_pcie_1p2: 293 vdda_pcie_1p2:
324 vdda_ufs1_1p2: 294 vdda_ufs1_1p2:
325 vdda_ufs2_1p2: 295 vdda_ufs2_1p2:
326 vdda_usb1_ss_1p2: 296 vdda_usb1_ss_1p2:
327 vdda_usb2_ss_1p2: 297 vdda_usb2_ss_1p2:
328 vreg_l26a_1p2: ldo26 { 298 vreg_l26a_1p2: ldo26 {
329 regulator-min-microvol 299 regulator-min-microvolt = <1200000>;
330 regulator-max-microvol 300 regulator-max-microvolt = <1208000>;
331 regulator-initial-mode 301 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332 }; 302 };
333 303
334 vreg_l28a_3p0: ldo28 { 304 vreg_l28a_3p0: ldo28 {
335 }; 305 };
336 306
337 vreg_lvs1a_1p8: lvs1 { 307 vreg_lvs1a_1p8: lvs1 {
338 }; 308 };
339 309
340 vreg_lvs2a_1p8: lvs2 { 310 vreg_lvs2a_1p8: lvs2 {
341 }; 311 };
342 }; 312 };
343 }; 313 };
344 314
345 &cdsp_pas { 315 &cdsp_pas {
346 firmware-name = "qcom/sdm850/LENOVO/81 !! 316 firmware-name = "qcom/LENOVO/81JL/qccdsp850.mbn";
347 status = "okay"; 317 status = "okay";
348 }; 318 };
349 319
>> 320 &dsi0 {
>> 321 status = "okay";
>> 322 vdda-supply = <&vreg_l26a_1p2>;
>> 323
>> 324 ports {
>> 325 port@1 {
>> 326 endpoint {
>> 327 remote-endpoint = <&sn65dsi86_in_a>;
>> 328 data-lanes = <0 1 2 3>;
>> 329 };
>> 330 };
>> 331 };
>> 332 };
>> 333
>> 334 &dsi0_phy {
>> 335 status = "okay";
>> 336 vdds-supply = <&vreg_l1a_0p875>;
>> 337 };
>> 338
350 &gcc { 339 &gcc {
351 protected-clocks = <GCC_QSPI_CORE_CLK> 340 protected-clocks = <GCC_QSPI_CORE_CLK>,
352 <GCC_QSPI_CORE_CLK_ 341 <GCC_QSPI_CORE_CLK_SRC>,
353 <GCC_QSPI_CNOC_PERI 342 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
354 <GCC_LPASS_Q6_AXI_C 343 <GCC_LPASS_Q6_AXI_CLK>,
355 <GCC_LPASS_SWAY_CLK 344 <GCC_LPASS_SWAY_CLK>;
356 }; 345 };
357 346
358 &gmu { 347 &gmu {
359 status = "okay"; 348 status = "okay";
360 }; 349 };
361 350
362 &gpu { 351 &gpu {
363 status = "okay"; 352 status = "okay";
364 zap-shader { 353 zap-shader {
365 memory-region = <&gpu_mem>; 354 memory-region = <&gpu_mem>;
366 firmware-name = "qcom/sdm850/L !! 355 firmware-name = "qcom/LENOVO/81JL/qcdxkmsuc850.mbn";
367 }; 356 };
368 }; 357 };
369 358
370 &i2c1 { 359 &i2c1 {
371 status = "okay"; 360 status = "okay";
372 clock-frequency = <400000>; 361 clock-frequency = <400000>;
373 <<
374 embedded-controller@70 { <<
375 compatible = "lenovo,yoga-c630 <<
376 reg = <0x70>; <<
377 <<
378 interrupts-extended = <&tlmm 2 <<
379 <<
380 pinctrl-names = "default"; <<
381 pinctrl-0 = <&ec_int_state>; <<
382 <<
383 #address-cells = <1>; <<
384 #size-cells = <0>; <<
385 <<
386 connector@0 { <<
387 compatible = "usb-c-co <<
388 reg = <0>; <<
389 power-role = "dual"; <<
390 data-role = "host"; <<
391 <<
392 ports { <<
393 #address-cells <<
394 #size-cells = <<
395 <<
396 port@0 { <<
397 reg = <<
398 <<
399 ucsi0_ <<
400 <<
401 }; <<
402 }; <<
403 <<
404 port@1 { <<
405 reg = <<
406 <<
407 ucsi0_ <<
408 <<
409 }; <<
410 }; <<
411 <<
412 port@2 { <<
413 reg = <<
414 <<
415 ucsi0_ <<
416 }; <<
417 }; <<
418 }; <<
419 }; <<
420 <<
421 connector@1 { <<
422 compatible = "usb-c-co <<
423 reg = <1>; <<
424 power-role = "dual"; <<
425 data-role = "host"; <<
426 <<
427 /* <<
428 * connected to the on <<
429 * handled by the cont <<
430 */ <<
431 }; <<
432 }; <<
433 }; 362 };
434 363
435 &i2c3 { 364 &i2c3 {
436 status = "okay"; 365 status = "okay";
437 clock-frequency = <400000>; 366 clock-frequency = <400000>;
438 /* Overwrite pinctrl-0 from sdm845.dts 367 /* Overwrite pinctrl-0 from sdm845.dtsi */
439 pinctrl-0 = <&qup_i2c3_default &i2c3_h 368 pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
440 369
441 tsel: hid@15 { 370 tsel: hid@15 {
442 compatible = "hid-over-i2c"; 371 compatible = "hid-over-i2c";
443 reg = <0x15>; 372 reg = <0x15>;
444 hid-descr-addr = <0x1>; 373 hid-descr-addr = <0x1>;
445 374
446 interrupts-extended = <&tlmm 3 375 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
447 }; 376 };
448 377
449 tsc2: hid@2c { 378 tsc2: hid@2c {
450 compatible = "hid-over-i2c"; 379 compatible = "hid-over-i2c";
451 reg = <0x2c>; 380 reg = <0x2c>;
452 hid-descr-addr = <0x20>; 381 hid-descr-addr = <0x20>;
453 382
454 interrupts-extended = <&tlmm 3 383 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
455 <<
456 wakeup-source; <<
457 }; 384 };
458 }; 385 };
459 386
460 &i2c5 { 387 &i2c5 {
461 status = "okay"; 388 status = "okay";
462 clock-frequency = <400000>; 389 clock-frequency = <400000>;
463 390
464 tsc1: hid@10 { 391 tsc1: hid@10 {
465 compatible = "hid-over-i2c"; 392 compatible = "hid-over-i2c";
466 reg = <0x10>; 393 reg = <0x10>;
467 hid-descr-addr = <0x1>; 394 hid-descr-addr = <0x1>;
468 395
469 interrupts-extended = <&tlmm 1 396 interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>;
470 397
471 pinctrl-names = "default"; 398 pinctrl-names = "default";
472 pinctrl-0 = <&i2c5_hid_active> 399 pinctrl-0 = <&i2c5_hid_active>;
473 <<
474 wakeup-source; <<
475 }; 400 };
476 }; 401 };
477 402
478 &i2c10 { 403 &i2c10 {
479 status = "okay"; 404 status = "okay";
480 clock-frequency = <400000>; 405 clock-frequency = <400000>;
481 406
482 sn65dsi86: bridge@2c { 407 sn65dsi86: bridge@2c {
483 compatible = "ti,sn65dsi86"; 408 compatible = "ti,sn65dsi86";
484 reg = <0x2c>; 409 reg = <0x2c>;
485 pinctrl-names = "default"; 410 pinctrl-names = "default";
486 pinctrl-0 = <&sn65dsi86_pin_ac 411 pinctrl-0 = <&sn65dsi86_pin_active>;
487 412
488 enable-gpios = <&tlmm 96 GPIO_ 413 enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
489 414
490 vcca-supply = <&sw_edp_1p2>; <<
491 vcc-supply = <&sw_edp_1p2>; <<
492 vpll-supply = <&vreg_l14a_1p88 415 vpll-supply = <&vreg_l14a_1p88>;
493 vccio-supply = <&vreg_l14a_1p8 416 vccio-supply = <&vreg_l14a_1p88>;
494 417
495 clocks = <&sn65dsi86_refclk>; 418 clocks = <&sn65dsi86_refclk>;
496 clock-names = "refclk"; 419 clock-names = "refclk";
497 420
498 no-hpd; 421 no-hpd;
499 #pwm-cells = <1>; <<
500 422
501 ports { 423 ports {
502 #address-cells = <1>; 424 #address-cells = <1>;
503 #size-cells = <0>; 425 #size-cells = <0>;
504 426
505 port@0 { 427 port@0 {
506 reg = <0>; 428 reg = <0>;
507 sn65dsi86_in_a 429 sn65dsi86_in_a: endpoint {
508 remote !! 430 remote-endpoint = <&dsi0_out>;
509 }; 431 };
510 }; 432 };
511 433
512 port@1 { 434 port@1 {
513 reg = <1>; 435 reg = <1>;
514 sn65dsi86_out: 436 sn65dsi86_out: endpoint {
515 remote 437 remote-endpoint = <&panel_in_edp>;
516 }; 438 };
517 }; 439 };
518 }; 440 };
519 <<
520 aux-bus { <<
521 panel: panel { <<
522 compatible = " <<
523 backlight = <& <<
524 power-supply = <<
525 <<
526 port { <<
527 panel_ <<
528 <<
529 }; <<
530 }; <<
531 }; <<
532 }; <<
533 }; 441 };
534 }; 442 };
535 443
536 &i2c11 { 444 &i2c11 {
537 status = "okay"; 445 status = "okay";
538 clock-frequency = <400000>; 446 clock-frequency = <400000>;
539 447
540 ecsh: hid@5c { 448 ecsh: hid@5c {
541 compatible = "hid-over-i2c"; 449 compatible = "hid-over-i2c";
542 reg = <0x5c>; 450 reg = <0x5c>;
543 hid-descr-addr = <0x1>; 451 hid-descr-addr = <0x1>;
544 452
545 interrupts-extended = <&tlmm 9 453 interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
546 454
547 pinctrl-names = "default"; 455 pinctrl-names = "default";
548 pinctrl-0 = <&i2c11_hid_active 456 pinctrl-0 = <&i2c11_hid_active>;
549 <<
550 wakeup-source; <<
551 }; 457 };
552 }; 458 };
553 459
554 &ipa { 460 &ipa {
555 qcom,gsi-loader = "self"; <<
556 memory-region = <&ipa_fw_mem>; <<
557 firmware-name = "qcom/sdm850/LENOVO/81 <<
558 status = "okay"; 461 status = "okay";
>> 462 memory-region = <&ipa_fw_mem>;
559 }; 463 };
560 464
561 &mdss { 465 &mdss {
562 status = "okay"; 466 status = "okay";
563 }; 467 };
564 468
565 &mdss_dsi0 { <<
566 status = "okay"; <<
567 vdda-supply = <&vreg_l26a_1p2>; <<
568 <<
569 ports { <<
570 port@1 { <<
571 endpoint { <<
572 remote-endpoin <<
573 data-lanes = < <<
574 }; <<
575 }; <<
576 }; <<
577 }; <<
578 <<
579 &mdss_dsi0_phy { <<
580 status = "okay"; <<
581 vdds-supply = <&vreg_l1a_0p875>; <<
582 }; <<
583 <<
584 &mss_pil { 469 &mss_pil {
585 status = "okay"; 470 status = "okay";
586 firmware-name = "qcom/sdm850/LENOVO/81 !! 471 firmware-name = "qcom/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/LENOVO/81JL/qcdsp2850.mbn";
587 }; 472 };
588 473
589 &pm8998_gpios { !! 474 &qup_i2c10_default {
590 /* This pin is pulled down by a fixed !! 475 pinconf {
591 sw_edp_1p2_en: pm8998-gpio9-state { !! 476 pins = "gpio55", "gpio56";
592 pins = "gpio9"; !! 477 drive-strength = <2>;
593 function = "normal"; <<
594 bias-disable; 478 bias-disable;
595 qcom,drive-strength = <0>; <<
596 }; 479 };
597 }; 480 };
598 481
599 &qup_i2c10_default { !! 482 &qup_i2c12_default {
600 drive-strength = <2>; 483 drive-strength = <2>;
601 bias-disable; 484 bias-disable;
602 }; 485 };
603 486
604 &qup_i2c12_default { !! 487 &qup_uart6_default {
605 drive-strength = <2>; !! 488 pinmux {
606 bias-disable; !! 489 pins = "gpio45", "gpio46", "gpio47", "gpio48";
>> 490 function = "qup6";
>> 491 };
>> 492
>> 493 cts {
>> 494 pins = "gpio45";
>> 495 bias-pull-down;
>> 496 };
>> 497
>> 498 rts-tx {
>> 499 pins = "gpio46", "gpio47";
>> 500 drive-strength = <2>;
>> 501 bias-disable;
>> 502 };
>> 503
>> 504 rx {
>> 505 pins = "gpio48";
>> 506 bias-pull-up;
>> 507 };
607 }; 508 };
608 509
609 &qupv3_id_0 { 510 &qupv3_id_0 {
610 status = "okay"; 511 status = "okay";
611 }; 512 };
612 513
613 &qupv3_id_1 { 514 &qupv3_id_1 {
614 status = "okay"; 515 status = "okay";
615 }; 516 };
616 517
617 &q6asmdai { 518 &q6asmdai {
618 dai@0 { 519 dai@0 {
619 reg = <0>; 520 reg = <0>;
620 }; 521 };
621 522
622 dai@1 { 523 dai@1 {
623 reg = <1>; 524 reg = <1>;
624 }; 525 };
625 526
626 dai@2 { 527 dai@2 {
627 reg = <2>; 528 reg = <2>;
628 }; 529 };
629 }; 530 };
630 531
631 &sound { 532 &sound {
632 compatible = "lenovo,yoga-c630-sndcard !! 533 compatible = "qcom,db845c-sndcard";
633 model = "Lenovo-YOGA-C630-13Q50"; 534 model = "Lenovo-YOGA-C630-13Q50";
634 535
635 audio-routing = 536 audio-routing =
636 "RX_BIAS", "MCLK", 537 "RX_BIAS", "MCLK",
637 "AMIC2", "MIC BIAS2", 538 "AMIC2", "MIC BIAS2",
638 "SpkrLeft IN", "SPK1 OUT", 539 "SpkrLeft IN", "SPK1 OUT",
639 "SpkrRight IN", "SPK2 OUT", 540 "SpkrRight IN", "SPK2 OUT",
640 "MM_DL1", "MultiMedia1 Playba 541 "MM_DL1", "MultiMedia1 Playback",
641 "MM_DL3", "MultiMedia3 Playba 542 "MM_DL3", "MultiMedia3 Playback",
642 "MultiMedia2 Capture", "MM_UL2 543 "MultiMedia2 Capture", "MM_UL2";
643 544
644 mm1-dai-link { 545 mm1-dai-link {
645 link-name = "MultiMedia1"; 546 link-name = "MultiMedia1";
646 cpu { 547 cpu {
647 sound-dai = <&q6asmdai 548 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
648 }; 549 };
649 }; 550 };
650 551
651 mm2-dai-link { 552 mm2-dai-link {
652 link-name = "MultiMedia2"; 553 link-name = "MultiMedia2";
653 cpu { 554 cpu {
654 sound-dai = <&q6asmdai 555 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
655 }; 556 };
656 }; 557 };
657 558
658 mm3-dai-link { 559 mm3-dai-link {
659 link-name = "MultiMedia3"; 560 link-name = "MultiMedia3";
660 cpu { 561 cpu {
661 sound-dai = <&q6asmdai 562 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
662 }; 563 };
663 }; 564 };
664 565
665 slim-dai-link { 566 slim-dai-link {
666 link-name = "SLIM Playback"; 567 link-name = "SLIM Playback";
667 cpu { 568 cpu {
668 sound-dai = <&q6afedai 569 sound-dai = <&q6afedai SLIMBUS_0_RX>;
669 }; 570 };
670 571
671 platform { 572 platform {
672 sound-dai = <&q6routin 573 sound-dai = <&q6routing>;
673 }; 574 };
674 575
675 codec { 576 codec {
676 sound-dai = <&left_spk !! 577 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
677 }; 578 };
678 }; 579 };
679 580
680 slimcap-dai-link { 581 slimcap-dai-link {
681 link-name = "SLIM Capture"; 582 link-name = "SLIM Capture";
682 cpu { 583 cpu {
683 sound-dai = <&q6afedai 584 sound-dai = <&q6afedai SLIMBUS_0_TX>;
684 }; 585 };
685 586
686 platform { 587 platform {
687 sound-dai = <&q6routin 588 sound-dai = <&q6routing>;
688 }; 589 };
689 590
690 codec { 591 codec {
691 sound-dai = <&wcd9340 592 sound-dai = <&wcd9340 1>;
692 }; 593 };
693 }; 594 };
694 595
695 slim-wcd-dai-link { 596 slim-wcd-dai-link {
696 link-name = "SLIM WCD Playback 597 link-name = "SLIM WCD Playback";
697 cpu { 598 cpu {
698 sound-dai = <&q6afedai 599 sound-dai = <&q6afedai SLIMBUS_1_RX>;
699 }; 600 };
700 601
701 platform { 602 platform {
702 sound-dai = <&q6routin 603 sound-dai = <&q6routing>;
703 }; 604 };
704 605
705 codec { 606 codec {
706 sound-dai = <&wcd9340 !! 607 sound-dai = <&wcd9340 2>;
707 }; 608 };
708 }; 609 };
709 }; 610 };
710 611
711 &tlmm { 612 &tlmm {
712 gpio-reserved-ranges = <0 4>, <81 4>; 613 gpio-reserved-ranges = <0 4>, <81 4>;
713 614
714 sn65dsi86_pin_active: sn65dsi86-enable !! 615 sn65dsi86_pin_active: sn65dsi86-enable {
715 pins = "gpio96"; 616 pins = "gpio96";
716 function = "gpio"; <<
717 drive-strength = <2>; 617 drive-strength = <2>;
718 bias-disable; 618 bias-disable;
719 }; 619 };
720 620
721 i2c3_hid_active: i2c2-hid-active-state !! 621 i2c3_hid_active: i2c2-hid-active {
722 pins = "gpio37"; 622 pins = "gpio37";
723 function = "gpio"; 623 function = "gpio";
724 624
>> 625 input-enable;
725 bias-pull-up; 626 bias-pull-up;
726 drive-strength = <2>; 627 drive-strength = <2>;
727 }; 628 };
728 629
729 i2c5_hid_active: i2c5-hid-active-state !! 630 i2c5_hid_active: i2c5-hid-active {
730 pins = "gpio125"; 631 pins = "gpio125";
731 function = "gpio"; 632 function = "gpio";
732 633
>> 634 input-enable;
733 bias-pull-up; 635 bias-pull-up;
734 drive-strength = <2>; 636 drive-strength = <2>;
735 }; 637 };
736 638
737 i2c11_hid_active: i2c11-hid-active-sta !! 639 i2c11_hid_active: i2c11-hid-active {
738 pins = "gpio92"; 640 pins = "gpio92";
739 function = "gpio"; 641 function = "gpio";
740 642
>> 643 input-enable;
741 bias-pull-up; 644 bias-pull-up;
742 drive-strength = <2>; 645 drive-strength = <2>;
743 }; 646 };
744 647
745 lid_pin_active: lid-pin-state { !! 648 wcd_intr_default: wcd_intr_default {
746 pins = "gpio124"; !! 649 pins = "gpio54";
747 function = "gpio"; 650 function = "gpio";
748 651
749 bias-disable; !! 652 input-enable;
>> 653 bias-pull-down;
>> 654 drive-strength = <2>;
750 }; 655 };
751 656
752 mode_pin_active: mode-pin-state { !! 657 lid_pin_active: lid-pin {
753 pins = "gpio95"; !! 658 pins = "gpio124";
754 function = "gpio"; 659 function = "gpio";
755 660
>> 661 input-enable;
756 bias-disable; 662 bias-disable;
757 }; 663 };
758 664
759 ec_int_state: ec-int-state { !! 665 mode_pin_active: mode-pin {
760 pins = "gpio20"; !! 666 pins = "gpio95";
761 function = "gpio"; 667 function = "gpio";
762 668
>> 669 input-enable;
763 bias-disable; 670 bias-disable;
764 }; 671 };
765 }; 672 };
766 673
767 &uart6 { 674 &uart6 {
768 pinctrl-names = "default"; <<
769 pinctrl-0 = <&qup_uart6_4pin>; <<
770 status = "okay"; 675 status = "okay";
771 676
772 bluetooth { 677 bluetooth {
773 compatible = "qcom,wcn3990-bt" 678 compatible = "qcom,wcn3990-bt";
774 679
775 vddio-supply = <&vreg_s4a_1p8> 680 vddio-supply = <&vreg_s4a_1p8>;
776 vddxo-supply = <&vreg_l7a_1p8> 681 vddxo-supply = <&vreg_l7a_1p8>;
777 vddrf-supply = <&vreg_l17a_1p3 682 vddrf-supply = <&vreg_l17a_1p3>;
778 vddch0-supply = <&vreg_l25a_3p 683 vddch0-supply = <&vreg_l25a_3p3>;
779 vddch1-supply = <&vreg_l23a_3p 684 vddch1-supply = <&vreg_l23a_3p3>;
780 max-speed = <3200000>; 685 max-speed = <3200000>;
781 }; 686 };
782 }; 687 };
783 688
784 &uart9 { <<
785 status = "okay"; <<
786 }; <<
787 <<
788 &ufs_mem_hc { 689 &ufs_mem_hc {
789 status = "okay"; 690 status = "okay";
790 691
791 reset-gpios = <&tlmm 150 GPIO_ACTIVE_L 692 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
792 693
793 vcc-supply = <&vreg_l20a_2p95>; 694 vcc-supply = <&vreg_l20a_2p95>;
794 vcc-max-microamp = <600000>; 695 vcc-max-microamp = <600000>;
795 }; 696 };
796 697
797 &ufs_mem_phy { 698 &ufs_mem_phy {
798 status = "okay"; 699 status = "okay";
799 700
800 vdda-phy-supply = <&vdda_ufs1_core>; 701 vdda-phy-supply = <&vdda_ufs1_core>;
801 vdda-pll-supply = <&vdda_ufs1_1p2>; 702 vdda-pll-supply = <&vdda_ufs1_1p2>;
802 }; 703 };
803 704
804 &usb_1 { 705 &usb_1 {
805 status = "okay"; 706 status = "okay";
806 }; 707 };
807 708
808 &usb_1_dwc3 { 709 &usb_1_dwc3 {
809 dr_mode = "host"; 710 dr_mode = "host";
810 }; 711 };
811 712
812 &usb_1_dwc3_hs { <<
813 remote-endpoint = <&ucsi0_hs_in>; <<
814 }; <<
815 <<
816 &usb_1_hsphy { 713 &usb_1_hsphy {
817 status = "okay"; 714 status = "okay";
818 715
819 vdd-supply = <&vdda_usb1_ss_core>; 716 vdd-supply = <&vdda_usb1_ss_core>;
820 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 717 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
821 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 718 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
822 719
823 qcom,imp-res-offset-value = <8>; 720 qcom,imp-res-offset-value = <8>;
824 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 721 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
825 qcom,preemphasis-level = <QUSB2_V2_PRE 722 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
826 qcom,preemphasis-width = <QUSB2_V2_PRE 723 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
827 }; 724 };
828 725
829 &usb_1_qmpphy { 726 &usb_1_qmpphy {
830 status = "okay"; 727 status = "okay";
831 728
832 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 729 vdda-phy-supply = <&vdda_usb1_ss_1p2>;
833 vdda-pll-supply = <&vdda_usb1_ss_core> 730 vdda-pll-supply = <&vdda_usb1_ss_core>;
834 }; 731 };
835 732
836 &usb_1_qmpphy_out { <<
837 remote-endpoint = <&ucsi0_ss_in>; <<
838 }; <<
839 <<
840 &usb_2 { 733 &usb_2 {
841 status = "okay"; 734 status = "okay";
842 }; 735 };
843 736
844 &usb_2_dwc3 { 737 &usb_2_dwc3 {
845 dr_mode = "host"; 738 dr_mode = "host";
846 }; 739 };
847 740
848 &usb_2_hsphy { 741 &usb_2_hsphy {
849 status = "okay"; 742 status = "okay";
850 743
851 vdd-supply = <&vdda_usb2_ss_core>; 744 vdd-supply = <&vdda_usb2_ss_core>;
852 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 745 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
853 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 746 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
854 747
855 qcom,imp-res-offset-value = <8>; 748 qcom,imp-res-offset-value = <8>;
856 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 749 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
857 }; 750 };
858 751
859 &usb_2_qmpphy { 752 &usb_2_qmpphy {
860 status = "okay"; 753 status = "okay";
861 754
862 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 755 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
863 vdda-pll-supply = <&vdda_usb2_ss_core> 756 vdda-pll-supply = <&vdda_usb2_ss_core>;
864 }; 757 };
865 758
866 &venus { 759 &venus {
867 firmware-name = "qcom/sdm850/LENOVO/81 <<
868 status = "okay"; 760 status = "okay";
869 }; 761 };
870 762
871 &wcd9340 { !! 763 &wcd9340{
872 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HI !! 764 pinctrl-0 = <&wcd_intr_default>;
>> 765 pinctrl-names = "default";
>> 766 clock-names = "extclk";
>> 767 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
>> 768 reset-gpios = <&tlmm 64 0>;
873 vdd-buck-supply = <&vreg_s4a_1p8>; 769 vdd-buck-supply = <&vreg_s4a_1p8>;
874 vdd-buck-sido-supply = <&vreg_s4a_1p8> 770 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
875 vdd-tx-supply = <&vreg_s4a_1p8>; 771 vdd-tx-supply = <&vreg_s4a_1p8>;
876 vdd-rx-supply = <&vreg_s4a_1p8>; 772 vdd-rx-supply = <&vreg_s4a_1p8>;
877 vdd-io-supply = <&vreg_s4a_1p8>; 773 vdd-io-supply = <&vreg_s4a_1p8>;
878 qcom,mbhc-buttons-vthreshold-microvolt 774 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
879 qcom,mbhc-headset-vthreshold-microvolt 775 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
880 qcom,mbhc-headphone-vthreshold-microvo 776 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
881 777
882 swm: soundwire@c85 { !! 778 swm: swm@c85 {
883 left_spkr: speaker@0,3 { !! 779 left_spkr: wsa8810-left{
884 compatible = "sdw10217 780 compatible = "sdw10217211000";
885 reg = <0 3>; 781 reg = <0 3>;
886 powerdown-gpios = <&wc !! 782 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
887 #thermal-sensor-cells 783 #thermal-sensor-cells = <0>;
888 sound-name-prefix = "S 784 sound-name-prefix = "SpkrLeft";
889 #sound-dai-cells = <0> 785 #sound-dai-cells = <0>;
890 }; 786 };
891 787
892 right_spkr: speaker@0,4 { !! 788 right_spkr: wsa8810-right{
893 compatible = "sdw10217 789 compatible = "sdw10217211000";
894 powerdown-gpios = <&wc !! 790 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
895 reg = <0 4>; 791 reg = <0 4>;
896 #thermal-sensor-cells 792 #thermal-sensor-cells = <0>;
897 sound-name-prefix = "S 793 sound-name-prefix = "SpkrRight";
898 #sound-dai-cells = <0> 794 #sound-dai-cells = <0>;
899 }; 795 };
900 }; 796 };
901 }; 797 };
902 798
903 &wifi { 799 &wifi {
904 status = "okay"; 800 status = "okay";
905 801
906 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8> 802 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
907 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 803 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
908 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 804 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
909 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 805 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
910 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; 806 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
911 807
912 qcom,snoc-host-cap-8bit-quirk; 808 qcom,snoc-host-cap-8bit-quirk;
913 qcom,ath10k-calibration-variant = "Len <<
914 }; 809 };
915 810
916 &crypto { 811 &crypto {
917 /* FIXME: qce_start triggers an SError 812 /* FIXME: qce_start triggers an SError */
918 status = "disabled"; !! 813 status= "disable";
919 }; 814 };
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