1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause 2 /* 2 /* 3 * Lenovo Yoga C630 3 * Lenovo Yoga C630 4 * 4 * 5 * Copyright (c) 2019, Linaro Ltd. 5 * Copyright (c) 2019, Linaro Ltd. 6 */ 6 */ 7 7 8 /dts-v1/; 8 /dts-v1/; 9 9 10 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/gpio-keys.h> 11 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/regulator/qcom,rpmh-regu 12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 #include <dt-bindings/sound/qcom,q6afe.h> 13 #include <dt-bindings/sound/qcom,q6afe.h> 14 #include <dt-bindings/sound/qcom,q6asm.h> 14 #include <dt-bindings/sound/qcom,q6asm.h> 15 #include "sdm850.dtsi" 15 #include "sdm850.dtsi" 16 #include "sdm845-wcd9340.dtsi" 16 #include "sdm845-wcd9340.dtsi" 17 #include "pm8998.dtsi" 17 #include "pm8998.dtsi" 18 18 19 /* 19 /* 20 * Update following upstream (sdm845.dtsi) res 20 * Update following upstream (sdm845.dtsi) reserved 21 * memory mappings for firmware loading to suc 21 * memory mappings for firmware loading to succeed 22 * and enable the IPA device. 22 * and enable the IPA device. 23 */ 23 */ 24 /delete-node/ &ipa_fw_mem; 24 /delete-node/ &ipa_fw_mem; 25 /delete-node/ &ipa_gsi_mem; 25 /delete-node/ &ipa_gsi_mem; 26 /delete-node/ &gpu_mem; 26 /delete-node/ &gpu_mem; 27 /delete-node/ &adsp_mem; 27 /delete-node/ &adsp_mem; 28 /delete-node/ &wlan_msa_mem; 28 /delete-node/ &wlan_msa_mem; 29 29 30 / { 30 / { 31 model = "Lenovo Yoga C630"; 31 model = "Lenovo Yoga C630"; 32 compatible = "lenovo,yoga-c630", "qcom 32 compatible = "lenovo,yoga-c630", "qcom,sdm845"; 33 chassis-type = "convertible"; 33 chassis-type = "convertible"; 34 34 35 aliases { 35 aliases { 36 serial0 = &uart9; 36 serial0 = &uart9; 37 serial1 = &uart6; 37 serial1 = &uart6; 38 }; 38 }; 39 39 40 gpio-keys { 40 gpio-keys { 41 compatible = "gpio-keys"; 41 compatible = "gpio-keys"; 42 42 43 pinctrl-names = "default"; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&lid_pin_active>, 44 pinctrl-0 = <&lid_pin_active>, <&mode_pin_active>; 45 45 46 switch-lid { 46 switch-lid { 47 gpios = <&tlmm 124 GPI 47 gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>; 48 linux,input-type = <EV 48 linux,input-type = <EV_SW>; 49 linux,code = <SW_LID>; 49 linux,code = <SW_LID>; 50 wakeup-source; 50 wakeup-source; 51 wakeup-event-action = 51 wakeup-event-action = <EV_ACT_DEASSERTED>; 52 }; 52 }; 53 53 54 switch-mode { 54 switch-mode { 55 gpios = <&tlmm 95 GPIO 55 gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>; 56 linux,input-type = <EV 56 linux,input-type = <EV_SW>; 57 linux,code = <SW_TABLE 57 linux,code = <SW_TABLET_MODE>; 58 }; 58 }; 59 }; 59 }; 60 60 61 /* Reserved memory changes for IPA */ 61 /* Reserved memory changes for IPA */ 62 reserved-memory { 62 reserved-memory { 63 wlan_msa_mem: memory@8c400000 63 wlan_msa_mem: memory@8c400000 { 64 reg = <0 0x8c400000 0 64 reg = <0 0x8c400000 0 0x100000>; 65 no-map; 65 no-map; 66 }; 66 }; 67 67 68 gpu_mem: memory@8c515000 { 68 gpu_mem: memory@8c515000 { 69 reg = <0 0x8c515000 0 69 reg = <0 0x8c515000 0 0x2000>; 70 no-map; 70 no-map; 71 }; 71 }; 72 72 73 ipa_fw_mem: memory@8c517000 { 73 ipa_fw_mem: memory@8c517000 { 74 reg = <0 0x8c517000 0 74 reg = <0 0x8c517000 0 0x5a000>; 75 no-map; 75 no-map; 76 }; 76 }; 77 77 78 adsp_mem: memory@8c600000 { 78 adsp_mem: memory@8c600000 { 79 reg = <0 0x8c600000 0 79 reg = <0 0x8c600000 0 0x1a00000>; 80 no-map; 80 no-map; 81 }; 81 }; 82 }; 82 }; 83 83 84 sw_edp_1p2: edp-1p2-regulator { 84 sw_edp_1p2: edp-1p2-regulator { 85 compatible = "regulator-fixed" 85 compatible = "regulator-fixed"; 86 regulator-name = "sw_edp_1p2"; 86 regulator-name = "sw_edp_1p2"; 87 87 88 regulator-min-microvolt = <120 88 regulator-min-microvolt = <1200000>; 89 regulator-max-microvolt = <120 89 regulator-max-microvolt = <1200000>; 90 90 91 pinctrl-0 = <&sw_edp_1p2_en>; 91 pinctrl-0 = <&sw_edp_1p2_en>; 92 pinctrl-names = "default"; 92 pinctrl-names = "default"; 93 93 94 gpio = <&pm8998_gpios 9 GPIO_A 94 gpio = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>; 95 enable-active-high; 95 enable-active-high; 96 96 97 vin-supply = <&vreg_l2a_1p2>; 97 vin-supply = <&vreg_l2a_1p2>; 98 }; 98 }; 99 99 100 sn65dsi86_refclk: sn65dsi86-refclk { 100 sn65dsi86_refclk: sn65dsi86-refclk { 101 compatible = "fixed-clock"; 101 compatible = "fixed-clock"; 102 #clock-cells = <0>; 102 #clock-cells = <0>; 103 103 104 clock-frequency = <19200000>; 104 clock-frequency = <19200000>; 105 }; 105 }; 106 106 107 vph_pwr: regulator-vph-pwr { 107 vph_pwr: regulator-vph-pwr { 108 compatible = "regulator-fixed" 108 compatible = "regulator-fixed"; 109 regulator-name = "vph_pwr"; 109 regulator-name = "vph_pwr"; 110 regulator-min-microvolt = <370 110 regulator-min-microvolt = <3700000>; 111 regulator-max-microvolt = <370 111 regulator-max-microvolt = <3700000>; 112 }; 112 }; 113 113 114 vlcm_3v3: regulator-vlcm-3v3 { 114 vlcm_3v3: regulator-vlcm-3v3 { 115 compatible = "regulator-fixed" 115 compatible = "regulator-fixed"; 116 regulator-name = "vlcm_3v3"; 116 regulator-name = "vlcm_3v3"; 117 117 118 vin-supply = <&vph_pwr>; 118 vin-supply = <&vph_pwr>; 119 regulator-min-microvolt = <330 119 regulator-min-microvolt = <3300000>; 120 regulator-max-microvolt = <330 120 regulator-max-microvolt = <3300000>; 121 121 122 gpio = <&tlmm 88 GPIO_ACTIVE_H 122 gpio = <&tlmm 88 GPIO_ACTIVE_HIGH>; 123 enable-active-high; 123 enable-active-high; 124 }; 124 }; 125 125 126 backlight: backlight { 126 backlight: backlight { 127 compatible = "pwm-backlight"; 127 compatible = "pwm-backlight"; 128 pwms = <&sn65dsi86 1000000>; 128 pwms = <&sn65dsi86 1000000>; 129 enable-gpios = <&tlmm 11 GPIO_ 129 enable-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>; 130 }; 130 }; 131 }; 131 }; 132 132 133 &adsp_pas { 133 &adsp_pas { 134 firmware-name = "qcom/sdm850/LENOVO/81 134 firmware-name = "qcom/sdm850/LENOVO/81JL/qcadsp850.mbn"; 135 status = "okay"; 135 status = "okay"; 136 }; 136 }; 137 137 138 &apps_rsc { 138 &apps_rsc { 139 regulators-0 { 139 regulators-0 { 140 compatible = "qcom,pm8998-rpmh 140 compatible = "qcom,pm8998-rpmh-regulators"; 141 qcom,pmic-id = "a"; 141 qcom,pmic-id = "a"; 142 142 143 vdd-l2-l8-l17-supply = <&vreg_ 143 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 144 vdd-l7-l12-l14-l15-supply = <& 144 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 145 145 146 vreg_s2a_1p125: smps2 { 146 vreg_s2a_1p125: smps2 { 147 }; 147 }; 148 148 149 vreg_s3a_1p35: smps3 { 149 vreg_s3a_1p35: smps3 { 150 regulator-min-microvol 150 regulator-min-microvolt = <1352000>; 151 regulator-max-microvol 151 regulator-max-microvolt = <1352000>; 152 regulator-initial-mode 152 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 153 }; 153 }; 154 154 155 vreg_s4a_1p8: smps4 { 155 vreg_s4a_1p8: smps4 { 156 regulator-min-microvol 156 regulator-min-microvolt = <1800000>; 157 regulator-max-microvol 157 regulator-max-microvolt = <1800000>; 158 regulator-initial-mode 158 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 159 }; 159 }; 160 160 161 vreg_s5a_2p04: smps5 { 161 vreg_s5a_2p04: smps5 { 162 regulator-min-microvol 162 regulator-min-microvolt = <2040000>; 163 regulator-max-microvol 163 regulator-max-microvolt = <2040000>; 164 regulator-initial-mode 164 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 165 }; 165 }; 166 166 167 vreg_s7a_1p025: smps7 { 167 vreg_s7a_1p025: smps7 { 168 }; 168 }; 169 169 170 vdd_qusb_hs0: 170 vdd_qusb_hs0: 171 vdda_hp_pcie_core: 171 vdda_hp_pcie_core: 172 vdda_mipi_csi0_0p9: 172 vdda_mipi_csi0_0p9: 173 vdda_mipi_csi1_0p9: 173 vdda_mipi_csi1_0p9: 174 vdda_mipi_csi2_0p9: 174 vdda_mipi_csi2_0p9: 175 vdda_mipi_dsi0_pll: 175 vdda_mipi_dsi0_pll: 176 vdda_mipi_dsi1_pll: 176 vdda_mipi_dsi1_pll: 177 vdda_qlink_lv: 177 vdda_qlink_lv: 178 vdda_qlink_lv_ck: 178 vdda_qlink_lv_ck: 179 vdda_qrefs_0p875: 179 vdda_qrefs_0p875: 180 vdda_pcie_core: 180 vdda_pcie_core: 181 vdda_pll_cc_ebi01: 181 vdda_pll_cc_ebi01: 182 vdda_pll_cc_ebi23: 182 vdda_pll_cc_ebi23: 183 vdda_sp_sensor: 183 vdda_sp_sensor: 184 vdda_ufs1_core: 184 vdda_ufs1_core: 185 vdda_ufs2_core: 185 vdda_ufs2_core: 186 vdda_usb1_ss_core: 186 vdda_usb1_ss_core: 187 vdda_usb2_ss_core: 187 vdda_usb2_ss_core: 188 vreg_l1a_0p875: ldo1 { 188 vreg_l1a_0p875: ldo1 { 189 regulator-min-microvol 189 regulator-min-microvolt = <880000>; 190 regulator-max-microvol 190 regulator-max-microvolt = <880000>; 191 regulator-initial-mode 191 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 192 }; 192 }; 193 193 194 vddpx_10: 194 vddpx_10: 195 vreg_l2a_1p2: ldo2 { 195 vreg_l2a_1p2: ldo2 { 196 regulator-min-microvol 196 regulator-min-microvolt = <1200000>; 197 regulator-max-microvol 197 regulator-max-microvolt = <1200000>; 198 regulator-initial-mode 198 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 199 regulator-always-on; 199 regulator-always-on; 200 }; 200 }; 201 201 202 vreg_l3a_1p0: ldo3 { 202 vreg_l3a_1p0: ldo3 { 203 }; 203 }; 204 204 205 vdd_wcss_cx: 205 vdd_wcss_cx: 206 vdd_wcss_mx: 206 vdd_wcss_mx: 207 vdda_wcss_pll: 207 vdda_wcss_pll: 208 vreg_l5a_0p8: ldo5 { 208 vreg_l5a_0p8: ldo5 { 209 regulator-min-microvol 209 regulator-min-microvolt = <800000>; 210 regulator-max-microvol 210 regulator-max-microvolt = <800000>; 211 regulator-initial-mode 211 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 212 }; 212 }; 213 213 214 vddpx_13: 214 vddpx_13: 215 vreg_l6a_1p8: ldo6 { 215 vreg_l6a_1p8: ldo6 { 216 regulator-min-microvol 216 regulator-min-microvolt = <1800000>; 217 regulator-max-microvol 217 regulator-max-microvolt = <1800000>; 218 regulator-initial-mode 218 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 219 }; 219 }; 220 220 221 vreg_l7a_1p8: ldo7 { 221 vreg_l7a_1p8: ldo7 { 222 regulator-min-microvol 222 regulator-min-microvolt = <1800000>; 223 regulator-max-microvol 223 regulator-max-microvolt = <1800000>; 224 regulator-initial-mode 224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 225 }; 225 }; 226 226 227 vreg_l8a_1p2: ldo8 { 227 vreg_l8a_1p2: ldo8 { 228 }; 228 }; 229 229 230 vreg_l9a_1p8: ldo9 { 230 vreg_l9a_1p8: ldo9 { 231 }; 231 }; 232 232 233 vreg_l10a_1p8: ldo10 { 233 vreg_l10a_1p8: ldo10 { 234 }; 234 }; 235 235 236 vreg_l11a_1p0: ldo11 { 236 vreg_l11a_1p0: ldo11 { 237 }; 237 }; 238 238 239 vdd_qfprom: 239 vdd_qfprom: 240 vdd_qfprom_sp: 240 vdd_qfprom_sp: 241 vdda_apc1_cs_1p8: 241 vdda_apc1_cs_1p8: 242 vdda_gfx_cs_1p8: 242 vdda_gfx_cs_1p8: 243 vdda_qrefs_1p8: 243 vdda_qrefs_1p8: 244 vdda_qusb_hs0_1p8: 244 vdda_qusb_hs0_1p8: 245 vddpx_11: 245 vddpx_11: 246 vreg_l12a_1p8: ldo12 { 246 vreg_l12a_1p8: ldo12 { 247 regulator-min-microvol 247 regulator-min-microvolt = <1800000>; 248 regulator-max-microvol 248 regulator-max-microvolt = <1800000>; 249 regulator-initial-mode 249 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 250 }; 250 }; 251 251 252 vddpx_2: 252 vddpx_2: 253 vreg_l13a_2p95: ldo13 { 253 vreg_l13a_2p95: ldo13 { 254 }; 254 }; 255 255 256 vreg_l14a_1p88: ldo14 { 256 vreg_l14a_1p88: ldo14 { 257 regulator-min-microvol 257 regulator-min-microvolt = <1880000>; 258 regulator-max-microvol 258 regulator-max-microvolt = <1880000>; 259 regulator-initial-mode 259 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 260 regulator-always-on; 260 regulator-always-on; 261 }; 261 }; 262 262 263 vreg_l15a_1p8: ldo15 { 263 vreg_l15a_1p8: ldo15 { 264 }; 264 }; 265 265 266 vreg_l16a_2p7: ldo16 { 266 vreg_l16a_2p7: ldo16 { 267 }; 267 }; 268 268 269 vreg_l17a_1p3: ldo17 { 269 vreg_l17a_1p3: ldo17 { 270 regulator-min-microvol 270 regulator-min-microvolt = <1304000>; 271 regulator-max-microvol 271 regulator-max-microvolt = <1304000>; 272 regulator-initial-mode 272 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 273 }; 273 }; 274 274 275 vreg_l18a_2p7: ldo18 { 275 vreg_l18a_2p7: ldo18 { 276 }; 276 }; 277 277 278 vreg_l19a_3p0: ldo19 { 278 vreg_l19a_3p0: ldo19 { 279 regulator-min-microvol 279 regulator-min-microvolt = <3100000>; 280 regulator-max-microvol 280 regulator-max-microvolt = <3108000>; 281 regulator-initial-mode 281 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 282 }; 282 }; 283 283 284 vreg_l20a_2p95: ldo20 { 284 vreg_l20a_2p95: ldo20 { 285 regulator-min-microvol 285 regulator-min-microvolt = <2960000>; 286 regulator-max-microvol 286 regulator-max-microvolt = <2960000>; 287 regulator-initial-mode 287 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 288 }; 288 }; 289 289 290 vreg_l21a_2p95: ldo21 { 290 vreg_l21a_2p95: ldo21 { 291 }; 291 }; 292 292 293 vreg_l22a_2p85: ldo22 { 293 vreg_l22a_2p85: ldo22 { 294 }; 294 }; 295 295 296 vreg_l23a_3p3: ldo23 { 296 vreg_l23a_3p3: ldo23 { 297 regulator-min-microvol 297 regulator-min-microvolt = <3300000>; 298 regulator-max-microvol 298 regulator-max-microvolt = <3312000>; 299 regulator-initial-mode 299 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 300 }; 300 }; 301 301 302 vdda_qusb_hs0_3p1: 302 vdda_qusb_hs0_3p1: 303 vreg_l24a_3p075: ldo24 { 303 vreg_l24a_3p075: ldo24 { 304 regulator-min-microvol 304 regulator-min-microvolt = <3075000>; 305 regulator-max-microvol 305 regulator-max-microvolt = <3083000>; 306 regulator-initial-mode 306 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 307 }; 307 }; 308 308 309 vreg_l25a_3p3: ldo25 { 309 vreg_l25a_3p3: ldo25 { 310 regulator-min-microvol 310 regulator-min-microvolt = <3104000>; 311 regulator-max-microvol 311 regulator-max-microvolt = <3112000>; 312 regulator-initial-mode 312 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 313 }; 313 }; 314 314 315 vdda_hp_pcie_1p2: 315 vdda_hp_pcie_1p2: 316 vdda_hv_ebi0: 316 vdda_hv_ebi0: 317 vdda_hv_ebi1: 317 vdda_hv_ebi1: 318 vdda_hv_ebi2: 318 vdda_hv_ebi2: 319 vdda_hv_ebi3: 319 vdda_hv_ebi3: 320 vdda_mipi_csi_1p25: 320 vdda_mipi_csi_1p25: 321 vdda_mipi_dsi0_1p2: 321 vdda_mipi_dsi0_1p2: 322 vdda_mipi_dsi1_1p2: 322 vdda_mipi_dsi1_1p2: 323 vdda_pcie_1p2: 323 vdda_pcie_1p2: 324 vdda_ufs1_1p2: 324 vdda_ufs1_1p2: 325 vdda_ufs2_1p2: 325 vdda_ufs2_1p2: 326 vdda_usb1_ss_1p2: 326 vdda_usb1_ss_1p2: 327 vdda_usb2_ss_1p2: 327 vdda_usb2_ss_1p2: 328 vreg_l26a_1p2: ldo26 { 328 vreg_l26a_1p2: ldo26 { 329 regulator-min-microvol 329 regulator-min-microvolt = <1200000>; 330 regulator-max-microvol 330 regulator-max-microvolt = <1208000>; 331 regulator-initial-mode 331 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 332 }; 332 }; 333 333 334 vreg_l28a_3p0: ldo28 { 334 vreg_l28a_3p0: ldo28 { 335 }; 335 }; 336 336 337 vreg_lvs1a_1p8: lvs1 { 337 vreg_lvs1a_1p8: lvs1 { 338 }; 338 }; 339 339 340 vreg_lvs2a_1p8: lvs2 { 340 vreg_lvs2a_1p8: lvs2 { 341 }; 341 }; 342 }; 342 }; 343 }; 343 }; 344 344 345 &cdsp_pas { 345 &cdsp_pas { 346 firmware-name = "qcom/sdm850/LENOVO/81 346 firmware-name = "qcom/sdm850/LENOVO/81JL/qccdsp850.mbn"; 347 status = "okay"; 347 status = "okay"; 348 }; 348 }; 349 349 350 &gcc { 350 &gcc { 351 protected-clocks = <GCC_QSPI_CORE_CLK> 351 protected-clocks = <GCC_QSPI_CORE_CLK>, 352 <GCC_QSPI_CORE_CLK_ 352 <GCC_QSPI_CORE_CLK_SRC>, 353 <GCC_QSPI_CNOC_PERI 353 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 354 <GCC_LPASS_Q6_AXI_C 354 <GCC_LPASS_Q6_AXI_CLK>, 355 <GCC_LPASS_SWAY_CLK 355 <GCC_LPASS_SWAY_CLK>; 356 }; 356 }; 357 357 358 &gmu { 358 &gmu { 359 status = "okay"; 359 status = "okay"; 360 }; 360 }; 361 361 362 &gpu { 362 &gpu { 363 status = "okay"; 363 status = "okay"; 364 zap-shader { 364 zap-shader { 365 memory-region = <&gpu_mem>; 365 memory-region = <&gpu_mem>; 366 firmware-name = "qcom/sdm850/L 366 firmware-name = "qcom/sdm850/LENOVO/81JL/qcdxkmsuc850.mbn"; 367 }; 367 }; 368 }; 368 }; 369 369 370 &i2c1 { 370 &i2c1 { 371 status = "okay"; 371 status = "okay"; 372 clock-frequency = <400000>; 372 clock-frequency = <400000>; 373 << 374 embedded-controller@70 { << 375 compatible = "lenovo,yoga-c630 << 376 reg = <0x70>; << 377 << 378 interrupts-extended = <&tlmm 2 << 379 << 380 pinctrl-names = "default"; << 381 pinctrl-0 = <&ec_int_state>; << 382 << 383 #address-cells = <1>; << 384 #size-cells = <0>; << 385 << 386 connector@0 { << 387 compatible = "usb-c-co << 388 reg = <0>; << 389 power-role = "dual"; << 390 data-role = "host"; << 391 << 392 ports { << 393 #address-cells << 394 #size-cells = << 395 << 396 port@0 { << 397 reg = << 398 << 399 ucsi0_ << 400 << 401 }; << 402 }; << 403 << 404 port@1 { << 405 reg = << 406 << 407 ucsi0_ << 408 << 409 }; << 410 }; << 411 << 412 port@2 { << 413 reg = << 414 << 415 ucsi0_ << 416 }; << 417 }; << 418 }; << 419 }; << 420 << 421 connector@1 { << 422 compatible = "usb-c-co << 423 reg = <1>; << 424 power-role = "dual"; << 425 data-role = "host"; << 426 << 427 /* << 428 * connected to the on << 429 * handled by the cont << 430 */ << 431 }; << 432 }; << 433 }; 373 }; 434 374 435 &i2c3 { 375 &i2c3 { 436 status = "okay"; 376 status = "okay"; 437 clock-frequency = <400000>; 377 clock-frequency = <400000>; 438 /* Overwrite pinctrl-0 from sdm845.dts 378 /* Overwrite pinctrl-0 from sdm845.dtsi */ 439 pinctrl-0 = <&qup_i2c3_default &i2c3_h 379 pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>; 440 380 441 tsel: hid@15 { 381 tsel: hid@15 { 442 compatible = "hid-over-i2c"; 382 compatible = "hid-over-i2c"; 443 reg = <0x15>; 383 reg = <0x15>; 444 hid-descr-addr = <0x1>; 384 hid-descr-addr = <0x1>; 445 385 446 interrupts-extended = <&tlmm 3 386 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>; 447 }; 387 }; 448 388 449 tsc2: hid@2c { 389 tsc2: hid@2c { 450 compatible = "hid-over-i2c"; 390 compatible = "hid-over-i2c"; 451 reg = <0x2c>; 391 reg = <0x2c>; 452 hid-descr-addr = <0x20>; 392 hid-descr-addr = <0x20>; 453 393 454 interrupts-extended = <&tlmm 3 394 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>; 455 395 456 wakeup-source; 396 wakeup-source; 457 }; 397 }; 458 }; 398 }; 459 399 460 &i2c5 { 400 &i2c5 { 461 status = "okay"; 401 status = "okay"; 462 clock-frequency = <400000>; 402 clock-frequency = <400000>; 463 403 464 tsc1: hid@10 { 404 tsc1: hid@10 { 465 compatible = "hid-over-i2c"; 405 compatible = "hid-over-i2c"; 466 reg = <0x10>; 406 reg = <0x10>; 467 hid-descr-addr = <0x1>; 407 hid-descr-addr = <0x1>; 468 408 469 interrupts-extended = <&tlmm 1 409 interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>; 470 410 471 pinctrl-names = "default"; 411 pinctrl-names = "default"; 472 pinctrl-0 = <&i2c5_hid_active> 412 pinctrl-0 = <&i2c5_hid_active>; 473 413 474 wakeup-source; 414 wakeup-source; 475 }; 415 }; 476 }; 416 }; 477 417 478 &i2c10 { 418 &i2c10 { 479 status = "okay"; 419 status = "okay"; 480 clock-frequency = <400000>; 420 clock-frequency = <400000>; 481 421 482 sn65dsi86: bridge@2c { 422 sn65dsi86: bridge@2c { 483 compatible = "ti,sn65dsi86"; 423 compatible = "ti,sn65dsi86"; 484 reg = <0x2c>; 424 reg = <0x2c>; 485 pinctrl-names = "default"; 425 pinctrl-names = "default"; 486 pinctrl-0 = <&sn65dsi86_pin_ac 426 pinctrl-0 = <&sn65dsi86_pin_active>; 487 427 488 enable-gpios = <&tlmm 96 GPIO_ 428 enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; 489 429 490 vcca-supply = <&sw_edp_1p2>; 430 vcca-supply = <&sw_edp_1p2>; 491 vcc-supply = <&sw_edp_1p2>; 431 vcc-supply = <&sw_edp_1p2>; 492 vpll-supply = <&vreg_l14a_1p88 432 vpll-supply = <&vreg_l14a_1p88>; 493 vccio-supply = <&vreg_l14a_1p8 433 vccio-supply = <&vreg_l14a_1p88>; 494 434 495 clocks = <&sn65dsi86_refclk>; 435 clocks = <&sn65dsi86_refclk>; 496 clock-names = "refclk"; 436 clock-names = "refclk"; 497 437 498 no-hpd; 438 no-hpd; 499 #pwm-cells = <1>; 439 #pwm-cells = <1>; 500 440 501 ports { 441 ports { 502 #address-cells = <1>; 442 #address-cells = <1>; 503 #size-cells = <0>; 443 #size-cells = <0>; 504 444 505 port@0 { 445 port@0 { 506 reg = <0>; 446 reg = <0>; 507 sn65dsi86_in_a 447 sn65dsi86_in_a: endpoint { 508 remote 448 remote-endpoint = <&mdss_dsi0_out>; 509 }; 449 }; 510 }; 450 }; 511 451 512 port@1 { 452 port@1 { 513 reg = <1>; 453 reg = <1>; 514 sn65dsi86_out: 454 sn65dsi86_out: endpoint { 515 remote 455 remote-endpoint = <&panel_in_edp>; 516 }; 456 }; 517 }; 457 }; 518 }; 458 }; 519 459 520 aux-bus { 460 aux-bus { 521 panel: panel { 461 panel: panel { 522 compatible = " 462 compatible = "boe,nv133fhm-n61"; 523 backlight = <& 463 backlight = <&backlight>; 524 power-supply = 464 power-supply = <&vlcm_3v3>; 525 465 526 port { 466 port { 527 panel_ 467 panel_in_edp: endpoint { 528 468 remote-endpoint = <&sn65dsi86_out>; 529 }; 469 }; 530 }; 470 }; 531 }; 471 }; 532 }; 472 }; 533 }; 473 }; 534 }; 474 }; 535 475 536 &i2c11 { 476 &i2c11 { 537 status = "okay"; 477 status = "okay"; 538 clock-frequency = <400000>; 478 clock-frequency = <400000>; 539 479 540 ecsh: hid@5c { 480 ecsh: hid@5c { 541 compatible = "hid-over-i2c"; 481 compatible = "hid-over-i2c"; 542 reg = <0x5c>; 482 reg = <0x5c>; 543 hid-descr-addr = <0x1>; 483 hid-descr-addr = <0x1>; 544 484 545 interrupts-extended = <&tlmm 9 485 interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>; 546 486 547 pinctrl-names = "default"; 487 pinctrl-names = "default"; 548 pinctrl-0 = <&i2c11_hid_active 488 pinctrl-0 = <&i2c11_hid_active>; 549 489 550 wakeup-source; 490 wakeup-source; 551 }; 491 }; 552 }; 492 }; 553 493 554 &ipa { 494 &ipa { 555 qcom,gsi-loader = "self"; 495 qcom,gsi-loader = "self"; 556 memory-region = <&ipa_fw_mem>; 496 memory-region = <&ipa_fw_mem>; 557 firmware-name = "qcom/sdm850/LENOVO/81 497 firmware-name = "qcom/sdm850/LENOVO/81JL/ipa_fws.elf"; 558 status = "okay"; 498 status = "okay"; 559 }; 499 }; 560 500 561 &mdss { 501 &mdss { 562 status = "okay"; 502 status = "okay"; 563 }; 503 }; 564 504 565 &mdss_dsi0 { 505 &mdss_dsi0 { 566 status = "okay"; 506 status = "okay"; 567 vdda-supply = <&vreg_l26a_1p2>; 507 vdda-supply = <&vreg_l26a_1p2>; 568 508 569 ports { 509 ports { 570 port@1 { 510 port@1 { 571 endpoint { 511 endpoint { 572 remote-endpoin 512 remote-endpoint = <&sn65dsi86_in_a>; 573 data-lanes = < 513 data-lanes = <0 1 2 3>; 574 }; 514 }; 575 }; 515 }; 576 }; 516 }; 577 }; 517 }; 578 518 579 &mdss_dsi0_phy { 519 &mdss_dsi0_phy { 580 status = "okay"; 520 status = "okay"; 581 vdds-supply = <&vreg_l1a_0p875>; 521 vdds-supply = <&vreg_l1a_0p875>; 582 }; 522 }; 583 523 584 &mss_pil { 524 &mss_pil { 585 status = "okay"; 525 status = "okay"; 586 firmware-name = "qcom/sdm850/LENOVO/81 526 firmware-name = "qcom/sdm850/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/sdm850/LENOVO/81JL/qcdsp2850.mbn"; 587 }; 527 }; 588 528 589 &pm8998_gpios { 529 &pm8998_gpios { 590 /* This pin is pulled down by a fixed 530 /* This pin is pulled down by a fixed resistor */ 591 sw_edp_1p2_en: pm8998-gpio9-state { 531 sw_edp_1p2_en: pm8998-gpio9-state { 592 pins = "gpio9"; 532 pins = "gpio9"; 593 function = "normal"; 533 function = "normal"; 594 bias-disable; 534 bias-disable; 595 qcom,drive-strength = <0>; 535 qcom,drive-strength = <0>; 596 }; 536 }; 597 }; 537 }; 598 538 599 &qup_i2c10_default { 539 &qup_i2c10_default { 600 drive-strength = <2>; 540 drive-strength = <2>; 601 bias-disable; 541 bias-disable; 602 }; 542 }; 603 543 604 &qup_i2c12_default { 544 &qup_i2c12_default { 605 drive-strength = <2>; 545 drive-strength = <2>; 606 bias-disable; 546 bias-disable; 607 }; 547 }; 608 548 609 &qupv3_id_0 { 549 &qupv3_id_0 { 610 status = "okay"; 550 status = "okay"; 611 }; 551 }; 612 552 613 &qupv3_id_1 { 553 &qupv3_id_1 { 614 status = "okay"; 554 status = "okay"; 615 }; 555 }; 616 556 617 &q6asmdai { 557 &q6asmdai { 618 dai@0 { 558 dai@0 { 619 reg = <0>; 559 reg = <0>; 620 }; 560 }; 621 561 622 dai@1 { 562 dai@1 { 623 reg = <1>; 563 reg = <1>; 624 }; 564 }; 625 565 626 dai@2 { 566 dai@2 { 627 reg = <2>; 567 reg = <2>; 628 }; 568 }; 629 }; 569 }; 630 570 631 &sound { 571 &sound { 632 compatible = "lenovo,yoga-c630-sndcard 572 compatible = "lenovo,yoga-c630-sndcard", "qcom,sdm845-sndcard"; 633 model = "Lenovo-YOGA-C630-13Q50"; 573 model = "Lenovo-YOGA-C630-13Q50"; 634 574 635 audio-routing = 575 audio-routing = 636 "RX_BIAS", "MCLK", 576 "RX_BIAS", "MCLK", 637 "AMIC2", "MIC BIAS2", 577 "AMIC2", "MIC BIAS2", 638 "SpkrLeft IN", "SPK1 OUT", 578 "SpkrLeft IN", "SPK1 OUT", 639 "SpkrRight IN", "SPK2 OUT", 579 "SpkrRight IN", "SPK2 OUT", 640 "MM_DL1", "MultiMedia1 Playba 580 "MM_DL1", "MultiMedia1 Playback", 641 "MM_DL3", "MultiMedia3 Playba 581 "MM_DL3", "MultiMedia3 Playback", 642 "MultiMedia2 Capture", "MM_UL2 582 "MultiMedia2 Capture", "MM_UL2"; 643 583 644 mm1-dai-link { 584 mm1-dai-link { 645 link-name = "MultiMedia1"; 585 link-name = "MultiMedia1"; 646 cpu { 586 cpu { 647 sound-dai = <&q6asmdai 587 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; 648 }; 588 }; 649 }; 589 }; 650 590 651 mm2-dai-link { 591 mm2-dai-link { 652 link-name = "MultiMedia2"; 592 link-name = "MultiMedia2"; 653 cpu { 593 cpu { 654 sound-dai = <&q6asmdai 594 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; 655 }; 595 }; 656 }; 596 }; 657 597 658 mm3-dai-link { 598 mm3-dai-link { 659 link-name = "MultiMedia3"; 599 link-name = "MultiMedia3"; 660 cpu { 600 cpu { 661 sound-dai = <&q6asmdai 601 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; 662 }; 602 }; 663 }; 603 }; 664 604 665 slim-dai-link { 605 slim-dai-link { 666 link-name = "SLIM Playback"; 606 link-name = "SLIM Playback"; 667 cpu { 607 cpu { 668 sound-dai = <&q6afedai 608 sound-dai = <&q6afedai SLIMBUS_0_RX>; 669 }; 609 }; 670 610 671 platform { 611 platform { 672 sound-dai = <&q6routin 612 sound-dai = <&q6routing>; 673 }; 613 }; 674 614 675 codec { 615 codec { 676 sound-dai = <&left_spk 616 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; 677 }; 617 }; 678 }; 618 }; 679 619 680 slimcap-dai-link { 620 slimcap-dai-link { 681 link-name = "SLIM Capture"; 621 link-name = "SLIM Capture"; 682 cpu { 622 cpu { 683 sound-dai = <&q6afedai 623 sound-dai = <&q6afedai SLIMBUS_0_TX>; 684 }; 624 }; 685 625 686 platform { 626 platform { 687 sound-dai = <&q6routin 627 sound-dai = <&q6routing>; 688 }; 628 }; 689 629 690 codec { 630 codec { 691 sound-dai = <&wcd9340 631 sound-dai = <&wcd9340 1>; 692 }; 632 }; 693 }; 633 }; 694 634 695 slim-wcd-dai-link { 635 slim-wcd-dai-link { 696 link-name = "SLIM WCD Playback 636 link-name = "SLIM WCD Playback"; 697 cpu { 637 cpu { 698 sound-dai = <&q6afedai 638 sound-dai = <&q6afedai SLIMBUS_1_RX>; 699 }; 639 }; 700 640 701 platform { 641 platform { 702 sound-dai = <&q6routin 642 sound-dai = <&q6routing>; 703 }; 643 }; 704 644 705 codec { 645 codec { 706 sound-dai = <&wcd9340 646 sound-dai = <&wcd9340 2>; 707 }; 647 }; 708 }; 648 }; 709 }; 649 }; 710 650 711 &tlmm { 651 &tlmm { 712 gpio-reserved-ranges = <0 4>, <81 4>; 652 gpio-reserved-ranges = <0 4>, <81 4>; 713 653 714 sn65dsi86_pin_active: sn65dsi86-enable 654 sn65dsi86_pin_active: sn65dsi86-enable-state { 715 pins = "gpio96"; 655 pins = "gpio96"; 716 function = "gpio"; 656 function = "gpio"; 717 drive-strength = <2>; 657 drive-strength = <2>; 718 bias-disable; 658 bias-disable; 719 }; 659 }; 720 660 721 i2c3_hid_active: i2c2-hid-active-state 661 i2c3_hid_active: i2c2-hid-active-state { 722 pins = "gpio37"; 662 pins = "gpio37"; 723 function = "gpio"; 663 function = "gpio"; 724 664 725 bias-pull-up; 665 bias-pull-up; 726 drive-strength = <2>; 666 drive-strength = <2>; 727 }; 667 }; 728 668 729 i2c5_hid_active: i2c5-hid-active-state 669 i2c5_hid_active: i2c5-hid-active-state { 730 pins = "gpio125"; 670 pins = "gpio125"; 731 function = "gpio"; 671 function = "gpio"; 732 672 733 bias-pull-up; 673 bias-pull-up; 734 drive-strength = <2>; 674 drive-strength = <2>; 735 }; 675 }; 736 676 737 i2c11_hid_active: i2c11-hid-active-sta 677 i2c11_hid_active: i2c11-hid-active-state { 738 pins = "gpio92"; 678 pins = "gpio92"; 739 function = "gpio"; 679 function = "gpio"; 740 680 741 bias-pull-up; 681 bias-pull-up; 742 drive-strength = <2>; 682 drive-strength = <2>; 743 }; 683 }; 744 684 745 lid_pin_active: lid-pin-state { 685 lid_pin_active: lid-pin-state { 746 pins = "gpio124"; 686 pins = "gpio124"; 747 function = "gpio"; 687 function = "gpio"; 748 688 749 bias-disable; 689 bias-disable; 750 }; 690 }; 751 691 752 mode_pin_active: mode-pin-state { 692 mode_pin_active: mode-pin-state { 753 pins = "gpio95"; 693 pins = "gpio95"; 754 function = "gpio"; 694 function = "gpio"; 755 695 756 bias-disable; 696 bias-disable; 757 }; 697 }; 758 << 759 ec_int_state: ec-int-state { << 760 pins = "gpio20"; << 761 function = "gpio"; << 762 << 763 bias-disable; << 764 }; << 765 }; 698 }; 766 699 767 &uart6 { 700 &uart6 { 768 pinctrl-names = "default"; 701 pinctrl-names = "default"; 769 pinctrl-0 = <&qup_uart6_4pin>; 702 pinctrl-0 = <&qup_uart6_4pin>; 770 status = "okay"; 703 status = "okay"; 771 704 772 bluetooth { 705 bluetooth { 773 compatible = "qcom,wcn3990-bt" 706 compatible = "qcom,wcn3990-bt"; 774 707 775 vddio-supply = <&vreg_s4a_1p8> 708 vddio-supply = <&vreg_s4a_1p8>; 776 vddxo-supply = <&vreg_l7a_1p8> 709 vddxo-supply = <&vreg_l7a_1p8>; 777 vddrf-supply = <&vreg_l17a_1p3 710 vddrf-supply = <&vreg_l17a_1p3>; 778 vddch0-supply = <&vreg_l25a_3p 711 vddch0-supply = <&vreg_l25a_3p3>; 779 vddch1-supply = <&vreg_l23a_3p 712 vddch1-supply = <&vreg_l23a_3p3>; 780 max-speed = <3200000>; 713 max-speed = <3200000>; 781 }; 714 }; 782 }; 715 }; 783 716 784 &uart9 { 717 &uart9 { 785 status = "okay"; 718 status = "okay"; 786 }; 719 }; 787 720 788 &ufs_mem_hc { 721 &ufs_mem_hc { 789 status = "okay"; 722 status = "okay"; 790 723 791 reset-gpios = <&tlmm 150 GPIO_ACTIVE_L 724 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 792 725 793 vcc-supply = <&vreg_l20a_2p95>; 726 vcc-supply = <&vreg_l20a_2p95>; 794 vcc-max-microamp = <600000>; 727 vcc-max-microamp = <600000>; 795 }; 728 }; 796 729 797 &ufs_mem_phy { 730 &ufs_mem_phy { 798 status = "okay"; 731 status = "okay"; 799 732 800 vdda-phy-supply = <&vdda_ufs1_core>; 733 vdda-phy-supply = <&vdda_ufs1_core>; 801 vdda-pll-supply = <&vdda_ufs1_1p2>; 734 vdda-pll-supply = <&vdda_ufs1_1p2>; 802 }; 735 }; 803 736 804 &usb_1 { 737 &usb_1 { 805 status = "okay"; 738 status = "okay"; 806 }; 739 }; 807 740 808 &usb_1_dwc3 { 741 &usb_1_dwc3 { 809 dr_mode = "host"; 742 dr_mode = "host"; 810 }; 743 }; 811 744 812 &usb_1_dwc3_hs { << 813 remote-endpoint = <&ucsi0_hs_in>; << 814 }; << 815 << 816 &usb_1_hsphy { 745 &usb_1_hsphy { 817 status = "okay"; 746 status = "okay"; 818 747 819 vdd-supply = <&vdda_usb1_ss_core>; 748 vdd-supply = <&vdda_usb1_ss_core>; 820 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 749 vdda-pll-supply = <&vdda_qusb_hs0_1p8>; 821 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 750 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>; 822 751 823 qcom,imp-res-offset-value = <8>; 752 qcom,imp-res-offset-value = <8>; 824 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 753 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 825 qcom,preemphasis-level = <QUSB2_V2_PRE 754 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 826 qcom,preemphasis-width = <QUSB2_V2_PRE 755 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 827 }; 756 }; 828 757 829 &usb_1_qmpphy { 758 &usb_1_qmpphy { 830 status = "okay"; 759 status = "okay"; 831 760 832 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 761 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 833 vdda-pll-supply = <&vdda_usb1_ss_core> 762 vdda-pll-supply = <&vdda_usb1_ss_core>; 834 }; 763 }; 835 764 836 &usb_1_qmpphy_out { << 837 remote-endpoint = <&ucsi0_ss_in>; << 838 }; << 839 << 840 &usb_2 { 765 &usb_2 { 841 status = "okay"; 766 status = "okay"; 842 }; 767 }; 843 768 844 &usb_2_dwc3 { 769 &usb_2_dwc3 { 845 dr_mode = "host"; 770 dr_mode = "host"; 846 }; 771 }; 847 772 848 &usb_2_hsphy { 773 &usb_2_hsphy { 849 status = "okay"; 774 status = "okay"; 850 775 851 vdd-supply = <&vdda_usb2_ss_core>; 776 vdd-supply = <&vdda_usb2_ss_core>; 852 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 777 vdda-pll-supply = <&vdda_qusb_hs0_1p8>; 853 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 778 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>; 854 779 855 qcom,imp-res-offset-value = <8>; 780 qcom,imp-res-offset-value = <8>; 856 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 781 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 857 }; 782 }; 858 783 859 &usb_2_qmpphy { 784 &usb_2_qmpphy { 860 status = "okay"; 785 status = "okay"; 861 786 862 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 787 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 863 vdda-pll-supply = <&vdda_usb2_ss_core> 788 vdda-pll-supply = <&vdda_usb2_ss_core>; 864 }; 789 }; 865 790 866 &venus { 791 &venus { 867 firmware-name = "qcom/sdm850/LENOVO/81 792 firmware-name = "qcom/sdm850/LENOVO/81JL/qcvss850.mbn"; 868 status = "okay"; 793 status = "okay"; 869 }; 794 }; 870 795 871 &wcd9340 { 796 &wcd9340 { 872 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HI 797 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; 873 vdd-buck-supply = <&vreg_s4a_1p8>; 798 vdd-buck-supply = <&vreg_s4a_1p8>; 874 vdd-buck-sido-supply = <&vreg_s4a_1p8> 799 vdd-buck-sido-supply = <&vreg_s4a_1p8>; 875 vdd-tx-supply = <&vreg_s4a_1p8>; 800 vdd-tx-supply = <&vreg_s4a_1p8>; 876 vdd-rx-supply = <&vreg_s4a_1p8>; 801 vdd-rx-supply = <&vreg_s4a_1p8>; 877 vdd-io-supply = <&vreg_s4a_1p8>; 802 vdd-io-supply = <&vreg_s4a_1p8>; 878 qcom,mbhc-buttons-vthreshold-microvolt 803 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 879 qcom,mbhc-headset-vthreshold-microvolt 804 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 880 qcom,mbhc-headphone-vthreshold-microvo 805 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 881 806 882 swm: soundwire@c85 { 807 swm: soundwire@c85 { 883 left_spkr: speaker@0,3 { 808 left_spkr: speaker@0,3 { 884 compatible = "sdw10217 809 compatible = "sdw10217211000"; 885 reg = <0 3>; 810 reg = <0 3>; 886 powerdown-gpios = <&wc 811 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_LOW>; 887 #thermal-sensor-cells 812 #thermal-sensor-cells = <0>; 888 sound-name-prefix = "S 813 sound-name-prefix = "SpkrLeft"; 889 #sound-dai-cells = <0> 814 #sound-dai-cells = <0>; 890 }; 815 }; 891 816 892 right_spkr: speaker@0,4 { 817 right_spkr: speaker@0,4 { 893 compatible = "sdw10217 818 compatible = "sdw10217211000"; 894 powerdown-gpios = <&wc 819 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_LOW>; 895 reg = <0 4>; 820 reg = <0 4>; 896 #thermal-sensor-cells 821 #thermal-sensor-cells = <0>; 897 sound-name-prefix = "S 822 sound-name-prefix = "SpkrRight"; 898 #sound-dai-cells = <0> 823 #sound-dai-cells = <0>; 899 }; 824 }; 900 }; 825 }; 901 }; 826 }; 902 827 903 &wifi { 828 &wifi { 904 status = "okay"; 829 status = "okay"; 905 830 906 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8> 831 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 907 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 832 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 908 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 833 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 909 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 834 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 910 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; 835 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; 911 836 912 qcom,snoc-host-cap-8bit-quirk; 837 qcom,snoc-host-cap-8bit-quirk; 913 qcom,ath10k-calibration-variant = "Len << 914 }; 838 }; 915 839 916 &crypto { 840 &crypto { 917 /* FIXME: qce_start triggers an SError 841 /* FIXME: qce_start triggers an SError */ 918 status = "disabled"; 842 status = "disabled"; 919 }; 843 };
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