1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Lenovo Yoga C630 3 * Lenovo Yoga C630
4 * 4 *
5 * Copyright (c) 2019, Linaro Ltd. 5 * Copyright (c) 2019, Linaro Ltd.
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regu 12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h> 13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h> 14 #include <dt-bindings/sound/qcom,q6asm.h>
15 #include "sdm850.dtsi" 15 #include "sdm850.dtsi"
16 #include "sdm845-wcd9340.dtsi" 16 #include "sdm845-wcd9340.dtsi"
17 #include "pm8998.dtsi" 17 #include "pm8998.dtsi"
18 18
19 /* 19 /*
20 * Update following upstream (sdm845.dtsi) res 20 * Update following upstream (sdm845.dtsi) reserved
21 * memory mappings for firmware loading to suc 21 * memory mappings for firmware loading to succeed
22 * and enable the IPA device. 22 * and enable the IPA device.
23 */ 23 */
24 /delete-node/ &ipa_fw_mem; 24 /delete-node/ &ipa_fw_mem;
25 /delete-node/ &ipa_gsi_mem; 25 /delete-node/ &ipa_gsi_mem;
26 /delete-node/ &gpu_mem; 26 /delete-node/ &gpu_mem;
27 /delete-node/ &adsp_mem; 27 /delete-node/ &adsp_mem;
28 /delete-node/ &wlan_msa_mem; 28 /delete-node/ &wlan_msa_mem;
29 29
30 / { 30 / {
31 model = "Lenovo Yoga C630"; 31 model = "Lenovo Yoga C630";
32 compatible = "lenovo,yoga-c630", "qcom 32 compatible = "lenovo,yoga-c630", "qcom,sdm845";
33 chassis-type = "convertible"; 33 chassis-type = "convertible";
34 34
35 aliases { 35 aliases {
36 serial0 = &uart9; !! 36 hsuart0 = &uart6;
37 serial1 = &uart6; <<
38 }; 37 };
39 38
40 gpio-keys { 39 gpio-keys {
41 compatible = "gpio-keys"; 40 compatible = "gpio-keys";
42 41
43 pinctrl-names = "default"; 42 pinctrl-names = "default";
44 pinctrl-0 = <&lid_pin_active>, 43 pinctrl-0 = <&lid_pin_active>, <&mode_pin_active>;
45 44
46 switch-lid { 45 switch-lid {
47 gpios = <&tlmm 124 GPI 46 gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;
48 linux,input-type = <EV 47 linux,input-type = <EV_SW>;
49 linux,code = <SW_LID>; 48 linux,code = <SW_LID>;
50 wakeup-source; 49 wakeup-source;
51 wakeup-event-action = 50 wakeup-event-action = <EV_ACT_DEASSERTED>;
52 }; 51 };
53 52
54 switch-mode { 53 switch-mode {
55 gpios = <&tlmm 95 GPIO 54 gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
56 linux,input-type = <EV 55 linux,input-type = <EV_SW>;
57 linux,code = <SW_TABLE 56 linux,code = <SW_TABLET_MODE>;
58 }; 57 };
59 }; 58 };
60 59
61 /* Reserved memory changes for IPA */ 60 /* Reserved memory changes for IPA */
62 reserved-memory { 61 reserved-memory {
63 wlan_msa_mem: memory@8c400000 62 wlan_msa_mem: memory@8c400000 {
64 reg = <0 0x8c400000 0 63 reg = <0 0x8c400000 0 0x100000>;
65 no-map; 64 no-map;
66 }; 65 };
67 66
68 gpu_mem: memory@8c515000 { 67 gpu_mem: memory@8c515000 {
69 reg = <0 0x8c515000 0 68 reg = <0 0x8c515000 0 0x2000>;
70 no-map; 69 no-map;
71 }; 70 };
72 71
73 ipa_fw_mem: memory@8c517000 { 72 ipa_fw_mem: memory@8c517000 {
74 reg = <0 0x8c517000 0 73 reg = <0 0x8c517000 0 0x5a000>;
75 no-map; 74 no-map;
76 }; 75 };
77 76
78 adsp_mem: memory@8c600000 { 77 adsp_mem: memory@8c600000 {
79 reg = <0 0x8c600000 0 78 reg = <0 0x8c600000 0 0x1a00000>;
80 no-map; 79 no-map;
81 }; 80 };
82 }; 81 };
83 82
84 sw_edp_1p2: edp-1p2-regulator { <<
85 compatible = "regulator-fixed" <<
86 regulator-name = "sw_edp_1p2"; <<
87 <<
88 regulator-min-microvolt = <120 <<
89 regulator-max-microvolt = <120 <<
90 <<
91 pinctrl-0 = <&sw_edp_1p2_en>; <<
92 pinctrl-names = "default"; <<
93 <<
94 gpio = <&pm8998_gpios 9 GPIO_A <<
95 enable-active-high; <<
96 <<
97 vin-supply = <&vreg_l2a_1p2>; <<
98 }; <<
99 <<
100 sn65dsi86_refclk: sn65dsi86-refclk { 83 sn65dsi86_refclk: sn65dsi86-refclk {
101 compatible = "fixed-clock"; 84 compatible = "fixed-clock";
102 #clock-cells = <0>; 85 #clock-cells = <0>;
103 86
104 clock-frequency = <19200000>; 87 clock-frequency = <19200000>;
105 }; 88 };
106 89
107 vph_pwr: regulator-vph-pwr { <<
108 compatible = "regulator-fixed" <<
109 regulator-name = "vph_pwr"; <<
110 regulator-min-microvolt = <370 <<
111 regulator-max-microvolt = <370 <<
112 }; <<
113 <<
114 vlcm_3v3: regulator-vlcm-3v3 { <<
115 compatible = "regulator-fixed" <<
116 regulator-name = "vlcm_3v3"; <<
117 <<
118 vin-supply = <&vph_pwr>; <<
119 regulator-min-microvolt = <330 <<
120 regulator-max-microvolt = <330 <<
121 <<
122 gpio = <&tlmm 88 GPIO_ACTIVE_H <<
123 enable-active-high; <<
124 }; <<
125 <<
126 backlight: backlight { 90 backlight: backlight {
127 compatible = "pwm-backlight"; 91 compatible = "pwm-backlight";
128 pwms = <&sn65dsi86 1000000>; 92 pwms = <&sn65dsi86 1000000>;
129 enable-gpios = <&tlmm 11 GPIO_ 93 enable-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
130 }; 94 };
131 }; 95 };
132 96
133 &adsp_pas { 97 &adsp_pas {
134 firmware-name = "qcom/sdm850/LENOVO/81 98 firmware-name = "qcom/sdm850/LENOVO/81JL/qcadsp850.mbn";
135 status = "okay"; 99 status = "okay";
136 }; 100 };
137 101
138 &apps_rsc { 102 &apps_rsc {
139 regulators-0 { 103 regulators-0 {
140 compatible = "qcom,pm8998-rpmh 104 compatible = "qcom,pm8998-rpmh-regulators";
141 qcom,pmic-id = "a"; 105 qcom,pmic-id = "a";
142 106
143 vdd-l2-l8-l17-supply = <&vreg_ 107 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
144 vdd-l7-l12-l14-l15-supply = <& 108 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
145 109
146 vreg_s2a_1p125: smps2 { 110 vreg_s2a_1p125: smps2 {
147 }; 111 };
148 112
149 vreg_s3a_1p35: smps3 { 113 vreg_s3a_1p35: smps3 {
150 regulator-min-microvol 114 regulator-min-microvolt = <1352000>;
151 regulator-max-microvol 115 regulator-max-microvolt = <1352000>;
152 regulator-initial-mode 116 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153 }; 117 };
154 118
155 vreg_s4a_1p8: smps4 { 119 vreg_s4a_1p8: smps4 {
156 regulator-min-microvol 120 regulator-min-microvolt = <1800000>;
157 regulator-max-microvol 121 regulator-max-microvolt = <1800000>;
158 regulator-initial-mode 122 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
159 }; 123 };
160 124
161 vreg_s5a_2p04: smps5 { 125 vreg_s5a_2p04: smps5 {
162 regulator-min-microvol 126 regulator-min-microvolt = <2040000>;
163 regulator-max-microvol 127 regulator-max-microvolt = <2040000>;
164 regulator-initial-mode 128 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
165 }; 129 };
166 130
167 vreg_s7a_1p025: smps7 { 131 vreg_s7a_1p025: smps7 {
168 }; 132 };
169 133
170 vdd_qusb_hs0: 134 vdd_qusb_hs0:
171 vdda_hp_pcie_core: 135 vdda_hp_pcie_core:
172 vdda_mipi_csi0_0p9: 136 vdda_mipi_csi0_0p9:
173 vdda_mipi_csi1_0p9: 137 vdda_mipi_csi1_0p9:
174 vdda_mipi_csi2_0p9: 138 vdda_mipi_csi2_0p9:
175 vdda_mipi_dsi0_pll: 139 vdda_mipi_dsi0_pll:
176 vdda_mipi_dsi1_pll: 140 vdda_mipi_dsi1_pll:
177 vdda_qlink_lv: 141 vdda_qlink_lv:
178 vdda_qlink_lv_ck: 142 vdda_qlink_lv_ck:
179 vdda_qrefs_0p875: 143 vdda_qrefs_0p875:
180 vdda_pcie_core: 144 vdda_pcie_core:
181 vdda_pll_cc_ebi01: 145 vdda_pll_cc_ebi01:
182 vdda_pll_cc_ebi23: 146 vdda_pll_cc_ebi23:
183 vdda_sp_sensor: 147 vdda_sp_sensor:
184 vdda_ufs1_core: 148 vdda_ufs1_core:
185 vdda_ufs2_core: 149 vdda_ufs2_core:
186 vdda_usb1_ss_core: 150 vdda_usb1_ss_core:
187 vdda_usb2_ss_core: 151 vdda_usb2_ss_core:
188 vreg_l1a_0p875: ldo1 { 152 vreg_l1a_0p875: ldo1 {
189 regulator-min-microvol 153 regulator-min-microvolt = <880000>;
190 regulator-max-microvol 154 regulator-max-microvolt = <880000>;
191 regulator-initial-mode 155 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
192 }; 156 };
193 157
194 vddpx_10: 158 vddpx_10:
195 vreg_l2a_1p2: ldo2 { 159 vreg_l2a_1p2: ldo2 {
196 regulator-min-microvol 160 regulator-min-microvolt = <1200000>;
197 regulator-max-microvol 161 regulator-max-microvolt = <1200000>;
198 regulator-initial-mode 162 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199 regulator-always-on; 163 regulator-always-on;
200 }; 164 };
201 165
202 vreg_l3a_1p0: ldo3 { 166 vreg_l3a_1p0: ldo3 {
203 }; 167 };
204 168
205 vdd_wcss_cx: 169 vdd_wcss_cx:
206 vdd_wcss_mx: 170 vdd_wcss_mx:
207 vdda_wcss_pll: 171 vdda_wcss_pll:
208 vreg_l5a_0p8: ldo5 { 172 vreg_l5a_0p8: ldo5 {
209 regulator-min-microvol 173 regulator-min-microvolt = <800000>;
210 regulator-max-microvol 174 regulator-max-microvolt = <800000>;
211 regulator-initial-mode 175 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
212 }; 176 };
213 177
214 vddpx_13: 178 vddpx_13:
215 vreg_l6a_1p8: ldo6 { 179 vreg_l6a_1p8: ldo6 {
216 regulator-min-microvol 180 regulator-min-microvolt = <1800000>;
217 regulator-max-microvol 181 regulator-max-microvolt = <1800000>;
218 regulator-initial-mode 182 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219 }; 183 };
220 184
221 vreg_l7a_1p8: ldo7 { 185 vreg_l7a_1p8: ldo7 {
222 regulator-min-microvol 186 regulator-min-microvolt = <1800000>;
223 regulator-max-microvol 187 regulator-max-microvolt = <1800000>;
224 regulator-initial-mode 188 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 }; 189 };
226 190
227 vreg_l8a_1p2: ldo8 { 191 vreg_l8a_1p2: ldo8 {
228 }; 192 };
229 193
230 vreg_l9a_1p8: ldo9 { 194 vreg_l9a_1p8: ldo9 {
231 }; 195 };
232 196
233 vreg_l10a_1p8: ldo10 { 197 vreg_l10a_1p8: ldo10 {
234 }; 198 };
235 199
236 vreg_l11a_1p0: ldo11 { 200 vreg_l11a_1p0: ldo11 {
237 }; 201 };
238 202
239 vdd_qfprom: 203 vdd_qfprom:
240 vdd_qfprom_sp: 204 vdd_qfprom_sp:
241 vdda_apc1_cs_1p8: 205 vdda_apc1_cs_1p8:
242 vdda_gfx_cs_1p8: 206 vdda_gfx_cs_1p8:
243 vdda_qrefs_1p8: 207 vdda_qrefs_1p8:
244 vdda_qusb_hs0_1p8: 208 vdda_qusb_hs0_1p8:
245 vddpx_11: 209 vddpx_11:
246 vreg_l12a_1p8: ldo12 { 210 vreg_l12a_1p8: ldo12 {
247 regulator-min-microvol 211 regulator-min-microvolt = <1800000>;
248 regulator-max-microvol 212 regulator-max-microvolt = <1800000>;
249 regulator-initial-mode 213 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
250 }; 214 };
251 215
252 vddpx_2: 216 vddpx_2:
253 vreg_l13a_2p95: ldo13 { 217 vreg_l13a_2p95: ldo13 {
254 }; 218 };
255 219
256 vreg_l14a_1p88: ldo14 { 220 vreg_l14a_1p88: ldo14 {
257 regulator-min-microvol 221 regulator-min-microvolt = <1880000>;
258 regulator-max-microvol 222 regulator-max-microvolt = <1880000>;
259 regulator-initial-mode 223 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
260 regulator-always-on; 224 regulator-always-on;
261 }; 225 };
262 226
263 vreg_l15a_1p8: ldo15 { 227 vreg_l15a_1p8: ldo15 {
264 }; 228 };
265 229
266 vreg_l16a_2p7: ldo16 { 230 vreg_l16a_2p7: ldo16 {
267 }; 231 };
268 232
269 vreg_l17a_1p3: ldo17 { 233 vreg_l17a_1p3: ldo17 {
270 regulator-min-microvol 234 regulator-min-microvolt = <1304000>;
271 regulator-max-microvol 235 regulator-max-microvolt = <1304000>;
272 regulator-initial-mode 236 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273 }; 237 };
274 238
275 vreg_l18a_2p7: ldo18 { 239 vreg_l18a_2p7: ldo18 {
276 }; 240 };
277 241
278 vreg_l19a_3p0: ldo19 { 242 vreg_l19a_3p0: ldo19 {
279 regulator-min-microvol 243 regulator-min-microvolt = <3100000>;
280 regulator-max-microvol 244 regulator-max-microvolt = <3108000>;
281 regulator-initial-mode 245 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
282 }; 246 };
283 247
284 vreg_l20a_2p95: ldo20 { 248 vreg_l20a_2p95: ldo20 {
285 regulator-min-microvol 249 regulator-min-microvolt = <2960000>;
286 regulator-max-microvol 250 regulator-max-microvolt = <2960000>;
287 regulator-initial-mode 251 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
288 }; 252 };
289 253
290 vreg_l21a_2p95: ldo21 { 254 vreg_l21a_2p95: ldo21 {
291 }; 255 };
292 256
293 vreg_l22a_2p85: ldo22 { 257 vreg_l22a_2p85: ldo22 {
294 }; 258 };
295 259
296 vreg_l23a_3p3: ldo23 { 260 vreg_l23a_3p3: ldo23 {
297 regulator-min-microvol 261 regulator-min-microvolt = <3300000>;
298 regulator-max-microvol 262 regulator-max-microvolt = <3312000>;
299 regulator-initial-mode 263 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
300 }; 264 };
301 265
302 vdda_qusb_hs0_3p1: 266 vdda_qusb_hs0_3p1:
303 vreg_l24a_3p075: ldo24 { 267 vreg_l24a_3p075: ldo24 {
304 regulator-min-microvol 268 regulator-min-microvolt = <3075000>;
305 regulator-max-microvol 269 regulator-max-microvolt = <3083000>;
306 regulator-initial-mode 270 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
307 }; 271 };
308 272
309 vreg_l25a_3p3: ldo25 { 273 vreg_l25a_3p3: ldo25 {
310 regulator-min-microvol 274 regulator-min-microvolt = <3104000>;
311 regulator-max-microvol 275 regulator-max-microvolt = <3112000>;
312 regulator-initial-mode 276 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
313 }; 277 };
314 278
315 vdda_hp_pcie_1p2: 279 vdda_hp_pcie_1p2:
316 vdda_hv_ebi0: 280 vdda_hv_ebi0:
317 vdda_hv_ebi1: 281 vdda_hv_ebi1:
318 vdda_hv_ebi2: 282 vdda_hv_ebi2:
319 vdda_hv_ebi3: 283 vdda_hv_ebi3:
320 vdda_mipi_csi_1p25: 284 vdda_mipi_csi_1p25:
321 vdda_mipi_dsi0_1p2: 285 vdda_mipi_dsi0_1p2:
322 vdda_mipi_dsi1_1p2: 286 vdda_mipi_dsi1_1p2:
323 vdda_pcie_1p2: 287 vdda_pcie_1p2:
324 vdda_ufs1_1p2: 288 vdda_ufs1_1p2:
325 vdda_ufs2_1p2: 289 vdda_ufs2_1p2:
326 vdda_usb1_ss_1p2: 290 vdda_usb1_ss_1p2:
327 vdda_usb2_ss_1p2: 291 vdda_usb2_ss_1p2:
328 vreg_l26a_1p2: ldo26 { 292 vreg_l26a_1p2: ldo26 {
329 regulator-min-microvol 293 regulator-min-microvolt = <1200000>;
330 regulator-max-microvol 294 regulator-max-microvolt = <1208000>;
331 regulator-initial-mode 295 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332 }; 296 };
333 297
334 vreg_l28a_3p0: ldo28 { 298 vreg_l28a_3p0: ldo28 {
335 }; 299 };
336 300
337 vreg_lvs1a_1p8: lvs1 { 301 vreg_lvs1a_1p8: lvs1 {
338 }; 302 };
339 303
340 vreg_lvs2a_1p8: lvs2 { 304 vreg_lvs2a_1p8: lvs2 {
341 }; 305 };
342 }; 306 };
343 }; 307 };
344 308
345 &cdsp_pas { 309 &cdsp_pas {
346 firmware-name = "qcom/sdm850/LENOVO/81 310 firmware-name = "qcom/sdm850/LENOVO/81JL/qccdsp850.mbn";
347 status = "okay"; 311 status = "okay";
348 }; 312 };
349 313
>> 314 &dsi0 {
>> 315 status = "okay";
>> 316 vdda-supply = <&vreg_l26a_1p2>;
>> 317
>> 318 ports {
>> 319 port@1 {
>> 320 endpoint {
>> 321 remote-endpoint = <&sn65dsi86_in_a>;
>> 322 data-lanes = <0 1 2 3>;
>> 323 };
>> 324 };
>> 325 };
>> 326 };
>> 327
>> 328 &dsi0_phy {
>> 329 status = "okay";
>> 330 vdds-supply = <&vreg_l1a_0p875>;
>> 331 };
>> 332
350 &gcc { 333 &gcc {
351 protected-clocks = <GCC_QSPI_CORE_CLK> 334 protected-clocks = <GCC_QSPI_CORE_CLK>,
352 <GCC_QSPI_CORE_CLK_ 335 <GCC_QSPI_CORE_CLK_SRC>,
353 <GCC_QSPI_CNOC_PERI 336 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
354 <GCC_LPASS_Q6_AXI_C 337 <GCC_LPASS_Q6_AXI_CLK>,
355 <GCC_LPASS_SWAY_CLK 338 <GCC_LPASS_SWAY_CLK>;
356 }; 339 };
357 340
358 &gmu { 341 &gmu {
359 status = "okay"; 342 status = "okay";
360 }; 343 };
361 344
362 &gpu { 345 &gpu {
363 status = "okay"; 346 status = "okay";
364 zap-shader { 347 zap-shader {
365 memory-region = <&gpu_mem>; 348 memory-region = <&gpu_mem>;
366 firmware-name = "qcom/sdm850/L 349 firmware-name = "qcom/sdm850/LENOVO/81JL/qcdxkmsuc850.mbn";
367 }; 350 };
368 }; 351 };
369 352
370 &i2c1 { 353 &i2c1 {
371 status = "okay"; 354 status = "okay";
372 clock-frequency = <400000>; 355 clock-frequency = <400000>;
373 <<
374 embedded-controller@70 { <<
375 compatible = "lenovo,yoga-c630 <<
376 reg = <0x70>; <<
377 <<
378 interrupts-extended = <&tlmm 2 <<
379 <<
380 pinctrl-names = "default"; <<
381 pinctrl-0 = <&ec_int_state>; <<
382 <<
383 #address-cells = <1>; <<
384 #size-cells = <0>; <<
385 <<
386 connector@0 { <<
387 compatible = "usb-c-co <<
388 reg = <0>; <<
389 power-role = "dual"; <<
390 data-role = "host"; <<
391 <<
392 ports { <<
393 #address-cells <<
394 #size-cells = <<
395 <<
396 port@0 { <<
397 reg = <<
398 <<
399 ucsi0_ <<
400 <<
401 }; <<
402 }; <<
403 <<
404 port@1 { <<
405 reg = <<
406 <<
407 ucsi0_ <<
408 <<
409 }; <<
410 }; <<
411 <<
412 port@2 { <<
413 reg = <<
414 <<
415 ucsi0_ <<
416 }; <<
417 }; <<
418 }; <<
419 }; <<
420 <<
421 connector@1 { <<
422 compatible = "usb-c-co <<
423 reg = <1>; <<
424 power-role = "dual"; <<
425 data-role = "host"; <<
426 <<
427 /* <<
428 * connected to the on <<
429 * handled by the cont <<
430 */ <<
431 }; <<
432 }; <<
433 }; 356 };
434 357
435 &i2c3 { 358 &i2c3 {
436 status = "okay"; 359 status = "okay";
437 clock-frequency = <400000>; 360 clock-frequency = <400000>;
438 /* Overwrite pinctrl-0 from sdm845.dts 361 /* Overwrite pinctrl-0 from sdm845.dtsi */
439 pinctrl-0 = <&qup_i2c3_default &i2c3_h 362 pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
440 363
441 tsel: hid@15 { 364 tsel: hid@15 {
442 compatible = "hid-over-i2c"; 365 compatible = "hid-over-i2c";
443 reg = <0x15>; 366 reg = <0x15>;
444 hid-descr-addr = <0x1>; 367 hid-descr-addr = <0x1>;
445 368
446 interrupts-extended = <&tlmm 3 369 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
447 }; 370 };
448 371
449 tsc2: hid@2c { 372 tsc2: hid@2c {
450 compatible = "hid-over-i2c"; 373 compatible = "hid-over-i2c";
451 reg = <0x2c>; 374 reg = <0x2c>;
452 hid-descr-addr = <0x20>; 375 hid-descr-addr = <0x20>;
453 376
454 interrupts-extended = <&tlmm 3 377 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
455 <<
456 wakeup-source; <<
457 }; 378 };
458 }; 379 };
459 380
460 &i2c5 { 381 &i2c5 {
461 status = "okay"; 382 status = "okay";
462 clock-frequency = <400000>; 383 clock-frequency = <400000>;
463 384
464 tsc1: hid@10 { 385 tsc1: hid@10 {
465 compatible = "hid-over-i2c"; 386 compatible = "hid-over-i2c";
466 reg = <0x10>; 387 reg = <0x10>;
467 hid-descr-addr = <0x1>; 388 hid-descr-addr = <0x1>;
468 389
469 interrupts-extended = <&tlmm 1 390 interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>;
470 391
471 pinctrl-names = "default"; 392 pinctrl-names = "default";
472 pinctrl-0 = <&i2c5_hid_active> 393 pinctrl-0 = <&i2c5_hid_active>;
473 <<
474 wakeup-source; <<
475 }; 394 };
476 }; 395 };
477 396
478 &i2c10 { 397 &i2c10 {
479 status = "okay"; 398 status = "okay";
480 clock-frequency = <400000>; 399 clock-frequency = <400000>;
481 400
482 sn65dsi86: bridge@2c { 401 sn65dsi86: bridge@2c {
483 compatible = "ti,sn65dsi86"; 402 compatible = "ti,sn65dsi86";
484 reg = <0x2c>; 403 reg = <0x2c>;
485 pinctrl-names = "default"; 404 pinctrl-names = "default";
486 pinctrl-0 = <&sn65dsi86_pin_ac 405 pinctrl-0 = <&sn65dsi86_pin_active>;
487 406
488 enable-gpios = <&tlmm 96 GPIO_ 407 enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
489 408
490 vcca-supply = <&sw_edp_1p2>; <<
491 vcc-supply = <&sw_edp_1p2>; <<
492 vpll-supply = <&vreg_l14a_1p88 409 vpll-supply = <&vreg_l14a_1p88>;
493 vccio-supply = <&vreg_l14a_1p8 410 vccio-supply = <&vreg_l14a_1p88>;
494 411
495 clocks = <&sn65dsi86_refclk>; 412 clocks = <&sn65dsi86_refclk>;
496 clock-names = "refclk"; 413 clock-names = "refclk";
497 414
498 no-hpd; 415 no-hpd;
499 #pwm-cells = <1>; 416 #pwm-cells = <1>;
500 417
501 ports { 418 ports {
502 #address-cells = <1>; 419 #address-cells = <1>;
503 #size-cells = <0>; 420 #size-cells = <0>;
504 421
505 port@0 { 422 port@0 {
506 reg = <0>; 423 reg = <0>;
507 sn65dsi86_in_a 424 sn65dsi86_in_a: endpoint {
508 remote !! 425 remote-endpoint = <&dsi0_out>;
509 }; 426 };
510 }; 427 };
511 428
512 port@1 { 429 port@1 {
513 reg = <1>; 430 reg = <1>;
514 sn65dsi86_out: 431 sn65dsi86_out: endpoint {
515 remote 432 remote-endpoint = <&panel_in_edp>;
516 }; 433 };
517 }; 434 };
518 }; 435 };
519 436
520 aux-bus { 437 aux-bus {
521 panel: panel { 438 panel: panel {
522 compatible = " 439 compatible = "boe,nv133fhm-n61";
523 backlight = <& 440 backlight = <&backlight>;
524 power-supply = <<
525 441
526 port { 442 port {
527 panel_ 443 panel_in_edp: endpoint {
528 444 remote-endpoint = <&sn65dsi86_out>;
529 }; 445 };
530 }; 446 };
531 }; 447 };
532 }; 448 };
533 }; 449 };
534 }; 450 };
535 451
536 &i2c11 { 452 &i2c11 {
537 status = "okay"; 453 status = "okay";
538 clock-frequency = <400000>; 454 clock-frequency = <400000>;
539 455
540 ecsh: hid@5c { 456 ecsh: hid@5c {
541 compatible = "hid-over-i2c"; 457 compatible = "hid-over-i2c";
542 reg = <0x5c>; 458 reg = <0x5c>;
543 hid-descr-addr = <0x1>; 459 hid-descr-addr = <0x1>;
544 460
545 interrupts-extended = <&tlmm 9 461 interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
546 462
547 pinctrl-names = "default"; 463 pinctrl-names = "default";
548 pinctrl-0 = <&i2c11_hid_active 464 pinctrl-0 = <&i2c11_hid_active>;
549 <<
550 wakeup-source; <<
551 }; 465 };
552 }; 466 };
553 467
554 &ipa { 468 &ipa {
555 qcom,gsi-loader = "self"; 469 qcom,gsi-loader = "self";
556 memory-region = <&ipa_fw_mem>; 470 memory-region = <&ipa_fw_mem>;
557 firmware-name = "qcom/sdm850/LENOVO/81 <<
558 status = "okay"; 471 status = "okay";
559 }; 472 };
560 473
561 &mdss { 474 &mdss {
562 status = "okay"; 475 status = "okay";
563 }; 476 };
564 477
565 &mdss_dsi0 { <<
566 status = "okay"; <<
567 vdda-supply = <&vreg_l26a_1p2>; <<
568 <<
569 ports { <<
570 port@1 { <<
571 endpoint { <<
572 remote-endpoin <<
573 data-lanes = < <<
574 }; <<
575 }; <<
576 }; <<
577 }; <<
578 <<
579 &mdss_dsi0_phy { <<
580 status = "okay"; <<
581 vdds-supply = <&vreg_l1a_0p875>; <<
582 }; <<
583 <<
584 &mss_pil { 478 &mss_pil {
585 status = "okay"; 479 status = "okay";
586 firmware-name = "qcom/sdm850/LENOVO/81 480 firmware-name = "qcom/sdm850/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/sdm850/LENOVO/81JL/qcdsp2850.mbn";
587 }; 481 };
588 482
589 &pm8998_gpios { <<
590 /* This pin is pulled down by a fixed <<
591 sw_edp_1p2_en: pm8998-gpio9-state { <<
592 pins = "gpio9"; <<
593 function = "normal"; <<
594 bias-disable; <<
595 qcom,drive-strength = <0>; <<
596 }; <<
597 }; <<
598 <<
599 &qup_i2c10_default { 483 &qup_i2c10_default {
600 drive-strength = <2>; 484 drive-strength = <2>;
601 bias-disable; 485 bias-disable;
602 }; 486 };
603 487
604 &qup_i2c12_default { 488 &qup_i2c12_default {
605 drive-strength = <2>; 489 drive-strength = <2>;
606 bias-disable; 490 bias-disable;
607 }; 491 };
608 492
609 &qupv3_id_0 { 493 &qupv3_id_0 {
610 status = "okay"; 494 status = "okay";
611 }; 495 };
612 496
613 &qupv3_id_1 { 497 &qupv3_id_1 {
614 status = "okay"; 498 status = "okay";
615 }; 499 };
616 500
617 &q6asmdai { 501 &q6asmdai {
618 dai@0 { 502 dai@0 {
619 reg = <0>; 503 reg = <0>;
620 }; 504 };
621 505
622 dai@1 { 506 dai@1 {
623 reg = <1>; 507 reg = <1>;
624 }; 508 };
625 509
626 dai@2 { 510 dai@2 {
627 reg = <2>; 511 reg = <2>;
628 }; 512 };
629 }; 513 };
630 514
631 &sound { 515 &sound {
632 compatible = "lenovo,yoga-c630-sndcard 516 compatible = "lenovo,yoga-c630-sndcard", "qcom,sdm845-sndcard";
633 model = "Lenovo-YOGA-C630-13Q50"; 517 model = "Lenovo-YOGA-C630-13Q50";
634 518
635 audio-routing = 519 audio-routing =
636 "RX_BIAS", "MCLK", 520 "RX_BIAS", "MCLK",
637 "AMIC2", "MIC BIAS2", 521 "AMIC2", "MIC BIAS2",
638 "SpkrLeft IN", "SPK1 OUT", 522 "SpkrLeft IN", "SPK1 OUT",
639 "SpkrRight IN", "SPK2 OUT", 523 "SpkrRight IN", "SPK2 OUT",
640 "MM_DL1", "MultiMedia1 Playba 524 "MM_DL1", "MultiMedia1 Playback",
641 "MM_DL3", "MultiMedia3 Playba 525 "MM_DL3", "MultiMedia3 Playback",
642 "MultiMedia2 Capture", "MM_UL2 526 "MultiMedia2 Capture", "MM_UL2";
643 527
644 mm1-dai-link { 528 mm1-dai-link {
645 link-name = "MultiMedia1"; 529 link-name = "MultiMedia1";
646 cpu { 530 cpu {
647 sound-dai = <&q6asmdai 531 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
648 }; 532 };
649 }; 533 };
650 534
651 mm2-dai-link { 535 mm2-dai-link {
652 link-name = "MultiMedia2"; 536 link-name = "MultiMedia2";
653 cpu { 537 cpu {
654 sound-dai = <&q6asmdai 538 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
655 }; 539 };
656 }; 540 };
657 541
658 mm3-dai-link { 542 mm3-dai-link {
659 link-name = "MultiMedia3"; 543 link-name = "MultiMedia3";
660 cpu { 544 cpu {
661 sound-dai = <&q6asmdai 545 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
662 }; 546 };
663 }; 547 };
664 548
665 slim-dai-link { 549 slim-dai-link {
666 link-name = "SLIM Playback"; 550 link-name = "SLIM Playback";
667 cpu { 551 cpu {
668 sound-dai = <&q6afedai 552 sound-dai = <&q6afedai SLIMBUS_0_RX>;
669 }; 553 };
670 554
671 platform { 555 platform {
672 sound-dai = <&q6routin 556 sound-dai = <&q6routing>;
673 }; 557 };
674 558
675 codec { 559 codec {
676 sound-dai = <&left_spk 560 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
677 }; 561 };
678 }; 562 };
679 563
680 slimcap-dai-link { 564 slimcap-dai-link {
681 link-name = "SLIM Capture"; 565 link-name = "SLIM Capture";
682 cpu { 566 cpu {
683 sound-dai = <&q6afedai 567 sound-dai = <&q6afedai SLIMBUS_0_TX>;
684 }; 568 };
685 569
686 platform { 570 platform {
687 sound-dai = <&q6routin 571 sound-dai = <&q6routing>;
688 }; 572 };
689 573
690 codec { 574 codec {
691 sound-dai = <&wcd9340 575 sound-dai = <&wcd9340 1>;
692 }; 576 };
693 }; 577 };
694 578
695 slim-wcd-dai-link { 579 slim-wcd-dai-link {
696 link-name = "SLIM WCD Playback 580 link-name = "SLIM WCD Playback";
697 cpu { 581 cpu {
698 sound-dai = <&q6afedai 582 sound-dai = <&q6afedai SLIMBUS_1_RX>;
699 }; 583 };
700 584
701 platform { 585 platform {
702 sound-dai = <&q6routin 586 sound-dai = <&q6routing>;
703 }; 587 };
704 588
705 codec { 589 codec {
706 sound-dai = <&wcd9340 590 sound-dai = <&wcd9340 2>;
707 }; 591 };
708 }; 592 };
709 }; 593 };
710 594
711 &tlmm { 595 &tlmm {
712 gpio-reserved-ranges = <0 4>, <81 4>; 596 gpio-reserved-ranges = <0 4>, <81 4>;
713 597
714 sn65dsi86_pin_active: sn65dsi86-enable 598 sn65dsi86_pin_active: sn65dsi86-enable-state {
715 pins = "gpio96"; 599 pins = "gpio96";
716 function = "gpio"; 600 function = "gpio";
717 drive-strength = <2>; 601 drive-strength = <2>;
718 bias-disable; 602 bias-disable;
719 }; 603 };
720 604
721 i2c3_hid_active: i2c2-hid-active-state 605 i2c3_hid_active: i2c2-hid-active-state {
722 pins = "gpio37"; 606 pins = "gpio37";
723 function = "gpio"; 607 function = "gpio";
724 608
>> 609 input-enable;
725 bias-pull-up; 610 bias-pull-up;
726 drive-strength = <2>; 611 drive-strength = <2>;
727 }; 612 };
728 613
729 i2c5_hid_active: i2c5-hid-active-state 614 i2c5_hid_active: i2c5-hid-active-state {
730 pins = "gpio125"; 615 pins = "gpio125";
731 function = "gpio"; 616 function = "gpio";
732 617
>> 618 input-enable;
733 bias-pull-up; 619 bias-pull-up;
734 drive-strength = <2>; 620 drive-strength = <2>;
735 }; 621 };
736 622
737 i2c11_hid_active: i2c11-hid-active-sta 623 i2c11_hid_active: i2c11-hid-active-state {
738 pins = "gpio92"; 624 pins = "gpio92";
739 function = "gpio"; 625 function = "gpio";
740 626
>> 627 input-enable;
741 bias-pull-up; 628 bias-pull-up;
742 drive-strength = <2>; 629 drive-strength = <2>;
743 }; 630 };
744 631
745 lid_pin_active: lid-pin-state { 632 lid_pin_active: lid-pin-state {
746 pins = "gpio124"; 633 pins = "gpio124";
747 function = "gpio"; 634 function = "gpio";
748 635
>> 636 input-enable;
749 bias-disable; 637 bias-disable;
750 }; 638 };
751 639
752 mode_pin_active: mode-pin-state { 640 mode_pin_active: mode-pin-state {
753 pins = "gpio95"; 641 pins = "gpio95";
754 function = "gpio"; 642 function = "gpio";
755 643
756 bias-disable; !! 644 input-enable;
757 }; <<
758 <<
759 ec_int_state: ec-int-state { <<
760 pins = "gpio20"; <<
761 function = "gpio"; <<
762 <<
763 bias-disable; 645 bias-disable;
764 }; 646 };
765 }; 647 };
766 648
767 &uart6 { 649 &uart6 {
768 pinctrl-names = "default"; 650 pinctrl-names = "default";
769 pinctrl-0 = <&qup_uart6_4pin>; 651 pinctrl-0 = <&qup_uart6_4pin>;
770 status = "okay"; 652 status = "okay";
771 653
772 bluetooth { 654 bluetooth {
773 compatible = "qcom,wcn3990-bt" 655 compatible = "qcom,wcn3990-bt";
774 656
775 vddio-supply = <&vreg_s4a_1p8> 657 vddio-supply = <&vreg_s4a_1p8>;
776 vddxo-supply = <&vreg_l7a_1p8> 658 vddxo-supply = <&vreg_l7a_1p8>;
777 vddrf-supply = <&vreg_l17a_1p3 659 vddrf-supply = <&vreg_l17a_1p3>;
778 vddch0-supply = <&vreg_l25a_3p 660 vddch0-supply = <&vreg_l25a_3p3>;
779 vddch1-supply = <&vreg_l23a_3p 661 vddch1-supply = <&vreg_l23a_3p3>;
780 max-speed = <3200000>; 662 max-speed = <3200000>;
781 }; 663 };
782 }; 664 };
783 665
784 &uart9 { <<
785 status = "okay"; <<
786 }; <<
787 <<
788 &ufs_mem_hc { 666 &ufs_mem_hc {
789 status = "okay"; 667 status = "okay";
790 668
791 reset-gpios = <&tlmm 150 GPIO_ACTIVE_L 669 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
792 670
793 vcc-supply = <&vreg_l20a_2p95>; 671 vcc-supply = <&vreg_l20a_2p95>;
794 vcc-max-microamp = <600000>; 672 vcc-max-microamp = <600000>;
795 }; 673 };
796 674
797 &ufs_mem_phy { 675 &ufs_mem_phy {
798 status = "okay"; 676 status = "okay";
799 677
800 vdda-phy-supply = <&vdda_ufs1_core>; 678 vdda-phy-supply = <&vdda_ufs1_core>;
801 vdda-pll-supply = <&vdda_ufs1_1p2>; 679 vdda-pll-supply = <&vdda_ufs1_1p2>;
802 }; 680 };
803 681
804 &usb_1 { 682 &usb_1 {
805 status = "okay"; 683 status = "okay";
806 }; 684 };
807 685
808 &usb_1_dwc3 { 686 &usb_1_dwc3 {
809 dr_mode = "host"; 687 dr_mode = "host";
810 }; 688 };
811 689
812 &usb_1_dwc3_hs { <<
813 remote-endpoint = <&ucsi0_hs_in>; <<
814 }; <<
815 <<
816 &usb_1_hsphy { 690 &usb_1_hsphy {
817 status = "okay"; 691 status = "okay";
818 692
819 vdd-supply = <&vdda_usb1_ss_core>; 693 vdd-supply = <&vdda_usb1_ss_core>;
820 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 694 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
821 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 695 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
822 696
823 qcom,imp-res-offset-value = <8>; 697 qcom,imp-res-offset-value = <8>;
824 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 698 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
825 qcom,preemphasis-level = <QUSB2_V2_PRE 699 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
826 qcom,preemphasis-width = <QUSB2_V2_PRE 700 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
827 }; 701 };
828 702
829 &usb_1_qmpphy { 703 &usb_1_qmpphy {
830 status = "okay"; 704 status = "okay";
831 705
832 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 706 vdda-phy-supply = <&vdda_usb1_ss_1p2>;
833 vdda-pll-supply = <&vdda_usb1_ss_core> 707 vdda-pll-supply = <&vdda_usb1_ss_core>;
834 }; 708 };
835 709
836 &usb_1_qmpphy_out { <<
837 remote-endpoint = <&ucsi0_ss_in>; <<
838 }; <<
839 <<
840 &usb_2 { 710 &usb_2 {
841 status = "okay"; 711 status = "okay";
842 }; 712 };
843 713
844 &usb_2_dwc3 { 714 &usb_2_dwc3 {
845 dr_mode = "host"; 715 dr_mode = "host";
846 }; 716 };
847 717
848 &usb_2_hsphy { 718 &usb_2_hsphy {
849 status = "okay"; 719 status = "okay";
850 720
851 vdd-supply = <&vdda_usb2_ss_core>; 721 vdd-supply = <&vdda_usb2_ss_core>;
852 vdda-pll-supply = <&vdda_qusb_hs0_1p8> 722 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
853 vdda-phy-dpdm-supply = <&vdda_qusb_hs0 723 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
854 724
855 qcom,imp-res-offset-value = <8>; 725 qcom,imp-res-offset-value = <8>;
856 qcom,hstx-trim-value = <QUSB2_V2_HSTX_ 726 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
857 }; 727 };
858 728
859 &usb_2_qmpphy { 729 &usb_2_qmpphy {
860 status = "okay"; 730 status = "okay";
861 731
862 vdda-phy-supply = <&vdda_usb2_ss_1p2>; 732 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
863 vdda-pll-supply = <&vdda_usb2_ss_core> 733 vdda-pll-supply = <&vdda_usb2_ss_core>;
864 }; 734 };
865 735
866 &venus { 736 &venus {
867 firmware-name = "qcom/sdm850/LENOVO/81 737 firmware-name = "qcom/sdm850/LENOVO/81JL/qcvss850.mbn";
868 status = "okay"; 738 status = "okay";
869 }; 739 };
870 740
871 &wcd9340 { 741 &wcd9340 {
872 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HI 742 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
873 vdd-buck-supply = <&vreg_s4a_1p8>; 743 vdd-buck-supply = <&vreg_s4a_1p8>;
874 vdd-buck-sido-supply = <&vreg_s4a_1p8> 744 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
875 vdd-tx-supply = <&vreg_s4a_1p8>; 745 vdd-tx-supply = <&vreg_s4a_1p8>;
876 vdd-rx-supply = <&vreg_s4a_1p8>; 746 vdd-rx-supply = <&vreg_s4a_1p8>;
877 vdd-io-supply = <&vreg_s4a_1p8>; 747 vdd-io-supply = <&vreg_s4a_1p8>;
878 qcom,mbhc-buttons-vthreshold-microvolt 748 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
879 qcom,mbhc-headset-vthreshold-microvolt 749 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
880 qcom,mbhc-headphone-vthreshold-microvo 750 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
881 751
882 swm: soundwire@c85 { !! 752 swm: swm@c85 {
883 left_spkr: speaker@0,3 { 753 left_spkr: speaker@0,3 {
884 compatible = "sdw10217 754 compatible = "sdw10217211000";
885 reg = <0 3>; 755 reg = <0 3>;
886 powerdown-gpios = <&wc 756 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_LOW>;
887 #thermal-sensor-cells 757 #thermal-sensor-cells = <0>;
888 sound-name-prefix = "S 758 sound-name-prefix = "SpkrLeft";
889 #sound-dai-cells = <0> 759 #sound-dai-cells = <0>;
890 }; 760 };
891 761
892 right_spkr: speaker@0,4 { 762 right_spkr: speaker@0,4 {
893 compatible = "sdw10217 763 compatible = "sdw10217211000";
894 powerdown-gpios = <&wc 764 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_LOW>;
895 reg = <0 4>; 765 reg = <0 4>;
896 #thermal-sensor-cells 766 #thermal-sensor-cells = <0>;
897 sound-name-prefix = "S 767 sound-name-prefix = "SpkrRight";
898 #sound-dai-cells = <0> 768 #sound-dai-cells = <0>;
899 }; 769 };
900 }; 770 };
901 }; 771 };
902 772
903 &wifi { 773 &wifi {
904 status = "okay"; 774 status = "okay";
905 775
906 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8> 776 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
907 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 777 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
908 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 778 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
909 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 779 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
910 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; 780 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
911 781
912 qcom,snoc-host-cap-8bit-quirk; 782 qcom,snoc-host-cap-8bit-quirk;
913 qcom,ath10k-calibration-variant = "Len <<
914 }; 783 };
915 784
916 &crypto { 785 &crypto {
917 /* FIXME: qce_start triggers an SError 786 /* FIXME: qce_start triggers an SError */
918 status = "disabled"; !! 787 status = "disable";
919 }; 788 };
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