1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 /* 2 /* 3 * Copyright (c) 2021, Iskren Chernev <iskren.c 3 * Copyright (c) 2021, Iskren Chernev <iskren.chernev@gmail.com> 4 */ 4 */ 5 5 6 /dts-v1/; 6 /dts-v1/; 7 7 8 #include "sm4250.dtsi" 8 #include "sm4250.dtsi" 9 9 10 / { 10 / { 11 model = "OnePlus Nord N100"; 11 model = "OnePlus Nord N100"; 12 compatible = "oneplus,billie2", "qcom, 12 compatible = "oneplus,billie2", "qcom,sm4250"; 13 13 14 /* required for bootloader to select c 14 /* required for bootloader to select correct board */ 15 qcom,msm-id = <0x1a1 0x10000 0x1bc 0x1 15 qcom,msm-id = <0x1a1 0x10000 0x1bc 0x10000>; 16 qcom,board-id = <0x1000b 0x00>; 16 qcom,board-id = <0x1000b 0x00>; 17 17 18 aliases { 18 aliases { 19 }; 19 }; 20 20 21 chosen { 21 chosen { 22 #address-cells = <2>; 22 #address-cells = <2>; 23 #size-cells = <2>; 23 #size-cells = <2>; 24 ranges; 24 ranges; 25 25 26 stdout-path = "framebuffer0"; 26 stdout-path = "framebuffer0"; 27 27 28 framebuffer0: framebuffer@9d40 28 framebuffer0: framebuffer@9d400000 { 29 compatible = "simple-f 29 compatible = "simple-framebuffer"; 30 reg = <0 0x5c000000 0 30 reg = <0 0x5c000000 0 (1600 * 720 * 4)>; 31 width = <720>; 31 width = <720>; 32 height = <1600>; 32 height = <1600>; 33 stride = <(720 * 4)>; 33 stride = <(720 * 4)>; 34 format = "a8r8g8b8"; 34 format = "a8r8g8b8"; 35 }; 35 }; 36 }; 36 }; 37 }; 37 }; 38 38 39 &reserved_memory { 39 &reserved_memory { 40 bootloader_log_mem: memory@5fff7000 { 40 bootloader_log_mem: memory@5fff7000 { 41 reg = <0x0 0x5fff7000 0x0 0x80 41 reg = <0x0 0x5fff7000 0x0 0x8000>; 42 no-map; 42 no-map; 43 }; 43 }; 44 44 45 ramoops@cbe00000 { 45 ramoops@cbe00000 { 46 compatible = "ramoops"; 46 compatible = "ramoops"; 47 reg = <0x0 0xcbe00000 0x0 0x40 47 reg = <0x0 0xcbe00000 0x0 0x400000>; 48 record-size = <0x40000>; 48 record-size = <0x40000>; 49 pmsg-size = <0x200000>; 49 pmsg-size = <0x200000>; 50 console-size = <0x40000>; 50 console-size = <0x40000>; 51 ftrace-size = <0x40000>; 51 ftrace-size = <0x40000>; 52 }; 52 }; 53 53 54 param_mem: memory@cc200000 { 54 param_mem: memory@cc200000 { 55 reg = <0x0 0xcc200000 0x0 0x10 55 reg = <0x0 0xcc200000 0x0 0x100000>; 56 no-map; 56 no-map; 57 }; 57 }; 58 58 59 mtp_mem: memory@cc300000 { 59 mtp_mem: memory@cc300000 { 60 reg = <0x00 0xcc300000 0x00 0x 60 reg = <0x00 0xcc300000 0x00 0xb00000>; 61 no-map; 61 no-map; 62 }; 62 }; 63 }; 63 }; 64 64 65 &rpm_requests { 65 &rpm_requests { 66 regulators-0 { 66 regulators-0 { 67 compatible = "qcom,rpm-pm6125- 67 compatible = "qcom,rpm-pm6125-regulators"; 68 68 69 vreg_s6a: s6 { 69 vreg_s6a: s6 { 70 regulator-min-microvol 70 regulator-min-microvolt = <320000>; 71 regulator-max-microvol 71 regulator-max-microvolt = <1456000>; 72 }; 72 }; 73 73 74 vreg_s7a: s7 { 74 vreg_s7a: s7 { 75 regulator-min-microvol 75 regulator-min-microvolt = <1280000>; 76 regulator-max-microvol 76 regulator-max-microvolt = <2040000>; 77 }; 77 }; 78 78 79 vreg_s8a: s8 { 79 vreg_s8a: s8 { 80 regulator-min-microvol 80 regulator-min-microvolt = <1064000>; 81 regulator-max-microvol 81 regulator-max-microvolt = <1304000>; 82 }; 82 }; 83 83 84 vreg_l1a: l1 { 84 vreg_l1a: l1 { 85 regulator-min-microvol 85 regulator-min-microvolt = <952000>; 86 regulator-max-microvol 86 regulator-max-microvolt = <1152000>; 87 }; 87 }; 88 88 89 vreg_l4a: l4 { 89 vreg_l4a: l4 { 90 regulator-min-microvol 90 regulator-min-microvolt = <488000>; 91 regulator-max-microvol 91 regulator-max-microvolt = <1000000>; 92 }; 92 }; 93 93 94 vreg_l5a: l5 { 94 vreg_l5a: l5 { 95 regulator-min-microvol 95 regulator-min-microvolt = <1648000>; 96 regulator-max-microvol 96 regulator-max-microvolt = <3056000>; 97 }; 97 }; 98 98 99 vreg_l6a: l6 { 99 vreg_l6a: l6 { 100 regulator-min-microvol 100 regulator-min-microvolt = <576000>; 101 regulator-max-microvol 101 regulator-max-microvolt = <656000>; 102 }; 102 }; 103 103 104 vreg_l7a: l7 { 104 vreg_l7a: l7 { 105 regulator-min-microvol 105 regulator-min-microvolt = <1200000>; 106 regulator-max-microvol 106 regulator-max-microvolt = <1304000>; 107 }; 107 }; 108 108 109 vreg_l8a: l8 { 109 vreg_l8a: l8 { 110 regulator-min-microvol 110 regulator-min-microvolt = <400000>; 111 regulator-max-microvol 111 regulator-max-microvolt = <728000>; 112 }; 112 }; 113 113 114 vreg_l9a: l9 { 114 vreg_l9a: l9 { 115 regulator-min-microvol 115 regulator-min-microvolt = <1800000>; 116 regulator-max-microvol 116 regulator-max-microvolt = <2000000>; 117 }; 117 }; 118 118 119 vreg_l10a: l10 { 119 vreg_l10a: l10 { 120 regulator-min-microvol 120 regulator-min-microvolt = <1704000>; 121 regulator-max-microvol 121 regulator-max-microvolt = <1904000>; 122 }; 122 }; 123 123 124 vreg_l11a: l11 { 124 vreg_l11a: l11 { 125 regulator-min-microvol 125 regulator-min-microvolt = <1704000>; 126 regulator-max-microvol 126 regulator-max-microvolt = <1952000>; 127 }; 127 }; 128 128 129 vreg_l12a: l12 { 129 vreg_l12a: l12 { 130 regulator-min-microvol 130 regulator-min-microvolt = <1624000>; 131 regulator-max-microvol 131 regulator-max-microvolt = <1984000>; 132 }; 132 }; 133 133 134 vreg_l13a: l13 { 134 vreg_l13a: l13 { 135 regulator-min-microvol 135 regulator-min-microvolt = <1504000>; 136 regulator-max-microvol 136 regulator-max-microvolt = <1952000>; 137 }; 137 }; 138 138 139 vreg_l14a: l14 { 139 vreg_l14a: l14 { 140 regulator-min-microvol 140 regulator-min-microvolt = <1704000>; 141 regulator-max-microvol 141 regulator-max-microvolt = <1904000>; 142 }; 142 }; 143 143 144 vreg_l15a: l15 { 144 vreg_l15a: l15 { 145 regulator-min-microvol 145 regulator-min-microvolt = <2920000>; 146 regulator-max-microvol 146 regulator-max-microvolt = <3232000>; 147 }; 147 }; 148 148 149 vreg_l16a: l16 { 149 vreg_l16a: l16 { 150 regulator-min-microvol 150 regulator-min-microvolt = <1704000>; 151 regulator-max-microvol 151 regulator-max-microvolt = <1904000>; 152 }; 152 }; 153 153 154 vreg_l17a: l17 { 154 vreg_l17a: l17 { 155 regulator-min-microvol 155 regulator-min-microvolt = <1152000>; 156 regulator-max-microvol 156 regulator-max-microvolt = <1304000>; 157 }; 157 }; 158 158 159 vreg_l18a: l18 { 159 vreg_l18a: l18 { 160 regulator-min-microvol 160 regulator-min-microvolt = <1104000>; 161 regulator-max-microvol 161 regulator-max-microvolt = <1304000>; 162 }; 162 }; 163 163 164 vreg_l19a: l19 { 164 vreg_l19a: l19 { 165 regulator-min-microvol 165 regulator-min-microvolt = <1624000>; 166 regulator-max-microvol 166 regulator-max-microvolt = <3304000>; 167 }; 167 }; 168 168 169 vreg_l20a: l20 { 169 vreg_l20a: l20 { 170 regulator-min-microvol 170 regulator-min-microvolt = <1624000>; 171 regulator-max-microvol 171 regulator-max-microvolt = <3304000>; 172 }; 172 }; 173 173 174 vreg_l21a: l21 { 174 vreg_l21a: l21 { 175 regulator-min-microvol 175 regulator-min-microvolt = <2400000>; 176 regulator-max-microvol 176 regulator-max-microvolt = <3544000>; 177 }; 177 }; 178 178 179 vreg_l22a: l22 { 179 vreg_l22a: l22 { 180 regulator-min-microvol 180 regulator-min-microvolt = <2952000>; 181 regulator-max-microvol 181 regulator-max-microvolt = <3304000>; 182 }; 182 }; 183 183 184 vreg_l23a: l23 { 184 vreg_l23a: l23 { 185 regulator-min-microvol 185 regulator-min-microvolt = <3296000>; 186 regulator-max-microvol 186 regulator-max-microvolt = <3304000>; 187 }; 187 }; 188 188 189 vreg_l24a: l24 { 189 vreg_l24a: l24 { 190 regulator-min-microvol 190 regulator-min-microvolt = <2704000>; 191 regulator-max-microvol 191 regulator-max-microvolt = <3544000>; 192 }; 192 }; 193 }; 193 }; 194 }; 194 }; 195 195 196 &sleep_clk { 196 &sleep_clk { 197 clock-frequency = <32764>; 197 clock-frequency = <32764>; 198 }; 198 }; 199 199 200 &sdhc_2 { 200 &sdhc_2 { 201 vmmc-supply = <&vreg_l22a>; 201 vmmc-supply = <&vreg_l22a>; 202 vqmmc-supply = <&vreg_l5a>; 202 vqmmc-supply = <&vreg_l5a>; 203 203 204 cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH> 204 cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>; 205 pinctrl-names = "default", "sleep"; 205 pinctrl-names = "default", "sleep"; 206 pinctrl-0 = <&sdc2_state_on &sdc2_card 206 pinctrl-0 = <&sdc2_state_on &sdc2_card_det_n>; 207 pinctrl-1 = <&sdc2_state_off &sdc2_car 207 pinctrl-1 = <&sdc2_state_off &sdc2_card_det_n>; 208 208 209 status = "okay"; 209 status = "okay"; 210 }; 210 }; 211 211 212 &tlmm { 212 &tlmm { 213 gpio-reserved-ranges = <14 4>; 213 gpio-reserved-ranges = <14 4>; 214 214 215 sdc2_card_det_n: sd-card-det-n-state { 215 sdc2_card_det_n: sd-card-det-n-state { 216 pins = "gpio88"; 216 pins = "gpio88"; 217 function = "gpio"; 217 function = "gpio"; 218 drive-strength = <2>; 218 drive-strength = <2>; 219 bias-pull-up; 219 bias-pull-up; 220 }; 220 }; 221 }; 221 }; 222 222 223 &ufs_mem_hc { 223 &ufs_mem_hc { 224 vcc-supply = <&vreg_l24a>; 224 vcc-supply = <&vreg_l24a>; 225 vcc-max-microamp = <600000>; 225 vcc-max-microamp = <600000>; 226 vccq2-supply = <&vreg_l11a>; 226 vccq2-supply = <&vreg_l11a>; 227 vccq2-max-microamp = <600000>; 227 vccq2-max-microamp = <600000>; 228 vdd-hba-supply = <&vreg_l18a>; << 229 status = "okay"; 228 status = "okay"; 230 }; 229 }; 231 230 232 &ufs_mem_phy { 231 &ufs_mem_phy { 233 vdda-phy-supply = <&vreg_l4a>; 232 vdda-phy-supply = <&vreg_l4a>; 234 vdda-pll-supply = <&vreg_l12a>; 233 vdda-pll-supply = <&vreg_l12a>; >> 234 vddp-ref-clk-supply = <&vreg_l18a>; 235 status = "okay"; 235 status = "okay"; 236 }; 236 }; 237 237 238 &usb { 238 &usb { 239 status = "okay"; 239 status = "okay"; 240 }; 240 }; 241 241 242 &usb_dwc3 { 242 &usb_dwc3 { 243 /delete-property/ usb-role-switch; << 244 maximum-speed = "high-speed"; 243 maximum-speed = "high-speed"; 245 dr_mode = "peripheral"; 244 dr_mode = "peripheral"; 246 245 247 phys = <&usb_hsphy>; 246 phys = <&usb_hsphy>; 248 phy-names = "usb2-phy"; 247 phy-names = "usb2-phy"; 249 }; 248 }; 250 249 251 &usb_hsphy { 250 &usb_hsphy { 252 vdd-supply = <&vreg_l4a>; 251 vdd-supply = <&vreg_l4a>; 253 vdda-pll-supply = <&vreg_l12a>; 252 vdda-pll-supply = <&vreg_l12a>; 254 vdda-phy-dpdm-supply = <&vreg_l15a>; 253 vdda-phy-dpdm-supply = <&vreg_l15a>; 255 status = "okay"; 254 status = "okay"; 256 }; 255 }; 257 256 258 &xo_board { 257 &xo_board { 259 clock-frequency = <19200000>; 258 clock-frequency = <19200000>; 260 }; 259 };
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