1 // SPDX-License-Identifier: BSD-3-Clause 1 // SPDX-License-Identifier: BSD-3-Clause
2 /* 2 /*
3 * Copyright (c) 2021, Konrad Dybcio <konrad.dy 3 * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org>
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h <<
10 #include <dt-bindings/regulator/qcom,rpmh-regu 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include "sm8150.dtsi" 10 #include "sm8150.dtsi"
12 #include "pm8150.dtsi" 11 #include "pm8150.dtsi"
13 #include "pm8150b.dtsi" 12 #include "pm8150b.dtsi"
14 #include "pm8150l.dtsi" 13 #include "pm8150l.dtsi"
15 14
16 /delete-node/ &cdsp_mem; 15 /delete-node/ &cdsp_mem;
17 /delete-node/ &gpu_mem; 16 /delete-node/ &gpu_mem;
18 /delete-node/ &ipa_fw_mem; 17 /delete-node/ &ipa_fw_mem;
19 /delete-node/ &ipa_gsi_mem; 18 /delete-node/ &ipa_gsi_mem;
20 /delete-node/ &mpss_mem; 19 /delete-node/ &mpss_mem;
21 /delete-node/ &slpi_mem; 20 /delete-node/ &slpi_mem;
22 /delete-node/ &spss_mem; 21 /delete-node/ &spss_mem;
23 /delete-node/ &venus_mem; 22 /delete-node/ &venus_mem;
24 23
25 / { 24 / {
26 qcom,msm-id = <339 0x20000>; /* SM8150 25 qcom,msm-id = <339 0x20000>; /* SM8150 v2 */
27 qcom,board-id = <8 0>; 26 qcom,board-id = <8 0>;
28 27
29 chosen { 28 chosen {
30 #address-cells = <2>; 29 #address-cells = <2>;
31 #size-cells = <2>; 30 #size-cells = <2>;
32 ranges; 31 ranges;
33 32
34 framebuffer: framebuffer@9c000 33 framebuffer: framebuffer@9c000000 {
35 compatible = "simple-f 34 compatible = "simple-framebuffer";
36 reg = <0 0x9c000000 0 35 reg = <0 0x9c000000 0 0x2300000>;
37 /* Griffin BL initiali 36 /* Griffin BL initializes in 2.5k mode, not 4k */
38 width = <1096>; 37 width = <1096>;
39 height = <2560>; 38 height = <2560>;
40 stride = <(1096 * 4)>; 39 stride = <(1096 * 4)>;
41 format = "a8r8g8b8"; 40 format = "a8r8g8b8";
42 /* 41 /*
43 * That's (going to be 42 * That's (going to be) a lot of clocks, but it's necessary due
44 * to unused clk clean 43 * to unused clk cleanup & no panel driver yet (& no dispcc either)..
45 */ 44 */
46 clocks = <&gcc GCC_DIS 45 clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
47 <&gcc GCC_DIS 46 <&gcc GCC_DISP_SF_AXI_CLK>;
48 }; 47 };
49 }; 48 };
50 49
51 gpio-keys { <<
52 compatible = "gpio-keys"; <<
53 <<
54 pinctrl-names = "default"; <<
55 pinctrl-0 = <&focus_n &snapsho <<
56 <<
57 key-camera-focus { <<
58 label = "Camera Focus" <<
59 linux,code = <KEY_CAME <<
60 gpios = <&pm8150b_gpio <<
61 debounce-interval = <1 <<
62 linux,can-disable; <<
63 wakeup-source; <<
64 }; <<
65 <<
66 key-camera-snapshot { <<
67 label = "Camera Snapsh <<
68 linux,code = <KEY_CAME <<
69 gpios = <&pm8150b_gpio <<
70 debounce-interval = <1 <<
71 linux,can-disable; <<
72 wakeup-source; <<
73 }; <<
74 <<
75 key-vol-down { <<
76 label = "Volume Down"; <<
77 linux,code = <KEY_VOLU <<
78 gpios = <&pm8150_gpios <<
79 debounce-interval = <1 <<
80 linux,can-disable; <<
81 wakeup-source; <<
82 }; <<
83 }; <<
84 <<
85 cam0_vdig_vreg: cam0-vdig-regulator { <<
86 compatible = "regulator-fixed" <<
87 regulator-name = "camera0_vdig <<
88 gpio = <&tlmm 22 GPIO_ACTIVE_H <<
89 enable-active-high; <<
90 <<
91 pinctrl-0 = <&main_cam_pwr_en> <<
92 pinctrl-names = "default"; <<
93 }; <<
94 <<
95 cam1_vdig_vreg: cam1-vdig-regulator { <<
96 compatible = "regulator-fixed" <<
97 regulator-name = "camera1_vdig <<
98 gpio = <&tlmm 79 GPIO_ACTIVE_H <<
99 enable-active-high; <<
100 <<
101 pinctrl-0 = <&sub_cam_pwr_en>; <<
102 pinctrl-names = "default"; <<
103 }; <<
104 <<
105 cam2_vdig_vreg: cam2-vdig-regulator { <<
106 compatible = "regulator-fixed" <<
107 regulator-name = "camera2_vdig <<
108 gpio = <&tlmm 25 GPIO_ACTIVE_H <<
109 enable-active-high; <<
110 <<
111 pinctrl-0 = <&chat_cam_pwr_en> <<
112 pinctrl-names = "default"; <<
113 }; <<
114 <<
115 cam3_vdig_vreg: cam3-vdig-regulator { <<
116 compatible = "regulator-fixed" <<
117 regulator-name = "camera3_vdig <<
118 gpio = <&pm8150_gpios 7 GPIO_A <<
119 enable-active-high; <<
120 <<
121 pinctrl-0 = <&supwc_pwr_en>; <<
122 pinctrl-names = "default"; <<
123 }; <<
124 <<
125 cam_vmdr_vreg: cam-vmdr-regulator { <<
126 compatible = "regulator-fixed" <<
127 regulator-name = "camera_vmdr_ <<
128 gpio = <&pm8150l_gpios 3 GPIO_ <<
129 enable-active-high; <<
130 <<
131 pinctrl-0 = <&main_cam_pwr_vmd <<
132 pinctrl-names = "default"; <<
133 }; <<
134 <<
135 rgbcir_vreg: rgbcir-regulator { <<
136 compatible = "regulator-fixed" <<
137 regulator-name = "rgbcir_vreg" <<
138 gpio = <&tlmm 29 GPIO_ACTIVE_H <<
139 enable-active-high; <<
140 <<
141 pinctrl-0 = <&rgbc_ir_pwr_en>; <<
142 pinctrl-names = "default"; <<
143 }; <<
144 <<
145 vph_pwr: vph-pwr-regulator { 50 vph_pwr: vph-pwr-regulator {
146 compatible = "regulator-fixed" 51 compatible = "regulator-fixed";
147 regulator-name = "vph_pwr"; 52 regulator-name = "vph_pwr";
148 regulator-min-microvolt = <370 53 regulator-min-microvolt = <3700000>;
149 regulator-max-microvolt = <370 54 regulator-max-microvolt = <3700000>;
150 }; 55 };
151 56
152 /* 57 /*
153 * Apparently RPMh does not provide su 58 * Apparently RPMh does not provide support for PM8150 S4 because it
154 * is always-on; model it as a fixed r 59 * is always-on; model it as a fixed regulator.
155 */ 60 */
156 vreg_s4a_1p8: pm8150-s4 { 61 vreg_s4a_1p8: pm8150-s4 {
157 compatible = "regulator-fixed" 62 compatible = "regulator-fixed";
158 regulator-name = "vreg_s4a_1p8 63 regulator-name = "vreg_s4a_1p8";
159 64
160 regulator-min-microvolt = <180 65 regulator-min-microvolt = <1800000>;
161 regulator-max-microvolt = <180 66 regulator-max-microvolt = <1800000>;
162 67
163 regulator-always-on; 68 regulator-always-on;
164 regulator-boot-on; 69 regulator-boot-on;
165 70
166 vin-supply = <&vph_pwr>; 71 vin-supply = <&vph_pwr>;
167 }; 72 };
168 73
169 reserved-memory { 74 reserved-memory {
170 mpss_mem: memory@8dc00000 { 75 mpss_mem: memory@8dc00000 {
171 reg = <0x0 0x8dc00000 76 reg = <0x0 0x8dc00000 0x0 0x9600000>;
172 no-map; 77 no-map;
173 }; 78 };
174 79
175 venus_mem: memory@97200000 { 80 venus_mem: memory@97200000 {
176 reg = <0x0 0x97200000 81 reg = <0x0 0x97200000 0x0 0x500000>;
177 no-map; 82 no-map;
178 }; 83 };
179 84
180 slpi_mem: memory@97700000 { 85 slpi_mem: memory@97700000 {
181 reg = <0x0 0x97700000 86 reg = <0x0 0x97700000 0x0 0x1400000>;
182 no-map; 87 no-map;
183 }; 88 };
184 89
185 ipa_fw_mem: memory@98b00000 { 90 ipa_fw_mem: memory@98b00000 {
186 reg = <0x0 0x98b00000 91 reg = <0x0 0x98b00000 0x0 0x10000>;
187 no-map; 92 no-map;
188 }; 93 };
189 94
190 ipa_gsi_mem: memory@98b10000 { 95 ipa_gsi_mem: memory@98b10000 {
191 reg = <0x0 0x98b10000 96 reg = <0x0 0x98b10000 0x0 0x5000>;
192 no-map; 97 no-map;
193 }; 98 };
194 99
195 gpu_mem: memory@98b15000 { 100 gpu_mem: memory@98b15000 {
196 reg = <0x0 0x98b15000 101 reg = <0x0 0x98b15000 0x0 0x2000>;
197 no-map; 102 no-map;
198 }; 103 };
199 104
200 spss_mem: memory@98c00000 { 105 spss_mem: memory@98c00000 {
201 reg = <0x0 0x98c00000 106 reg = <0x0 0x98c00000 0x0 0x100000>;
202 no-map; 107 no-map;
203 }; 108 };
204 109
205 cdsp_mem: memory@98d00000 { 110 cdsp_mem: memory@98d00000 {
206 reg = <0x0 0x98d00000 111 reg = <0x0 0x98d00000 0x0 0x1400000>;
207 no-map; 112 no-map;
208 }; 113 };
209 114
210 cont_splash_mem: memory@9c0000 115 cont_splash_mem: memory@9c000000 {
211 reg = <0x0 0x9c000000 116 reg = <0x0 0x9c000000 0x0 0x2400000>;
212 no-map; 117 no-map;
213 }; 118 };
214 119
215 cdsp_sec_mem: memory@a4c00000 120 cdsp_sec_mem: memory@a4c00000 {
216 reg = <0x0 0xa4c00000 121 reg = <0x0 0xa4c00000 0x0 0x3c00000>;
217 no-map; 122 no-map;
218 }; 123 };
219 124
220 ramoops@ffc00000 { 125 ramoops@ffc00000 {
221 compatible = "ramoops" 126 compatible = "ramoops";
222 reg = <0x0 0xffc00000 127 reg = <0x0 0xffc00000 0x0 0x100000>;
223 record-size = <0x1000> 128 record-size = <0x1000>;
224 console-size = <0x4000 129 console-size = <0x40000>;
225 pmsg-size = <0x20000>; 130 pmsg-size = <0x20000>;
226 ecc-size = <16>; 131 ecc-size = <16>;
227 no-map; 132 no-map;
228 }; 133 };
229 }; 134 };
230 }; 135 };
231 136
232 &adsp_mem { 137 &adsp_mem {
233 reg = <0x0 0x8be00000 0x0 0x1e00000>; 138 reg = <0x0 0x8be00000 0x0 0x1e00000>;
234 }; 139 };
235 140
236 &apps_rsc { 141 &apps_rsc {
237 regulators-0 { !! 142 pm8150-rpmh-regulators {
238 compatible = "qcom,pm8150-rpmh 143 compatible = "qcom,pm8150-rpmh-regulators";
239 qcom,pmic-id = "a"; 144 qcom,pmic-id = "a";
240 145
241 vdd-s1-supply = <&vph_pwr>; 146 vdd-s1-supply = <&vph_pwr>;
242 vdd-s2-supply = <&vph_pwr>; 147 vdd-s2-supply = <&vph_pwr>;
243 vdd-s3-supply = <&vph_pwr>; 148 vdd-s3-supply = <&vph_pwr>;
244 vdd-s4-supply = <&vph_pwr>; 149 vdd-s4-supply = <&vph_pwr>;
245 vdd-s5-supply = <&vph_pwr>; 150 vdd-s5-supply = <&vph_pwr>;
246 vdd-s6-supply = <&vph_pwr>; 151 vdd-s6-supply = <&vph_pwr>;
247 vdd-s7-supply = <&vph_pwr>; 152 vdd-s7-supply = <&vph_pwr>;
248 vdd-s8-supply = <&vph_pwr>; 153 vdd-s8-supply = <&vph_pwr>;
249 vdd-s9-supply = <&vph_pwr>; 154 vdd-s9-supply = <&vph_pwr>;
250 vdd-s10-supply = <&vph_pwr>; 155 vdd-s10-supply = <&vph_pwr>;
251 156
252 vdd-l1-l8-l11-supply = <&vreg_ 157 vdd-l1-l8-l11-supply = <&vreg_s6a_0p9>;
253 vdd-l2-l10-supply = <&vreg_bob 158 vdd-l2-l10-supply = <&vreg_bob>;
254 vdd-l3-l4-l5-l18-supply = <&vr 159 vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p9>;
255 vdd-l6-l9-supply = <&vreg_s8c_ 160 vdd-l6-l9-supply = <&vreg_s8c_1p3>;
256 vdd-l7-l12-l14-l15-supply = <& 161 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_1p9>;
257 vdd-l13-l16-l17-supply = <&vre 162 vdd-l13-l16-l17-supply = <&vreg_bob>;
258 163
259 vreg_s2a_0p6: smps2 { 164 vreg_s2a_0p6: smps2 {
260 regulator-min-microvol 165 regulator-min-microvolt = <600000>;
261 regulator-max-microvol 166 regulator-max-microvolt = <600000>;
262 regulator-initial-mode 167 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
263 }; 168 };
264 169
265 vreg_s5a_1p9: smps5 { 170 vreg_s5a_1p9: smps5 {
266 regulator-min-microvol 171 regulator-min-microvolt = <1904000>;
267 regulator-max-microvol 172 regulator-max-microvolt = <2040000>;
268 regulator-initial-mode 173 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269 }; 174 };
270 175
271 vreg_s6a_0p9: smps6 { 176 vreg_s6a_0p9: smps6 {
272 regulator-min-microvol 177 regulator-min-microvolt = <920000>;
273 regulator-max-microvol 178 regulator-max-microvolt = <1128000>;
274 regulator-initial-mode 179 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
275 }; 180 };
276 181
277 vreg_l1a_0p75: ldo1 { 182 vreg_l1a_0p75: ldo1 {
278 regulator-min-microvol 183 regulator-min-microvolt = <752000>;
279 regulator-max-microvol 184 regulator-max-microvolt = <752000>;
280 regulator-initial-mode 185 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
281 }; 186 };
282 187
283 vreg_l2a_3p1: ldo2 { 188 vreg_l2a_3p1: ldo2 {
284 regulator-min-microvol 189 regulator-min-microvolt = <3072000>;
285 regulator-max-microvol 190 regulator-max-microvolt = <3072000>;
286 regulator-initial-mode 191 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287 }; 192 };
288 193
289 vreg_l3a_0p8: ldo3 { 194 vreg_l3a_0p8: ldo3 {
290 regulator-min-microvol 195 regulator-min-microvolt = <480000>;
291 regulator-max-microvol 196 regulator-max-microvolt = <932000>;
292 regulator-initial-mode 197 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
293 }; 198 };
294 199
295 vreg_l5a_0p875: ldo5 { 200 vreg_l5a_0p875: ldo5 {
296 regulator-min-microvol 201 regulator-min-microvolt = <880000>;
297 regulator-max-microvol 202 regulator-max-microvolt = <880000>;
298 regulator-initial-mode 203 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
299 }; 204 };
300 205
301 vreg_l6a_1p2: ldo6 { 206 vreg_l6a_1p2: ldo6 {
302 regulator-min-microvol 207 regulator-min-microvolt = <1200000>;
303 regulator-max-microvol 208 regulator-max-microvolt = <1200000>;
304 regulator-initial-mode 209 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305 }; 210 };
306 211
307 vreg_l7a_1p8: ldo7 { 212 vreg_l7a_1p8: ldo7 {
308 regulator-min-microvol 213 regulator-min-microvolt = <1800000>;
309 regulator-max-microvol 214 regulator-max-microvolt = <1800000>;
310 regulator-initial-mode 215 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
311 }; 216 };
312 217
313 vreg_l9a_1p2: ldo9 { 218 vreg_l9a_1p2: ldo9 {
314 regulator-min-microvol 219 regulator-min-microvolt = <1200000>;
315 regulator-max-microvol 220 regulator-max-microvolt = <1200000>;
316 regulator-initial-mode 221 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
317 }; 222 };
318 223
319 vreg_l10a_2p5: ldo10 { 224 vreg_l10a_2p5: ldo10 {
320 regulator-min-microvol 225 regulator-min-microvolt = <2504000>;
321 regulator-max-microvol 226 regulator-max-microvolt = <2960000>;
322 regulator-initial-mode 227 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
323 }; 228 };
324 229
325 vreg_l11a_0p8: ldo11 { 230 vreg_l11a_0p8: ldo11 {
326 regulator-min-microvol 231 regulator-min-microvolt = <800000>;
327 regulator-max-microvol 232 regulator-max-microvolt = <800000>;
328 regulator-initial-mode 233 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
329 }; 234 };
330 235
331 vreg_l12a_1p8: ldo12 { 236 vreg_l12a_1p8: ldo12 {
332 regulator-min-microvol 237 regulator-min-microvolt = <1800000>;
333 regulator-max-microvol 238 regulator-max-microvolt = <1800000>;
334 regulator-initial-mode 239 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
335 }; 240 };
336 241
337 /* L13 is unused. */ 242 /* L13 is unused. */
338 243
339 vreg_l14a_1p8: ldo14 { 244 vreg_l14a_1p8: ldo14 {
340 regulator-min-microvol 245 regulator-min-microvolt = <1800000>;
341 regulator-max-microvol 246 regulator-max-microvolt = <1800000>;
342 regulator-initial-mode 247 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 }; 248 };
344 249
345 vreg_l15a_1p7: ldo15 { 250 vreg_l15a_1p7: ldo15 {
346 regulator-min-microvol 251 regulator-min-microvolt = <1704000>;
347 regulator-max-microvol 252 regulator-max-microvolt = <1704000>;
348 regulator-initial-mode 253 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 }; 254 };
350 255
351 vreg_l16a_2p7: ldo16 { 256 vreg_l16a_2p7: ldo16 {
352 regulator-min-microvol 257 regulator-min-microvolt = <2704000>;
353 regulator-max-microvol 258 regulator-max-microvolt = <2960000>;
354 regulator-initial-mode 259 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 }; 260 };
356 261
357 vreg_l17a_3p0: ldo17 { 262 vreg_l17a_3p0: ldo17 {
358 regulator-min-microvol 263 regulator-min-microvolt = <2856000>;
359 regulator-max-microvol 264 regulator-max-microvolt = <3008000>;
360 regulator-initial-mode 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 }; 266 };
362 267
363 vreg_l18a_0p8: ldo18 { 268 vreg_l18a_0p8: ldo18 {
364 regulator-min-microvol 269 regulator-min-microvolt = <880000>;
365 regulator-max-microvol 270 regulator-max-microvolt = <912000>;
366 regulator-initial-mode 271 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 }; 272 };
368 }; 273 };
369 274
370 regulators-1 { !! 275 pm8150l-rpmh-regulators {
371 compatible = "qcom,pm8150l-rpm 276 compatible = "qcom,pm8150l-rpmh-regulators";
372 qcom,pmic-id = "c"; 277 qcom,pmic-id = "c";
373 278
374 vdd-s1-supply = <&vph_pwr>; 279 vdd-s1-supply = <&vph_pwr>;
375 vdd-s2-supply = <&vph_pwr>; 280 vdd-s2-supply = <&vph_pwr>;
376 vdd-s3-supply = <&vph_pwr>; 281 vdd-s3-supply = <&vph_pwr>;
377 vdd-s4-supply = <&vph_pwr>; 282 vdd-s4-supply = <&vph_pwr>;
378 vdd-s5-supply = <&vph_pwr>; 283 vdd-s5-supply = <&vph_pwr>;
379 vdd-s6-supply = <&vph_pwr>; 284 vdd-s6-supply = <&vph_pwr>;
380 vdd-s7-supply = <&vph_pwr>; 285 vdd-s7-supply = <&vph_pwr>;
381 vdd-s8-supply = <&vph_pwr>; 286 vdd-s8-supply = <&vph_pwr>;
382 287
383 vdd-l1-l8-supply = <&vreg_s4a_ 288 vdd-l1-l8-supply = <&vreg_s4a_1p8>;
384 vdd-l2-l3-supply = <&vreg_s8c_ 289 vdd-l2-l3-supply = <&vreg_s8c_1p3>;
385 vdd-l4-l5-l6-supply = <&vreg_b 290 vdd-l4-l5-l6-supply = <&vreg_bob>;
386 vdd-l7-l11-supply = <&vreg_bob 291 vdd-l7-l11-supply = <&vreg_bob>;
387 vdd-l9-l10-supply = <&vreg_bob 292 vdd-l9-l10-supply = <&vreg_bob>;
388 293
389 vdd-bob-supply = <&vph_pwr>; 294 vdd-bob-supply = <&vph_pwr>;
390 vdd-flash-supply = <&vreg_bob> 295 vdd-flash-supply = <&vreg_bob>;
391 vdd-rgb-supply = <&vreg_bob>; 296 vdd-rgb-supply = <&vreg_bob>;
392 297
393 vreg_bob: bob { 298 vreg_bob: bob {
394 regulator-min-microvol 299 regulator-min-microvolt = <3350000>;
395 regulator-max-microvol 300 regulator-max-microvolt = <4000000>;
396 regulator-initial-mode 301 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
397 regulator-allow-bypass 302 regulator-allow-bypass;
398 }; 303 };
399 304
400 vreg_s1c_1p1: smps1 { 305 vreg_s1c_1p1: smps1 {
401 regulator-min-microvol 306 regulator-min-microvolt = <1128000>;
402 regulator-max-microvol 307 regulator-max-microvolt = <1128000>;
403 regulator-initial-mode 308 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
404 }; 309 };
405 310
406 vreg_s8c_1p3: smps8 { 311 vreg_s8c_1p3: smps8 {
407 regulator-min-microvol 312 regulator-min-microvolt = <1352000>;
408 regulator-max-microvol 313 regulator-max-microvolt = <1352000>;
409 regulator-initial-mode 314 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
410 }; 315 };
411 316
412 vreg_l1c_1p8: ldo1 { 317 vreg_l1c_1p8: ldo1 {
413 regulator-min-microvol 318 regulator-min-microvolt = <1800000>;
414 regulator-max-microvol 319 regulator-max-microvolt = <1800000>;
415 regulator-initial-mode 320 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
416 }; 321 };
417 322
418 vreg_l2c_1p3: ldo2 { 323 vreg_l2c_1p3: ldo2 {
419 regulator-min-microvol 324 regulator-min-microvolt = <1304000>;
420 regulator-max-microvol 325 regulator-max-microvolt = <1304000>;
421 regulator-initial-mode 326 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
422 }; 327 };
423 328
424 vreg_l3c_1p2: ldo3 { 329 vreg_l3c_1p2: ldo3 {
425 regulator-min-microvol 330 regulator-min-microvolt = <1200000>;
426 regulator-max-microvol 331 regulator-max-microvolt = <1200000>;
427 regulator-initial-mode 332 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
428 }; 333 };
429 334
430 vreg_l4c_1p8: ldo4 { 335 vreg_l4c_1p8: ldo4 {
431 regulator-min-microvol 336 regulator-min-microvolt = <1704000>;
432 regulator-max-microvol 337 regulator-max-microvolt = <2928000>;
433 regulator-initial-mode 338 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
434 }; 339 };
435 340
436 vreg_l5c_1p8: ldo5 { 341 vreg_l5c_1p8: ldo5 {
437 regulator-min-microvol 342 regulator-min-microvolt = <1704000>;
438 regulator-max-microvol 343 regulator-max-microvolt = <2928000>;
439 regulator-initial-mode 344 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
440 }; 345 };
441 346
442 vreg_l6c_2p9: ldo6 { 347 vreg_l6c_2p9: ldo6 {
443 regulator-min-microvol 348 regulator-min-microvolt = <1800000>;
444 regulator-max-microvol 349 regulator-max-microvolt = <2960000>;
445 regulator-initial-mode 350 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
446 regulator-allow-set-lo 351 regulator-allow-set-load;
447 regulator-allowed-mode !! 352 regulator-allowed-modes =
448 !! 353 <RPMH_REGULATOR_MODE_LPM
>> 354 RPMH_REGULATOR_MODE_HPM>;
449 }; 355 };
450 356
451 vreg_l7c_3p0: ldo7 { 357 vreg_l7c_3p0: ldo7 {
452 regulator-min-microvol 358 regulator-min-microvolt = <2856000>;
453 regulator-max-microvol 359 regulator-max-microvolt = <3104000>;
454 regulator-initial-mode 360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
455 }; 361 };
456 362
457 vreg_l8c_1p8: ldo8 { 363 vreg_l8c_1p8: ldo8 {
458 regulator-min-microvol 364 regulator-min-microvolt = <1800000>;
459 regulator-max-microvol 365 regulator-max-microvolt = <1800000>;
460 regulator-initial-mode 366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
461 }; 367 };
462 368
463 vreg_l9c_2p9: ldo9 { 369 vreg_l9c_2p9: ldo9 {
464 regulator-min-microvol 370 regulator-min-microvolt = <2704000>;
465 regulator-max-microvol 371 regulator-max-microvolt = <2960000>;
466 regulator-initial-mode 372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
467 regulator-allow-set-lo 373 regulator-allow-set-load;
468 regulator-allowed-mode !! 374 regulator-allowed-modes =
469 !! 375 <RPMH_REGULATOR_MODE_LPM
>> 376 RPMH_REGULATOR_MODE_HPM>;
470 }; 377 };
471 378
472 vreg_l10c_3p3: ldo10 { 379 vreg_l10c_3p3: ldo10 {
473 regulator-min-microvol 380 regulator-min-microvolt = <3000000>;
474 regulator-max-microvol 381 regulator-max-microvolt = <3312000>;
475 regulator-initial-mode 382 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
476 }; 383 };
477 384
478 vreg_l11c_3p3: ldo11 { 385 vreg_l11c_3p3: ldo11 {
479 regulator-min-microvol 386 regulator-min-microvolt = <3000000>;
480 regulator-max-microvol 387 regulator-max-microvolt = <3312000>;
481 regulator-initial-mode 388 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
482 }; 389 };
483 }; 390 };
484 391
485 /* PM8009 is not present on these boar 392 /* PM8009 is not present on these boards, even if downstream sources suggest so. */
486 }; 393 };
487 394
488 &i2c4 { 395 &i2c4 {
489 status = "okay"; 396 status = "okay";
490 397
491 /* Qcom SMB1355 @ c */ 398 /* Qcom SMB1355 @ c */
492 /* Qcom SMB1390 @ 10 */ 399 /* Qcom SMB1390 @ 10 */
>> 400 /* NXP PN553 NFC @ 28 */
493 /* Qcom FSA4480 USB-C audio switch @ 4 401 /* Qcom FSA4480 USB-C audio switch @ 43 */
494 <<
495 nfc@28 { <<
496 compatible = "nxp,nxp-nci-i2c" <<
497 reg = <0x28>; <<
498 <<
499 interrupt-parent = <&tlmm>; <<
500 interrupts = <47 IRQ_TYPE_EDGE <<
501 <<
502 enable-gpios = <&tlmm 41 GPIO_ <<
503 firmware-gpios = <&tlmm 48 GPI <<
504 }; <<
505 }; 402 };
506 403
507 &i2c7 { 404 &i2c7 {
508 status = "okay"; 405 status = "okay";
509 406
510 /* AMS TCS3490 RGB+IR color sensor @ 7 407 /* AMS TCS3490 RGB+IR color sensor @ 72 */
511 }; 408 };
512 409
513 &i2c10 { 410 &i2c10 {
514 status = "okay"; 411 status = "okay";
515 412
516 /* Samsung touchscreen @ 48 */ 413 /* Samsung touchscreen @ 48 */
517 }; 414 };
518 415
519 &pm8150_gpios { <<
520 gpio-line-names = "VOL_DOWN_N", /* GPI <<
521 "", <<
522 "NC", <<
523 "NC", <<
524 "", <<
525 "NC", <<
526 "SUPWC_PWR_EN", <<
527 "", <<
528 "NC", <<
529 "NC"; /* GPIO_10 */ <<
530 <<
531 vol_down_n: vol-down-n-state { <<
532 pins = "gpio1"; <<
533 function = "normal"; <<
534 power-source = <0>; <<
535 bias-pull-up; <<
536 input-enable; <<
537 }; <<
538 <<
539 supwc_pwr_en: supwc-pwr-en-state { <<
540 pins = "gpio7"; <<
541 function = "normal"; <<
542 qcom,drive-strength = <1>; <<
543 power-source = <1>; <<
544 drive-push-pull; <<
545 output-low; <<
546 }; <<
547 }; <<
548 <<
549 &pm8150b_gpios { <<
550 gpio-line-names = "SNAPSHOT_N", /* GPI <<
551 "FOCUS_N", <<
552 "NC", <<
553 "NC", <<
554 "RF_LCD_ID_EN", <<
555 "NC", <<
556 "TS_VDDH_EN", <<
557 "LCD_ID", <<
558 "", <<
559 "NC", /* GPIO_10 */ <<
560 "NC", <<
561 "RF_ID"; <<
562 <<
563 snapshot_n: snapshot-n-state { <<
564 pins = "gpio1"; <<
565 function = "normal"; <<
566 power-source = <0>; <<
567 bias-pull-up; <<
568 input-enable; <<
569 }; <<
570 <<
571 focus_n: focus-n-state { <<
572 pins = "gpio2"; <<
573 function = "normal"; <<
574 power-source = <0>; <<
575 bias-pull-up; <<
576 input-enable; <<
577 }; <<
578 }; <<
579 <<
580 &pm8150l_gpios { <<
581 gpio-line-names = "TS_VDDIO_EN", /* GP <<
582 "NC", <<
583 "MAIN_CAM_PWR_VMDR_E <<
584 "NC", <<
585 "", <<
586 "NC", <<
587 "NC", <<
588 "FP_LDO_EN", <<
589 "NC", <<
590 "NC", /* GPIO_10 */ <<
591 "NC", <<
592 "NC"; <<
593 <<
594 main_cam_pwr_vmdr_en: main-cam-pwr-vmd <<
595 pins = "gpio3"; <<
596 function = "normal"; <<
597 qcom,drive-strength = <PMIC_GP <<
598 power-source = <0>; <<
599 drive-push-pull; <<
600 output-low; <<
601 }; <<
602 }; <<
603 <<
604 &pon_pwrkey { 416 &pon_pwrkey {
605 status = "okay"; 417 status = "okay";
606 }; 418 };
607 419
608 &pon_resin { <<
609 linux,code = <KEY_VOLUMEUP>; <<
610 status = "okay"; <<
611 }; <<
612 <<
613 &qupv3_id_0 { 420 &qupv3_id_0 {
614 status = "okay"; 421 status = "okay";
615 }; 422 };
616 423
617 &qupv3_id_1 { 424 &qupv3_id_1 {
618 status = "okay"; 425 status = "okay";
619 }; 426 };
620 427
621 &sdhc_2 { <<
622 vmmc-supply = <&vreg_l9c_2p9>; <<
623 vqmmc-supply = <&vreg_l6c_2p9>; <<
624 cd-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH> <<
625 bus-width = <4>; <<
626 no-sdio; <<
627 no-mmc; <<
628 <<
629 status = "okay"; <<
630 }; <<
631 <<
632 &tlmm { 428 &tlmm {
633 gpio-reserved-ranges = <126 4>; 429 gpio-reserved-ranges = <126 4>;
634 gpio-line-names = "NFC_ESE_SPI_MISO", <<
635 "NFC_ESE_SPI_MOSI", <<
636 "NFC_ESE_SPI_SCLK", <<
637 "NFC_ESE_SPI_CS_N", <<
638 "NC", <<
639 "NC", <<
640 "DISP_RESET_N", <<
641 "DEBUG_GPIO0", <<
642 "MDP_VSYNC_P", <<
643 "TS_I2C_SDA", <<
644 "TS_I2C_SCL", /* GPI <<
645 "CAM_SOF", <<
646 "CAM2_RST_N", <<
647 "CAM_MCLK0", <<
648 "CAM_MCLK1", <<
649 "CAM_MCLK2", <<
650 "CAM_MCLK3", <<
651 "CCI_I2C_SDA0", <<
652 "CCI_I2C_SCL0", <<
653 "CCI_I2C_SDA1", <<
654 "CCI_I2C_SCL1", /* G <<
655 "NC", <<
656 "MAIN_CAM_PWR_EN", <<
657 "CAM3_RST_N", <<
658 "NC", <<
659 "CHAT_CAM_PWR_EN", <<
660 "NC", <<
661 "NC", <<
662 "CAM0_RST_N", <<
663 "RGBC_IR_PWR_EN", <<
664 "CAM1_RST_N", /* GPI <<
665 "CCI_I2C_SDA2", <<
666 "CCI_I2C_SCL2", <<
667 "CCI_I2C_SDA3", <<
668 "CCI_I2C_SCL3", <<
669 "NC", <<
670 "DEBUG_GPIO1", <<
671 "RGBC_IR_INT", <<
672 "USB_CC_DIR", <<
673 "NC", <<
674 "NC", /* GPIO_40 */ <<
675 "NFC_EN", <<
676 "NFC_ESE_PWR_REQ", <<
677 "BT_HCI_UART_CTS_N", <<
678 "BT_HCI_UART_RFR_N", <<
679 "BT_HCI_UART_TXD", <<
680 "BT_HCI_UART_RXD", <<
681 "NFC_IRQ", <<
682 "NFC_DWL_REQ", <<
683 "UIM2_DETECT_EN", <<
684 "WLAN_SW_CTRL", /* G <<
685 "APPS_I2C_SDA", <<
686 "APPS_I2C_SCL", <<
687 "NC", <<
688 "TS_RESET_N", <<
689 "NC", <<
690 "NC", <<
691 "NC", <<
692 "NC", <<
693 "HW_ID_0", <<
694 "NC", /* GPIO_60 */ <<
695 "QLINK_REQUEST", <<
696 "QLINK_ENABLE", <<
697 "WMSS_RESET_N", <<
698 "SDM_GRFC_8", <<
699 "WDOG_DISABLE", <<
700 "NC", <<
701 "NC", <<
702 "PA_INDICATOR_OR", <<
703 "MSS_LTE_COXM_TXD", <<
704 "MSS_LTE_COXM_RXD", <<
705 "SDM_RFFE0_DATA", <<
706 "SDM_RFFE0_CLK", <<
707 "SDM_RFFE1_DATA", <<
708 "SDM_RFFE1_CLK", <<
709 "SDM_RFFE2_DATA", <<
710 "SDM_RFFE2_CLK", <<
711 "SDM_RFFE3_DATA", <<
712 "SDM_RFFE3_CLK", <<
713 "SUB_CAM_PWR_EN", <<
714 "FP_RESET_N", /* GPI <<
715 "NC", <<
716 "NC", <<
717 "NC", <<
718 "NC", <<
719 "DEBUG_UART_TX", <<
720 "DEBUG_UART_RX", <<
721 "DVDT_WRT_DET_AND", <<
722 "NC", <<
723 "NC", <<
724 "NC", /* GPIO_90 */ <<
725 "NC", <<
726 "NC", <<
727 "NC", <<
728 "NC", <<
729 "UDON_SWITCH_SEL", <<
730 "SD_CARD_DET_N", <<
731 "NC", <<
732 "CAMSENSOR_I2C_SDA", <<
733 "CAMSENSOR_I2C_SCL", <<
734 "USB_AUDIO_EN1", /* <<
735 "DISP_ERR_FG", <<
736 "NC", <<
737 "NC", <<
738 "NC", <<
739 "UIM2_DATA", <<
740 "UIM2_CLK", <<
741 "UIM2_RESET", <<
742 "UIM2_DET", <<
743 "UIM1_DATA", <<
744 "UIM1_CLK", /* GPIO_ <<
745 "UIM1_RESET", <<
746 "UIM1_PRESENT", <<
747 "NFC_CLK_REQ", <<
748 "SW_SERVICE", <<
749 "NC", <<
750 "RF_ID_EXTENSION", <<
751 "ALS_PROX_INT_N", <<
752 "FP_INT", <<
753 "DVDT_WRT_DET_OR", <<
754 "BAROMETER_INT", /* <<
755 "ACC_COVER_OPEN", <<
756 "TS_INT_N", <<
757 "CODEC_INT1_N", <<
758 "CODEC_INT2_N", <<
759 "TX_GTR_THRES_IN", <<
760 "FP_SPI_MISO", <<
761 "FP_SPI_MOSI", <<
762 "FP_SPI_SCLK", <<
763 "FP_SPI_CS_N", <<
764 "NC", /* GPIO_130 */ <<
765 "DVDT_ENABLE", <<
766 "ACCEL_INT", <<
767 "NC", <<
768 "MAG_INT_N", <<
769 "NC", <<
770 "FORCED_USB_BOOT", <<
771 "NC", <<
772 "NC", <<
773 "HW_ID_1", <<
774 "NC", /* GPIO_140 */ <<
775 "NC", <<
776 "NC", <<
777 "CODEC_RST_N", <<
778 "CDC_SPI_MISO", <<
779 "CDC_SPI_MOSI", <<
780 "CDC_SPI_SCLK", <<
781 "CDC_SPI_CS_N", <<
782 "NC", <<
783 "LPASS_SLIMBUS_CLK", <<
784 "LPASS_SLIMBUS_DATA0 <<
785 "LPASS_SLIMBUS_DATA1 <<
786 "USB_AUDIO_EN2", <<
787 "BT_FM_SLIMBUS_DATA" <<
788 "BT_FM_SLIMBUS_CLK", <<
789 "COMPASS_I2C_SDA", <<
790 "COMPASS_I2C_SCL", <<
791 "SSC_SPI_1_MISO", <<
792 "SSC_SPI_1_MOSI", <<
793 "SSC_SPI_1_CLK", <<
794 "SSC_SPI_1_CS_N", /* <<
795 "SSC_SENSOR_I2C_SDA" <<
796 "SSC_SENSOR_I2C_SCL" <<
797 "NC", <<
798 "NC", <<
799 "NC", <<
800 "NC", <<
801 "SSC_UART_1_TX", <<
802 "SSC_UART_1_RX", <<
803 "WL_CMD_CLK_CHAIN0", <<
804 "WL_CMD_DATA_CHAIN0" <<
805 "WL_CMD_CLK_CHAIN1", <<
806 "WL_CMD_DATA_CHAIN1" <<
807 "WL_BT_COEX_CLK", <<
808 "WL_BT_COEX_DATA"; <<
809 <<
810 main_cam_pwr_en: main-cam-pwr-en-state <<
811 pins = "gpio22"; <<
812 function = "gpio"; <<
813 drive-strength = <2>; <<
814 bias-disable; <<
815 output-low; <<
816 }; <<
817 <<
818 chat_cam_pwr_en: chat-cam-pwr-en-state <<
819 pins = "gpio25"; <<
820 function = "gpio"; <<
821 drive-strength = <2>; <<
822 bias-disable; <<
823 output-low; <<
824 }; <<
825 <<
826 rgbc_ir_pwr_en: rgbc-ir-pwr-en-state { <<
827 pins = "gpio29"; <<
828 function = "gpio"; <<
829 drive-strength = <2>; <<
830 bias-disable; <<
831 output-low; <<
832 }; <<
833 <<
834 sub_cam_pwr_en: sub-cam-pwr-en-state { <<
835 pins = "gpio79"; <<
836 function = "gpio"; <<
837 drive-strength = <2>; <<
838 bias-pull-down; <<
839 }; <<
840 }; 430 };
841 431
842 &uart2 { 432 &uart2 {
843 status = "okay"; 433 status = "okay";
844 }; 434 };
845 435
846 /* BIG WARNING! DO NOT TOUCH UFS, YOUR DEVICE 436 /* BIG WARNING! DO NOT TOUCH UFS, YOUR DEVICE WILL DIE! */
847 &ufs_mem_hc { status = "disabled"; }; 437 &ufs_mem_hc { status = "disabled"; };
848 &ufs_mem_phy { status = "disabled"; }; 438 &ufs_mem_phy { status = "disabled"; };
849 439
850 &usb_1 { 440 &usb_1 {
851 status = "okay"; 441 status = "okay";
852 }; 442 };
853 443
854 &usb_1_dwc3 { 444 &usb_1_dwc3 {
855 dr_mode = "peripheral"; 445 dr_mode = "peripheral";
856 }; 446 };
857 447
858 &usb_1_hsphy { 448 &usb_1_hsphy {
859 status = "okay"; 449 status = "okay";
860 vdda-pll-supply = <&vreg_l5a_0p875>; 450 vdda-pll-supply = <&vreg_l5a_0p875>;
861 vdda33-supply = <&vreg_l2a_3p1>; 451 vdda33-supply = <&vreg_l2a_3p1>;
862 vdda18-supply = <&vreg_l12a_1p8>; 452 vdda18-supply = <&vreg_l12a_1p8>;
863 }; 453 };
864 454
865 &usb_1_qmpphy { 455 &usb_1_qmpphy {
866 status = "okay"; 456 status = "okay";
867 vdda-phy-supply = <&vreg_l3c_1p2>; 457 vdda-phy-supply = <&vreg_l3c_1p2>;
868 vdda-pll-supply = <&vreg_l18a_0p8>; 458 vdda-pll-supply = <&vreg_l18a_0p8>;
869 }; 459 };
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